--- /dev/null
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZO=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_PANIC_TIMEOUT=1
+# CONFIG_SYSCTL_SYSCALL is not set
+# CONFIG_ELF_CORE is not set
+CONFIG_ASHMEM=y
+# CONFIG_AIO is not set
+CONFIG_EMBEDDED=y
+# CONFIG_SLUB_DEBUG is not set
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_ARCH_RK30=y
+CONFIG_DDR_INIT_CHANGE_FREQ=y
+CONFIG_DDR_SDRAM_FREQ=300
+# CONFIG_DDR_TEST is not set
+CONFIG_CLK_SWITCH_TO_32K=y
+CONFIG_SOC_RK3028=y
+CONFIG_MACH_RK3028_86V=y
+CONFIG_FIQ_DEBUGGER=y
+CONFIG_FIQ_DEBUGGER_NO_SLEEP=y
+CONFIG_FIQ_DEBUGGER_CONSOLE=y
+CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SMP=y
+# CONFIG_SMP_ON_UP is not set
+CONFIG_NR_CPUS=2
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_HIGHMEM=y
+CONFIG_COMPACTION=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttyFIQ0 androidboot.console=ttyFIQ0 init=/init"
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_IDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_WAKELOCK=y
+CONFIG_PM_RUNTIME=y
+CONFIG_PM_DEBUG=y
+CONFIG_SUSPEND_TIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_INET_ESP=y
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6=y
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_TUNNEL=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_NETFILTER=y
+# CONFIG_BRIDGE_NETFILTER is not set
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_SIP=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_TRACE=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_TARGET_REJECT_SKERR=y
+CONFIG_IP_NF_TARGET_LOG=y
+CONFIG_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_NF_CONNTRACK_IPV6=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_TARGET_LOG=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_TARGET_REJECT_SKERR=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+CONFIG_BRIDGE=y
+# CONFIG_BRIDGE_IGMP_SNOOPING is not set
+CONFIG_PHONET=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_INGRESS=y
+CONFIG_NET_CLS_U32=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=y
+CONFIG_NET_ACT_GACT=y
+CONFIG_NET_ACT_MIRRED=y
+CONFIG_BT=y
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIBCM4325=y
+CONFIG_BT_AUTOSLEEP=y
+CONFIG_CFG80211=y
+CONFIG_MAC80211=y
+CONFIG_RFKILL=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND_IDS=y
+CONFIG_MTD_RKNAND=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_MISC_DEVICES=y
+CONFIG_UID_STAT=y
+CONFIG_APANIC=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_CRYPT=y
+CONFIG_DM_UEVENT=y
+CONFIG_NETDEVICES=y
+CONFIG_PHYLIB=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN_80211=y
+CONFIG_RTL8188EU=y
+CONFIG_USB_USBNET=y
+CONFIG_PPP=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPPOLAC=y
+CONFIG_PPPOPNS=y
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_KEYRESET=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_INPUT_TABLET=y
+CONFIG_TABLET_USB_ACECAD=y
+CONFIG_TABLET_USB_AIPTEK=y
+CONFIG_TABLET_USB_GTCO=y
+CONFIG_TABLET_USB_HANWANG=y
+CONFIG_TABLET_USB_KBTAB=y
+CONFIG_TABLET_USB_WACOM=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_GSLX680_RK3028=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_KEYCHORD=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SENSOR_DEVICE=y
+CONFIG_GSENSOR_DEVICE=y
+CONFIG_GS_MXC6225=y
+# CONFIG_SERIO is not set
+# CONFIG_CONSOLE_TRANSLATIONS is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_RK29=y
+CONFIG_UART0_RK29=y
+CONFIG_UART0_DMA_RK29=2
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C0_CONTROLLER_RK30=y
+CONFIG_I2C1_CONTROLLER_RK30=y
+CONFIG_I2C2_CONTROLLER_RK30=y
+CONFIG_I2C3_CONTROLLER_RK30=y
+CONFIG_I2C4_CONTROLLER_RK30=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_EXPANDED_GPIO_NUM=0
+CONFIG_EXPANDED_GPIO_IRQ_NUM=0
+CONFIG_SPI_FPGA_GPIO_NUM=0
+CONFIG_SPI_FPGA_GPIO_IRQ_NUM=0
+CONFIG_POWER_SUPPLY=y
+CONFIG_BATTERY_RK30_ADC_FAC=y
+CONFIG_BATTERY_RK30_AC_CHARGE=y
+CONFIG_BATTERY_RK30_VOL3V8=y
+# CONFIG_HWMON is not set
+CONFIG_MFD_TPS65910=y
+CONFIG_MFD_RK610=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_TPS65910=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_VIDEO_DEV=y
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_GC0308=y
+CONFIG_SOC_CAMERA_GC2035=y
+CONFIG_VIDEO_RK29=y
+CONFIG_VIDEO_RK29_CAMMEM_ION=y
+CONFIG_ION=y
+CONFIG_ION_ROCKCHIP=y
+CONFIG_FB=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_DISPLAY_SUPPORT=y
+CONFIG_LCD_RK3028_86V=y
+# CONFIG_RK610_TVOUT is not set
+CONFIG_FB_ROCKCHIP=y
+CONFIG_DUAL_LCDC_DUAL_DISP_IN_KERNEL=y
+CONFIG_LCDC_RK3066B=y
+CONFIG_LCDC1_RK3066B=y
+CONFIG_RK_HDMI=y
+CONFIG_HDMI_RK610=y
+CONFIG_RK_HDMI_CTL_CODEC=y
+CONFIG_RGA_RK30=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_RK29_SOC=y
+CONFIG_SND_I2S_DMA_EVENT_STATIC=y
+CONFIG_SND_RK29_SOC_RK610=y
+CONFIG_SND_RK29_CODEC_SOC_SLAVE=y
+CONFIG_UHID=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_ACRUX=y
+CONFIG_HID_ACRUX_FF=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
+CONFIG_DRAGONRISE_FF=y
+CONFIG_HID_EMS_FF=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_KEYTOUCH=y
+CONFIG_HID_KYE=y
+CONFIG_HID_UCLOGIC=y
+CONFIG_HID_WALTOP=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LCPOWER=y
+CONFIG_HID_LOGITECH=y
+CONFIG_LOGITECH_FF=y
+CONFIG_LOGIRUMBLEPAD2_FF=y
+CONFIG_LOGIG940_FF=y
+CONFIG_LOGIWII_FF=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_MULTITOUCH=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_ORTEK=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_PANTHERLORD_FF=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_PICOLCD=y
+CONFIG_HID_QUANTA=y
+CONFIG_HID_ROCCAT_ARVO=y
+CONFIG_HID_ROCCAT_KONE=y
+CONFIG_HID_ROCCAT_KONEPLUS=y
+CONFIG_HID_ROCCAT_KOVAPLUS=y
+CONFIG_HID_ROCCAT_PYRA=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+CONFIG_GREENASIA_FF=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_SMARTJOYPLUS_FF=y
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+CONFIG_THRUSTMASTER_FF=y
+CONFIG_HID_ZEROPLUS=y
+CONFIG_ZEROPLUS_FF=y
+CONFIG_HID_ZYDACRON=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_OPTION=y
+CONFIG_USB_GADGET=y
+CONFIG_USB20_HOST=y
+CONFIG_USB20_OTG=y
+CONFIG_DWC_OTG_BOTH_HOST_SLAVE=y
+CONFIG_MMC=y
+CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_MMC_EMBEDDED_SDIO=y
+CONFIG_MMC_PARANOID_SD_INIT=y
+CONFIG_SDMMC_RK29=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_SWITCH=y
+CONFIG_SWITCH_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_AUTO_WAKE_UP=y
+CONFIG_TPS65910_RTC=y
+CONFIG_STAGING=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_LOGGER=y
+CONFIG_ANDROID_TIMED_GPIO=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+# CONFIG_CMMB is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_EXT4_FS=y
+# CONFIG_EXT4_FS_XATTR is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_FUSE_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_EFI_PARTITION=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_SCHEDSTATS=y
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set
+CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_DDR_INIT_CHANGE_FREQ=y
CONFIG_DDR_SDRAM_FREQ=300
# CONFIG_DDR_TEST is not set
-CONFIG_RK_CLOCK_PROC=y
CONFIG_CLK_SWITCH_TO_32K=y
-CONFIG_RK30_I2C_INSRAM=y
CONFIG_SOC_RK3168=y
CONFIG_MACH_RK3168_86V=y
CONFIG_FIQ_DEBUGGER=y
CONFIG_NET_ACT_POLICE=y
CONFIG_NET_ACT_GACT=y
CONFIG_NET_ACT_MIRRED=y
+CONFIG_BT=y
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIBCM4325=y
+CONFIG_BT_AUTOSLEEP=y
CONFIG_CFG80211=y
CONFIG_MAC80211=y
CONFIG_RFKILL=y
CONFIG_GS_MMA7660=y
CONFIG_SENSOR_DEVICE=y
CONFIG_GSENSOR_DEVICE=y
+CONFIG_GS_MXC6225=y
# CONFIG_SERIO is not set
-# CONFIG_VT is not set
+# CONFIG_CONSOLE_TRANSLATIONS is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_RK29=y
CONFIG_UART0_RK29=y
CONFIG_BATTERY_RK30_ADC_FAC=y
CONFIG_BATTERY_RK30_AC_CHARGE=y
CONFIG_BATTERY_RK30_VOL3V8=y
+CONFIG_POWER_ON_CHARGER_DISPLAY=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
-CONFIG_RK29_WATCHDOG=y
-CONFIG_RK29_FEED_DOG_BY_INTE=y
-CONFIG_RK29_WATCHDOG_ATBOOT=y
-CONFIG_RK29_WATCHDOG_DEFAULT_TIME=5
CONFIG_MFD_TPS65910=y
CONFIG_MFD_WM831X_I2C=y
CONFIG_REGULATOR=y
CONFIG_VIDEO_DEV=y
CONFIG_SOC_CAMERA=y
CONFIG_SOC_CAMERA_GC0308=y
+CONFIG_SOC_CAMERA_GC2035=y
CONFIG_VIDEO_RK29=y
CONFIG_VIDEO_RK29_CAMMEM_ION=y
CONFIG_ION=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LOWERPOWER_WARNING=y
CONFIG_SOUND=y
CONFIG_SND=y
# CONFIG_SND_SUPPORT_OLD_API is not set
CONFIG_SWITCH=y
CONFIG_SWITCH_GPIO=y
CONFIG_RTC_CLASS=y
+CONFIG_AUTO_WAKE_UP=y
CONFIG_RTC_DRV_WM831X=y
CONFIG_TPS65910_RTC=y
CONFIG_STAGING=y
# CONFIG_DDR_TEST is not set
CONFIG_RK_CLOCK_PROC=y
CONFIG_CLK_SWITCH_TO_32K=y
-CONFIG_RK30_I2C_INSRAM=y
CONFIG_SOC_RK3168=y
CONFIG_MACH_RK3168_86V=y
CONFIG_FIQ_DEBUGGER=y
CONFIG_NET_ACT_POLICE=y
CONFIG_NET_ACT_GACT=y
CONFIG_NET_ACT_MIRRED=y
+CONFIG_BT=y
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIBCM4325=y
+CONFIG_BT_AUTOSLEEP=y
CONFIG_CFG80211=y
CONFIG_RFKILL=y
CONFIG_RFKILL_RK=y
CONFIG_SENSOR_DEVICE=y
CONFIG_GSENSOR_DEVICE=y
# CONFIG_SERIO is not set
-# CONFIG_VT is not set
+# CONFIG_CONSOLE_TRANSLATIONS is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_RK29=y
CONFIG_UART0_RK29=y
CONFIG_POWER_ON_CHARGER_DISPLAY=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
-CONFIG_RK29_WATCHDOG=y
-CONFIG_RK29_FEED_DOG_BY_INTE=y
-CONFIG_RK29_WATCHDOG_ATBOOT=y
-CONFIG_RK29_WATCHDOG_DEFAULT_TIME=5
CONFIG_MFD_TPS65910=y
CONFIG_MFD_WM831X_I2C=y
CONFIG_MFD_RK610=y
CONFIG_VIDEO_DEV=y
CONFIG_SOC_CAMERA=y
CONFIG_SOC_CAMERA_GC0308=y
+CONFIG_SOC_CAMERA_GC2035=y
CONFIG_VIDEO_RK29=y
CONFIG_VIDEO_RK29_CAMMEM_ION=y
CONFIG_ION=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LOWERPOWER_WARNING=y
CONFIG_SOUND=y
CONFIG_SND=y
# CONFIG_SND_SUPPORT_OLD_API is not set
CONFIG_SWITCH=y
CONFIG_SWITCH_GPIO=y
CONFIG_RTC_CLASS=y
+CONFIG_AUTO_WAKE_UP=y
CONFIG_RTC_DRV_WM831X=y
CONFIG_TPS65910_RTC=y
CONFIG_STAGING=y
# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set
CONFIG_ENABLE_DEFAULT_TRACERS=y
CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
--- /dev/null
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZO=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_PANIC_TIMEOUT=1
+# CONFIG_SYSCTL_SYSCALL is not set
+# CONFIG_ELF_CORE is not set
+CONFIG_ASHMEM=y
+# CONFIG_AIO is not set
+CONFIG_EMBEDDED=y
+# CONFIG_SLUB_DEBUG is not set
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_ARCH_RK30=y
+CONFIG_DDR_INIT_CHANGE_FREQ=y
+CONFIG_DDR_SDRAM_FREQ=300
+# CONFIG_DDR_TEST is not set
+CONFIG_CLK_SWITCH_TO_32K=y
+CONFIG_SOC_RK3168=y
+CONFIG_MACH_RK3168_86V=y
+CONFIG_FIQ_DEBUGGER=y
+CONFIG_FIQ_DEBUGGER_NO_SLEEP=y
+CONFIG_FIQ_DEBUGGER_CONSOLE=y
+CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SMP=y
+# CONFIG_SMP_ON_UP is not set
+CONFIG_NR_CPUS=2
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_HIGHMEM=y
+CONFIG_COMPACTION=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttyFIQ0 androidboot.console=ttyFIQ0 init=/init"
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_IDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_WAKELOCK=y
+CONFIG_PM_RUNTIME=y
+CONFIG_PM_DEBUG=y
+CONFIG_SUSPEND_TIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_INET_ESP=y
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6=y
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_TUNNEL=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_NETFILTER=y
+# CONFIG_BRIDGE_NETFILTER is not set
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_SIP=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_TRACE=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_TARGET_REJECT_SKERR=y
+CONFIG_IP_NF_TARGET_LOG=y
+CONFIG_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_NF_CONNTRACK_IPV6=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_TARGET_LOG=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_TARGET_REJECT_SKERR=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+CONFIG_BRIDGE=y
+# CONFIG_BRIDGE_IGMP_SNOOPING is not set
+CONFIG_PHONET=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_INGRESS=y
+CONFIG_NET_CLS_U32=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=y
+CONFIG_NET_ACT_GACT=y
+CONFIG_NET_ACT_MIRRED=y
+CONFIG_BT=y
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIBCM4325=y
+CONFIG_BT_AUTOSLEEP=y
+CONFIG_CFG80211=y
+CONFIG_MAC80211=y
+CONFIG_RFKILL=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND_IDS=y
+CONFIG_MTD_RKNAND=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_MISC_DEVICES=y
+CONFIG_UID_STAT=y
+CONFIG_APANIC=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_CRYPT=y
+CONFIG_DM_UEVENT=y
+CONFIG_NETDEVICES=y
+CONFIG_PHYLIB=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN_80211=y
+CONFIG_RTL8188EU=y
+CONFIG_USB_USBNET=y
+CONFIG_PPP=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPPOLAC=y
+CONFIG_PPPOPNS=y
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_KEYRESET=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_INPUT_TABLET=y
+CONFIG_TABLET_USB_ACECAD=y
+CONFIG_TABLET_USB_AIPTEK=y
+CONFIG_TABLET_USB_GTCO=y
+CONFIG_TABLET_USB_HANWANG=y
+CONFIG_TABLET_USB_KBTAB=y
+CONFIG_TABLET_USB_WACOM=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_GSLX680_RK3168=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_KEYCHORD=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_GS_MMA7660=y
+CONFIG_SENSOR_DEVICE=y
+CONFIG_GSENSOR_DEVICE=y
+CONFIG_GS_MXC6225=y
+# CONFIG_SERIO is not set
+# CONFIG_CONSOLE_TRANSLATIONS is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_RK29=y
+CONFIG_UART0_RK29=y
+CONFIG_UART0_DMA_RK29=2
+CONFIG_UART3_RK29=y
+CONFIG_UART3_CTS_RTS_RK29=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C0_CONTROLLER_RK30=y
+CONFIG_I2C1_CONTROLLER_RK30=y
+CONFIG_I2C2_CONTROLLER_RK30=y
+CONFIG_I2C3_CONTROLLER_RK30=y
+CONFIG_I2C4_CONTROLLER_RK30=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_EXPANDED_GPIO_NUM=0
+CONFIG_EXPANDED_GPIO_IRQ_NUM=0
+CONFIG_SPI_FPGA_GPIO_NUM=0
+CONFIG_SPI_FPGA_GPIO_IRQ_NUM=0
+CONFIG_POWER_SUPPLY=y
+CONFIG_BATTERY_RK30_ADC_FAC=y
+CONFIG_BATTERY_RK30_AC_CHARGE=y
+CONFIG_BATTERY_RK30_VOL3V8=y
+CONFIG_POWER_ON_CHARGER_DISPLAY=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_MFD_TPS65910=y
+CONFIG_MFD_WM831X_I2C=y
+CONFIG_MFD_RK616=y
+CONFIG_RK616_USE_MCLK_12M=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_TPS65910=y
+CONFIG_REGULATOR_WM831X=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_VIDEO_DEV=y
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_GC0308=y
+CONFIG_SOC_CAMERA_GC2035=y
+CONFIG_VIDEO_RK29=y
+CONFIG_VIDEO_RK29_CAMMEM_ION=y
+CONFIG_ION=y
+CONFIG_ION_ROCKCHIP=y
+CONFIG_FB=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_DISPLAY_SUPPORT=y
+CONFIG_FB_ROCKCHIP=y
+CONFIG_ONE_LCDC_DUAL_OUTPUT_INF=y
+CONFIG_LCDC_RK3066B=y
+# CONFIG_LCDC0_RK3066B is not set
+CONFIG_LCDC1_RK3066B=y
+CONFIG_LCD_E242868_RK616_1024X600=y
+CONFIG_RK_TRSM=y
+CONFIG_RK616_LVDS=y
+CONFIG_RK_HDMI=y
+CONFIG_HDMI_RK616=y
+CONFIG_HDMI_SOURCE_LCDC1=y
+CONFIG_RGA_RK30=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LOWERPOWER_WARNING=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_RK29_SOC=y
+CONFIG_SND_I2S_DMA_EVENT_DYNAMIC=y
+CONFIG_SND_RK_SOC_HDMI_SPDIF=y
+CONFIG_SND_RK_SOC_RK616=y
+CONFIG_SND_RK29_CODEC_SOC_SLAVE=y
+CONFIG_UHID=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_ACRUX=y
+CONFIG_HID_ACRUX_FF=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
+CONFIG_DRAGONRISE_FF=y
+CONFIG_HID_EMS_FF=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_KEYTOUCH=y
+CONFIG_HID_KYE=y
+CONFIG_HID_UCLOGIC=y
+CONFIG_HID_WALTOP=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LCPOWER=y
+CONFIG_HID_LOGITECH=y
+CONFIG_LOGITECH_FF=y
+CONFIG_LOGIRUMBLEPAD2_FF=y
+CONFIG_LOGIG940_FF=y
+CONFIG_LOGIWII_FF=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_MULTITOUCH=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_ORTEK=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_PANTHERLORD_FF=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_PICOLCD=y
+CONFIG_HID_QUANTA=y
+CONFIG_HID_ROCCAT_ARVO=y
+CONFIG_HID_ROCCAT_KONE=y
+CONFIG_HID_ROCCAT_KONEPLUS=y
+CONFIG_HID_ROCCAT_KOVAPLUS=y
+CONFIG_HID_ROCCAT_PYRA=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+CONFIG_GREENASIA_FF=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_SMARTJOYPLUS_FF=y
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+CONFIG_THRUSTMASTER_FF=y
+CONFIG_HID_ZEROPLUS=y
+CONFIG_ZEROPLUS_FF=y
+CONFIG_HID_ZYDACRON=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_OPTION=y
+CONFIG_USB_GADGET=y
+CONFIG_USB20_HOST=y
+CONFIG_USB20_OTG=y
+CONFIG_DWC_OTG_BOTH_HOST_SLAVE=y
+CONFIG_MMC=y
+CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_MMC_EMBEDDED_SDIO=y
+CONFIG_MMC_PARANOID_SD_INIT=y
+CONFIG_SDMMC_RK29=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_SWITCH=y
+CONFIG_SWITCH_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_AUTO_WAKE_UP=y
+CONFIG_RTC_DRV_WM831X=y
+CONFIG_TPS65910_RTC=y
+CONFIG_STAGING=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_LOGGER=y
+CONFIG_ANDROID_TIMED_GPIO=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+# CONFIG_CMMB is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_EXT4_FS=y
+# CONFIG_EXT4_FS_XATTR is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_FUSE_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_EFI_PARTITION=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_SCHEDSTATS=y
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set
+CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
config MACH_RK3028_TB
bool "RK3028 Top Board"
+config MACH_RK3028_86V
+ bool "RK3028 86V Board"
endchoice
choice
obj-$(CONFIG_SOC_RK3028) += board.o
board-$(CONFIG_MACH_RK3028_TB) += board-rk3028-tb.o
+board-$(CONFIG_MACH_RK3028_86V)+= board-rk3028-86v.o
obj-$(CONFIG_SOC_RK3066B) += board.o
board-$(CONFIG_MACH_RK3066B_FPGA) += board-rk3066b-fpga.o
--- /dev/null
+#ifdef CONFIG_VIDEO_RK29
+#include <plat/rk_camera.h>
+/* Notes:
+
+Simple camera device registration:
+
+ new_camera_device(sensor_name,\ // sensor name, it is equal to CONFIG_SENSOR_X
+ face,\ // sensor face information, it can be back or front
+ pwdn_io,\ // power down gpio configuration, it is equal to CONFIG_SENSOR_POWERDN_PIN_XX
+ flash_attach,\ // sensor is attach flash or not
+ mir,\ // sensor image mirror and flip control information
+ i2c_chl,\ // i2c channel which the sensor attached in hardware, it is equal to CONFIG_SENSOR_IIC_ADAPTER_ID_X
+ cif_chl) \ // cif channel which the sensor attached in hardware, it is equal to CONFIG_SENSOR_CIF_INDEX_X
+
+Comprehensive camera device registration:
+
+ new_camera_device_ex(sensor_name,\
+ face,\
+ ori,\ // sensor orientation, it is equal to CONFIG_SENSOR_ORIENTATION_X
+ pwr_io,\ // sensor power gpio configuration, it is equal to CONFIG_SENSOR_POWER_PIN_XX
+ pwr_active,\ // sensor power active level, is equal to CONFIG_SENSOR_RESETACTIVE_LEVEL_X
+ rst_io,\ // sensor reset gpio configuration, it is equal to CONFIG_SENSOR_RESET_PIN_XX
+ rst_active,\ // sensor reset active level, is equal to CONFIG_SENSOR_RESETACTIVE_LEVEL_X
+ pwdn_io,\
+ pwdn_active,\ // sensor power down active level, is equal to CONFIG_SENSOR_POWERDNACTIVE_LEVEL_X
+ flash_attach,\
+ res,\ // sensor resolution, this is real resolution or resoltuion after interpolate
+ mir,\
+ i2c_chl,\
+ i2c_spd,\ // i2c speed , 100000 = 100KHz
+ i2c_addr,\ // the i2c slave device address for sensor
+ cif_chl,\
+ mclk)\ // sensor input clock rate, 24 or 48
+
+*/
+static struct rkcamera_platform_data new_camera[] = {
+ new_camera_device(RK29_CAM_SENSOR_GC2035,
+ back,
+ RK30_PIN0_PB3,
+ 0,
+ 0,
+ 1,
+ 0),
+ new_camera_device(RK29_CAM_SENSOR_GC0308,
+ front,
+ RK30_PIN0_PB2,
+ 0,
+ 0,
+ 1,
+ 0),
+ new_camera_device_end
+};
+
+/*---------------- Camera Sensor Macro Define Begin ------------------------*/
+/*---------------- Camera Sensor Configuration Macro Begin ------------------------*/
+#define CONFIG_SENSOR_0 RK29_CAM_SENSOR_GC2035 /* back camera sensor */
+#define CONFIG_SENSOR_IIC_ADDR_0 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_0 1
+#define CONFIG_SENSOR_ORIENTATION_0 90
+#define CONFIG_SENSOR_POWER_PIN_0 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_0 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_0 RK30_PIN0_PB3
+#define CONFIG_SENSOR_FALSH_PIN_0 INVALID_GPIO//RK30_PIN0_PD5 //INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_0 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_0 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_0 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_0 RK29_CAM_FLASHACTIVE_H
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_0 30000
+
+#define CONFIG_SENSOR_01 RK29_CAM_SENSOR_OV5642 /* back camera sensor 1 */
+#define CONFIG_SENSOR_IIC_ADDR_01 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_01 4
+#define CONFIG_SENSOR_ORIENTATION_01 90
+#define CONFIG_SENSOR_POWER_PIN_01 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_01 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_01 RK30_PIN1_PD6
+#define CONFIG_SENSOR_FALSH_PIN_01 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_01 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_01 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_01 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_01 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_01 30000
+
+#define CONFIG_SENSOR_02 RK29_CAM_SENSOR_OV5640 /* back camera sensor 2 */
+#define CONFIG_SENSOR_IIC_ADDR_02 0x00
+#define CONFIG_SENSOR_CIF_INDEX_02 0
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_02 4
+#define CONFIG_SENSOR_ORIENTATION_02 90
+#define CONFIG_SENSOR_POWER_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_FALSH_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_02 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_02 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_02 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_02 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_02 30000
+
+#define CONFIG_SENSOR_1 RK29_CAM_SENSOR_GC0308 /* front camera sensor 0 */
+#define CONFIG_SENSOR_IIC_ADDR_1 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_1 1
+#define CONFIG_SENSOR_ORIENTATION_1 270
+#define CONFIG_SENSOR_POWER_PIN_1 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_1 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_1 RK30_PIN0_PB2
+#define CONFIG_SENSOR_FALSH_PIN_1 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_1 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_1 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_1 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_1 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_1 30000
+
+#define CONFIG_SENSOR_11 RK29_CAM_SENSOR_OV2659 /* front camera sensor 1 */
+#define CONFIG_SENSOR_IIC_ADDR_11 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_11 3
+#define CONFIG_SENSOR_ORIENTATION_11 270
+#define CONFIG_SENSOR_POWER_PIN_11 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_11 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_11 INVALID_GPIO//RK30_PIN1_PB7
+#define CONFIG_SENSOR_FALSH_PIN_11 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_11 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_11 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_11 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_11 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_11 30000
+
+#define CONFIG_SENSOR_12 RK29_CAM_SENSOR_OV2659//RK29_CAM_SENSOR_OV2655 /* front camera sensor 2 */
+#define CONFIG_SENSOR_IIC_ADDR_12 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_12 3
+#define CONFIG_SENSOR_ORIENTATION_12 270
+#define CONFIG_SENSOR_POWER_PIN_12 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_12 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_12 INVALID_GPIO//RK30_PIN1_PB7
+#define CONFIG_SENSOR_FALSH_PIN_12 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_12 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_12 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_12 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_12 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_12 30000
+
+
+#endif //#ifdef CONFIG_VIDEO_RK29
+/*---------------- Camera Sensor Configuration Macro End------------------------*/
+#include "../../../drivers/media/video/rk30_camera.c"
+/*---------------- Camera Sensor Macro Define End ---------*/
+
+#define PMEM_CAM_SIZE PMEM_CAM_NECESSARY
+/*****************************************************************************************
+ * camera devices
+ * author: ddl@rock-chips.com
+ *****************************************************************************************/
+#ifdef CONFIG_VIDEO_RK29
+#define CONFIG_SENSOR_POWER_IOCTL_USR 0 //define this refer to your board layout
+#define CONFIG_SENSOR_RESET_IOCTL_USR 0
+#define CONFIG_SENSOR_POWERDOWN_IOCTL_USR 0
+#define CONFIG_SENSOR_FLASH_IOCTL_USR 1
+
+static void rk_cif_power(int on)
+{
+ struct regulator *ldo_18,*ldo_28;
+ ldo_28 = regulator_get(NULL, "ldo7"); // vcc28_cif
+ ldo_18 = regulator_get(NULL, "ldo1"); // vcc18_cif
+ if (ldo_28 == NULL || IS_ERR(ldo_28) || ldo_18 == NULL || IS_ERR(ldo_18)){
+ printk("get cif ldo failed!\n");
+ return;
+ }
+ if(on == 0){
+ regulator_disable(ldo_28);
+ regulator_put(ldo_28);
+ regulator_disable(ldo_18);
+ regulator_put(ldo_18);
+ mdelay(500);
+ }
+ else{
+ regulator_set_voltage(ldo_28, 2800000, 2800000);
+ regulator_enable(ldo_28);
+ // printk("%s set ldo7 vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(ldo_28));
+ regulator_put(ldo_28);
+
+ regulator_set_voltage(ldo_18, 1800000, 1800000);
+ // regulator_set_suspend_voltage(ldo, 1800000);
+ regulator_enable(ldo_18);
+ // printk("%s set ldo1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo_18));
+ regulator_put(ldo_18);
+ }
+}
+
+#if CONFIG_SENSOR_POWER_IOCTL_USR
+static int sensor_power_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+ //#error "CONFIG_SENSOR_POWER_IOCTL_USR is 1, sensor_power_usr_cb function must be writed!!";
+ rk_cif_power(on);
+ return 0;
+}
+#endif
+
+#if CONFIG_SENSOR_RESET_IOCTL_USR
+static int sensor_reset_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+ #error "CONFIG_SENSOR_RESET_IOCTL_USR is 1, sensor_reset_usr_cb function must be writed!!";
+}
+#endif
+
+#if CONFIG_SENSOR_POWERDOWN_IOCTL_USR
+static int sensor_powerdown_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+ #error "CONFIG_SENSOR_POWERDOWN_IOCTL_USR is 1, sensor_powerdown_usr_cb function must be writed!!";
+}
+#endif
+
+#if CONFIG_SENSOR_FLASH_IOCTL_USR
+
+#define CONFIG_SENSOR_FALSH_EN_PIN_0 RK30_PIN0_PD5 //high:enable
+#define CONFIG_SENSOR_FALSH_EN_MUX_0 GPIO0D5_SPI1TXD_NAME
+#define CONFIG_SENSOR_FALSH_MODE_PIN_0 RK30_PIN0_PD4 //high:FLASH, low:torch
+#define CONFIG_SENSOR_FALSH_MODE_MUX_0 GPIO0D4_SPI1RXD_NAME
+
+static int sensor_init_flags = 0;
+static int sensor_flash_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+ if(sensor_init_flags == 0){
+ rk30_mux_api_set(CONFIG_SENSOR_FALSH_MODE_MUX_0, 0);
+ int ret = gpio_request(CONFIG_SENSOR_FALSH_MODE_PIN_0, "camera_flash_mode");
+ if (ret != 0) {
+ printk(">>>>gpio request camera_flash_mode faile !!\n");
+ }
+
+ gpio_direction_output(CONFIG_SENSOR_FALSH_MODE_PIN_0, 0);
+ sensor_init_flags = 1 ;
+ }
+ switch (on) {
+ case Flash_Off: {
+ gpio_set_value(CONFIG_SENSOR_FALSH_EN_PIN_0, 0);
+ gpio_set_value(CONFIG_SENSOR_FALSH_MODE_PIN_0, 0);
+ break;
+ }
+
+ case Flash_On: {
+ gpio_set_value(CONFIG_SENSOR_FALSH_EN_PIN_0, 1);
+ gpio_set_value(CONFIG_SENSOR_FALSH_MODE_PIN_0, 1);
+ break;
+ }
+
+ case Flash_Torch: {
+ gpio_set_value(CONFIG_SENSOR_FALSH_EN_PIN_0, 1);
+ gpio_set_value(CONFIG_SENSOR_FALSH_MODE_PIN_0, 0);
+ break;
+ }
+
+ default: {
+ printk("%s..Flash command(%d) is invalidate \n",__FUNCTION__, on);
+ gpio_set_value(CONFIG_SENSOR_FALSH_EN_PIN_0, 0);
+ break;
+ }
+ }
+ return 0;
+}
+#endif
+
+static struct rk29camera_platform_ioctl_cb sensor_ioctl_cb = {
+ #if CONFIG_SENSOR_POWER_IOCTL_USR
+ .sensor_power_cb = sensor_power_usr_cb,
+ #else
+ .sensor_power_cb = NULL,
+ #endif
+
+ #if CONFIG_SENSOR_RESET_IOCTL_USR
+ .sensor_reset_cb = sensor_reset_usr_cb,
+ #else
+ .sensor_reset_cb = NULL,
+ #endif
+
+ #if CONFIG_SENSOR_POWERDOWN_IOCTL_USR
+ .sensor_powerdown_cb = sensor_powerdown_usr_cb,
+ #else
+ .sensor_powerdown_cb = NULL,
+ #endif
+
+ #if CONFIG_SENSOR_FLASH_IOCTL_USR
+ .sensor_flash_cb = sensor_flash_usr_cb,
+ #else
+ .sensor_flash_cb = NULL,
+ #endif
+};
+
+#if CONFIG_SENSOR_IIC_ADDR_0
+static struct reginfo_t rk_init_data_sensor_reg_0[] =
+{
+ {0x0000, 0x00,0,0}
+ };
+static struct reginfo_t rk_init_data_sensor_winseqreg_0[] ={
+ {0x0000, 0x00,0,0}
+ };
+#endif
+
+#if CONFIG_SENSOR_IIC_ADDR_1
+static struct reginfo_t rk_init_data_sensor_reg_1[] =
+{
+ {0x0000, 0x00,0,0}
+};
+static struct reginfo_t rk_init_data_sensor_winseqreg_1[] =
+{
+ {0x0000, 0x00,0,0}
+};
+#endif
+#if CONFIG_SENSOR_IIC_ADDR_01
+static struct reginfo_t rk_init_data_sensor_reg_01[] =
+{
+ {0x0000, 0x00,0,0}
+};
+static struct reginfo_t rk_init_data_sensor_winseqreg_01[] =
+{
+ {0x0000, 0x00,0,0}
+};
+#endif
+#if CONFIG_SENSOR_IIC_ADDR_02
+static struct reginfo_t rk_init_data_sensor_reg_02[] =
+{
+ {0x0000, 0x00,0,0}
+};
+static struct reginfo_t rk_init_data_sensor_winseqreg_02[] =
+{
+ {0x0000, 0x00,0,0}
+};
+#endif
+#if CONFIG_SENSOR_IIC_ADDR_11
+static struct reginfo_t rk_init_data_sensor_reg_11[] =
+{
+ {0x0000, 0x00,0,0}
+};
+static struct reginfo_t rk_init_data_sensor_winseqreg_11[] =
+{
+ {0x0000, 0x00,0,0}
+};
+#endif
+#if CONFIG_SENSOR_IIC_ADDR_12
+static struct reginfo_t rk_init_data_sensor_reg_12[] =
+{
+ {0x0000, 0x00,0,0}
+};
+static struct reginfo_t rk_init_data_sensor_winseqreg_12[] =
+{
+ {0x0000, 0x00,0,0}
+};
+#endif
+static rk_sensor_user_init_data_s rk_init_data_sensor[RK_CAM_NUM] =
+{
+ #if CONFIG_SENSOR_IIC_ADDR_0
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_0,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_0,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_0) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_0) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+ #if CONFIG_SENSOR_IIC_ADDR_1
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_1,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_1,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_1) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_1) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+ #if CONFIG_SENSOR_IIC_ADDR_01
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_01,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_01,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_01) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_01) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+ #if CONFIG_SENSOR_IIC_ADDR_02
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_02,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_02,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_02) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_02) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+ #if CONFIG_SENSOR_IIC_ADDR_11
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_11,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_11,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_11) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_11) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+ #if CONFIG_SENSOR_IIC_ADDR_12
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_12,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_12,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_12) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_12) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+
+ };
+#include "../../../drivers/media/video/rk30_camera.c"
+
+#endif /* CONFIG_VIDEO_RK29 */
--- /dev/null
+/*****************************************************************************************
+ * arch/arm/mach-rkxx/baord-xxx-sdmmc-config.c
+ *
+ * Copyright (C) 2013 ROCKCHIP, Inc.
+ *
+ * Description:
+ * define the gpio for SD-MMC-SDIO-Wifi functions according to your own projects.
+ *
+ * Author: Michael Xie
+ * 15 Jan,2013
+ * E-mail: xbw@rock-chips.com
+ *
+ ******************************************************************************************/
+
+/*
+** If you select the macro of CONFIG_SDMMC0_RK29_WRITE_PROTECT, You must define the following values.
+** Otherwise, there is no need to define the following values¡£
+*/
+//#define SDMMC0_WRITE_PROTECT_PIN RK30_PIN3_PB2 //According to your own project to set the value of write-protect-pin.
+//#define SDMMC0_WRITE_PROTECT_ENABLE_VALUE GPIO_HIGH
+
+/*
+** If you select the macro of CONFIG_SDMMC1_RK29_WRITE_PROTECT, You must define the following values.
+** Otherwise, there is no need to define the following values¡£
+*/
+//#define SDMMC1_WRITE_PROTECT_PIN RK30_PIN3_PB3 //According to your own project to set the value of write-protect-pin.
+//#define SDMMC1_WRITE_PROTECT_ENABLE_VALUE GPIO_HIGH
+
+/*
+** If you select the macro of CONFIG_RK29_SDIO_IRQ_FROM_GPIO, You must define the following values.
+** Otherwise, there is no need to define the following values¡£
+*/
+//#define RK29SDK_WIFI_SDIO_CARD_INT RK30_PIN3_PD2
+
+
+/*
+* define sdcard PowerEn-pin
+*/
+#define RK29SDK_SD_CARD_PWR_EN RK30_PIN3_PA1
+#define RK29SDK_SD_CARD_PWR_EN_LEVEL GPIO_LOW
+int rk31sdk_get_sdmmc0_pin_io_voltage(void)
+{
+ int voltage;
+#define RK31SDK_SET_SDMMC0_PIN_VOLTAGE
+
+ /**************************************************************************************
+ ** Please tell me how much voltage of your SDMMC0-pin in your project.
+ **
+ ** ÀýÈç: ÓеÄÏîÄ¿£¬ËüµÄSDMMC0ËùÔÚµÄRKÖ÷¿ØµÄIO×飬ÏëÓÃ1.8V, ¶ø¿¨±¾ÉíÓÃ3.3V,
+ ** ¶øÖмäͨ¹ý¸öµçƽת»».ÄÇô£¬Äú´Ëʱ£¬Ó¦¸ÃÉèÖÃÏÂÃæµÄvoltageֵΪ 1.8V(¼´1800mv)
+ ***************************************************************************************/
+ voltage = 3300; //default the voltage 3300mv.
+
+ return voltage;
+}
+
+/*
+* define the card-detect-pin.
+*/
+#define RK29SDK_SD_CARD_DETECT_N RK30_PIN3_PB0 //According to your own project to set the value of card-detect-pin.
+#define RK29SDK_SD_CARD_INSERT_LEVEL GPIO_LOW // set the voltage of insert-card. Please pay attention to the default setting.
+
+/*
+* Define wifi module's power and reset gpio, and gpio sensitive level.
+* Please set the value according to your own project.
+*
+* Well, you just own engineering module to set the value in the corresponding module branch.
+* Otherwise, you do not define this macro, eliminate it.
+*
+*/
+#if defined(CONFIG_RTL8192CU) || defined(CONFIG_RTL8188EU) || defined(CONFIG_RTL8723AU) || defined(CONFIG_MT7601)
+ #define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN0_PB0
+ #define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE GPIO_LOW//GPIO_HIGH
+
+#elif defined(CONFIG_BCM4329) || defined(CONFIG_BCM4319) || defined(CONFIG_RKWIFI) || defined(CONFIG_RTL8189ES)
+ #define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN3_PD0
+ #define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE GPIO_HIGH
+
+ #define RK30SDK_WIFI_GPIO_RESET_N RK30_PIN0_PC2 // RK30_PIN2_PA7
+ #define RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE GPIO_HIGH
+
+#elif defined(CONFIG_MT5931_MT6622) || defined(CONFIG_MT5931)
+
+ #ifdef CONFIG_MACH_RK3168_LR097
+ #define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN3_PD0
+ #define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE GPIO_HIGH
+
+ //#define RK30SDK_WIFI_GPIO_RESET_N RK30_PIN3_PD1
+ //#define RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE GPIO_HIGH
+
+ #else
+ #define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN0_PA5
+ #define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE GPIO_HIGH
+
+ #define RK30SDK_WIFI_GPIO_RESET_N RK30_PIN3_PD1
+ #define RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE GPIO_HIGH
+ #endif
+
+#elif defined(CONFIG_MT6620)
+ #define COMBO_MODULE_MT6620_CDT 0 // to control antsel2,antsel3 and gps_lan foot when using AcSip or Cdtech chip.
+ //- 1--use Cdtech chip; 0--unuse CDT chip
+
+ //power, PMU_EN//hjc test
+ #define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN0_PB5
+ #define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE GPIO_HIGH
+ //reset, DAIRST,SYSRST_B
+ #define RK30SDK_WIFI_GPIO_RESET_N RK30_PIN3_PD0
+ #define RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE GPIO_HIGH
+ //VDDIO
+ //#define RK30SDK_WIFI_GPIO_VCCIO_WL RK30_PIN0_PD2 //You do not get control of the foot, and you do not need to define the macro
+ //#define RK30SDK_WIFI_GPIO_VCCIO_WL_ENABLE_VALUE GPIO_HIGH
+ //WIFI_INT_B
+ #define RK30SDK_WIFI_GPIO_WIFI_INT_B RK30_PIN3_PD2
+ #define RK30SDK_WIFI_GPIO_WIFI_INT_B_ENABLE_VALUE GPIO_HIGH
+ //BGF_INT_B
+ #define RK30SDK_WIFI_GPIO_BGF_INT_B RK30_PIN0_PA5
+ #define RK30SDK_WIFI_GPIO_BGF_INT_B_ENABLE_VALUE GPIO_HIGH
+ //GPS_SYNC
+ #define RK30SDK_WIFI_GPIO_GPS_SYNC RK30_PIN3_PD1
+ #define RK30SDK_WIFI_GPIO_GPS_SYNC_ENABLE_VALUE GPIO_HIGH
+
+ #if COMBO_MODULE_MT6620_CDT
+ //ANTSEL2
+ #define RK30SDK_WIFI_GPIO_ANTSEL2 RK30_PIN4_PD4
+ #define RK30SDK_WIFI_GPIO_ANTSEL2_ENABLE_VALUE GPIO_LOW //use 6620 in CDT chip, LOW--work; High--no work.
+ //ANTSEL3
+ #define RK30SDK_WIFI_GPIO_ANTSEL3 RK30_PIN4_PD3
+ #define RK30SDK_WIFI_GPIO_ANTSEL3_ENABLE_VALUE GPIO_HIGH //use 6620 in CDT chip, High--work; Low--no work..
+ //GPS_LAN
+ #define RK30SDK_WIFI_GPIO_GPS_LAN RK30_PIN4_PD6
+ #define RK30SDK_WIFI_GPIO_GPS_LAN_ENABLE_VALUE GPIO_HIGH //use 6620 in CDT chip, High--work; Low--no work..
+ #endif // #if COMBO_MODULE_MT6620_CDT--#endif
+#endif
+
+#ifndef RK30SDK_WIFI_GPIO_WIFI_INT_B
+#define RK30SDK_WIFI_GPIO_WIFI_INT_B INVALID_GPIO
+#define RK30SDK_WIFI_GPIO_WIFI_INT_B_ENABLE_VALUE GPIO_HIGH
+#endif
+
+int rk31sdk_get_sdio_wifi_voltage(void)
+{
+ int voltage;
+
+ /******************************************************************************
+ ** Please tell me how much wifi-module uses voltage in your project.
+ ******************************************************************************/
+#if defined(CONFIG_BCM4329) || defined(CONFIG_BCM4319) || defined(CONFIG_RKWIFI)
+ voltage = 1800 ; //power 1800mV
+
+#elif defined(CONFIG_MT5931_MT6622)||defined(CONFIG_MT5931)
+ voltage = 1800 ; //power 1800V
+#elif defined(CONFIG_MT6620)
+ voltage = 1800 ; //power 2800V
+#elif defined(CONFIG_RDA5990)||defined(CONFIG_RTL8723AS)
+ voltage = 3300 ; //power 3300V
+#else
+ //default, sdio use 3.0V
+ voltage = 3000 ; //power 3000V
+#endif
+
+ return voltage;
+}
+
+
+
--- /dev/null
+/*
+ *
+ * Copyright (C) 2012 ROCKCHIP, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/skbuff.h>
+#include <linux/spi/spi.h>
+#include <linux/mmc/host.h>
+#include <linux/ion.h>
+#include <linux/cpufreq.h>
+#include <linux/clk.h>
+#include <mach/dvfs.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+#include <asm/hardware/gic.h>
+
+#include <mach/board.h>
+#include <mach/hardware.h>
+#include <mach/io.h>
+#include <mach/gpio.h>
+#include <mach/iomux.h>
+#include <linux/rk_fb.h>
+#include <linux/regulator/machine.h>
+#include <linux/rfkill-rk.h>
+#include <linux/sensor-dev.h>
+#include <linux/mfd/tps65910.h>
+#include <linux/regulator/act8846.h>
+#include <linux/regulator/rk29-pwm-regulator.h>
+#include <linux/regulator/act8931.h>
+
+#if defined(CONFIG_MFD_RK610)
+#include <linux/mfd/rk610_core.h>
+#endif
+
+#if defined(CONFIG_RK_HDMI)
+ #include "../../../drivers/video/rockchip/hdmi/rk_hdmi.h"
+#endif
+
+#if defined(CONFIG_SPIM_RK29)
+#include "../../../drivers/spi/rk29_spim.h"
+#endif
+#if defined(CONFIG_GPS_RK)
+#include "../../../drivers/misc/gps/rk_gps/rk_gps.h"
+#endif
+
+#if defined(CONFIG_MU509)
+#include <linux/mu509.h>
+#endif
+#if defined(CONFIG_MW100)
+#include <linux/mw100.h>
+#endif
+#if defined(CONFIG_MT6229)
+#include <linux/mt6229.h>
+#endif
+#if defined(CONFIG_ANDROID_TIMED_GPIO)
+#include "../../../drivers/staging/android/timed_gpio.h"
+#endif
+
+#if defined(CONFIG_MT6620)
+#include <linux/gps.h>
+#endif
+#include "../mach-rk30/board-rk3028-86v-camera.c"
+#if defined(CONFIG_TOUCHSCREEN_GSLX680_RK3028)
+#define TOUCH_RESET_PIN RK30_PIN0_PC1
+#define TOUCH_EN_PIN NULL
+#define TOUCH_INT_PIN RK30_PIN0_PB4
+
+int gslx680_init_platform_hw(void)
+{
+
+ if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+ gpio_free(TOUCH_RESET_PIN);
+ printk("gslx680_init_platform_hw gpio_request error\n");
+ return -EIO;
+ }
+ if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+ gpio_free(TOUCH_INT_PIN);
+ printk("gslx680_init_platform_hw gpio_request error\n");
+ return -EIO;
+ }
+ gpio_direction_output(TOUCH_RESET_PIN, GPIO_HIGH);
+ mdelay(10);
+ gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+ mdelay(10);
+ gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+ msleep(300);
+ return 0;
+
+}
+
+struct ts_hw_data gslx680_info = {
+ .reset_gpio = TOUCH_RESET_PIN,
+ .touch_en_gpio = TOUCH_INT_PIN,
+ .init_platform_hw = gslx680_init_platform_hw,
+};
+#endif
+
+#if defined (CONFIG_TOUCHSCREEN_86V_GT811_IIC)
+#define TOUCH_RESET_PIN RK30_PIN0_PB6
+#define TOUCH_INT_PIN RK30_PIN1_PB7
+int gt811_init_platform_hw(void)
+{
+ if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+ gpio_free(TOUCH_RESET_PIN);
+ printk("gt811_init_platform_hw gpio_request error\n");
+ return -EIO;
+ }
+
+ if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+ gpio_free(TOUCH_INT_PIN);
+ printk("gt811_init_platform_hw gpio_request error\n");
+ return -EIO;
+ }
+ //gpio_pull_updown(TOUCH_INT_PIN, 1);
+ gpio_direction_output(TOUCH_RESET_PIN, 0);
+ msleep(500);
+ gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+ msleep(500);
+ gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+ mdelay(100);
+
+ return 0;
+}
+
+
+static struct goodix_platform_data gt811_info = {
+ .model= 811,
+ .init_platform_hw= gt811_init_platform_hw,
+
+};
+#endif
+
+#if defined(CONFIG_TOUCHSCREEN_GT8XX)
+#define TOUCH_RESET_PIN RK30_PIN0_PC1//RK30_PIN0_PB6
+#define TOUCH_PWR_PIN INVALID_GPIO//RK30_PIN0_PC5 // need to fly line by hardware engineer
+static int goodix_init_platform_hw(void)
+{
+ int ret;
+
+ if (TOUCH_PWR_PIN != INVALID_GPIO) {
+ ret = gpio_request(TOUCH_PWR_PIN, "goodix power pin");
+ if (ret != 0) {
+ gpio_free(TOUCH_PWR_PIN);
+ printk("goodix power error\n");
+ return -EIO;
+ }
+ gpio_direction_output(TOUCH_PWR_PIN, 0);
+ gpio_set_value(TOUCH_PWR_PIN, GPIO_LOW);
+ msleep(100);
+ }
+
+ if (TOUCH_RESET_PIN != INVALID_GPIO) {
+ ret = gpio_request(TOUCH_RESET_PIN, "goodix reset pin");
+ if (ret != 0) {
+ gpio_free(TOUCH_RESET_PIN);
+ printk("goodix gpio_request error\n");
+ return -EIO;
+ }
+ gpio_direction_output(TOUCH_RESET_PIN, 1);
+ msleep(100);
+ //gpio_set_value(TOUCH_RESET_PIN, GPIO_LOW);
+ //msleep(100);
+ //gpio_set_value(TOUCH_RESET_PIN, GPIO_HIGH);
+ //msleep(500);
+ }
+ return 0;
+}
+
+struct goodix_platform_data goodix_info = {
+ .model = 8105,
+ .irq_pin = RK30_PIN0_PB4,
+ .rest_pin = TOUCH_RESET_PIN,
+ .init_platform_hw = goodix_init_platform_hw,
+};
+#endif
+
+static struct spi_board_info board_spi_devices[] = {
+};
+
+/***********************************************************
+* rk30 backlight
+************************************************************/
+#ifdef CONFIG_BACKLIGHT_RK29_BL
+#define PWM_ID 0
+#define PWM_MODE PWM0
+#define PWM_EFFECT_VALUE GPIO_LOW
+
+#define LCD_DISP_ON_PIN
+
+#ifdef LCD_DISP_ON_PIN
+#define BL_EN_PIN RK30_PIN0_PC0
+#define BL_EN_VALUE GPIO_HIGH
+#endif
+static int rk29_backlight_io_init(void)
+{
+ int ret = 0;
+ iomux_set(PWM_MODE);
+#ifdef LCD_DISP_ON_PIN
+ ret = gpio_request(BL_EN_PIN, NULL);
+ if (ret != 0) {
+ gpio_free(BL_EN_PIN);
+ }
+ gpio_direction_output(BL_EN_PIN, BL_EN_VALUE);
+ gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
+#endif
+ return ret;
+}
+
+static int rk29_backlight_io_deinit(void)
+{
+ int ret = 0, pwm_gpio;
+#ifdef LCD_DISP_ON_PIN
+ gpio_direction_output(BL_EN_PIN, !BL_EN_VALUE);
+ gpio_free(BL_EN_PIN);
+#endif
+ pwm_gpio = iomux_mode_to_gpio(PWM_MODE);
+ iomux_set(pwm_gpio);
+ gpio_request(pwm_gpio, "bl_pwm");
+ gpio_direction_output(pwm_gpio, !PWM_EFFECT_VALUE);
+ return ret;
+}
+
+static int rk29_backlight_pwm_suspend(void)
+{
+ int ret, pwm_gpio = iomux_mode_to_gpio(PWM_MODE);
+ iomux_set(pwm_gpio);
+
+ ret = gpio_request(pwm_gpio, "bl_pwm");
+ if (ret) {
+ printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
+ return ret;
+ }
+ gpio_direction_output(pwm_gpio, !PWM_EFFECT_VALUE);
+#ifdef LCD_DISP_ON_PIN
+ gpio_direction_output(BL_EN_PIN, !BL_EN_VALUE);
+#endif
+ return ret;
+}
+
+static int rk29_backlight_pwm_resume(void)
+{
+ int pwm_gpio = iomux_mode_to_gpio(PWM_MODE);
+ gpio_free(pwm_gpio);
+ iomux_set(PWM_MODE);
+#ifdef LCD_DISP_ON_PIN
+ msleep(30);
+ gpio_direction_output(BL_EN_PIN, BL_EN_VALUE);
+#endif
+ return 0;
+}
+
+static struct rk29_bl_info rk29_bl_info = {
+ .pwm_id = PWM_ID,
+ .min_brightness = 100,
+ .max_brightness=255,
+ .brightness_mode =BRIGHTNESS_MODE_CONIC,
+ .pre_div = 20 * 1000, // pwm output clk: 20k;
+ .bl_ref = PWM_EFFECT_VALUE,
+ .io_init = rk29_backlight_io_init,
+ .io_deinit = rk29_backlight_io_deinit,
+ .pwm_suspend = rk29_backlight_pwm_suspend,
+ .pwm_resume = rk29_backlight_pwm_resume,
+};
+
+static struct platform_device rk29_device_backlight = {
+ .name = "rk29_backlight",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_bl_info,
+ }
+};
+
+#endif
+
+#ifdef CONFIG_RK29_SUPPORT_MODEM
+
+#define RK30_MODEM_POWER RK30_PIN0_PC6
+#define RK30_MODEM_POWER_IOMUX iomux_set(GPIO0_C6)
+
+static int rk30_modem_io_init(void)
+{
+ printk("%s\n", __FUNCTION__);
+ RK30_MODEM_POWER_IOMUX;
+
+ return 0;
+}
+
+static struct rk29_io_t rk30_modem_io = {
+ .io_addr = RK30_MODEM_POWER,
+ .enable = GPIO_HIGH,
+ .disable = GPIO_LOW,
+ .io_init = rk30_modem_io_init,
+};
+
+static struct platform_device rk30_device_modem = {
+ .name = "rk30_modem",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk30_modem_io,
+ }
+};
+#endif
+#if defined(CONFIG_MU509)
+static int mu509_io_init(void)
+{
+
+ iomux_set(GPIO2_D5);
+ iomux_set(GPIO0_C6);
+ iomux_set(GPIO2_D4);
+ iomux_set(GPIO0_C4);
+ iomux_set(GPIO0_C5);
+ return 0;
+}
+
+static int mu509_io_deinit(void)
+{
+
+ return 0;
+}
+
+struct rk29_mu509_data rk29_mu509_info = {
+ .io_init = mu509_io_init,
+ .io_deinit = mu509_io_deinit,
+ .modem_power_en = RK30_PIN2_PD5,
+ .bp_power = RK30_PIN0_PC6,
+ .bp_reset = RK30_PIN2_PD4,
+ .ap_wakeup_bp = RK30_PIN0_PC4,
+ .bp_wakeup_ap = RK30_PIN0_PC5,
+};
+struct platform_device rk29_device_mu509 = {
+ .name = "mu509",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_mu509_info,
+ }
+ };
+#endif
+#if defined(CONFIG_MW100)
+static int mw100_io_init(void)
+{
+ iomux_set(GPIO2_D5);
+ iomux_set(GPIO0_C6);
+ iomux_set(GPIO2_D4);
+ iomux_set(GPIO0_C4);
+ iomux_set(GPIO0_C5);
+ return 0;
+}
+
+static int mw100_io_deinit(void)
+{
+
+ return 0;
+}
+
+struct rk29_mw100_data rk29_mw100_info = {
+ .io_init = mw100_io_init,
+ .io_deinit = mw100_io_deinit,
+ .modem_power_en = RK30_PIN2_PD5,
+ .bp_power = RK30_PIN0_PC6,
+ .bp_reset = RK30_PIN2_PD4,
+ .ap_wakeup_bp = RK30_PIN0_PC4,
+ .bp_wakeup_ap = RK30_PIN0_PC5,
+};
+struct platform_device rk29_device_mw100 = {
+ .name = "mw100",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_mw100_info,
+ }
+ };
+#endif
+#if defined(CONFIG_MT6229)
+static int mt6229_io_init(void)
+{
+ iomux_set(GPIO2_D5);
+ iomux_set(GPIO0_C6);
+ iomux_set(GPIO2_D4);
+ iomux_set(GPIO0_C4);
+ iomux_set(GPIO0_C5);
+ return 0;
+}
+
+static int mt6229_io_deinit(void)
+{
+
+ return 0;
+}
+
+struct rk29_mt6229_data rk29_mt6229_info = {
+ .io_init = mt6229_io_init,
+ .io_deinit = mt6229_io_deinit,
+ .modem_power_en = RK30_PIN2_PD5,
+ .bp_power = RK30_PIN0_PC6,
+ .bp_reset = RK30_PIN2_PD4,
+ .ap_wakeup_bp = RK30_PIN0_PC4,
+ .bp_wakeup_ap = RK30_PIN0_PC5,
+};
+struct platform_device rk29_device_mt6229 = {
+ .name = "mt6229",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_mt6229_info,
+ }
+ };
+#endif
+
+/*MMA8452 gsensor*/
+#if defined (CONFIG_GS_MMA8452)
+#define MMA8452_INT_PIN RK30_PIN0_PB7
+
+static int mma8452_init_platform_hw(void)
+{
+ return 0;
+}
+
+static struct sensor_platform_data mma8452_info = {
+ .type = SENSOR_TYPE_ACCEL,
+ .irq_enable = 1,
+ .poll_delay_ms = 30,
+ .init_platform_hw = mma8452_init_platform_hw,
+ .orientation = {-1, 0, 0, 0, 0, 1, 0, 1, 0},
+};
+#endif
+
+/*MMA7660 gsensor*/
+#if defined (CONFIG_GS_MMA7660)
+#define MMA7660_INT_PIN RK30_PIN0_PB7
+
+static int mma7660_init_platform_hw(void)
+{
+ //rk30_mux_api_set(GPIO1B2_SPI_RXD_UART1_SIN_NAME, GPIO1B_GPIO1B2);
+
+ return 0;
+}
+
+static struct sensor_platform_data mma7660_info = {
+ .type = SENSOR_TYPE_ACCEL,
+ .irq_enable = 1,
+ .poll_delay_ms = 30,
+ .init_platform_hw = mma7660_init_platform_hw,
+ #ifdef CONFIG_TOUCHSCREEN_GSLX680_RK3028
+ .orientation = {-1, 0, 0, 0, -1, 0, 0, 0, 1},
+ #else
+ .orientation = {0, -1, 0, -1, 0, 0, 0, 0, -1},
+ #endif
+};
+#endif
+
+#if defined (CONFIG_GS_MXC6225)
+#define MXC6225_INT_PIN RK30_PIN0_PB1
+
+static int mxc6225_init_platform_hw(void)
+{
+ return 0;
+}
+
+static struct sensor_platform_data mxc6225_info = {
+ .type = SENSOR_TYPE_ACCEL,
+ .irq_enable = 0,
+ .poll_delay_ms = 30,
+ .init_platform_hw = mxc6225_init_platform_hw,
+ .orientation = { 0, -1, 0, 1, 0, 0, 0, 0, 0},
+};
+#endif
+
+#if defined (CONFIG_GS_LIS3DH)
+#define LIS3DH_INT_PIN RK30_PIN0_PB7
+
+static int lis3dh_init_platform_hw(void)
+{
+
+ return 0;
+}
+
+static struct sensor_platform_data lis3dh_info = {
+ .type = SENSOR_TYPE_ACCEL,
+ .irq_enable = 1,
+ .poll_delay_ms = 30,
+ .init_platform_hw = lis3dh_init_platform_hw,
+ .orientation = {-1, 0, 0, 0, 0, 1, 0, -1, 0},
+};
+#endif
+#if defined (CONFIG_COMPASS_AK8975)
+static struct sensor_platform_data akm8975_info =
+{
+ .type = SENSOR_TYPE_COMPASS,
+ .irq_enable = 1,
+ .poll_delay_ms = 30,
+ .m_layout =
+ {
+ {
+ {1, 0, 0},
+ {0, 1, 0},
+ {0, 0, 1},
+ },
+
+ {
+ {1, 0, 0},
+ {0, 1, 0},
+ {0, 0, 1},
+ },
+
+ {
+ {1, 0, 0},
+ {0, 1, 0},
+ {0, 0, 1},
+ },
+
+ {
+ {1, 0, 0},
+ {0, 1, 0},
+ {0, 0, 1},
+ },
+ }
+};
+
+#endif
+
+#if defined(CONFIG_GYRO_L3G4200D)
+
+#include <linux/l3g4200d.h>
+#define L3G4200D_INT_PIN RK30_PIN0_PB4
+
+static int l3g4200d_init_platform_hw(void)
+{
+ return 0;
+}
+
+static struct sensor_platform_data l3g4200d_info = {
+ .type = SENSOR_TYPE_GYROSCOPE,
+ .irq_enable = 1,
+ .poll_delay_ms = 30,
+ .orientation = {0, 1, 0, -1, 0, 0, 0, 0, 1},
+ .init_platform_hw = l3g4200d_init_platform_hw,
+ .x_min = 40,//x_min,y_min,z_min = (0-100) according to hardware
+ .y_min = 40,
+ .z_min = 20,
+};
+
+#endif
+
+#ifdef CONFIG_LS_CM3217
+static struct sensor_platform_data cm3217_info = {
+ .type = SENSOR_TYPE_LIGHT,
+ .irq_enable = 0,
+ .poll_delay_ms = 500,
+};
+
+#endif
+
+#ifdef CONFIG_FB_ROCKCHIP
+
+#define LCD_CS_PIN INVALID_GPIO
+#define LCD_CS_VALUE GPIO_HIGH
+
+#define LCD_EN_PIN RK30_PIN0_PB6
+#define LCD_EN_VALUE GPIO_LOW
+
+static int rk_fb_io_init(struct rk29_fb_setting_info *fb_setting)
+{
+ int ret = 0;
+
+ if(LCD_CS_PIN !=INVALID_GPIO)
+ {
+ ret = gpio_request(LCD_CS_PIN, NULL);
+ if (ret != 0)
+ {
+ gpio_free(LCD_CS_PIN);
+ printk(KERN_ERR "request lcd cs pin fail!\n");
+ return -1;
+ }
+ else
+ {
+ gpio_direction_output(LCD_CS_PIN, LCD_CS_VALUE);
+ }
+ }
+
+ if(LCD_EN_PIN !=INVALID_GPIO)
+ {
+ ret = gpio_request(LCD_EN_PIN, NULL);
+ if (ret != 0)
+ {
+ gpio_free(LCD_EN_PIN);
+ printk(KERN_ERR "request lcd en pin fail!\n");
+ return -1;
+ }
+ else
+ {
+ gpio_direction_output(LCD_EN_PIN, LCD_EN_VALUE);
+ }
+ }
+ return 0;
+}
+static int rk_fb_io_disable(void)
+{
+ if(LCD_CS_PIN !=INVALID_GPIO)
+ {
+ gpio_set_value(LCD_CS_PIN, !LCD_CS_VALUE);
+ }
+ if(LCD_EN_PIN !=INVALID_GPIO)
+ {
+ gpio_set_value(LCD_EN_PIN, !LCD_EN_VALUE);
+ }
+ return 0;
+}
+static int rk_fb_io_enable(void)
+{
+ if(LCD_CS_PIN !=INVALID_GPIO)
+ {
+ gpio_set_value(LCD_CS_PIN, LCD_CS_VALUE);
+ }
+ if(LCD_EN_PIN !=INVALID_GPIO)
+ {
+ gpio_set_value(LCD_EN_PIN, LCD_EN_VALUE);
+ }
+ return 0;
+}
+
+#if defined(CONFIG_LCDC0_RK3066B)
+struct rk29fb_info lcdc0_screen_info = {
+ .prop = EXTEND, //extend display device
+ .io_init = NULL,
+ .io_disable = NULL,
+ .io_enable = NULL,
+ .set_screen_info = hdmi_init_lcdc,
+};
+#endif
+
+#if defined(CONFIG_LCDC1_RK3066B)
+struct rk29fb_info lcdc1_screen_info = {
+ .prop = PRMRY, //primary display device
+ .io_init = rk_fb_io_init,
+ .io_disable = rk_fb_io_disable,
+ .io_enable = rk_fb_io_enable,
+ .set_screen_info = set_lcd_info,
+};
+#endif
+
+static struct resource resource_fb[] = {
+ [0] = {
+ .name = "fb0 buf",
+ .start = 0,
+ .end = 0,//RK30_FB0_MEM_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "ipp buf", //for rotate
+ .start = 0,
+ .end = 0,//RK30_FB0_MEM_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [2] = {
+ .name = "fb2 buf",
+ .start = 0,
+ .end = 0,//RK30_FB0_MEM_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device device_fb = {
+ .name = "rk-fb",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(resource_fb),
+ .resource = resource_fb,
+};
+#endif
+
+#if defined(CONFIG_LCDC0_RK3066B)
+static struct resource resource_lcdc0[] = {
+ [0] = {
+ .name = "lcdc0 reg",
+ .start = RK30_LCDC0_PHYS,
+ .end = RK30_LCDC0_PHYS + RK30_LCDC0_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+
+ [1] = {
+ .name = "lcdc0 irq",
+ .start = IRQ_LCDC0,
+ .end = IRQ_LCDC0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device device_lcdc0 = {
+ .name = "rk30-lcdc",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(resource_lcdc0),
+ .resource = resource_lcdc0,
+ .dev = {
+ .platform_data = &lcdc0_screen_info,
+ },
+};
+#endif
+#if defined(CONFIG_LCDC1_RK3066B)
+static struct resource resource_lcdc1[] = {
+ [0] = {
+ .name = "lcdc1 reg",
+ .start = RK30_LCDC1_PHYS,
+ .end = RK30_LCDC1_PHYS + RK30_LCDC1_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "lcdc1 irq",
+ .start = IRQ_LCDC1,
+ .end = IRQ_LCDC1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device device_lcdc1 = {
+ .name = "rk30-lcdc",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(resource_lcdc1),
+ .resource = resource_lcdc1,
+ .dev = {
+ .platform_data = &lcdc1_screen_info,
+ },
+};
+#endif
+
+#if defined(CONFIG_MFD_RK610)
+#define RK610_RST_PIN RK30_PIN2_PD5
+#define RK610_TEST_PIN RK30_PIN2_PD6
+#define RK610_ENABLE_PIN RK30_PIN0_PC5
+static int rk610_power_on_init(void)
+{
+ int ret;
+ if(RK610_ENABLE_PIN != INVALID_GPIO)
+ {
+ ret = gpio_request(RK610_ENABLE_PIN, "rk610 reset");
+ if (ret)
+ {
+ printk(KERN_ERR "rk610_control_probe request gpio fail\n");
+ }
+ else
+ {
+ gpio_direction_output(RK610_ENABLE_PIN, GPIO_HIGH);
+ msleep(100);
+ }
+ }
+ if(RK610_TEST_PIN != INVALID_GPIO)
+ {
+ ret = gpio_request(RK610_TEST_PIN, "rk610 reset");
+ if (ret)
+ {
+ printk(KERN_ERR "rk610_control_probe request gpio fail\n");
+ }
+ else
+ {
+ gpio_direction_output(RK610_TEST_PIN, GPIO_LOW);
+ msleep(100);
+ }
+ }
+ if(RK610_RST_PIN != INVALID_GPIO)
+ {
+ ret = gpio_request(RK610_RST_PIN, "rk610 reset");
+ if (ret)
+ {
+ printk(KERN_ERR "rk610_control_probe request gpio fail\n");
+ }
+ else
+ {
+ gpio_direction_output(RK610_RST_PIN, GPIO_HIGH);
+ msleep(100);
+ gpio_direction_output(RK610_RST_PIN, GPIO_LOW);
+ msleep(100);
+ gpio_set_value(RK610_RST_PIN, GPIO_HIGH);
+ }
+ }
+
+ return 0;
+
+}
+
+
+static struct rk610_ctl_platform_data rk610_ctl_pdata = {
+ .rk610_power_on_init = rk610_power_on_init,
+};
+#endif
+
+#ifdef CONFIG_SND_SOC_RK610
+static int rk610_codec_io_init(void)
+{
+//if need iomux.
+//Must not gpio_request
+ return 0;
+}
+
+static struct rk610_codec_platform_data rk610_codec_pdata = {
+ .spk_ctl_io = RK30_PIN3_PC7,
+ .io_init = rk610_codec_io_init,
+ .boot_depop = 1,
+};
+#endif
+
+#ifdef CONFIG_ANDROID_TIMED_GPIO
+static struct timed_gpio timed_gpios[] = {
+ {
+ .name = "vibrator",
+ .gpio = INVALID_GPIO,
+ .max_timeout = 1000,
+ .active_low = 0,
+ .adjust_time =20, //adjust for diff product
+ },
+};
+
+static struct timed_gpio_platform_data rk29_vibrator_info = {
+ .num_gpios = 1,
+ .gpios = timed_gpios,
+};
+
+static struct platform_device rk29_device_vibrator = {
+ .name = "timed-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_vibrator_info,
+ },
+
+};
+#endif
+
+#ifdef CONFIG_LEDS_GPIO_PLATFORM
+static struct gpio_led rk29_leds[] = {
+ {
+ .name = "button-backlight",
+ .gpio = INVALID_GPIO,
+ .default_trigger = "timer",
+ .active_low = 0,
+ .retain_state_suspended = 0,
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+};
+
+static struct gpio_led_platform_data rk29_leds_pdata = {
+ .leds = rk29_leds,
+ .num_leds = ARRAY_SIZE(rk29_leds),
+};
+
+static struct platform_device rk29_device_gpio_leds = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_leds_pdata,
+ },
+};
+#endif
+
+#ifdef CONFIG_RK_IRDA
+#define IRDA_IRQ_PIN INVALID_GPIO //RK30_PIN0_PA3
+
+static int irda_iomux_init(void)
+{
+ int ret = 0;
+
+ //irda irq pin
+ ret = gpio_request(IRDA_IRQ_PIN, NULL);
+ if (ret != 0) {
+ gpio_free(IRDA_IRQ_PIN);
+ printk(">>>>>> IRDA_IRQ_PIN gpio_request err \n ");
+ }
+ gpio_pull_updown(IRDA_IRQ_PIN, PullDisable);
+ gpio_direction_input(IRDA_IRQ_PIN);
+
+ return 0;
+}
+
+static int irda_iomux_deinit(void)
+{
+ gpio_free(IRDA_IRQ_PIN);
+ return 0;
+}
+
+static struct irda_info rk29_irda_info = {
+ .intr_pin = IRDA_IRQ_PIN,
+ .iomux_init = irda_iomux_init,
+ .iomux_deinit = irda_iomux_deinit,
+ //.irda_pwr_ctl = bu92747guw_power_ctl,
+};
+
+static struct platform_device irda_device = {
+#ifdef CONFIG_RK_IRDA_NET
+ .name = "rk_irda",
+#else
+ .name = "bu92747_irda",
+#endif
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_irda_info,
+ }
+};
+#endif
+
+#ifdef CONFIG_ION
+#define ION_RESERVE_SIZE (80 * SZ_1M)
+static struct ion_platform_data rk30_ion_pdata = {
+ .nr = 1,
+ .heaps = {
+ {
+ .type = ION_HEAP_TYPE_CARVEOUT,
+ .id = ION_NOR_HEAP_ID,
+ .name = "norheap",
+ .size = ION_RESERVE_SIZE,
+ }
+ },
+};
+
+static struct platform_device device_ion = {
+ .name = "ion-rockchip",
+ .id = 0,
+ .dev = {
+ .platform_data = &rk30_ion_pdata,
+ },
+};
+#endif
+
+/**************************************************************************************************
+ * SDMMC devices, include the module of SD,MMC,and sdio.noted by xbw at 2012-03-05
+**************************************************************************************************/
+#ifdef CONFIG_SDMMC_RK29
+#include "board-rk3028-86v-sdmmc-conifg.c"
+#include "../plat-rk/rk-sdmmc-ops.c"
+#include "../plat-rk/rk-sdmmc-wifi.c"
+#endif //endif ---#ifdef CONFIG_SDMMC_RK29
+
+#ifdef CONFIG_SDMMC0_RK29
+static int rk29_sdmmc0_cfg_gpio(void)
+{
+#ifdef CONFIG_SDMMC_RK29_OLD
+ iomux_set(MMC0_CMD);
+ iomux_set(MMC0_CLKOUT);
+ iomux_set(MMC0_D0);
+ iomux_set(MMC0_D1);
+ iomux_set(MMC0_D2);
+ iomux_set(MMC0_D3);
+
+ iomux_set_gpio_mode(iomux_mode_to_gpio(MMC0_DETN));
+
+ gpio_request(RK30_PIN3_PA7, "sdmmc-power");
+ gpio_direction_output(RK30_PIN3_PA7, GPIO_LOW);
+
+#else
+ rk29_sdmmc_set_iomux(0, 0xFFFF);
+
+ #if defined(CONFIG_SDMMC0_RK29_SDCARD_DET_FROM_GPIO)
+ #if SDMMC_USE_NEW_IOMUX_API
+ iomux_set_gpio_mode(iomux_gpio_to_mode(RK29SDK_SD_CARD_DETECT_N));
+ #else
+ rk30_mux_api_set(RK29SDK_SD_CARD_DETECT_PIN_NAME, RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO);
+ #endif
+ #else
+ #if SDMMC_USE_NEW_IOMUX_API
+ iomux_set(MMC0_DETN);
+ #else
+ rk30_mux_api_set(RK29SDK_SD_CARD_DETECT_PIN_NAME, RK29SDK_SD_CARD_DETECT_IOMUX_FMUX);
+ #endif
+ #endif
+
+#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
+ gpio_request(SDMMC0_WRITE_PROTECT_PIN, "sdmmc-wp");
+ gpio_direction_input(SDMMC0_WRITE_PROTECT_PIN);
+#endif
+
+#endif
+
+ return 0;
+}
+
+#define CONFIG_SDMMC0_USE_DMA
+struct rk29_sdmmc_platform_data default_sdmmc0_data = {
+ .host_ocr_avail =
+ (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
+ MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
+ MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36),
+ .host_caps =
+ (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+ .io_init = rk29_sdmmc0_cfg_gpio,
+
+#if !defined(CONFIG_SDMMC_RK29_OLD)
+ .set_iomux = rk29_sdmmc_set_iomux,
+#endif
+
+ .dma_name = "sd_mmc",
+#ifdef CONFIG_SDMMC0_USE_DMA
+ .use_dma = 1,
+#else
+ .use_dma = 0,
+#endif
+
+#if defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC) && defined(CONFIG_USE_SDMMC0_FOR_WIFI_DEVELOP_BOARD)
+ .status = rk29sdk_wifi_mmc0_status,
+ .register_status_notify = rk29sdk_wifi_mmc0_status_register,
+#endif
+
+#if defined(RK29SDK_SD_CARD_PWR_EN) || (INVALID_GPIO != RK29SDK_SD_CARD_PWR_EN)
+ .power_en = RK29SDK_SD_CARD_PWR_EN,
+ .power_en_level = RK29SDK_SD_CARD_PWR_EN_LEVEL,
+#else
+ .power_en = INVALID_GPIO,
+ .power_en_level = GPIO_LOW,
+#endif
+ .enable_sd_wakeup = 0,
+
+#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
+ .write_prt = SDMMC0_WRITE_PROTECT_PIN,
+ .write_prt_enalbe_level = SDMMC0_WRITE_PROTECT_ENABLE_VALUE;
+#else
+ .write_prt = INVALID_GPIO,
+#endif
+
+ .det_pin_info = {
+ #if defined(RK29SDK_SD_CARD_DETECT_N) || (INVALID_GPIO != RK29SDK_SD_CARD_DETECT_N)
+ .io = RK29SDK_SD_CARD_DETECT_N, //INVALID_GPIO,
+ .enable = RK29SDK_SD_CARD_INSERT_LEVEL,
+ #ifdef RK29SDK_SD_CARD_DETECT_PIN_NAME
+ .iomux = {
+ .name = RK29SDK_SD_CARD_DETECT_PIN_NAME,
+ #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO
+ .fgpio = RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO,
+ #endif
+ #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FMUX
+ .fmux = RK29SDK_SD_CARD_DETECT_IOMUX_FMUX,
+ #endif
+ },
+ #endif
+ #else
+ .io = INVALID_GPIO,
+ .enable = GPIO_LOW,
+ #endif
+ },
+
+};
+#endif // CONFIG_SDMMC0_RK29
+
+#ifdef CONFIG_SDMMC1_RK29
+#define CONFIG_SDMMC1_USE_DMA
+static int rk29_sdmmc1_cfg_gpio(void)
+{
+#if defined(CONFIG_SDMMC_RK29_OLD)
+ iomux_set(MMC1_CMD);
+ iomux_set(MMC1_CLKOUT);
+ iomux_set(MMC1_D0);
+ iomux_set(MMC1_D1);
+ iomux_set(MMC1_D2);
+ iomux_set(MMC1_D3);
+#else
+
+#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
+ gpio_request(SDMMC1_WRITE_PROTECT_PIN, "sdio-wp");
+ gpio_direction_input(SDMMC1_WRITE_PROTECT_PIN);
+#endif
+
+#endif
+
+ return 0;
+}
+
+struct rk29_sdmmc_platform_data default_sdmmc1_data = {
+ .host_ocr_avail =
+ (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
+ MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
+ MMC_VDD_33_34),
+
+#if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
+ .host_caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ |
+ MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+#else
+ .host_caps =
+ (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+#endif
+
+ .io_init = rk29_sdmmc1_cfg_gpio,
+
+#if !defined(CONFIG_SDMMC_RK29_OLD)
+ .set_iomux = rk29_sdmmc_set_iomux,
+#endif
+
+ .dma_name = "sdio",
+#ifdef CONFIG_SDMMC1_USE_DMA
+ .use_dma = 1,
+#else
+ .use_dma = 0,
+#endif
+
+#if defined(CONFIG_WIFI_CONTROL_FUNC) || defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC)
+ .status = rk29sdk_wifi_status,
+ .register_status_notify = rk29sdk_wifi_status_register,
+#endif
+
+#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
+ .write_prt = SDMMC1_WRITE_PROTECT_PIN,
+ .write_prt_enalbe_level = SDMMC1_WRITE_PROTECT_ENABLE_VALUE;
+#else
+ .write_prt = INVALID_GPIO,
+#endif
+
+ #if defined(CONFIG_RK29_SDIO_IRQ_FROM_GPIO)
+ .sdio_INT_gpio = RK29SDK_WIFI_SDIO_CARD_INT,
+ #ifdef USE_SDIO_INT_LEVEL
+ .sdio_INT_level = RK30SDK_WIFI_GPIO_WIFI_INT_B_ENABLE_VALUE,
+ #endif
+ #endif
+
+ .det_pin_info = {
+#if defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
+ #if defined(RK29SDK_SD_CARD_DETECT_N) || (INVALID_GPIO != RK29SDK_SD_CARD_DETECT_N)
+ .io = RK29SDK_SD_CARD_DETECT_N,
+ #else
+ .io = INVALID_GPIO,
+ #endif
+
+ .enable = RK29SDK_SD_CARD_INSERT_LEVEL,
+ #ifdef RK29SDK_SD_CARD_DETECT_PIN_NAME
+ .iomux = {
+ .name = RK29SDK_SD_CARD_DETECT_PIN_NAME,
+ #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO
+ .fgpio = RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO,
+ #endif
+ #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FMUX
+ .fmux = RK29SDK_SD_CARD_DETECT_IOMUX_FMUX,
+ #endif
+ },
+ #endif
+ #else
+ .io = INVALID_GPIO,
+ .enable = GPIO_LOW,
+#endif
+ },
+
+ .enable_sd_wakeup = 0,
+};
+#endif //endif--#ifdef CONFIG_SDMMC1_RK29
+
+/**************************************************************************************************
+ * the end of setting for SDMMC devices
+**************************************************************************************************/
+
+#ifdef CONFIG_BATTERY_RK30_ADC_FAC
+static struct rk30_adc_battery_platform_data rk30_adc_battery_platdata = {
+ .dc_det_pin = RK30_PIN0_PB7,
+ .batt_low_pin = INVALID_GPIO,
+ .charge_set_pin = INVALID_GPIO,
+ .charge_ok_pin = RK30_PIN1_PB2,
+ .usb_det_pin = INVALID_GPIO,
+ .dc_det_level = GPIO_LOW,
+ .charge_ok_level = GPIO_HIGH,
+
+ .reference_voltage = 1800, // the rK2928 is 3300;RK3066 and rk29 are 2500;rk3066B is 1800;
+ .pull_up_res = 200, //divider resistance , pull-up resistor
+ .pull_down_res = 120, //divider resistance , pull-down resistor
+
+ .is_reboot_charging = 1,
+ .save_capacity = 1 ,
+ .low_voltage_protection = 3600,
+};
+
+static struct platform_device rk30_device_adc_battery = {
+ .name = "rk30-battery",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk30_adc_battery_platdata,
+ },
+};
+#endif
+#ifdef CONFIG_RK30_PWM_REGULATOR
+static int pwm_voltage_map[] = {
+ 950000,975000,1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000, 1400000
+};
+static struct regulator_consumer_supply pwm_dcdc1_consumers[] = {
+ {
+ .supply = "vdd_cpu",
+ }
+};
+
+struct regulator_init_data pwm_regulator_init_dcdc[1] =
+{
+ {
+ .constraints = {
+ .name = "PWM_DCDC1",
+ .min_uV = 600000,
+ .max_uV = 1800000, //0.6-1.8V
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(pwm_dcdc1_consumers),
+ .consumer_supplies = pwm_dcdc1_consumers,
+ },
+};
+
+static struct pwm_platform_data pwm_regulator_info[1] = {
+ {
+ #if defined (CONFIG_MACH_RK3028_TB)
+ .pwm_id = 2,
+ .pwm_gpio = RK30_PIN3_PD5,
+ .pwm_iomux_pwm = PWM2,
+ .pwm_iomux_gpio = GPIO3_D5,
+ #else
+ .pwm_id = 1,
+ .pwm_gpio = RK30_PIN3_PD4,
+ .pwm_iomux_pwm = PWM1,
+ .pwm_iomux_gpio = GPIO3_D4,
+
+ #endif
+ .pwm_voltage = 1100000,
+ .suspend_voltage = 1000000,
+ .min_uV = 950000,
+ .max_uV = 1400000,
+ .coefficient = 504, //57.5%
+ .pwm_voltage_map = pwm_voltage_map,
+ .init_data = &pwm_regulator_init_dcdc[0],
+ },
+};
+
+struct platform_device pwm_regulator_device[1] = {
+ {
+ .name = "pwm-voltage-regulator",
+ .id = 0,
+ .dev = {
+ .platform_data = &pwm_regulator_info[0],
+ }
+ },
+};
+#endif
+
+#ifdef CONFIG_RK29_VMAC
+#define PHY_PWR_EN_GPIO RK30_PIN1_PD6
+#include "board-rk30-sdk-vmac.c"
+#endif
+
+#ifdef CONFIG_RFKILL_RK
+// bluetooth rfkill device, its driver in net/rfkill/rfkill-rk.c
+static struct rfkill_rk_platform_data rfkill_rk_platdata = {
+ .type = RFKILL_TYPE_BLUETOOTH,
+
+ .poweron_gpio = { // BT_REG_ON
+ .io = INVALID_GPIO, //RK30_PIN3_PC7,
+ .enable = GPIO_HIGH,
+ .iomux = {
+ .name = "bt_poweron",
+ .fgpio = GPIO3_C7,
+ },
+ },
+
+ .reset_gpio = { // BT_RST
+ .io = RK30_PIN3_PC7, // set io to INVALID_GPIO for disable it
+ .enable = GPIO_LOW,
+ .iomux = {
+ .name = "bt_reset",
+ .fgpio = GPIO3_C7,
+ },
+ },
+
+ .wake_gpio = { // BT_WAKE, use to control bt's sleep and wakeup
+ .io = RK30_PIN3_PC6, // set io to INVALID_GPIO for disable it
+ .enable = GPIO_HIGH,
+ .iomux = {
+ .name = "bt_wake",
+ .fgpio = GPIO3_C6,
+ },
+ },
+
+ .wake_host_irq = { // BT_HOST_WAKE, for bt wakeup host when it is in deep sleep
+ .gpio = {
+ .io = RK30_PIN0_PA5, // set io to INVALID_GPIO for disable it
+ .enable = GPIO_LOW, // set GPIO_LOW for falling, set 0 for rising
+ .iomux = {
+ .name = NULL,
+ },
+ },
+ },
+
+ .rts_gpio = { // UART_RTS, enable or disable BT's data coming
+ .io = RK30_PIN1_PA3, // set io to INVALID_GPIO for disable it
+ .enable = GPIO_LOW,
+ .iomux = {
+ .name = "bt_rts",
+ .fgpio = GPIO1_A3,
+ .fmux = UART0_RTSN,
+ },
+ },
+};
+
+static struct platform_device device_rfkill_rk = {
+ .name = "rfkill_rk",
+ .id = -1,
+ .dev = {
+ .platform_data = &rfkill_rk_platdata,
+ },
+};
+#endif
+
+#if defined(CONFIG_GPS_RK)
+int rk_gps_io_init(void)
+{
+ printk("%s \n", __FUNCTION__);
+
+ gpio_request(RK30_PIN1_PB5, NULL);
+ gpio_direction_output(RK30_PIN1_PB5, GPIO_LOW);
+
+ iomux_set(GPS_RFCLK);//GPS_CLK
+ iomux_set(GPS_MAG);//GPS_MAG
+ iomux_set(GPS_SIG);//GPS_SIGN
+
+ gpio_request(RK30_PIN1_PA6, NULL);
+ gpio_direction_output(RK30_PIN1_PA6, GPIO_LOW);
+
+ gpio_request(RK30_PIN1_PA5, NULL);
+ gpio_direction_output(RK30_PIN1_PA5, GPIO_LOW);
+
+ gpio_request(RK30_PIN1_PA7, NULL);
+ gpio_direction_output(RK30_PIN1_PA7, GPIO_LOW);
+ return 0;
+}
+int rk_gps_power_up(void)
+{
+ printk("%s \n", __FUNCTION__);
+
+ return 0;
+}
+
+int rk_gps_power_down(void)
+{
+ printk("%s \n", __FUNCTION__);
+
+ return 0;
+}
+
+int rk_gps_reset_set(int level)
+{
+ return 0;
+}
+int rk_enable_hclk_gps(void)
+{
+ struct clk *gps_aclk = NULL;
+ gps_aclk = clk_get(NULL, "aclk_gps");
+ if(gps_aclk) {
+ clk_enable(gps_aclk);
+ clk_put(gps_aclk);
+ printk("%s \n", __FUNCTION__);
+ }
+ else
+ printk("get gps aclk fail\n");
+ return 0;
+}
+int rk_disable_hclk_gps(void)
+{
+ struct clk *gps_aclk = NULL;
+ gps_aclk = clk_get(NULL, "aclk_gps");
+ if(gps_aclk) {
+ //TO wait long enough until GPS ISR is finished.
+ msleep(5);
+ clk_disable(gps_aclk);
+ clk_put(gps_aclk);
+ printk("%s \n", __FUNCTION__);
+ }
+ else
+ printk("get gps aclk fail\n");
+ return 0;
+}
+struct rk_gps_data rk_gps_info = {
+ .io_init = rk_gps_io_init,
+ .power_up = rk_gps_power_up,
+ .power_down = rk_gps_power_down,
+ .reset = rk_gps_reset_set,
+ .enable_hclk_gps = rk_enable_hclk_gps,
+ .disable_hclk_gps = rk_disable_hclk_gps,
+ .GpsSign = RK30_PIN1_PB3,
+ .GpsMag = RK30_PIN1_PB2, //GPIO index
+ .GpsClk = RK30_PIN1_PB4, //GPIO index
+ .GpsVCCEn = RK30_PIN1_PB5, //GPIO index
+ .GpsSpi_CSO = RK30_PIN1_PA4, //GPIO index
+ .GpsSpiClk = RK30_PIN1_PA5, //GPIO index
+ .GpsSpiMOSI = RK30_PIN1_PA7, //GPIO index
+ .GpsIrq = IRQ_GPS,
+ .GpsSpiEn = 0,
+ .GpsAdcCh = 2,
+ .u32GpsPhyAddr = RK30_GPS_PHYS,
+ .u32GpsPhySize = RK30_GPS_SIZE,
+};
+
+struct platform_device rk_device_gps = {
+ .name = "gps_hv5820b",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk_gps_info,
+ }
+ };
+#endif
+
+#if defined(CONFIG_MT5931_MT6622)
+static struct mt6622_platform_data mt6622_platdata = {
+ .power_gpio = { // BT_REG_ON
+ .io = RK30_PIN3_PD5, // set io to INVALID_GPIO for disable it
+ .enable = GPIO_HIGH,
+ .iomux = {
+ .name = NULL,
+ },
+ },
+
+ .reset_gpio = { // BT_RST
+ .io = RK30_PIN0_PD7,
+ .enable = GPIO_HIGH,
+ .iomux = {
+ .name = NULL,
+ },
+ },
+
+ .irq_gpio = {
+ .io = RK30_PIN0_PA5,
+ .enable = GPIO_LOW,
+ .iomux = {
+ .name = NULL,
+ },
+ },
+
+ .rts_gpio = { // UART_RTS
+ .io = RK30_PIN1_PA3,
+ .enable = GPIO_LOW,
+ .iomux = {
+ .name = "bt_rts",
+ .fgpio = GPIO1_A3,
+ .fmux = UART0_RTSN,
+ },
+ },
+};
+
+static struct platform_device device_mt6622 = {
+ .name = "mt6622",
+ .id = -1,
+ .dev = {
+ .platform_data = &mt6622_platdata,
+ },
+};
+#endif
+
+#if defined CONFIG_TCC_BT_DEV
+static struct tcc_bt_platform_data tcc_bt_platdata = {
+
+ .power_gpio = { // ldoon
+ .io = RK30_PIN3_PC0,//difined depend on your harware
+ .enable = GPIO_HIGH,
+ .iomux = {
+ .name = NULL,
+ },
+ },
+
+ .wake_host_gpio = { // BT_HOST_WAKE, for bt wakeup host when it is in deep sleep
+ .io = RK30_PIN0_PC5, // set io to INVALID_GPIO for disable it,it's depend on your hardware
+ .enable = IRQF_TRIGGER_RISING,// set IRQF_TRIGGER_FALLING for falling, set IRQF_TRIGGER_RISING for rising
+ .iomux = {
+ .name = NULL,
+ },
+ },
+};
+
+static struct platform_device device_tcc_bt = {
+ .name = "tcc_bt_dev",
+ .id = -1,
+ .dev = {
+ .platform_data = &tcc_bt_platdata,
+ },
+};
+#endif
+
+
+static struct platform_device *devices[] __initdata = {
+#ifdef CONFIG_ION
+ &device_ion,
+#endif
+#ifdef CONFIG_ANDROID_TIMED_GPIO
+ &rk29_device_vibrator,
+#endif
+#ifdef CONFIG_LEDS_GPIO_PLATFORM
+ &rk29_device_gpio_leds,
+#endif
+#ifdef CONFIG_RK_IRDA
+ &irda_device,
+#endif
+#if defined(CONFIG_WIFI_CONTROL_FUNC)||defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC)
+ &rk29sdk_wifi_device,
+#endif
+
+#if defined(CONFIG_MT6620)
+ &mt3326_device_gps,
+#endif
+
+#ifdef CONFIG_RK29_SUPPORT_MODEM
+ &rk30_device_modem,
+#endif
+#if defined(CONFIG_MU509)
+ &rk29_device_mu509,
+#endif
+#if defined(CONFIG_MW100)
+ &rk29_device_mw100,
+#endif
+#if defined(CONFIG_MT6229)
+ &rk29_device_mt6229,
+#endif
+#ifdef CONFIG_BATTERY_RK30_ADC_FAC
+ &rk30_device_adc_battery,
+#endif
+#ifdef CONFIG_RFKILL_RK
+ &device_rfkill_rk,
+#endif
+#ifdef CONFIG_GPS_RK
+ &rk_device_gps,
+#endif
+
+#ifdef CONFIG_MT5931_MT6622
+ &device_mt6622,
+#endif
+#ifdef CONFIG_TCC_BT_DEV
+ &device_tcc_bt,
+#endif
+};
+
+static int rk_platform_add_display_devices(void)
+{
+ struct platform_device *fb = NULL; //fb
+ struct platform_device *lcdc0 = NULL; //lcdc0
+ struct platform_device *lcdc1 = NULL; //lcdc1
+ struct platform_device *bl = NULL; //backlight
+#ifdef CONFIG_FB_ROCKCHIP
+ fb = &device_fb;
+#endif
+
+#if defined(CONFIG_LCDC0_RK3066B)
+ lcdc0 = &device_lcdc0,
+#endif
+
+#if defined(CONFIG_LCDC1_RK3066B)
+ lcdc1 = &device_lcdc1,
+#endif
+
+#ifdef CONFIG_BACKLIGHT_RK29_BL
+ bl = &rk29_device_backlight,
+#endif
+ __rk_platform_add_display_devices(fb,lcdc0,lcdc1,bl);
+
+ return 0;
+
+}
+
+#ifdef CONFIG_MFD_TPS65910
+#define TPS65910_HOST_IRQ RK30_PIN0_PB5
+
+#define PMU_POWER_SLEEP RK30_PIN1_PB5
+
+static struct pmu_info tps65910_dcdc_info[] = {
+ {
+ .name = "vdd_core", //logic
+ .min_uv = 1100000,
+ .max_uv = 1100000,
+ },
+ {
+ .name = "vdd_cpu", //arm
+ .min_uv = 1100000,
+ .max_uv = 1100000,
+ },
+ {
+ .name = "vio", //vcc_io
+ .min_uv = 3000000,
+ .max_uv = 3000000,
+ },
+
+};
+static struct pmu_info tps65910_ldo_info[] = {
+ /*{
+ .name = "vpll", //vdd10
+ .min_uv = 1000000,
+ .max_uv = 1000000,
+ },*/
+ {
+ .name = "vdig1", //vcc18_cif
+ .min_uv = 1800000,
+ .max_uv = 1800000,
+ },
+ {
+ .name = "vdig2", //vdd11
+ .min_uv = 1100000,
+ .max_uv = 1100000,
+ },
+ {
+ .name = "vaux1", //vcc28_cif
+ .min_uv = 2800000,
+ .max_uv = 2800000,
+ },
+ {
+ .name = "vaux2", //vcc33
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ },
+ {
+ .name = "vaux33", //vcc_tp
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ },
+ {
+ .name = "vmmc", //vcca30
+ .min_uv = 3000000,
+ .max_uv = 3000000,
+ },
+ {
+ .name = "vdac", //vcc18
+ .min_uv = 1800000,
+ .max_uv = 1800000,
+ },
+ };
+
+#include "board-pmu-tps65910.c"
+#endif
+#ifdef CONFIG_REGULATOR_ACT8931
+#define ACT8931_HOST_IRQ RK30_PIN0_PB5//depend on your hardware
+
+
+#define ACT8931_CHGSEL_PIN RK30_PIN0_PD0 //depend on your hardware
+
+
+static struct pmu_info act8931_dcdc_info[] = {
+ {
+ .name = "vdd_core", //vdd_logic
+ .min_uv = 1200000,
+ .max_uv = 1200000,
+ },
+ {
+ .name = "act_dcdc2", //ddr
+ .min_uv = 1500000,
+ .max_uv = 1500000,
+ },
+ {
+ .name = "vdd_cpu", //vdd_arm
+ .min_uv = 1200000,
+ .max_uv = 1200000,
+ },
+
+};
+static struct pmu_info act8931_ldo_info[] = {
+ {
+ .name = "act_ldo1", //vcc28_cif
+ .min_uv = 2800000,
+ .max_uv = 2800000,
+ },
+ {
+ .name = "act_ldo2", //vcc18_cif
+ .min_uv = 1800000,
+ .max_uv = 1800000,
+ },
+ {
+ .name = "act_ldo3", //vcca30
+ .min_uv = 3000000,
+ .max_uv = 3000000,
+ },
+ {
+ .name = "act_ldo4", //vcc_wl
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ },
+};
+#include "board-rk30-sdk-act8931.c"
+#endif
+
+// i2c
+#ifdef CONFIG_I2C0_RK30
+static struct i2c_board_info __initdata i2c0_info[] = {
+#if defined (CONFIG_MFD_TPS65910)
+ {
+ .type = "tps65910",
+ .addr = TPS65910_I2C_ID0,
+ .flags = 0,
+ .irq = TPS65910_HOST_IRQ,
+ .platform_data = &tps65910_data,
+ },
+#endif
+#if defined (CONFIG_REGULATOR_ACT8931)
+ {
+ .type = "act8931",
+ .addr = 0x5b,
+ .flags = 0,
+ .irq = ACT8931_HOST_IRQ,
+ .platform_data=&act8931_data,
+ },
+#endif
+#if defined (CONFIG_GS_MMA8452)
+ {
+ .type = "gs_mma8452",
+ .addr = 0x1d,
+ .flags = 0,
+ .irq = MMA8452_INT_PIN,
+ .platform_data = &mma8452_info,
+ },
+#endif
+#if defined (CONFIG_GS_LIS3DH)
+ {
+ .type = "gs_lis3dh",
+ .addr = 0x19, //0x19(SA0-->VCC), 0x18(SA0-->GND)
+ .flags = 0,
+ .irq = LIS3DH_INT_PIN,
+ .platform_data = &lis3dh_info,
+ },
+#endif
+#if defined (CONFIG_COMPASS_AK8975)
+ {
+ .type = "ak8975",
+ .addr = 0x0d,
+ .flags = 0,
+ .irq = RK30_PIN3_PD7,
+ .platform_data = &akm8975_info,
+ },
+#endif
+#if defined (CONFIG_GYRO_L3G4200D)
+ {
+ .type = "l3g4200d_gryo",
+ .addr = 0x69,
+ .flags = 0,
+ .irq = L3G4200D_INT_PIN,
+ .platform_data = &l3g4200d_info,
+ },
+#endif
+#if defined (CONFIG_SND_SOC_RK1000)
+ {
+ .type = "rk1000_i2c_codec",
+ .addr = 0x60,
+ .flags = 0,
+ },
+ {
+ .type = "rk1000_control",
+ .addr = 0x40,
+ .flags = 0,
+ },
+#endif
+#if defined (CONFIG_SND_SOC_RT5631)
+ {
+ .type = "rt5631",
+ .addr = 0x1a,
+ .flags = 0,
+ },
+#endif
+
+
+};
+#endif
+
+int __sramdata g_pmic_type = 0;
+#ifdef CONFIG_I2C1_RK30
+#ifdef CONFIG_MFD_WM831X_I2C
+#define PMU_POWER_SLEEP RK30_PIN0_PA1
+
+static struct pmu_info wm8326_dcdc_info[] = {
+ {
+ .name = "vdd_core", //logic
+ .min_uv = 1000000,
+ .max_uv = 1000000,
+ .suspend_vol = 950000,
+ },
+ {
+ .name = "vdd_cpu", //arm
+ .min_uv = 1000000,
+ .max_uv = 1000000,
+ .suspend_vol = 950000,
+ },
+ {
+ .name = "dcdc3", //ddr
+ .min_uv = 1150000,
+ .max_uv = 1150000,
+ .suspend_vol = 1150000,
+ },
+ #ifdef CONFIG_MACH_RK3066_SDK
+ {
+ .name = "dcdc4", //vcc_io
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ .suspend_vol = 3000000,
+ },
+ #else
+ {
+ .name = "dcdc4", //vcc_io
+ .min_uv = 3000000,
+ .max_uv = 3000000,
+ .suspend_vol = 2800000,
+ },
+ #endif
+};
+
+static struct pmu_info wm8326_ldo_info[] = {
+ {
+ .name = "ldo1", //vcc18_cif
+ .min_uv = 1800000,
+ .max_uv = 1800000,
+ .suspend_vol = 1800000,
+ },
+ {
+ .name = "ldo2", //vccio_wl
+ .min_uv = 1800000,
+ .max_uv = 1800000,
+ .suspend_vol = 1800000,
+ },
+ {
+ .name = "ldo3", //
+ .min_uv = 1100000,
+ .max_uv = 1100000,
+ .suspend_vol = 1100000,
+ },
+ {
+ .name = "ldo4", //vdd11
+ .min_uv = 1000000,
+ .max_uv = 1000000,
+ .suspend_vol = 1000000,
+ },
+ {
+ .name = "ldo5", //vcc25
+ .min_uv = 1800000,
+ .max_uv = 1800000,
+ .suspend_vol = 1800000,
+ },
+ {
+ .name = "ldo6", //vcc33
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ .suspend_vol = 3300000,
+ },
+ {
+ .name = "ldo7", //vcc28_cif
+ .min_uv = 2800000,
+ .max_uv = 2800000,
+ .suspend_vol = 2800000,
+ },
+ {
+ .name = "ldo8", //vcca33
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ .suspend_vol = 3300000,
+ },
+ {
+ .name = "ldo9", //vcc_tp
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ .suspend_vol = 3300000,
+ },
+ {
+ .name = "ldo10", //flash_io
+ .min_uv = 1800000,
+ .max_uv = 1800000,
+ .suspend_vol = 1800000,
+ },
+};
+
+#include "../mach-rk30/board-pmu-wm8326.c"
+#endif
+
+#ifdef CONFIG_REGULATOR_ACT8846
+#define PMU_POWER_SLEEP RK30_PIN0_PA1
+#define PMU_VSEL RK30_PIN3_PD3
+static struct pmu_info act8846_dcdc_info[] = {
+ {
+ .name = "act_dcdc1", //ddr
+ .min_uv = 1200000,
+ .max_uv = 1200000,
+ .suspend_vol = 1200000,
+ },
+ {
+ .name = "vdd_core", //logic
+ .min_uv = 1000000,
+ .max_uv = 1000000,
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
+ .suspend_vol = 1200000,
+ #else
+ .suspend_vol = 900000,
+ #endif
+
+ },
+ {
+ .name = "vdd_cpu", //arm
+ .min_uv = 1000000,
+ .max_uv = 1000000,
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
+ .suspend_vol = 1200000,
+ #else
+ .suspend_vol = 900000,
+ #endif
+
+ },
+ {
+ .name = "act_dcdc4", //vccio
+ .min_uv = 3000000,
+ .max_uv = 3000000,
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
+ .suspend_vol = 3000000,
+ #else
+ .suspend_vol = 2800000,
+ #endif
+
+ },
+
+};
+static struct pmu_info act8846_ldo_info[] = {
+ {
+ .name = "act_ldo1", //vdd11
+ .min_uv = 1000000,
+ .max_uv = 1000000,
+ },
+ {
+ .name = "act_ldo2", //vdd12
+ .min_uv = 1200000,
+ .max_uv = 1200000,
+ },
+ {
+ .name = "act_ldo3", //vcc18_cif
+ .min_uv = 1800000,
+ .max_uv = 1800000,
+ },
+ {
+ .name = "act_ldo4", //vcca33
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ },
+ {
+ .name = "act_ldo5", //vcctp
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ },
+ {
+ .name = "act_ldo6", //vcc33
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ },
+ {
+ .name = "act_ldo7", //vccio_wl
+ .min_uv = 1800000,
+ .max_uv = 1800000,
+ },
+ {
+ .name = "act_ldo8", //vcc28_cif
+ .min_uv = 2800000,
+ .max_uv = 2800000,
+ },
+ };
+
+#include "../mach-rk30/board-pmu-act8846.c"
+#endif
+
+
+static struct i2c_board_info __initdata i2c1_info[] = {
+#if defined (CONFIG_MFD_WM831X_I2C)
+ {
+ .type = "wm8326",
+ .addr = 0x34,
+ .flags = 0,
+ .irq = RK30_PIN0_PB3,
+ .platform_data = &wm831x_platdata,
+ },
+#endif
+#if defined (CONFIG_REGULATOR_ACT8846)
+ {
+ .type = "act8846",
+ .addr = 0x5a,
+ .flags = 0,
+ // .irq = ACT8846_HOST_IRQ,
+ .platform_data=&act8846_data,
+ },
+#endif
+#if defined (CONFIG_RTC_HYM8563)
+ {
+ .type = "rtc_hym8563",
+ .addr = 0x51,
+ .flags = 0,
+ .irq = RK30_PIN1_PA4,
+ },
+#endif
+#if defined (CONFIG_GS_MXC6225)
+ {
+ .type = "gs_mxc6225",
+ .addr = 0x15,
+ .flags = 0,
+ .irq = MXC6225_INT_PIN,
+ .platform_data = &mxc6225_info,
+ },
+#endif
+};
+#endif
+
+void __sramfunc board_pmu_suspend(void)
+{
+ #if defined (CONFIG_MFD_WM831X_I2C)
+ if(pmic_is_wm8326())
+ board_pmu_wm8326_suspend();
+ #endif
+ #if defined (CONFIG_MFD_TPS65910)
+ if(pmic_is_tps65910())
+ board_pmu_tps65910_suspend();
+ #endif
+ #if defined (CONFIG_REGULATOR_ACT8846)
+ if(pmic_is_act8846())
+ board_pmu_act8846_suspend();
+ #endif
+
+}
+
+void __sramfunc board_pmu_resume(void)
+{
+ #if defined (CONFIG_MFD_WM831X_I2C)
+ if(pmic_is_wm8326())
+ board_pmu_wm8326_resume();
+ #endif
+ #if defined (CONFIG_MFD_TPS65910)
+ if(pmic_is_tps65910())
+ board_pmu_tps65910_resume();
+ #endif
+ #if defined (CONFIG_REGULATOR_ACT8846)
+ if(pmic_is_act8846())
+ board_pmu_act8846_resume();
+ #endif
+}
+
+ int __sramdata gpio3d6_iomux,gpio3d6_do,gpio3d6_dir,gpio3d6_en;
+
+#define grf_readl(offset) readl_relaxed(RK30_GRF_BASE + offset)
+#define grf_writel(v, offset) do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0)
+
+void __sramfunc rk30_pwm_logic_suspend_voltage(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+
+// int gpio0d7_iomux,gpio0d7_do,gpio0d7_dir,gpio0d7_en;
+ sram_udelay(10000);
+ gpio3d6_iomux = grf_readl(GRF_GPIO3D_IOMUX);
+ gpio3d6_do = grf_readl(GRF_GPIO3H_DO);
+ gpio3d6_dir = grf_readl(GRF_GPIO3H_DIR);
+ gpio3d6_en = grf_readl(GRF_GPIO3H_EN);
+
+ grf_writel((1<<28), GRF_GPIO3D_IOMUX);
+ grf_writel((1<<30)|(1<<14), GRF_GPIO3H_DIR);
+ grf_writel((1<<30)|(1<<14), GRF_GPIO3H_DO);
+ grf_writel((1<<30)|(1<<14), GRF_GPIO3H_EN);
+#endif
+}
+void __sramfunc rk30_pwm_logic_resume_voltage(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+ grf_writel((1<<28)|gpio3d6_iomux, GRF_GPIO3D_IOMUX);
+ grf_writel((1<<30)|gpio3d6_en, GRF_GPIO3H_EN);
+ grf_writel((1<<30)|gpio3d6_dir, GRF_GPIO3H_DIR);
+ grf_writel((1<<30)|gpio3d6_do, GRF_GPIO3H_DO);
+ sram_udelay(10000);
+
+#endif
+
+}
+extern void pwm_suspend_voltage(void);
+extern void pwm_resume_voltage(void);
+void rk30_pwm_suspend_voltage_set(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+ pwm_suspend_voltage();
+#endif
+}
+void rk30_pwm_resume_voltage_set(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+ pwm_resume_voltage();
+#endif
+}
+
+
+#ifdef CONFIG_I2C2_RK30
+static struct i2c_board_info __initdata i2c2_info[] = {
+#if defined (CONFIG_TOUCHSCREEN_GT8XX)
+ {
+ .type = "Goodix-TS",
+ .addr = 0x55,
+ .flags = 0,
+ .irq = RK30_PIN0_PB4,
+ .platform_data = &goodix_info,
+ },
+#endif
+#if defined (CONFIG_LS_CM3217)
+ {
+ .type = "lightsensor",
+ .addr = 0x10,
+ .flags = 0,
+ .platform_data = &cm3217_info,
+ },
+#endif
+#if defined (CONFIG_TOUCHSCREEN_GSLX680_RK3028)
+ {
+ .type = "gslX680",
+ .addr = 0x40,
+ .flags = 0,
+ .platform_data =&gslx680_info,
+ },
+#endif
+
+};
+#endif
+
+#ifdef CONFIG_I2C3_RK30
+static struct i2c_board_info __initdata i2c3_info[] = {
+};
+#endif
+
+#ifdef CONFIG_I2C4_RK30
+static struct i2c_board_info __initdata i2c4_info[] = {
+#ifdef CONFIG_MFD_RK610
+ {
+ .type = "rk610_ctl",
+ .addr = 0x40,
+ .flags = 0,
+ .platform_data = &rk610_ctl_pdata,
+ },
+#ifdef CONFIG_RK610_TVOUT
+ {
+ .type = "rk610_tvout",
+ .addr = 0x42,
+ .flags = 0,
+ },
+#endif
+#ifdef CONFIG_HDMI_RK610
+ {
+ .type = "rk610_hdmi",
+ .addr = 0x46,
+ .flags = 0,
+ .irq = INVALID_GPIO,
+ },
+#endif
+#ifdef CONFIG_SND_SOC_RK610
+ {//RK610_CODEC addr from 0x60 to 0x80 (0x60~0x80)
+ .type = "rk610_i2c_codec",
+ .addr = 0x60,
+ .flags = 0,
+ .platform_data = &rk610_codec_pdata,
+ },
+#endif
+#endif
+
+};
+#endif
+
+#ifdef CONFIG_I2C_GPIO_RK30
+#define I2C_SDA_PIN INVALID_GPIO// RK30_PIN2_PD6 //set sda_pin here
+#define I2C_SCL_PIN INVALID_GPIO//RK30_PIN2_PD7 //set scl_pin here
+static int rk30_i2c_io_init(void)
+{
+ //set iomux (gpio) here
+ //rk30_mux_api_set(GPIO2D7_I2C1SCL_NAME, GPIO2D_GPIO2D7);
+ //rk30_mux_api_set(GPIO2D6_I2C1SDA_NAME, GPIO2D_GPIO2D6);
+
+ return 0;
+}
+struct i2c_gpio_platform_data default_i2c_gpio_data = {
+ .sda_pin = I2C_SDA_PIN,
+ .scl_pin = I2C_SCL_PIN,
+ .udelay = 5, // clk = 500/udelay = 100Khz
+ .timeout = 100,//msecs_to_jiffies(100),
+ .bus_num = 5,
+ .io_init = rk30_i2c_io_init,
+};
+static struct i2c_board_info __initdata i2c_gpio_info[] = {
+};
+#endif
+
+static void __init rk30_i2c_register_board_info(void)
+{
+#ifdef CONFIG_I2C0_RK30
+ i2c_register_board_info(0, i2c0_info, ARRAY_SIZE(i2c0_info));
+#endif
+#ifdef CONFIG_I2C1_RK30
+ i2c_register_board_info(1, i2c1_info, ARRAY_SIZE(i2c1_info));
+#endif
+#ifdef CONFIG_I2C2_RK30
+ i2c_register_board_info(2, i2c2_info, ARRAY_SIZE(i2c2_info));
+#endif
+#ifdef CONFIG_I2C3_RK30
+ i2c_register_board_info(3, i2c3_info, ARRAY_SIZE(i2c3_info));
+#endif
+#ifdef CONFIG_I2C4_RK30
+ i2c_register_board_info(4, i2c4_info, ARRAY_SIZE(i2c4_info));
+#endif
+#ifdef CONFIG_I2C_GPIO_RK30
+ i2c_register_board_info(5, i2c_gpio_info, ARRAY_SIZE(i2c_gpio_info));
+#endif
+}
+//end of i2c
+
+// ========== Begin of rk3168 top board keypad defination ============
+
+#include <plat/key.h>
+
+static struct rk29_keys_button key_button[] = {
+ {
+ .desc = "play",
+ .code = KEY_POWER,
+ .gpio = RK30_PIN1_PB4,
+ .active_low = PRESS_LEV_LOW,
+ .wakeup = 1,
+ },
+};
+struct rk29_keys_platform_data rk29_keys_pdata = {
+ .buttons = key_button,
+ .nbuttons = ARRAY_SIZE(key_button),
+ .chn = 1, //chn: 0-7, if do not use ADC,set 'chn' -1
+};
+
+// =========== End of rk3168 top board keypad defination =============
+
+
+#define POWER_ON_PIN RK30_PIN0_PD5 //power_hold
+static void rk30_pm_power_off(void)
+{
+ printk(KERN_ERR "rk30_pm_power_off start...\n");
+ #if defined(CONFIG_MFD_WM831X)
+ if(pmic_is_wm8326()){
+ wm831x_set_bits(Wm831x,WM831X_GPIO_LEVEL,0x0001,0x0000); //set sys_pwr 0
+ wm831x_device_shutdown(Wm831x);//wm8326 shutdown
+ }
+ #endif
+
+ #if defined(CONFIG_REGULATOR_ACT8846)
+ if(pmic_is_act8846())
+ {
+ act8846_device_shutdown();
+ }
+ #endif
+
+ #if defined(CONFIG_MFD_TPS65910)
+ if(pmic_is_tps65910())
+ {
+ tps65910_device_shutdown();//tps65910 shutdown
+ }
+ #endif
+ #if defined(CONFIG_REGULATOR_ACT8931)
+ if(pmic_is_act8931())
+ {
+ act8931_device_shutdown();//act8931 shutdown
+ }
+ #endif
+
+ gpio_direction_output(POWER_ON_PIN, GPIO_LOW);
+ while (1);
+}
+
+static void __init machine_rk30_board_init(void)
+{
+ avs_init();
+ gpio_request(POWER_ON_PIN, "poweronpin");
+ gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
+
+ pm_power_off = rk30_pm_power_off;
+
+ gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
+
+
+ rk30_i2c_register_board_info();
+ spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
+ platform_add_devices(devices, ARRAY_SIZE(devices));
+ rk_platform_add_display_devices();
+ board_usb_detect_init(RK30_PIN0_PA4);
+
+#if defined(CONFIG_WIFI_CONTROL_FUNC)
+ rk29sdk_wifi_bt_gpio_control_init();
+#elif defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC)
+ rk29sdk_wifi_combo_module_gpio_init();
+#endif
+
+#if defined(CONFIG_MT6620)
+ clk_set_rate(clk_get_sys("rk_serial.0", "uart"), 48*1000000);
+#endif
+
+#if defined(CONFIG_MT5931_MT6622)
+ clk_set_rate(clk_get_sys("rk_serial.0", "uart"), 24*1000000);
+#endif
+}
+
+static void __init rk30_reserve(void)
+{
+#ifdef CONFIG_ION
+ rk30_ion_pdata.heaps[0].base = board_mem_reserve_add("ion", ION_RESERVE_SIZE);
+#endif
+#ifdef CONFIG_FB_ROCKCHIP
+ resource_fb[0].start = board_mem_reserve_add("fb0 buf", get_fb_size());
+ resource_fb[0].end = resource_fb[0].start + get_fb_size()- 1;
+#if 0
+ resource_fb[1].start = board_mem_reserve_add("ipp buf", RK30_FB0_MEM_SIZE);
+ resource_fb[1].end = resource_fb[1].start + RK30_FB0_MEM_SIZE - 1;
+#endif
+
+#if defined(CONFIG_FB_ROTATE) || !defined(CONFIG_THREE_FB_BUFFER)
+ resource_fb[2].start = board_mem_reserve_add("fb2 buf",get_fb_size());
+ resource_fb[2].end = resource_fb[2].start + get_fb_size() - 1;
+#endif
+#endif
+
+#ifdef CONFIG_VIDEO_RK29
+ rk30_camera_request_reserve_mem();
+#endif
+
+#ifdef CONFIG_GPS_RK
+ //it must be more than 8MB
+ rk_gps_info.u32MemoryPhyAddr = board_mem_reserve_add("gps", SZ_8M);
+#endif
+ board_mem_reserved();
+}
+
+/**
+ * dvfs_cpu_logic_table: table for arm and logic dvfs
+ * @frequency : arm frequency
+ * @cpu_volt : arm voltage depend on frequency
+ * @logic_volt : logic voltage arm requests depend on frequency
+ * comments : min arm/logic voltage
+ */
+#ifdef CONFIG_DVFS_WITH_UOC
+//chenxing uoc
+static struct cpufreq_frequency_table dvfs_arm_table[] = {
+ {.frequency = 312 * 1000, .index = 950 * 1000},
+ {.frequency = 504 * 1000, .index = 1000 * 1000},
+ {.frequency = 816 * 1000, .index = 1050 * 1000},
+ {.frequency = 1008 * 1000, .index = 1125 * 1000},
+ {.frequency = 1200 * 1000, .index = 1200 * 1000},
+ {.frequency = CPUFREQ_TABLE_END},
+};
+
+static struct cpufreq_frequency_table dvfs_gpu_table[] = {
+ {.frequency = 100 * 1000, .index = 1000 * 1000},
+ {.frequency = 200 * 1000, .index = 1000 * 1000},
+ {.frequency = 266 * 1000, .index = 1050 * 1000},
+ //{.frequency = 300 * 1000, .index = 1050 * 1000},
+ {.frequency = 400 * 1000, .index = 1125 * 1000},
+ {.frequency = CPUFREQ_TABLE_END},
+};
+
+static struct cpufreq_frequency_table dvfs_ddr_table[] = {
+ {.frequency = 200 * 1000 + DDR_FREQ_SUSPEND, .index = 1000 * 1000},
+ {.frequency = 300 * 1000 + DDR_FREQ_VIDEO, .index = 1050 * 1000},
+ {.frequency = 400 * 1000 + DDR_FREQ_NORMAL, .index = 1100 * 1000},
+ {.frequency = CPUFREQ_TABLE_END},
+};
+#else
+//chenliang
+static struct cpufreq_frequency_table dvfs_arm_table[] = {
+ {.frequency = 312 * 1000, .index = 1000 * 1000},
+ {.frequency = 504 * 1000, .index = 1050 * 1000},
+ {.frequency = 816 * 1000, .index = 1100 * 1000},
+ {.frequency = 1008 * 1000, .index = 1150 * 1000},
+ //{.frequency = 1200 * 1000, .index = 1200 * 1000},
+ //{.frequency = 1416 * 1000, .index = 1250 * 1000},
+ {.frequency = CPUFREQ_TABLE_END},
+};
+
+static struct cpufreq_frequency_table dvfs_gpu_table[] = {
+ {.frequency = 100 * 1000, .index = 1000 * 1000},
+ {.frequency = 200 * 1000, .index = 1000 * 1000},
+ {.frequency = 266 * 1000, .index = 1050 * 1000},
+ {.frequency = 300 * 1000, .index = 1050 * 1000},
+ {.frequency = 400 * 1000, .index = 1125 * 1000},
+ {.frequency = CPUFREQ_TABLE_END},
+};
+
+static struct cpufreq_frequency_table dvfs_ddr_table[] = {
+ //{.frequency = 200 * 1000 + DDR_FREQ_SUSPEND, .index = 1000 * 1000},
+ //{.frequency = 240 * 1000 + DDR_FREQ_VIDEO, .index = 1050 * 1000},
+ {.frequency = 336 * 1000 + DDR_FREQ_NORMAL, .index = 1200 * 1000},
+ {.frequency = CPUFREQ_TABLE_END},
+};
+#endif
+//#define DVFS_CPU_TABLE_SIZE (ARRAY_SIZE(dvfs_cpu_logic_table))
+//static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE];
+//static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];
+int get_max_freq(struct cpufreq_frequency_table *table)
+{
+ int i,temp=0;
+
+ for(i=0;table[i].frequency!= CPUFREQ_TABLE_END;i++)
+ {
+ if(temp<table[i].frequency)
+ temp=table[i].frequency;
+ }
+ printk("get_max_freq=%d\n",temp);
+ return temp;
+}
+
+void __init board_clock_init(void)
+{
+ u32 flags=RK30_CLOCKS_DEFAULT_FLAGS;
+#if !defined(CONFIG_ARCH_RK3188)
+ if(get_max_freq(dvfs_gpu_table)<=(400*1000))
+ {
+ flags=RK30_CLOCKS_DEFAULT_FLAGS|CLK_GPU_GPLL;
+ }
+ else
+ flags=RK30_CLOCKS_DEFAULT_FLAGS|CLK_GPU_CPLL;
+#endif
+ rk30_clock_data_init(periph_pll_default, codec_pll_default, RK30_CLOCKS_DEFAULT_FLAGS);
+ //dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table);
+ dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), dvfs_arm_table);
+ dvfs_set_freq_volt_table(clk_get(NULL, "gpu"), dvfs_gpu_table);
+ dvfs_set_freq_volt_table(clk_get(NULL, "ddr"), dvfs_ddr_table);
+}
+
+MACHINE_START(RK30, "RK30board")
+ .boot_params = PLAT_PHYS_OFFSET + 0x800,
+ .fixup = rk30_fixup,
+ .reserve = &rk30_reserve,
+ .map_io = rk30_map_io,
+ .init_irq = rk30_init_irq,
+ .timer = &rk30_timer,
+ .init_machine = machine_rk30_board_init,
+MACHINE_END
*/
static struct rkcamera_platform_data new_camera[] = {
- new_camera_device(RK29_CAM_SENSOR_OV2659,
+ new_camera_device(RK29_CAM_SENSOR_GC2035,
back,
RK30_PIN3_PB5,
0,
* Otherwise, you do not define this macro, eliminate it.
*
*/
-#if defined(CONFIG_RTL8192CU) || defined(CONFIG_RTL8188EU)
+#if defined(CONFIG_RTL8192CU) || defined(CONFIG_RTL8188EU) || defined(CONFIG_RTL8723AU) || defined(CONFIG_MT7601)
#define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN0_PD5//RK30_PIN3_PD0
#define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE GPIO_LOW//GPIO_HIGH
-#elif defined(CONFIG_BCM4329) || defined(CONFIG_BCM4319) || defined(CONFIG_RK903) || defined(CONFIG_RK901)
+#elif defined(CONFIG_BCM4329) || defined(CONFIG_BCM4319) || defined(CONFIG_RKWIFI) || defined(CONFIG_RTL8189ES)
#define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN3_PD0
#define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE GPIO_HIGH
/******************************************************************************
** Please tell me how much wifi-module uses voltage in your project.
******************************************************************************/
-#if defined(CONFIG_BCM4329) || defined(CONFIG_BCM4319) || defined(CONFIG_RK903) || defined(CONFIG_RK901)
+#if defined(CONFIG_BCM4329) || defined(CONFIG_BCM4319) || defined(CONFIG_RKWIFI)
voltage = 1800 ; //power 1800mV
#elif defined(CONFIG_MT5931_MT6622)||defined(CONFIG_MT5931)
#if defined(CONFIG_CT36X_TS)
#include <linux/ct36x.h>
#endif
+#include <linux/regulator/act8931.h>
#if defined(CONFIG_MFD_RK610)
#include <linux/mfd/rk610_core.h>
#endif
+#if defined(CONFIG_MFD_RK616)
+#include <linux/mfd/rk616.h>
+#endif
#ifdef CONFIG_TOUCHSCREEN_GT82X_IIC
#include <linux/goodix_touch_82x.h>
int ret = 0;
iomux_set(PWM_MODE);
- msleep(30);
+ msleep(100);
#ifdef LCD_DISP_ON_PIN
ret = gpio_request(BL_EN_PIN, NULL);
if (ret != 0) {
gpio_free(pwm_gpio);
iomux_set(PWM_MODE);
#ifdef LCD_DISP_ON_PIN
- msleep(130);
+ msleep(150);
gpio_direction_output(BL_EN_PIN, 1);
gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
#endif
}
static struct rk29_bl_info rk29_bl_info = {
- .min_brightness = 40,
+ .min_brightness = 33,
.max_brightness=255,
.brightness_mode =1,
.pre_div = 20 * 1000, // pwm output clk: 20k;
.irq_enable = 1,
.poll_delay_ms = 30,
.init_platform_hw = mma7660_init_platform_hw,
+#ifndef CONFIG_MFD_RK616
#ifdef CONFIG_TOUCHSCREEN_GSLX680_RK3168
.orientation = {-1, 0, 0, 0, -1, 0, 0, 0, 1},
#else
.orientation = {0, -1, 0, -1, 0, 0, 0, 0, -1},
#endif
+#else
+ .orientation = {1, 0, 0, 0, -1, 0, 0, 0, -1},
+#endif
};
#endif
#if defined(CONFIG_LCDC0_RK3066B)
struct rk29fb_info lcdc0_screen_info = {
-#if 0
+#if defined(CONFIG_RK_HDMI) && defined(CONFIG_HDMI_SOURCE_LCDC0)&& defined(CONFIG_DUAL_LCDC_DUAL_DISP_IN_KERNEL)
.prop = EXTEND, //primary display device
.io_init = NULL,
.io_disable = NULL,
.io_enable = NULL,
- .set_screen_info = NULL,
-#endif
+ .set_screen_info = hdmi_init_lcdc,
+#else
.prop = PRMRY, //primary display device
.io_init = rk_fb_io_init,
.io_disable = rk_fb_io_disable,
.io_enable = rk_fb_io_enable,
.set_screen_info = set_lcd_info,
+#endif
};
#endif
#if defined(CONFIG_LCDC1_RK3066B)
struct rk29fb_info lcdc1_screen_info = {
+#if defined(CONFIG_RK_HDMI) && defined(CONFIG_HDMI_SOURCE_LCDC1) && defined(CONFIG_DUAL_LCDC_DUAL_DISP_IN_KERNEL)
+ .prop = EXTEND, //primary display device
+ .io_init = NULL,
+ .io_disable = NULL,
+ .io_enable = NULL,
+ .set_screen_info = hdmi_init_lcdc,
+#else
.prop = PRMRY, //primary display device
.io_init = rk_fb_io_init,
.io_disable = rk_fb_io_disable,
.io_enable = rk_fb_io_enable,
.set_screen_info = set_lcd_info,
+#endif
};
#endif
};
#endif
+#if defined(CONFIG_MFD_RK616)
+#define RK616_RST_PIN RK30_PIN3_PB2
+#define RK616_PWREN_PIN RK30_PIN0_PA3
+#define RK616_SCL_RATE (100*1000) //i2c scl rate
+static int rk616_power_on_init(void)
+{
+ int ret;
+
+ if(RK616_PWREN_PIN != INVALID_GPIO)
+ {
+ ret = gpio_request(RK616_PWREN_PIN, "rk616 pwren");
+ if (ret)
+ {
+ printk(KERN_ERR "rk616 pwren gpio request fail\n");
+ }
+ else
+ {
+ gpio_direction_output(RK616_PWREN_PIN,GPIO_HIGH);
+ }
+ }
+
+ if(RK616_RST_PIN != INVALID_GPIO)
+ {
+ ret = gpio_request(RK616_RST_PIN, "rk616 reset");
+ if (ret)
+ {
+ printk(KERN_ERR "rk616 reset gpio request fail\n");
+ }
+ else
+ {
+ gpio_direction_output(RK616_RST_PIN, GPIO_HIGH);
+ msleep(100);
+ gpio_direction_output(RK616_RST_PIN, GPIO_LOW);
+ msleep(100);
+ gpio_set_value(RK616_RST_PIN, GPIO_HIGH);
+ }
+ }
+
+ return 0;
+
+}
+
+
+static struct rk616_platform_data rk616_pdata = {
+ .power_init = rk616_power_on_init,
+ .scl_rate = RK616_SCL_RATE,
+ .lcd0_func = INPUT, //port lcd0 as input
+ .lcd1_func = OUTPUT, //port lcd1 as input
+ .lvds_ch_nr = 1, //the number of used lvds channel
+ .hdmi_irq = RK30_PIN2_PD6,
+ .spk_ctl_gpio = RK30_PIN2_PD7,
+};
+#endif
+
#ifdef CONFIG_ION
#define ION_RESERVE_SIZE (80 * SZ_1M)
static struct ion_platform_data rk30_ion_pdata = {
#if defined(CONFIG_RK29_SDIO_IRQ_FROM_GPIO)
.sdio_INT_gpio = RK29SDK_WIFI_SDIO_CARD_INT,
+ #ifdef USE_SDIO_INT_LEVEL
+ .sdio_INT_level = RK30SDK_WIFI_GPIO_WIFI_INT_B_ENABLE_VALUE,
+ #endif
#endif
.det_pin_info = {
},
},
- .irq_gpio = {
- .io = RK30_PIN0_PA5,
- .enable = GPIO_LOW,
- .iomux = {
- .name = NULL,
- },
- }
+ .irq_gpio = {
+ .io = RK30_PIN0_PA5,
+ .enable = GPIO_LOW,
+ .iomux = {
+ .name = NULL,
+ },
+ },
+
+ .rts_gpio = { // UART_RTS
+ .io = RK30_PIN1_PA3,
+ .enable = GPIO_LOW,
+ .iomux = {
+ .name = "bt_rts",
+ .fgpio = GPIO1_A3,
+ .fmux = UART0_RTSN,
+ },
+ },
};
static struct platform_device device_mt6622 = {
};
#endif
+#if defined CONFIG_TCC_BT_DEV
+static struct tcc_bt_platform_data tcc_bt_platdata = {
+
+ .power_gpio = { // ldoon
+ .io = RK30_PIN3_PC0,//difined depend on your harware
+ .enable = GPIO_HIGH,
+ .iomux = {
+ .name = NULL,
+ },
+ },
+
+ .wake_host_gpio = { // BT_HOST_WAKE, for bt wakeup host when it is in deep sleep
+ .io = RK30_PIN0_PC5, // set io to INVALID_GPIO for disable it,it's depend on your hardware
+ .enable = IRQF_TRIGGER_RISING,// set IRQF_TRIGGER_FALLING for falling, set IRQF_TRIGGER_RISING for rising
+ .iomux = {
+ .name = NULL,
+ },
+ },
+};
+
+static struct platform_device device_tcc_bt = {
+ .name = "tcc_bt_dev",
+ .id = -1,
+ .dev = {
+ .platform_data = &tcc_bt_platdata,
+ },
+};
+#endif
+
+
static struct platform_device *devices[] __initdata = {
#ifdef CONFIG_ION
#ifdef CONFIG_MT5931_MT6622
&device_mt6622,
#endif
+#ifdef CONFIG_TCC_BT_DEV
+ &device_tcc_bt,
+#endif
};
.name = "act_dcdc1", //ddr
.min_uv = 1200000,
.max_uv = 1200000,
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
.suspend_vol = 1200000,
+ #else
+ .suspend_vol = 900000,
+ #endif
},
{
.name = "vdd_core", //logic
.min_uv = 1000000,
.max_uv = 1000000,
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
+ .suspend_vol = 1200000,
+ #else
.suspend_vol = 900000,
+ #endif
},
{
.name = "vdd_cpu", //arm
.min_uv = 1000000,
.max_uv = 1000000,
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
+ .suspend_vol = 1200000,
+ #else
.suspend_vol = 900000,
+ #endif
},
{
.name = "act_dcdc4", //vccio
.min_uv = 3000000,
.max_uv = 3000000,
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
+ .suspend_vol = 3000000,
+ #else
.suspend_vol = 2800000,
+ #endif
},
};
static struct pmu_info tps65910_dcdc_info[] = {
{
.name = "vdd_core", //logic
- .min_uv = 1100000,
- .max_uv = 1100000,
+ .min_uv = 1200000,
+ .max_uv = 1200000,
},
{
.name = "vdd_cpu", //arm
- .min_uv = 1100000,
- .max_uv = 1100000,
+ .min_uv = 1200000,
+ .max_uv = 1200000,
},
{
.name = "vio", //vcc_io
.min_uv = 1800000,
.max_uv = 1800000,
},
+#ifdef CONFIG_MFD_RK616
+ {
+ .name = "vdig2", //vdd11//1.0->1.2 for rk616 vdd_core lch
+ .min_uv = 1200000,
+ .max_uv = 1200000,
+ },
+#else
{
.name = "vdig2", //vdd11
.min_uv = 1000000,
.max_uv = 1000000,
},
+#endif
{
.name = "vaux1", //vcc28_cif
.min_uv = 2800000,
#include "board-pmu-tps65910.c"
#endif
+#ifdef CONFIG_REGULATOR_ACT8931
+#define ACT8931_HOST_IRQ RK30_PIN0_PB5//depend on your hardware
+
+
+#define ACT8931_CHGSEL_PIN RK30_PIN0_PD0 //depend on your hardware
+
+
+static struct pmu_info act8931_dcdc_info[] = {
+ {
+ .name = "vdd_core", //vdd_logic
+ .min_uv = 1200000,
+ .max_uv = 1200000,
+ },
+ {
+ .name = "act_dcdc2", //ddr
+ .min_uv = 1500000,
+ .max_uv = 1500000,
+ },
+ {
+ .name = "vdd_cpu", //vdd_arm
+ .min_uv = 1200000,
+ .max_uv = 1200000,
+ },
+
+};
+static struct pmu_info act8931_ldo_info[] = {
+ {
+ .name = "act_ldo1", //vcc28_cif
+ .min_uv = 2800000,
+ .max_uv = 2800000,
+ },
+ {
+ .name = "act_ldo2", //vcc18_cif
+ .min_uv = 1800000,
+ .max_uv = 1800000,
+ },
+ {
+ .name = "act_ldo3", //vcca30
+ .min_uv = 3000000,
+ .max_uv = 3000000,
+ },
+ {
+ .name = "act_ldo4", //vcc_wl
+ .min_uv = 3300000,
+ .max_uv = 3300000,
+ },
+};
+#include "board-rk30-sdk-act8931.c"
+#endif
static struct i2c_board_info __initdata i2c1_info[] = {
#if defined (CONFIG_REGULATOR_ACT8846)
.platform_data = &tps65910_data,
},
#endif
+#if defined (CONFIG_REGULATOR_ACT8931)
+ {
+ .type = "act8931",
+ .addr = 0x5b,
+ .flags = 0,
+ .irq = ACT8931_HOST_IRQ,
+ .platform_data=&act8931_data,
+ },
+#endif
};
#endif
.platform_data = &ts82x_pdata,
},
#endif
+#if defined(CONFIG_HDMI_CAT66121)
+ {
+ .type = "cat66121_hdmi",
+ .addr = 0x4c,
+ .flags = 0,
+ .irq = RK30_PIN2_PD6,
+ .platform_data = &rk_hdmi_pdata,
+ },
+#endif
};
#endif
},
#endif
#endif
+#if defined (CONFIG_MFD_RK616)
+{
+ .type = "rk616",
+ .addr = 0x50,
+ .flags = 0,
+ .platform_data = &rk616_pdata,
+ },
+#endif
+
#if defined (CONFIG_SND_RK29_SOC_ES8323)
{
.type = "es8323",//"es8323",
},
#endif
};
+
+#if defined (CONFIG_SND_SOC_RT5616)
+ {
+ .type = "rt5616",
+ .addr = 0x1b,
+ .flags = 0,
+ },
+#endif
#endif
#ifdef CONFIG_I2C_GPIO_RK30
#endif
}
//end of i2c
+#define USB_INSERT_FAKE_SHUTDOWN
+#if defined(USB_INSERT_FAKE_SHUTDOWN)
+extern int rk30_pm_enter(suspend_state_t state);
+int __sramdata charge_power_off = 0;
+
+static void rk30_charge_deal(void)
+{
+ struct regulator *ldo = NULL;
+ int ret;
+ charge_power_off = 1;
+
+ //ldo = regulator_get(NULL, "ldo9"); // shutdown tp power
+ //regulator_disable(ldo);
+ //regulator_put(ldo);
+ //gpio_set_value(TOUCH_RESET_PIN, GPIO_LOW);
+ rk29_backlight_pwm_suspend();//shutdown backlight
+ rk_fb_io_disable(); //shutdown lcd
+
+ local_irq_disable();
+ local_fiq_disable();
+
+ rk30_pm_enter(PM_SUSPEND_MEM);
+
+ if(charge_power_off == 1)
+ {
+ arm_pm_restart(0, NULL);
+ }
+}
+#else
+static void rk30_charge_deal(void){
+}
+#endif
+
#define POWER_ON_PIN RK30_PIN0_PA0 //power_hold
static void rk30_pm_power_off(void)
if(gpio_get_value (RK30_PIN0_PB2) == GPIO_LOW)
{
printk("enter restart===========\n");
- arm_pm_restart(0, NULL);
- }
+ arm_pm_restart(0, "charge");
+ }else if(gpio_get_value (RK30_PIN0_PA7) == GPIO_LOW){//usb in
+ printk("debug: detect dc_det LOW, charging!\n");
+ rk30_charge_deal();
+ }
tps65910_device_shutdown();
}else if(pmic_is_act8846()){
printk("enter dcdet pmic_is_act8846===========\n");
if(gpio_get_value (RK30_PIN0_PB2) == GPIO_LOW)
{
printk("enter restart===========\n");
- arm_pm_restart(0, NULL);
+ arm_pm_restart(0, "charge");
}
act8846_device_shutdown();
}else if(pmic_is_wm8326()){
if(gpio_get_value (RK30_PIN0_PB2) == GPIO_LOW)
{
printk("enter restart===========\n");
- arm_pm_restart(0, NULL);
+ arm_pm_restart(0, "charge");
}
wm831x_set_bits(Wm831x,WM831X_GPIO_LEVEL,0x0001,0x0000); //set sys_pwr 0
wm831x_device_shutdown(Wm831x);//wm8326 shutdown
+ }else if(pmic_is_act8931()){
+ printk("enter dcdet pmic_is_act8931===========\n");
+ if(gpio_get_value (RK30_PIN0_PB2) == GPIO_LOW)
+ {
+ printk("enter restart===========\n");
+ arm_pm_restart(0, "charge");
+ }
+ act8931_device_shutdown();
}
while (1);
}
gpio_request(POWER_ON_PIN, "poweronpin");
gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
- pm_power_off = rk30_pm_power_off;
+ //pm_power_off = rk30_pm_power_off;
gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
};
static struct cpufreq_frequency_table dvfs_gpu_table[] = {
-#if 0
- {.frequency = 100 * 1000, .index = 1075 * 1000},
- {.frequency = 200 * 1000, .index = 1075 * 1000},
- {.frequency = 266 * 1000, .index = 1075 * 1000},
+ {.frequency = 100 * 1000, .index = 1000 * 1000},
+ {.frequency = 200 * 1000, .index = 1000 * 1000},
+ {.frequency = 266 * 1000, .index = 1050 * 1000},
//{.frequency = 300 * 1000, .index = 1050 * 1000},
-#endif
- {.frequency = 100 * 1000, .index = 1200 * 1000},
- {.frequency = 200 * 1000, .index = 1200 * 1000},
- //{.frequency = 266 * 1000, .index = 1200 * 1000},
- {.frequency = 400 * 1000, .index = 1200 * 1000},
+ {.frequency = 400 * 1000, .index = 1125 * 1000},
+ {.frequency = 600 * 1000, .index = 1250 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
#else
//chenliang
static struct cpufreq_frequency_table dvfs_arm_table[] = {
- {.frequency = 312 * 1000, .index = 950 * 1000},
- {.frequency = 504 * 1000, .index = 1000 * 1000},
+ {.frequency = 312 * 1000, .index = 1025 * 1000},
+ {.frequency = 504 * 1000, .index = 1025 * 1000},
{.frequency = 816 * 1000, .index = 1050 * 1000},
{.frequency = 1008 * 1000, .index = 1125 * 1000},
{.frequency = 1200 * 1000, .index = 1200 * 1000},
{.frequency = 200 * 1000, .index = 1000 * 1000},
{.frequency = 266 * 1000, .index = 1050 * 1000},
{.frequency = 300 * 1000, .index = 1050 * 1000},
- {.frequency = 400 * 1000, .index = 1100 * 1000},
+ {.frequency = 400 * 1000, .index = 1125 * 1000},
+ {.frequency = 600 * 1000, .index = 1250 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_ddr_table[] = {
{.frequency = 200 * 1000 + DDR_FREQ_SUSPEND, .index = 1000 * 1000},
- {.frequency = 240 * 1000 + DDR_FREQ_VIDEO, .index = 1000 * 1000},
- {.frequency = 300 * 1000 + DDR_FREQ_NORMAL, .index = 1000 * 1000},
+ {.frequency = 240 * 1000 + DDR_FREQ_VIDEO, .index = 1050 * 1000},
+ {.frequency = 300 * 1000 + DDR_FREQ_NORMAL, .index = 1075 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
#endif
//#define DVFS_CPU_TABLE_SIZE (ARRAY_SIZE(dvfs_cpu_logic_table))
//static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE];
//static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];
+int get_max_freq(struct cpufreq_frequency_table *table)
+{
+ int i,temp=0;
+
+ for(i=0;table[i].frequency!= CPUFREQ_TABLE_END;i++)
+ {
+ if(temp<table[i].frequency)
+ temp=table[i].frequency;
+ }
+ printk("get_max_freq=%d\n",temp);
+ return temp;
+}
void __init board_clock_init(void)
{
- rk30_clock_data_init(periph_pll_default, codec_pll_default, RK30_CLOCKS_DEFAULT_FLAGS);
+ u32 flags=RK30_CLOCKS_DEFAULT_FLAGS;
+#if !defined(CONFIG_ARCH_RK3188)
+ if(get_max_freq(dvfs_gpu_table)<=(400*1000))
+ {
+ flags=RK30_CLOCKS_DEFAULT_FLAGS|CLK_GPU_GPLL;
+ }
+ else
+ flags=RK30_CLOCKS_DEFAULT_FLAGS|CLK_GPU_CPLL;
+#endif
+ rk30_clock_data_init(periph_pll_default, codec_pll_default, flags);
//dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table);
dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), dvfs_arm_table);
dvfs_set_freq_volt_table(clk_get(NULL, "gpu"), dvfs_gpu_table);
config TOUCHSCREEN_GSLX680_RK3168
tristate "gslX680 rk3168 touchscreen panel support "
depends on I2C2_RK29 || I2C2_RK30
-
+config TOUCHSCREEN_GSLX680_RK3028
+ tristate "gslX680 rk3028 touchscreen panel support "
+ depends on I2C2_RK29 || I2C2_RK30
config TOUCHSCREEN_XPT2046_SPI
tristate "XPT2046 based touchscreens:SPI Interface"
depends on SPIM_RK29
obj-$(CONFIG_TOUCHSCREEN_FT5X0X) += ft5x0x.o
obj-$(CONFIG_TOUCHSCREEN_GSLX680) += rockchip_gslX680.o
obj-$(CONFIG_TOUCHSCREEN_GSLX680_RK3168) += rockchip_gslX680_rk3168.o
+obj-$(CONFIG_TOUCHSCREEN_GSLX680_RK3028) += rockchip_gslX680_rk3028.o
# Make VTL TouchScreen Driver
obj-$(CONFIG_TOUCHSCREEN_CT36X) += ct36x_ts/
obj-$(CONFIG_TP_760_TS) += tp_760_ts.o
--- /dev/null
+#ifndef _GSLX680_H_\r
+#define _GSLX680_H_\r
+\r
+#define GSL1680E_COMPATIBLE //GSL1680а汾оƬÐèÒª´ò¿ª´Ëºê£¬ÀÏ°æоƬÐèÒªÆÁ±Î´Ëºê\r
+\r
+#define SCREEN_MAX_X 1024\r
+#define SCREEN_MAX_Y 600\r
+\r
+struct fw_data\r
+{\r
+ u32 offset : 8;\r
+ u32 : 0;\r
+ u32 val;\r
+};\r
+\r
+#ifdef GSL1680E_COMPATIBLE\r
+static const struct fw_data GSL1680E_FW[] = {\r
+//GSL_1680E+1688E+2681B+2682B_V1.3.4_2013.02.28\r
+{0xf0,0x3},\r
+{0x00,0xa5a5ffc0},\r
+{0x04,0x00000000},\r
+{0x08,0xe810c4e1},\r
+{0x0c,0xd3dd7f4d},\r
+{0x10,0xd7c56634},\r
+{0x14,0xe3505a2a},\r
+{0x18,0x514d494f},\r
+{0x1c,0x859e5316},\r
+{0x20,0x00000000},\r
+{0x24,0x00000000},\r
+{0x28,0x00000000},\r
+{0x2c,0x00000000},\r
+{0x30,0x00001000},\r
+{0x34,0x00000000},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000001},\r
+{0x44,0x00000000},\r
+{0x48,0x00000000},\r
+{0x4c,0x00000000},\r
+{0x50,0x00000000},\r
+{0x54,0x01020304},\r
+{0x58,0x05060708},\r
+{0x5c,0x090a0b0c},\r
+{0x60,0x0d0e0e0f},\r
+{0x64,0x10111213},\r
+{0x68,0x14151617},\r
+{0x6c,0x18191a1b},\r
+{0x70,0x1b1c1e1f},\r
+{0x74,0x00000000},\r
+{0x78,0x00010000},\r
+{0x7c,0x8c846af3},\r
+{0xf0,0x4},\r
+{0x00,0x00000000},\r
+{0x04,0x00000000},\r
+{0x08,0x00000000},\r
+{0x0c,0x00000000},\r
+{0x10,0x00000000},\r
+{0x14,0x00000000},\r
+{0x18,0x00000000},\r
+{0x1c,0x00000000},\r
+{0x20,0x00000000},\r
+{0x24,0x00000000},\r
+{0x28,0x00000000},\r
+{0x2c,0x00000000},\r
+{0x30,0x00002400},\r
+{0x34,0x00000000},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000000},\r
+{0x44,0x00000002},\r
+{0x48,0x00000001},\r
+{0x4c,0x00004000},\r
+{0x50,0x00000000},\r
+{0x54,0x00010202},\r
+{0x58,0x03040405},\r
+{0x5c,0x06070808},\r
+{0x60,0x090b0b0c},\r
+{0x64,0x0d0e0f10},\r
+{0x68,0x11121415},\r
+{0x6c,0x1617191a},\r
+{0x70,0x1a1c1d1f},\r
+{0x74,0x00000000},\r
+{0x78,0x80808080},\r
+{0x7c,0x8c846af3},\r
+{0xf0,0x5},\r
+{0x00,0xf3b18989},\r
+{0x04,0x00000005},\r
+{0x08,0x000001f4},\r
+{0x0c,0x7d7d807d},\r
+{0x10,0x00000000},\r
+{0x14,0x00000000},\r
+{0x18,0x00000fff},\r
+{0x1c,0x10350007},\r
+{0x20,0x10000000},\r
+{0x24,0x00000000},\r
+{0x28,0x00000000},\r
+{0x2c,0x00000400},\r
+{0x30,0x00808080},\r
+{0x34,0x80808080},\r
+{0x38,0x80808080},\r
+{0x3c,0x80808080},\r
+{0x40,0x80808080},\r
+{0x44,0x80808080},\r
+{0x48,0x80808080},\r
+{0x4c,0x80808080},\r
+{0x50,0x00000000},\r
+{0x54,0x00010203},\r
+{0x58,0x04050506},\r
+{0x5c,0x07080809},\r
+{0x60,0x0a0b0c0d},\r
+{0x64,0x0d0f1011},\r
+{0x68,0x12131415},\r
+{0x6c,0x1617191a},\r
+{0x70,0x1a1c1e1f},\r
+{0x74,0x00000001},\r
+{0x78,0x0000000f},\r
+{0x7c,0x0000000a},\r
+{0xf0,0x6},\r
+{0x00,0x0000000f},\r
+{0x04,0x00000000},\r
+{0x08,0x0000000a},\r
+{0x0c,0x00000000},\r
+{0x10,0x00000032},\r
+{0x14,0x0000000a},\r
+{0x18,0x00000000},\r
+{0x1c,0x00000001},\r
+{0x20,0x00002904},\r
+{0x24,0x00000258},\r
+{0x28,0x00000400},\r
+{0x2c,0xf8010015},\r
+{0x30,0xf8010015},\r
+{0x34,0x00000003},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000fff},\r
+{0x40,0x80000000},\r
+{0x44,0x00180018},\r
+{0x48,0x00000fff},\r
+{0x4c,0x00000003},\r
+{0x50,0x00030002},\r
+{0x54,0x00000000},\r
+{0x58,0x00001000},\r
+{0x5c,0x12492488},\r
+{0x60,0x00000000},\r
+{0x64,0x000007d0},\r
+{0x68,0x000007d0},\r
+{0x6c,0x000007d0},\r
+{0x70,0x000007d0},\r
+{0x74,0x0000014f},\r
+{0x78,0x0000003c},\r
+{0x7c,0x00000000},\r
+{0xf0,0x7},\r
+{0x00,0x04010700},\r
+{0x04,0x06030902},\r
+{0x08,0x0805040a},\r
+{0x0c,0x07110610},\r
+{0x10,0x09130812},\r
+{0x14,0x00543216},\r
+{0x18,0x007890ab},\r
+{0x1c,0x00321094},\r
+{0x20,0x005678ab},\r
+{0x24,0xff080010},\r
+{0x28,0xff080120},\r
+{0x2c,0xff080140},\r
+{0x30,0xff080160},\r
+{0x34,0x000000e1},\r
+{0x38,0x000000c3},\r
+{0x3c,0x000000a5},\r
+{0x40,0x00000011},\r
+{0x44,0x00000100},\r
+{0x48,0x00000000},\r
+{0x4c,0x00000000},\r
+{0x50,0x00000000},\r
+{0x54,0x00000004},\r
+{0x58,0x00040000},\r
+{0x5c,0x00090005},\r
+{0x60,0x000d000a},\r
+{0x64,0x000e000e},\r
+{0x68,0x00040000},\r
+{0x6c,0x00040000},\r
+{0x70,0x00030000},\r
+{0x74,0x00000000},\r
+{0x78,0x00432105},\r
+{0x7c,0x006789ab},\r
+{0xf0,0x8},\r
+{0x00,0x026f028f},\r
+{0x04,0x02af02cf},\r
+{0x08,0x02ef230f},\r
+{0x0c,0x232f234f},\r
+{0x10,0x21f321f4},\r
+{0x14,0x41f541f6},\r
+{0x18,0x41f741f8},\r
+{0x1c,0x71f9022f},\r
+{0x20,0x024f036f},\r
+{0x24,0x01f001f1},\r
+{0x28,0x01f2020f},\r
+{0x2c,0x01fa0000},\r
+{0x30,0x00000000},\r
+{0x34,0x00000000},\r
+{0x38,0x00000000},\r
+{0x3c,0x000043ef},\r
+{0x40,0x02040608},\r
+{0x44,0x0a000000},\r
+{0x48,0x00000000},\r
+{0x4c,0x01030507},\r
+{0x50,0x09000000},\r
+{0x54,0x00000000},\r
+{0x58,0x00000000},\r
+{0x5c,0x00000008},\r
+{0x60,0x00000000},\r
+{0x64,0x00000000},\r
+{0x68,0x00000000},\r
+{0x6c,0x00000000},\r
+{0x70,0x00000000},\r
+{0x74,0x00000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x0000000a},\r
+{0xf0,0x9},\r
+{0x00,0xff080094},\r
+{0x04,0x00070011},\r
+{0x08,0xff080090},\r
+{0x0c,0x00040000},\r
+{0x10,0xff080004},\r
+{0x14,0x0000000f},\r
+{0x18,0xfffffff0},\r
+{0x1c,0x00000000},\r
+{0x20,0xfffffff0},\r
+{0x24,0x00000000},\r
+{0x28,0xfffffff0},\r
+{0x2c,0x00000000},\r
+{0x30,0xfffffff0},\r
+{0x34,0x00000000},\r
+{0x38,0xfffffff0},\r
+{0x3c,0x00000000},\r
+{0x40,0xfffffff0},\r
+{0x44,0x00000000},\r
+{0x48,0xfffffff0},\r
+{0x4c,0x00000000},\r
+{0x50,0xfffffff0},\r
+{0x54,0x00000000},\r
+{0x58,0xfffffff0},\r
+{0x5c,0x00000000},\r
+{0x60,0xfffffff0},\r
+{0x64,0x00000000},\r
+{0x68,0xfffffff0},\r
+{0x6c,0x00000000},\r
+{0x70,0xfffffff0},\r
+{0x74,0x00000000},\r
+{0x78,0xfffffff0},\r
+{0x7c,0x00000000},\r
+/*\r
+{0xf0,0xe0},\r
+{0x00,0x006f0032},\r
+{0x04,0x00000057},\r
+{0x08,0x003e005f},\r
+{0x0c,0x007d0011},\r
+{0x10,0x008b0007},\r
+{0x14,0x001c000d},\r
+{0x18,0x001100ae},\r
+{0x1c,0x003c006a},\r
+{0x20,0x00a5001e},\r
+{0x24,0x00230065},\r
+{0x28,0x006a0043},\r
+{0x2c,0x005e0072},\r
+{0x30,0x009c0003},\r
+{0x34,0x000000be},\r
+{0x38,0x00d70022},\r
+{0x3c,0x00470057},\r
+{0x40,0x006401f4},\r
+{0x44,0x00640064},\r
+{0x48,0x01900064},\r
+{0x4c,0x00500190},\r
+{0x50,0x00500050},\r
+{0x54,0x012c0050},\r
+{0x58,0x012c012c},\r
+{0x5c,0x002d012c},\r
+{0x60,0x00640000},\r
+{0x64,0x00640064},\r
+{0x68,0x00000032},\r
+{0x6c,0x00000000},\r
+{0x70,0x00000000},\r
+{0x74,0x00000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000000},\r
+{0xf0,0xe1},\r
+{0x00,0x00580022},\r
+{0x04,0x00000054},\r
+{0x08,0x0041004d},\r
+{0x0c,0x008c000a},\r
+{0x10,0x00a60000},\r
+{0x14,0x00150001},\r
+{0x18,0x001200be},\r
+{0x1c,0x002d0064},\r
+{0x20,0x00aa001d},\r
+{0x24,0x002f004d},\r
+{0x28,0x0061005e},\r
+{0x2c,0x0070008c},\r
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+{0x48,0x80a0000c},\r
+{0x4c,0x82603fff},\r
+{0x50,0x9a1e2001},\r
+{0x54,0x80a0000d},\r
+{0x58,0x9a603fff},\r
+{0x5c,0x8088400d},\r
+{0x60,0x0280000d},\r
+{0x64,0x80a0000c},\r
+{0x68,0xc2002318},\r
+{0x6c,0x80a06000},\r
+{0x70,0x12800006},\r
+{0x74,0x033fc000},\r
+{0x78,0x9a102001},\r
+{0x7c,0x82106020},\r
+{0xf0,0xa5},\r
+{0x00,0x10800004},\r
+{0x04,0xda204000},\r
+{0x08,0x82106020},\r
+{0x0c,0xc0204000},\r
+{0x10,0x80a0000c},\r
+{0x14,0x82603fff},\r
+{0x18,0x9a1e2002},\r
+{0x1c,0x80a0000d},\r
+{0x20,0x9a603fff},\r
+{0x24,0x8088400d},\r
+{0x28,0x0280000d},\r
+{0x2c,0x80a62000},\r
+{0x30,0xc2002318},\r
+{0x34,0x80a06000},\r
+{0x38,0x12800005},\r
+{0x3c,0x033fc000},\r
+{0x40,0x82106020},\r
+{0x44,0x10800005},\r
+{0x48,0xc0204000},\r
+{0x4c,0x9a102001},\r
+{0x50,0x82106020},\r
+{0x54,0xda204000},\r
+{0x58,0x80a62000},\r
+{0x5c,0x1280000c},\r
+{0x60,0x01000000},\r
+{0x64,0xc2002318},\r
+{0x68,0x80a06000},\r
+{0x6c,0x12800005},\r
+{0x70,0x033fc000},\r
+{0x74,0x82106020},\r
+{0x78,0x10800005},\r
+{0x7c,0xc0204000},\r
+{0xf0,0xa6},\r
+{0x00,0x9a102001},\r
+{0x04,0x82106020},\r
+{0x08,0xda204000},\r
+{0x0c,0x81c7e008},\r
+{0x10,0x81e80000},\r
+{0x14,0x9de3bf98},\r
+{0x18,0xc2002514},\r
+{0x1c,0x80a06000},\r
+{0x20,0x12800007},\r
+{0x24,0x90102001},\r
+{0x28,0xda002568},\r
+{0x2c,0xc2002570},\r
+{0x30,0x80a34001},\r
+{0x34,0x22800006},\r
+{0x38,0xc2002514},\r
+{0x3c,0x82102001},\r
+{0x40,0x7fffffa5},\r
+{0x44,0xc220250c},\r
+{0x48,0xc2002514},\r
+{0x4c,0x80a06000},\r
+{0x50,0x1280000c},\r
+{0x54,0x01000000},\r
+{0x58,0xc200250c},\r
+{0x5c,0x80a06000},\r
+{0x60,0x02800008},\r
+{0x64,0x9a007fff},\r
+{0x68,0xb0102002},\r
+{0x6c,0x80a36000},\r
+{0x70,0x12800004},\r
+{0x74,0xda20250c},\r
+{0x78,0x7fffff97},\r
+{0x7c,0x81e80000},\r
+{0xf0,0xa7},\r
+{0x00,0x01000000},\r
+{0x04,0x81c7e008},\r
+{0x08,0x81e80000},\r
+{0x0c,0x01000000},\r
+{0x10,0x27001040},\r
+{0x14,0xa614e00f},\r
+{0x18,0xe6a00040},\r
+{0x1c,0x01000000},\r
+{0x20,0x81c3e008},\r
+{0x24,0x01000000},\r
+{0x28,0x9de3bf98},\r
+{0x2c,0xc2002508},\r
+{0x30,0x80a06000},\r
+{0x34,0x0280000e},\r
+{0x38,0x1b3fc180},\r
+{0x3c,0x82102001},\r
+{0x40,0x9a13603c},\r
+{0x44,0xc2234000},\r
+{0x48,0xc2002508},\r
+{0x4c,0x80a06000},\r
+{0x50,0x02800005},\r
+{0x54,0x033fc180},\r
+{0x58,0x7fffffed},\r
+{0x5c,0x01000000},\r
+{0x60,0x30bffffa},\r
+{0x64,0x8210603c},\r
+{0x68,0xc0204000},\r
+{0x6c,0x81c7e008},\r
+{0x70,0x81e80000},\r
+{0x74,0x9de3bf98},\r
+{0x78,0xda002500},\r
+{0x7c,0xc20022d0},\r
+{0xf0,0xa8},\r
+{0x00,0x80a34001},\r
+{0x04,0x18800025},\r
+{0x08,0xa4102000},\r
+{0x0c,0xd2002790},\r
+{0x10,0x832ca002},\r
+{0x14,0xe2024001},\r
+{0x18,0x80a46000},\r
+{0x1c,0x12800004},\r
+{0x20,0xa12ca003},\r
+{0x24,0x10800019},\r
+{0x28,0xc02427dc},\r
+{0x2c,0x92024001},\r
+{0x30,0xc20427dc},\r
+{0x34,0x80a06000},\r
+{0x38,0x02800008},\r
+{0x3c,0x900427dc},\r
+{0x40,0x7ffffaf8},\r
+{0x44,0x01000000},\r
+{0x48,0xc20022ac},\r
+{0x4c,0x80a20001},\r
+{0x50,0x28800005},\r
+{0x54,0xc20427e0},\r
+{0x58,0xe22427dc},\r
+{0x5c,0x1080000b},\r
+{0x60,0xc02427e0},\r
+{0x64,0x82006001},\r
+{0x68,0xc22427e0},\r
+{0x6c,0xda002378},\r
+{0x70,0x80a0400d},\r
+{0x74,0x28800006},\r
+{0x78,0xa404a001},\r
+{0x7c,0x7ffff069},\r
+{0xf0,0xa9},\r
+{0x00,0x01000000},\r
+{0x04,0x30800005},\r
+{0x08,0xa404a001},\r
+{0x0c,0x80a4a009},\r
+{0x10,0x24bfffe0},\r
+{0x14,0xd2002790},\r
+{0x18,0x81c7e008},\r
+{0x1c,0x81e80000},\r
+{0x20,0x9de3bf98},\r
+{0x24,0x7ffff54c},\r
+{0x28,0x01000000},\r
+{0x2c,0x7ffff390},\r
+{0x30,0x01000000},\r
+{0x34,0x7ffff3d0},\r
+{0x38,0x01000000},\r
+{0x3c,0x7ffff535},\r
+{0x40,0x01000000},\r
+{0x44,0x7ffff800},\r
+{0x48,0x01000000},\r
+{0x4c,0x7ffff571},\r
+{0x50,0x01000000},\r
+{0x54,0x7ffff714},\r
+{0x58,0x01000000},\r
+{0x5c,0x7ffff7b9},\r
+{0x60,0x90102001},\r
+{0x64,0x7ffff93a},\r
+{0x68,0x01000000},\r
+{0x6c,0x7ffffca3},\r
+{0x70,0x01000000},\r
+{0x74,0x7ffff9cf},\r
+{0x78,0x01000000},\r
+{0x7c,0x7ffff963},\r
+{0xf0,0xaa},\r
+{0x00,0x01000000},\r
+{0x04,0x7ffffd08},\r
+{0x08,0x90102768},\r
+{0x0c,0x7ffff997},\r
+{0x10,0x01000000},\r
+{0x14,0x7ffffa8b},\r
+{0x18,0x01000000},\r
+{0x1c,0x7ffffb1d},\r
+{0x20,0x01000000},\r
+{0x24,0x7ffffb8e},\r
+{0x28,0x01000000},\r
+{0x2c,0x7ffffbc8},\r
+{0x30,0x01000000},\r
+{0x34,0x7ffffbe4},\r
+{0x38,0x01000000},\r
+{0x3c,0x7ffffc52},\r
+{0x40,0x01000000},\r
+{0x44,0x7ffffcf8},\r
+{0x48,0xd0002790},\r
+{0x4c,0xc2002514},\r
+{0x50,0x7ffffd04},\r
+{0x54,0xc2202518},\r
+{0x58,0x7ffffddc},\r
+{0x5c,0x01000000},\r
+{0x60,0x7ffffe5b},\r
+{0x64,0x01000000},\r
+{0x68,0x7fffffa3},\r
+{0x6c,0x01000000},\r
+{0x70,0x7ffffeef},\r
+{0x74,0x01000000},\r
+{0x78,0x7fffff67},\r
+{0x7c,0x01000000},\r
+{0xf0,0xab},\r
+{0x00,0x7fffff8a},\r
+{0x04,0x81e80000},\r
+{0x08,0x01000000},\r
+{0x0c,0x9de3bf98},\r
+{0x10,0xc200253c},\r
+{0x14,0x80a06000},\r
+{0x18,0x12800048},\r
+{0x1c,0xb0102000},\r
+{0x20,0xd6002460},\r
+{0x24,0x82102080},\r
+{0x28,0x80a2e000},\r
+{0x2c,0x02800043},\r
+{0x30,0xc220256c},\r
+{0x34,0x10800005},\r
+{0x38,0xb0102001},\r
+{0x3c,0xc220256c},\r
+{0x40,0x1080003e},\r
+{0x44,0xf00e2468},\r
+{0x48,0xd80022fc},\r
+{0x4c,0x80a6000c},\r
+{0x50,0x1880002d},\r
+{0x54,0x9a102000},\r
+{0x58,0xd40022f8},\r
+{0x5c,0x33000018},\r
+{0x60,0xb6102001},\r
+{0x64,0x80a6c00a},\r
+{0x68,0x18800020},\r
+{0x6c,0xb4102000},\r
+{0x70,0x832e2002},\r
+{0x74,0xb8006038},\r
+{0x78,0xa0166220},\r
+{0x7c,0x901661e8},\r
+{0xf0,0xac},\r
+{0x00,0x92166258},\r
+{0x04,0xde0022f8},\r
+{0x08,0xfa070010},\r
+{0x0c,0x80a7400b},\r
+{0x10,0x26800013},\r
+{0x14,0xb606e001},\r
+{0x18,0x80a6e001},\r
+{0x1c,0x22800007},\r
+{0x20,0xc20022f8},\r
+{0x24,0xc2070008},\r
+{0x28,0x80a74001},\r
+{0x2c,0x2480000c},\r
+{0x30,0xb606e001},\r
+{0x34,0xc20022f8},\r
+{0x38,0x80a6c001},\r
+{0x3c,0x22800007},\r
+{0x40,0xb406a001},\r
+{0x44,0xc2070009},\r
+{0x48,0x80a74001},\r
+{0x4c,0x26800004},\r
+{0x50,0xb606e001},\r
+{0x54,0xb406a001},\r
+{0x58,0xb606e001},\r
+{0x5c,0x80a6c00f},\r
+{0x60,0x08bfffea},\r
+{0x64,0xb8072038},\r
+{0x68,0x80a6800d},\r
+{0x6c,0x34800002},\r
+{0x70,0x9a10001a},\r
+{0x74,0xb0062001},\r
+{0x78,0x80a6000c},\r
+{0x7c,0x28bfffda},\r
+{0xf0,0xad},\r
+{0x00,0xb6102001},\r
+{0x04,0xb0102000},\r
+{0x08,0xc20e2464},\r
+{0x0c,0x80a06000},\r
+{0x10,0x22800006},\r
+{0x14,0xb0062001},\r
+{0x18,0x80a34001},\r
+{0x1c,0x34bfffc8},\r
+{0x20,0xc20e2278},\r
+{0x24,0xb0062001},\r
+{0x28,0x80a62003},\r
+{0x2c,0x24bffff8},\r
+{0x30,0xc20e2464},\r
+{0x34,0xb0102000},\r
+{0x38,0x81c7e008},\r
+{0x3c,0x81e80000},\r
+{0x40,0x9de3bf98},\r
+{0x44,0xc2002574},\r
+{0x48,0x80a06000},\r
+{0x4c,0x02800021},\r
+{0x50,0x90100018},\r
+{0x54,0x82007fff},\r
+{0x58,0x7ffff164},\r
+{0x5c,0xc2202574},\r
+{0x60,0xc2002574},\r
+{0x64,0x80a06000},\r
+{0x68,0x3280001b},\r
+{0x6c,0xc2002578},\r
+{0x70,0xc200253c},\r
+{0x74,0xda002334},\r
+{0x78,0x8200400d},\r
+{0x7c,0x82006001},\r
+{0xf0,0xae},\r
+{0x00,0xc2202548},\r
+{0x04,0xc2002564},\r
+{0x08,0x80a06000},\r
+{0x0c,0x1280000f},\r
+{0x10,0x01000000},\r
+{0x14,0x7ffff1bc},\r
+{0x18,0x01000000},\r
+{0x1c,0x033fc200},\r
+{0x20,0xda002334},\r
+{0x24,0xd800232c},\r
+{0x28,0x82106074},\r
+{0x2c,0xd8204000},\r
+{0x30,0x96102001},\r
+{0x34,0x9a036001},\r
+{0x38,0xda202574},\r
+{0x3c,0xd6202540},\r
+{0x40,0x10800004},\r
+{0x44,0xd6202564},\r
+{0x48,0x7ffff16c},\r
+{0x4c,0x01000000},\r
+{0x50,0xc2002578},\r
+{0x54,0x80a06000},\r
+{0x58,0x12800014},\r
+{0x5c,0x01000000},\r
+{0x60,0xc2002574},\r
+{0x64,0x80a06000},\r
+{0x68,0x12800010},\r
+{0x6c,0x01000000},\r
+{0x70,0x7fffff87},\r
+{0x74,0x01000000},\r
+{0x78,0x80a22000},\r
+{0x7c,0x1280000a},\r
+{0xf0,0xaf},\r
+{0x00,0xd020253c},\r
+{0x04,0xc2002334},\r
+{0x08,0x9a102001},\r
+{0x0c,0x82006001},\r
+{0x10,0xc2202574},\r
+{0x14,0xda202578},\r
+{0x18,0xda202540},\r
+{0x1c,0x7ffff709},\r
+{0x20,0x91e82000},\r
+{0x24,0xd0202574},\r
+{0x28,0x81c7e008},\r
+{0x2c,0x81e80000},\r
+{0x30,0x9de3bf98},\r
+{0x34,0x033fc200},\r
+{0x38,0x82106030},\r
+{0x3c,0xda004000},\r
+{0x40,0xc200257c},\r
+{0x44,0x80a34001},\r
+{0x48,0x12800017},\r
+{0x4c,0x01000000},\r
+{0x50,0x7ffff01d},\r
+{0x54,0x01000000},\r
+{0x58,0x80a22000},\r
+{0x5c,0x32800008},\r
+{0x60,0xc2002514},\r
+{0x64,0x7ffff066},\r
+{0x68,0xb0102000},\r
+{0x6c,0x80a22000},\r
+{0x70,0x0280000f},\r
+{0x74,0x01000000},\r
+{0x78,0xc2002514},\r
+{0x7c,0x80a06000},\r
+{0xf0,0xb0},\r
+{0x00,0x12800006},\r
+{0x04,0x90102002},\r
+{0x08,0xc200250c},\r
+{0x0c,0x80a06000},\r
+{0x10,0x02800005},\r
+{0x14,0x01000000},\r
+{0x18,0x033fc180},\r
+{0x1c,0x7ffffe6e},\r
+{0x20,0xc0204000},\r
+{0x24,0x7fffef7f},\r
+{0x28,0xb0102001},\r
+{0x2c,0x81c7e008},\r
+{0x30,0x81e80000},\r
+{0x34,0x9de3bf98},\r
+{0x38,0x7ffffed5},\r
+{0x3c,0x01000000},\r
+{0x40,0xe0002500},\r
+{0x44,0x80a42015},\r
+{0x48,0x08800016},\r
+{0x4c,0x80a42000},\r
+{0x50,0x7ffff15a},\r
+{0x54,0x01000000},\r
+{0x58,0x033fc140},\r
+{0x5c,0x82106048},\r
+{0x60,0xda004000},\r
+{0x64,0x03000040},\r
+{0x68,0x11000016},\r
+{0x6c,0x808b4001},\r
+{0x70,0x12800004},\r
+{0x74,0x90122180},\r
+{0x78,0x11000016},\r
+{0x7c,0x901223a8},\r
+{0xf0,0xb1},\r
+{0x00,0x7fffff90},\r
+{0x04,0x01000000},\r
+{0x08,0x7fffffca},\r
+{0x0c,0x01000000},\r
+{0x10,0x80a22000},\r
+{0x14,0x2280001d},\r
+{0x18,0xc2002500},\r
+{0x1c,0x3080002f},\r
+{0x20,0x1280000f},\r
+{0x24,0x80a42014},\r
+{0x28,0x7fffef21},\r
+{0x2c,0x01000000},\r
+{0x30,0x80a22000},\r
+{0x34,0x32800003},\r
+{0x38,0x90102002},\r
+{0x3c,0x90102001},\r
+{0x40,0x7ffffe45},\r
+{0x44,0x01000000},\r
+{0x48,0x7fffef56},\r
+{0x4c,0x01000000},\r
+{0x50,0x7fffee94},\r
+{0x54,0x01000000},\r
+{0x58,0x30800009},\r
+{0x5c,0x3880000b},\r
+{0x60,0xc2002500},\r
+{0x64,0x808c2001},\r
+{0x68,0x32800008},\r
+{0x6c,0xc2002500},\r
+{0x70,0x90043ff8},\r
+{0x74,0x7ffff074},\r
+{0x78,0x91322001},\r
+{0x7c,0x7ffff0cf},\r
+{0xf0,0xb2},\r
+{0x00,0x01000000},\r
+{0x04,0xc2002500},\r
+{0x08,0x80a40001},\r
+{0x0c,0x3280000d},\r
+{0x10,0xc2002578},\r
+{0x14,0x031fffff},\r
+{0x18,0x821063f0},\r
+{0x1c,0x80a40001},\r
+{0x20,0x38800003},\r
+{0x24,0x21040000},\r
+{0x28,0xa0042001},\r
+{0x2c,0x033fc180},\r
+{0x30,0x82106034},\r
+{0x34,0xe0204000},\r
+{0x38,0xe0202500},\r
+{0x3c,0xc2002578},\r
+{0x40,0x80a06000},\r
+{0x44,0x02800005},\r
+{0x48,0x01000000},\r
+{0x4c,0x7ffffed5},\r
+{0x50,0x01000000},\r
+{0x54,0xc0202578},\r
+{0x58,0x81c7e008},\r
+{0x5c,0x81e80000},\r
+{0x60,0x81c3e008},\r
+{0x64,0x01000000},\r
+{0x68,0x01000000},\r
+{0x6c,0x01000000},\r
+{0x70,0x01000000},\r
+{0x74,0x01000000},\r
+{0x78,0x01000000},\r
+{0x7c,0x01000000},\r
+{0xf0,0xb3},\r
+{0x00,0x00001682},\r
+{0x04,0x00000000},\r
+{0x08,0x46656220},\r
+{0x0c,0x20352032},\r
+{0x10,0x30313300},\r
+{0x14,0x00000000},\r
+{0x18,0x31353a34},\r
+{0x1c,0x383a3334},\r
+{0x20,0x00000000},\r
+{0x24,0x00000000},\r
+{0x28,0x00000000},\r
+{0x2c,0x00000000},\r
+{0x30,0x00000000},\r
+{0x34,0x00000000},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000000},\r
+{0x44,0x00000000},\r
+{0x48,0x00000000},\r
+{0x4c,0x00000000},\r
+{0x50,0x00000000},\r
+{0x54,0x00000000},\r
+{0x58,0x00000000},\r
+{0x5c,0x00000000},\r
+{0x60,0x00000000},\r
+{0x64,0x00000000},\r
+{0x68,0x00000000},\r
+{0x6c,0x00000000},\r
+{0x70,0x00000000},\r
+{0x74,0x00000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000000},\r
+};\r
+#endif\r
+static const struct fw_data GSLX680_FW[] = {\r
+{0xf0,0x97},\r
+{0x00,0x00000000},\r
+{0x04,0x00000000},\r
+{0x08,0x00000000},\r
+{0x0c,0x00000000},\r
+{0x10,0x00000000},\r
+{0x14,0x00000000},\r
+{0x18,0x00000000},\r
+{0x1c,0x00000000},\r
+{0x20,0x0f0f0f0f},\r
+{0x24,0x00000000},\r
+{0x28,0x00000000},\r
+{0x2c,0x00000000},\r
+{0x30,0x00010203},\r
+{0x34,0x04050607},\r
+{0x38,0x08090a0b},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000000},\r
+{0x44,0x00000000},\r
+{0x48,0x00000000},\r
+{0x4c,0x00000000},\r
+{0x50,0x00000000},\r
+{0x54,0x00000000},\r
+{0x58,0x00000000},\r
+{0x5c,0x00000000},\r
+{0x60,0x00000000},\r
+{0x64,0x00000000},\r
+{0x68,0x00000000},\r
+{0x6c,0x00000000},\r
+{0x70,0x00000000},\r
+{0x74,0x00000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000001},\r
+{0xf0,0x94},\r
+{0x00,0x01030608},\r
+{0x04,0x080a0c0d},\r
+{0x08,0x0e101112},\r
+{0x0c,0x13131416},\r
+{0x10,0x16171718},\r
+{0x14,0x19191a1b},\r
+{0x18,0x1b1d1d1e},\r
+{0x1c,0x1e1f1f1f},\r
+{0x20,0x00000001},\r
+{0x24,0x00000000},\r
+{0x28,0x00000000},\r
+{0x2c,0x00000000},\r
+{0x30,0x00000000},\r
+{0x34,0x00000000},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000000},\r
+{0x44,0x00000000},\r
+{0x48,0x00000000},\r
+{0x4c,0x00000000},\r
+{0x50,0x00000000},\r
+{0x54,0x00000000},\r
+{0x58,0x00000000},\r
+{0x5c,0x00000000},\r
+{0x60,0x00000000},\r
+{0x64,0x00000000},\r
+{0x68,0x00000000},\r
+{0x6c,0x00000000},\r
+{0x70,0x00000000},\r
+{0x74,0x00000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000001},\r
+{0xf0,0x9d},\r
+{0x00,0x00000000},\r
+{0x04,0x00000005},\r
+{0x08,0x00000080},\r
+{0x0c,0x00000fff},\r
+{0x10,0x00000000},\r
+{0x14,0x00040008},\r
+{0x18,0x00000000},\r
+{0x1c,0x000000b3},\r
+{0x20,0x00000000},\r
+{0x24,0x00000003},\r
+{0x28,0x00000000},\r
+{0x2c,0x0000000e},\r
+{0x30,0x0000000a},\r
+{0x34,0x00000000},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000207},\r
+{0x44,0x00000227},\r
+{0x48,0x00000247},\r
+{0x4c,0x00000267},\r
+{0x50,0x00000287},\r
+{0x54,0x000002a7},\r
+{0x58,0x000002c7},\r
+{0x5c,0x000002e7},\r
+{0x60,0x000000f0},\r
+{0x64,0x000000f1},\r
+{0x68,0x000000f2},\r
+{0x6c,0x000000f3},\r
+{0x70,0x000000f4},\r
+{0x74,0x000000f5},\r
+{0x78,0x000000f6},\r
+{0x7c,0x000010f7},\r
+{0xf0,0x9e},\r
+{0x00,0x00000000},\r
+{0x04,0x00000000},\r
+{0x08,0x387fe4e8},\r
+{0x0c,0x00000000},\r
+{0x10,0x00000001},\r
+{0x14,0x00000000},\r
+{0x18,0x00000010},\r
+{0x1c,0x00000000},\r
+{0x20,0x00000100},\r
+{0x24,0x00000001},\r
+{0x28,0x1f000000},\r
+{0x2c,0x000f000c},\r
+{0x30,0x00080000},\r
+{0x34,0x1fff0000},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000fff},\r
+{0x44,0x00000000},\r
+{0x48,0x00000000},\r
+{0x4c,0x0000000a},\r
+{0x50,0x00000000},\r
+{0x54,0x00002904},\r
+{0x58,0x00000001},\r
+{0x5c,0x00000003},\r
+{0x60,0x00000014},\r
+{0x64,0x00000014},\r
+{0x68,0x000a9876},\r
+{0x6c,0x0054321b},\r
+{0x70,0x00000001},\r
+{0x74,0x80000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000000},\r
+{0xf0,0x9f},\r
+{0x00,0x00000000},\r
+{0x04,0x00000040},\r
+{0x08,0x00000fff},\r
+{0x0c,0x00000000},\r
+{0x10,0x00000000},\r
+{0x14,0x00000000},\r
+{0x18,0x000000c8},\r
+{0x1c,0x00000220},\r
+{0x20,0x00000000},\r
+{0x24,0x0fff0fff},\r
+{0x28,0xf8010025},\r
+{0x2c,0x00000000},\r
+{0x30,0x00180018},\r
+{0x34,0x0000000f},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000000},\r
+{0x44,0x00000300},\r
+{0x48,0x00000400},\r
+{0x4c,0x00000fff},\r
+{0x50,0x00293fff},\r
+{0x54,0x003fffff},\r
+{0x58,0x00000001},\r
+{0x5c,0x00000400},\r
+{0x60,0x00000258},\r
+{0x64,0x00000010},\r
+{0x68,0x00000100},\r
+{0x6c,0x00000000},\r
+{0x70,0x00000000},\r
+{0x74,0x00000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000005},\r
+{0xf0,0x96},\r
+{0x00,0xff050010},\r
+{0x04,0x0001ffff},\r
+{0x08,0xff050014},\r
+{0x0c,0x1fff0000},\r
+{0x10,0xff080068},\r
+{0x14,0x00010000},\r
+{0x18,0xff090008},\r
+{0x1c,0x00540213},\r
+{0x20,0xff080004},\r
+{0x24,0x0000000b},\r
+{0x28,0xff08004c},\r
+{0x2c,0x00327fe4},\r
+{0x30,0xff080084},\r
+{0x34,0x014f0000},\r
+{0x38,0xff080088},\r
+{0x3c,0x014f0000},\r
+{0x40,0xff08008c},\r
+{0x44,0x01500151},\r
+{0x48,0xff080090},\r
+{0x4c,0x00060000},\r
+{0x50,0xff080094},\r
+{0x54,0x000a0022},\r
+{0x58,0xff080064},\r
+{0x5c,0x01004102},\r
+{0x60,0xff080060},\r
+{0x64,0x00000000},\r
+{0x68,0xff070104},\r
+{0x6c,0x000a0040},\r
+{0x70,0xff000030},\r
+{0x74,0x00000003},\r
+{0x78,0xfffffff0},\r
+{0x7c,0x00000000},\r
+//main\r
+{0xf0,0x0},\r
+{0x00,0x01000000},\r
+{0x04,0x01000000},\r
+{0x08,0x233fc0c0},\r
+{0x0c,0xa2146004},\r
+{0x10,0xa4102000},\r
+{0x14,0xe4244000},\r
+{0x18,0x233fc0c0},\r
+{0x1c,0xa2146010},\r
+{0x20,0x2500003f},\r
+{0x24,0xa414a3ff},\r
+{0x28,0xe4244000},\r
+{0x2c,0x01000000},\r
+{0x30,0x821020e0},\r
+{0x34,0x81880001},\r
+{0x38,0x01000000},\r
+{0x3c,0x81d82000},\r
+{0x40,0x25000180},\r
+{0x44,0xa414a00f},\r
+{0x48,0xe4a00040},\r
+{0x4c,0x01000000},\r
+{0x50,0x82100000},\r
+{0x54,0x81900001},\r
+{0x58,0x82100000},\r
+{0x5c,0x81980001},\r
+{0x60,0x81800000},\r
+{0x64,0x01000000},\r
+{0x68,0x3d000017},\r
+{0x6c,0xbc17a3f8},\r
+{0x70,0x1d000017},\r
+{0x74,0x9c13a378},\r
+{0x78,0x81d82000},\r
+{0x7c,0x400000bf},\r
+{0xf0,0x1},\r
+{0x00,0x01000000},\r
+{0x04,0x13000011},\r
+{0x08,0x9a102000},\r
+{0x0c,0x96126314},\r
+{0x10,0x19000004},\r
+{0x14,0x832b6002},\r
+{0x18,0x9a036001},\r
+{0x1c,0x80a36031},\r
+{0x20,0x04bffffd},\r
+{0x24,0xd820400b},\r
+{0x28,0x03000013},\r
+{0x2c,0x82106358},\r
+{0x30,0xc2004000},\r
+{0x34,0x9a1263ec},\r
+{0x38,0xc2234000},\r
+{0x3c,0x981263dc},\r
+{0x40,0xc2230000},\r
+{0x44,0x961263e0},\r
+{0x48,0x941263e4},\r
+{0x4c,0xc222c000},\r
+{0x50,0x921263e8},\r
+{0x54,0xc2228000},\r
+{0x58,0x81c3e008},\r
+{0x5c,0xc2224000},\r
+{0x60,0x9de3bf98},\r
+{0x64,0x03000012},\r
+{0x68,0x94106304},\r
+{0x6c,0x96102000},\r
+{0x70,0x82106300},\r
+{0x74,0xda02c001},\r
+{0x78,0xd802c00a},\r
+{0x7c,0x80a37ff0},\r
+{0xf0,0x2},\r
+{0x00,0x02800004},\r
+{0x04,0x9602e008},\r
+{0x08,0x10bffffb},\r
+{0x0c,0xd8234000},\r
+{0x10,0x21000013},\r
+{0x14,0x82142350},\r
+{0x18,0xda004000},\r
+{0x1c,0x033fc000},\r
+{0x20,0x82106020},\r
+{0x24,0xda204000},\r
+{0x28,0x981423f0},\r
+{0x2c,0xc0230000},\r
+{0x30,0x9614231c},\r
+{0x34,0x941423bc},\r
+{0x38,0xc022c000},\r
+{0x3c,0x921423c0},\r
+{0x40,0xc0228000},\r
+{0x44,0x7fffffd0},\r
+{0x48,0xc0224000},\r
+{0x4c,0x9a142374},\r
+{0x50,0xd8034000},\r
+{0x54,0x941423a8},\r
+{0x58,0x033fc1c0},\r
+{0x5c,0x9a106140},\r
+{0x60,0xa0142318},\r
+{0x64,0xd6040000},\r
+{0x68,0xd4028000},\r
+{0x6c,0x82106064},\r
+{0x70,0xd8204000},\r
+{0x74,0x033fc200},\r
+{0x78,0xd6234000},\r
+{0x7c,0x82106074},\r
+{0xf0,0x3},\r
+{0x00,0xd4204000},\r
+{0x04,0x81c7e008},\r
+{0x08,0x81e80000},\r
+{0x0c,0x03000013},\r
+{0x10,0x9a1063f4},\r
+{0x14,0x941062c0},\r
+{0x18,0x033fc200},\r
+{0x1c,0xc0234000},\r
+{0x20,0x961060a0},\r
+{0x24,0x98102000},\r
+{0x28,0x9b2b2002},\r
+{0x2c,0x98032001},\r
+{0x30,0xc203400a},\r
+{0x34,0x80a3200f},\r
+{0x38,0x08bffffc},\r
+{0x3c,0xc223400b},\r
+{0x40,0x033fc140},\r
+{0x44,0x9210608c},\r
+{0x48,0x96106080},\r
+{0x4c,0x94106084},\r
+{0x50,0x1b000010},\r
+{0x54,0x82106088},\r
+{0x58,0xda204000},\r
+{0x5c,0x98136180},\r
+{0x60,0xd8224000},\r
+{0x64,0xda22c000},\r
+{0x68,0x81c3e008},\r
+{0x6c,0xd8228000},\r
+{0x70,0x01000000},\r
+{0x74,0xa6103fff},\r
+{0x78,0x293fc0c0},\r
+{0x7c,0xa8152004},\r
+{0xf0,0x4},\r
+{0x00,0xe6250000},\r
+{0x04,0xa7800000},\r
+{0x08,0x01000000},\r
+{0x0c,0x81c3e008},\r
+{0x10,0x01000000},\r
+{0x14,0x0300000b},\r
+{0x18,0x82106220},\r
+{0x1c,0x82087f80},\r
+{0x20,0x96102000},\r
+{0x24,0x80a2c001},\r
+{0x28,0x1a800008},\r
+{0x2c,0x9a102000},\r
+{0x30,0x98100001},\r
+{0x34,0xc2034000},\r
+{0x38,0x9a036004},\r
+{0x3c,0x80a3400c},\r
+{0x40,0x0abffffd},\r
+{0x44,0x9602c001},\r
+{0x48,0x0300000c},\r
+{0x4c,0x8210619f},\r
+{0x50,0x9a087c00},\r
+{0x54,0x0300000d},\r
+{0x58,0x8210603c},\r
+{0x5c,0x82087f80},\r
+{0x60,0x80a34001},\r
+{0x64,0x1a800007},\r
+{0x68,0x98100001},\r
+{0x6c,0xc2034000},\r
+{0x70,0x9a036004},\r
+{0x74,0x80a3400c},\r
+{0x78,0x0abffffd},\r
+{0x7c,0x9602c001},\r
+{0xf0,0x5},\r
+{0x00,0x0300000d},\r
+{0x04,0x821063bb},\r
+{0x08,0x9a087c00},\r
+{0x0c,0x0300000e},\r
+{0x10,0x82106090},\r
+{0x14,0x82087f80},\r
+{0x18,0x80a34001},\r
+{0x1c,0x1a800007},\r
+{0x20,0x98100001},\r
+{0x24,0xc2034000},\r
+{0x28,0x9a036004},\r
+{0x2c,0x80a3400c},\r
+{0x30,0x0abffffd},\r
+{0x34,0x9602c001},\r
+{0x38,0x03000013},\r
+{0x3c,0x981063ff},\r
+{0x40,0x9a106280},\r
+{0x44,0xc2034000},\r
+{0x48,0x9a036004},\r
+{0x4c,0x80a3400c},\r
+{0x50,0x08bffffd},\r
+{0x54,0x9602c001},\r
+{0x58,0x03000012},\r
+{0x5c,0x981063ff},\r
+{0x60,0x9a106300},\r
+{0x64,0xc2034000},\r
+{0x68,0x9a036004},\r
+{0x6c,0x80a3400c},\r
+{0x70,0x08bffffd},\r
+{0x74,0x9602c001},\r
+{0x78,0x033fc180},\r
+{0x7c,0x82106030},\r
+{0xf0,0x6},\r
+{0x00,0x81c3e008},\r
+{0x04,0xd6204000},\r
+{0x08,0x9de3bf98},\r
+{0x0c,0x03000013},\r
+{0x10,0xba1063f4},\r
+{0x14,0xc0274000},\r
+{0x18,0xb81063f0},\r
+{0x1c,0xc0270000},\r
+{0x20,0xb6106280},\r
+{0x24,0xc026c000},\r
+{0x28,0xb41062bc},\r
+{0x2c,0xc0268000},\r
+{0x30,0xb210631c},\r
+{0x34,0xc0264000},\r
+{0x38,0xb0106344},\r
+{0x3c,0xc0260000},\r
+{0x40,0x9e106394},\r
+{0x44,0xc023c000},\r
+{0x48,0x9a1063bc},\r
+{0x4c,0xc0234000},\r
+{0x50,0x981063c0},\r
+{0x54,0xc0230000},\r
+{0x58,0x94106304},\r
+{0x5c,0x961063b8},\r
+{0x60,0xc022c000},\r
+{0x64,0x82106300},\r
+{0x68,0xc0204000},\r
+{0x6c,0xc0228000},\r
+{0x70,0x81c7e008},\r
+{0x74,0x81e80000},\r
+{0x78,0x9de3bf98},\r
+{0x7c,0x7fffffe3},\r
+{0xf0,0x7},\r
+{0x00,0x01000000},\r
+{0x04,0x7fffffa4},\r
+{0x08,0x01000000},\r
+{0x0c,0x1b14010c},\r
+{0x10,0x03000011},\r
+{0x14,0x9a136210},\r
+{0x18,0x821063f0},\r
+{0x1c,0xda204000},\r
+{0x20,0x19000013},\r
+{0x24,0x96132304},\r
+{0x28,0x03000004},\r
+{0x2c,0x98132300},\r
+{0x30,0x82106018},\r
+{0x34,0xc2230000},\r
+{0x38,0x40000a42},\r
+{0x3c,0xc022c000},\r
+{0x40,0x7fffff48},\r
+{0x44,0x01000000},\r
+{0x48,0x7fffff71},\r
+{0x4c,0x01000000},\r
+{0x50,0x40000cec},\r
+{0x54,0x01000000},\r
+{0x58,0x7fffff86},\r
+{0x5c,0x01000000},\r
+{0x60,0x30bffffe},\r
+{0x64,0x9de3bf98},\r
+{0x68,0x03000013},\r
+{0x6c,0x9a106324},\r
+{0x70,0xe0034000},\r
+{0x74,0x9a106354},\r
+{0x78,0x82106350},\r
+{0x7c,0xd8004000},\r
+{0xf0,0x8},\r
+{0x00,0x80a42001},\r
+{0x04,0x12800010},\r
+{0x08,0xda034000},\r
+{0x0c,0x033fc000},\r
+{0x10,0xa2106020},\r
+{0x14,0x80a32000},\r
+{0x18,0x12800006},\r
+{0x1c,0x9010000d},\r
+{0x20,0x4000021d},\r
+{0x24,0xe0244000},\r
+{0x28,0x10800010},\r
+{0x2c,0xc0244000},\r
+{0x30,0xc0244000},\r
+{0x34,0x40000218},\r
+{0x38,0x9010000d},\r
+{0x3c,0x1080000b},\r
+{0x40,0xe0244000},\r
+{0x44,0x80a32000},\r
+{0x48,0x12800006},\r
+{0x4c,0x033fc000},\r
+{0x50,0x9a102001},\r
+{0x54,0x82106020},\r
+{0x58,0x10800004},\r
+{0x5c,0xda204000},\r
+{0x60,0x82106020},\r
+{0x64,0xc0204000},\r
+{0x68,0x81c7e008},\r
+{0x6c,0x81e80000},\r
+{0x70,0x80a22000},\r
+{0x74,0x02800018},\r
+{0x78,0x98102000},\r
+{0x7c,0x832a2010},\r
+{0xf0,0x9},\r
+{0x00,0x83306010},\r
+{0x04,0x1b000040},\r
+{0x08,0x9a10400d},\r
+{0x0c,0x173fc180},\r
+{0x10,0x80a30008},\r
+{0x14,0x1a80000b},\r
+{0x18,0xda22c000},\r
+{0x1c,0x03000011},\r
+{0x20,0x94106300},\r
+{0x24,0x9612e004},\r
+{0x28,0x832b2002},\r
+{0x2c,0x98032001},\r
+{0x30,0xda00400a},\r
+{0x34,0x80a30008},\r
+{0x38,0x0abffffc},\r
+{0x3c,0xda20400b},\r
+{0x40,0x03000013},\r
+{0x44,0x9a102001},\r
+{0x48,0x821063f4},\r
+{0x4c,0x1080001c},\r
+{0x50,0xda204000},\r
+{0x54,0x1b000013},\r
+{0x58,0x82136344},\r
+{0x5c,0xd8004000},\r
+{0x60,0x8213638c},\r
+{0x64,0x941363f4},\r
+{0x68,0xd6004000},\r
+{0x6c,0x80a32000},\r
+{0x70,0x0280000a},\r
+{0x74,0xc2028000},\r
+{0x78,0x033fc180},\r
+{0x7c,0x9a106018},\r
+{0xf0,0xa},\r
+{0x00,0xd8234000},\r
+{0x04,0x1b000040},\r
+{0x08,0x80a2e001},\r
+{0x0c,0x12800016},\r
+{0x10,0xda204000},\r
+{0x14,0x3080000a},\r
+{0x18,0x80a06001},\r
+{0x1c,0x1280000b},\r
+{0x20,0x82136350},\r
+{0x24,0x033fc180},\r
+{0x28,0x1b000040},\r
+{0x2c,0xda204000},\r
+{0x30,0x98106018},\r
+{0x34,0xc0228000},\r
+{0x38,0xc0230000},\r
+{0x3c,0x03000000},\r
+{0x40,0x81c063e4},\r
+{0x44,0x01000000},\r
+{0x48,0xda004000},\r
+{0x4c,0x033fc000},\r
+{0x50,0x82106020},\r
+{0x54,0xda204000},\r
+{0x58,0x033fc180},\r
+{0x5c,0x82106018},\r
+{0x60,0xc0204000},\r
+{0x64,0x81c3e008},\r
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+{0x24,0x7ffff4cd},\r
+{0x28,0x9010000d},\r
+{0x2c,0x7ffff5e3},\r
+{0x30,0xa0100008},\r
+{0x34,0x7fffffb3},\r
+{0x38,0x90100010},\r
+{0x3c,0xe4244000},\r
+{0x40,0x81c7e008},\r
+{0x44,0x81e80000},\r
+{0x48,0x9de3bed8},\r
+{0x4c,0x193fc140},\r
+{0x50,0x9a132020},\r
+{0x54,0x82102001},\r
+{0x58,0xc2234000},\r
+{0x5c,0x0303ffc3},\r
+{0x60,0x96132028},\r
+{0x64,0x821063ff},\r
+{0x68,0xc222c000},\r
+{0x6c,0x030003c0},\r
+{0x70,0x94132004},\r
+{0x74,0x8210600c},\r
+{0x78,0xc2228000},\r
+{0x7c,0x03000280},\r
+{0xf0,0x6b},\r
+{0x00,0x92132008},\r
+{0x04,0x82106001},\r
+{0x08,0xc2224000},\r
+{0x0c,0x9e132030},\r
+{0x10,0x1107ffc0},\r
+{0x14,0xd023c000},\r
+{0x18,0x1b000040},\r
+{0x1c,0x033fc200},\r
+{0x20,0xda204000},\r
+{0x24,0xa0132024},\r
+{0x28,0x033fc0c0},\r
+{0x2c,0x82106004},\r
+{0x30,0xc0240000},\r
+{0x34,0xc0204000},\r
+{0x38,0xd0230000},\r
+{0x3c,0x7ffff5b6},\r
+{0x40,0x9010200a},\r
+{0x44,0x7fffffc2},\r
+{0x48,0x01000000},\r
+{0x4c,0x9a102080},\r
+{0x50,0x8207bfc8},\r
+{0x54,0x9410200b},\r
+{0x58,0xda204000},\r
+{0x5c,0x9482bfff},\r
+{0x60,0x1cbffffe},\r
+{0x64,0x82006004},\r
+{0x68,0x03000013},\r
+{0x6c,0xc027bfc8},\r
+{0x70,0x82106388},\r
+{0x74,0xe4004000},\r
+{0x78,0xa0102000},\r
+{0x7c,0x23000013},\r
+{0xf0,0x6c},\r
+{0x00,0x9a146394},\r
+{0x04,0xc2034000},\r
+{0x08,0x82006001},\r
+{0x0c,0x7fffffb0},\r
+{0x10,0xc2234000},\r
+{0x14,0x80a42006},\r
+{0x18,0x14800005},\r
+{0x1c,0x90102001},\r
+{0x20,0x82102006},\r
+{0x24,0x82204010},\r
+{0x28,0x912a0001},\r
+{0x2c,0x9a146200},\r
+{0x30,0x92102000},\r
+{0x34,0x9e07bff8},\r
+{0x38,0x832a6002},\r
+{0x3c,0x9600400f},\r
+{0x40,0xd802ffd0},\r
+{0x44,0x80a32000},\r
+{0x48,0x02800009},\r
+{0x4c,0xc200400d},\r
+{0x50,0x80a04012},\r
+{0x54,0x94230008},\r
+{0x58,0x0a800004},\r
+{0x5c,0x82030008},\r
+{0x60,0x10800003},\r
+{0x64,0xd422ffd0},\r
+{0x68,0xc222ffd0},\r
+{0x6c,0x92026001},\r
+{0x70,0x80a2600b},\r
+{0x74,0x04bffff2},\r
+{0x78,0x832a6002},\r
+{0x7c,0x2f3fc200},\r
+{0xf0,0x6d},\r
+{0x00,0x9610000f},\r
+{0x04,0x94102000},\r
+{0x08,0x9215e010},\r
+{0x0c,0xc202ffd4},\r
+{0x10,0xda02ffd0},\r
+{0x14,0x992aa002},\r
+{0x18,0x83286010},\r
+{0x1c,0x82034001},\r
+{0x20,0x9402a001},\r
+{0x24,0xc2230009},\r
+{0x28,0x80a2a005},\r
+{0x2c,0x08bffff8},\r
+{0x30,0x9602e008},\r
+{0x34,0xa0042001},\r
+{0x38,0x80a42007},\r
+{0x3c,0x04bfffd1},\r
+{0x40,0x23000013},\r
+{0x44,0x21000013},\r
+{0x48,0x9a1423ac},\r
+{0x4c,0xe6034000},\r
+{0x50,0x033fc140},\r
+{0x54,0x981423a0},\r
+{0x58,0x961423a4},\r
+{0x5c,0x94142328},\r
+{0x60,0x9214232c},\r
+{0x64,0x90142330},\r
+{0x68,0x9e142334},\r
+{0x6c,0xe8030000},\r
+{0x70,0xea02c000},\r
+{0x74,0xec028000},\r
+{0x78,0xe2024000},\r
+{0x7c,0xe4020000},\r
+{0xf0,0x6e},\r
+{0x00,0xde03c000},\r
+{0x04,0x9a106020},\r
+{0x08,0xe6234000},\r
+{0x0c,0x98106024},\r
+{0x10,0xe8230000},\r
+{0x14,0x96106028},\r
+{0x18,0xea22c000},\r
+{0x1c,0x94106004},\r
+{0x20,0xe2228000},\r
+{0x24,0x92106008},\r
+{0x28,0xe4224000},\r
+{0x2c,0x90106030},\r
+{0x30,0xde220000},\r
+{0x34,0xec204000},\r
+{0x38,0x03000040},\r
+{0x3c,0xc225c000},\r
+{0x40,0x7ffff555},\r
+{0x44,0x9010200a},\r
+{0x48,0x82142368},\r
+{0x4c,0xd6004000},\r
+{0x50,0x9a14236c},\r
+{0x54,0xd4034000},\r
+{0x58,0x8215e00c},\r
+{0x5c,0xd6204000},\r
+{0x60,0x9a15e008},\r
+{0x64,0x981423f0},\r
+{0x68,0xd4234000},\r
+{0x6c,0xa014231c},\r
+{0x70,0xc0230000},\r
+{0x74,0xc0240000},\r
+{0x78,0x81c7e008},\r
+{0x7c,0x81e80000},\r
+{0xf0,0x6f},\r
+{0x00,0x9de3bf98},\r
+{0x04,0x1b000040},\r
+{0x08,0x033fc180},\r
+{0x0c,0x7ffff316},\r
+{0x10,0xda204000},\r
+{0x14,0x19000013},\r
+{0x18,0x82132340},\r
+{0x1c,0x1b3fc200},\r
+{0x20,0xd6004000},\r
+{0x24,0x82136070},\r
+{0x28,0xd6204000},\r
+{0x2c,0x03000048},\r
+{0x30,0x9413600c},\r
+{0x34,0x82106345},\r
+{0x38,0xc2228000},\r
+{0x3c,0x030019e2},\r
+{0x40,0x92136008},\r
+{0x44,0x821061ab},\r
+{0x48,0xc2224000},\r
+{0x4c,0x981323b0},\r
+{0x50,0x11002000},\r
+{0x54,0x92136030},\r
+{0x58,0xd8030000},\r
+{0x5c,0x96102000},\r
+{0x60,0x9a136010},\r
+{0x64,0x94122080},\r
+{0x68,0x832ae002},\r
+{0x6c,0xd420400d},\r
+{0x70,0xd0234000},\r
+{0x74,0x9602e001},\r
+{0x78,0x80a2e005},\r
+{0x7c,0x04bffffb},\r
+{0xf0,0x70},\r
+{0x00,0xd8204009},\r
+{0x04,0x7fffff51},\r
+{0x08,0x81e80000},\r
+{0x0c,0x01000000},\r
+{0x10,0x81c3e008},\r
+{0x14,0x01000000},\r
+{0x18,0x00000000},\r
+{0x1c,0x00000000},\r
+{0x20,0x00000000},\r
+{0x24,0x00000000},\r
+{0x28,0x00000000},\r
+{0x2c,0x00000000},\r
+{0x30,0x00000000},\r
+{0x34,0x00000000},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000000},\r
+{0x44,0x00000000},\r
+{0x48,0x00000000},\r
+{0x4c,0x00000000},\r
+{0x50,0x00000000},\r
+{0x54,0x00000000},\r
+{0x58,0x00000000},\r
+{0x5c,0x00000000},\r
+{0x60,0x00000000},\r
+{0x64,0x00000000},\r
+{0x68,0x00000000},\r
+{0x6c,0x00000000},\r
+{0x70,0x00000000},\r
+{0x74,0x00000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000000},\r
+{0xf0,0x7a},\r
+{0x00,0x0000000e},\r
+{0x04,0xfffffe65},\r
+{0x08,0x000003fc},\r
+{0x0c,0x00000af6},\r
+{0x10,0x000003d4},\r
+{0x14,0xfffffe64},\r
+{0x18,0x00000008},\r
+{0x1c,0xfffffe66},\r
+{0x20,0x00000425},\r
+{0x24,0x00000af5},\r
+{0x28,0x000003ac},\r
+{0x2c,0xfffffe65},\r
+{0x30,0x00000003},\r
+{0x34,0xfffffe67},\r
+{0x38,0x0000044e},\r
+{0x3c,0x00000af3},\r
+{0x40,0x00000384},\r
+{0x44,0xfffffe65},\r
+{0x48,0xfffffffd},\r
+{0x4c,0xfffffe69},\r
+{0x50,0x00000476},\r
+{0x54,0x00000aef},\r
+{0x58,0x0000035c},\r
+{0x5c,0xfffffe67},\r
+{0x60,0xfffffff7},\r
+{0x64,0xfffffe6c},\r
+{0x68,0x0000049f},\r
+{0x6c,0x00000aea},\r
+{0x70,0x00000335},\r
+{0x74,0xfffffe68},\r
+{0x78,0xfffffff1},\r
+{0x7c,0xfffffe6f},\r
+{0xf0,0x7b},\r
+{0x00,0x000004c9},\r
+{0x04,0x00000ae5},\r
+{0x08,0x0000030e},\r
+{0x0c,0xfffffe6a},\r
+{0x10,0xffffffeb},\r
+{0x14,0xfffffe73},\r
+{0x18,0x000004f2},\r
+{0x1c,0x00000ade},\r
+{0x20,0x000002e7},\r
+{0x24,0xfffffe6d},\r
+{0x28,0xffffffe4},\r
+{0x2c,0xfffffe78},\r
+{0x30,0x0000051b},\r
+{0x34,0x00000ad5},\r
+{0x38,0x000002c1},\r
+{0x3c,0xfffffe70},\r
+{0x40,0xffffffde},\r
+{0x44,0xfffffe7d},\r
+{0x48,0x00000544},\r
+{0x4c,0x00000acc},\r
+{0x50,0x0000029c},\r
+{0x54,0xfffffe74},\r
+{0x58,0xffffffd7},\r
+{0x5c,0xfffffe83},\r
+{0x60,0x0000056d},\r
+{0x64,0x00000ac2},\r
+{0x68,0x00000276},\r
+{0x6c,0xfffffe78},\r
+{0x70,0xffffffd0},\r
+{0x74,0xfffffe89},\r
+{0x78,0x00000597},\r
+{0x7c,0x00000ab6},\r
+{0xf0,0x7c},\r
+{0x00,0x00000251},\r
+{0x04,0xfffffe7c},\r
+{0x08,0xffffffc8},\r
+{0x0c,0xfffffe91},\r
+{0x10,0x000005c0},\r
+{0x14,0x00000aa9},\r
+{0x18,0x0000022d},\r
+{0x1c,0xfffffe81},\r
+{0x20,0xffffffc1},\r
+{0x24,0xfffffe99},\r
+{0x28,0x000005e9},\r
+{0x2c,0x00000a9b},\r
+{0x30,0x00000209},\r
+{0x34,0xfffffe86},\r
+{0x38,0xffffffb9},\r
+{0x3c,0xfffffea1},\r
+{0x40,0x00000611},\r
+{0x44,0x00000a8d},\r
+{0x48,0x000001e5},\r
+{0x4c,0xfffffe8b},\r
+{0x50,0xffffffb2},\r
+{0x54,0xfffffeab},\r
+{0x58,0x0000063a},\r
+{0x5c,0x00000a7d},\r
+{0x60,0x000001c3},\r
+{0x64,0xfffffe91},\r
+{0x68,0xffffffaa},\r
+{0x6c,0xfffffeb5},\r
+{0x70,0x00000663},\r
+{0x74,0x00000a6b},\r
+{0x78,0x000001a0},\r
+{0x7c,0xfffffe97},\r
+{0xf0,0x7d},\r
+{0x00,0xffffffa2},\r
+{0x04,0xfffffebf},\r
+{0x08,0x0000068b},\r
+{0x0c,0x00000a59},\r
+{0x10,0x0000017e},\r
+{0x14,0xfffffe9d},\r
+{0x18,0xffffff9a},\r
+{0x1c,0xfffffecb},\r
+{0x20,0x000006b3},\r
+{0x24,0x00000a46},\r
+{0x28,0x0000015d},\r
+{0x2c,0xfffffea4},\r
+{0x30,0xffffff91},\r
+{0x34,0xfffffed7},\r
+{0x38,0x000006da},\r
+{0x3c,0x00000a32},\r
+{0x40,0x0000013d},\r
+{0x44,0xfffffeab},\r
+{0x48,0xffffff89},\r
+{0x4c,0xfffffee4},\r
+{0x50,0x00000702},\r
+{0x54,0x00000a1d},\r
+{0x58,0x0000011d},\r
+{0x5c,0xfffffeb2},\r
+{0x60,0xffffff80},\r
+{0x64,0xfffffef2},\r
+{0x68,0x00000729},\r
+{0x6c,0x00000a06},\r
+{0x70,0x000000fd},\r
+{0x74,0xfffffeba},\r
+{0x78,0xffffff78},\r
+{0x7c,0xffffff00},\r
+{0xf0,0x7e},\r
+{0x00,0x0000074f},\r
+{0x04,0x000009ef},\r
+{0x08,0x000000df},\r
+{0x0c,0xfffffec1},\r
+{0x10,0xffffff6f},\r
+{0x14,0xffffff10},\r
+{0x18,0x00000776},\r
+{0x1c,0x000009d7},\r
+{0x20,0x000000c1},\r
+{0x24,0xfffffec9},\r
+{0x28,0xffffff66},\r
+{0x2c,0xffffff20},\r
+{0x30,0x0000079b},\r
+{0x34,0x000009be},\r
+{0x38,0x000000a3},\r
+{0x3c,0xfffffed1},\r
+{0x40,0xffffff5e},\r
+{0x44,0xffffff30},\r
+{0x48,0x000007c1},\r
+{0x4c,0x000009a4},\r
+{0x50,0x00000087},\r
+{0x54,0xfffffed9},\r
+{0x58,0xffffff55},\r
+{0x5c,0xffffff42},\r
+{0x60,0x000007e5},\r
+{0x64,0x00000989},\r
+{0x68,0x0000006b},\r
+{0x6c,0xfffffee2},\r
+{0x70,0xffffff4c},\r
+{0x74,0xffffff54},\r
+{0x78,0x0000080a},\r
+{0x7c,0x0000096d},\r
+{0xf0,0x7f},\r
+{0x00,0x0000004f},\r
+{0x04,0xfffffeea},\r
+{0x08,0xffffff43},\r
+{0x0c,0xffffff67},\r
+{0x10,0x0000082d},\r
+{0x14,0x00000951},\r
+{0x18,0x00000035},\r
+{0x1c,0xfffffef3},\r
+{0x20,0xffffff3a},\r
+{0x24,0xffffff7b},\r
+{0x28,0x00000850},\r
+{0x2c,0x00000933},\r
+{0x30,0x0000001b},\r
+{0x34,0xfffffefb},\r
+{0x38,0xffffff31},\r
+{0x3c,0xffffff90},\r
+{0x40,0x00000873},\r
+{0x44,0x00000915},\r
+{0x48,0x00000002},\r
+{0x4c,0xffffff04},\r
+{0x50,0xffffff28},\r
+{0x54,0xffffffa5},\r
+{0x58,0x00000895},\r
+{0x5c,0x000008f6},\r
+{0x60,0xffffffea},\r
+{0x64,0xffffff0d},\r
+{0x68,0xffffff1f},\r
+{0x6c,0xffffffbb},\r
+{0x70,0x000008b6},\r
+{0x74,0x000008d6},\r
+{0x78,0xffffffd2},\r
+{0x7c,0xffffff16},\r
+};\r
+#endif\r
--- /dev/null
+/*
+ * drivers/input/touchscreen/gslX680.c
+ *
+ * Copyright (c) 2012 Shanghai Basewin
+ * Guan Yuwei<guanyuwei@basewin.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/earlysuspend.h>
+#include <linux/hrtimer.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/async.h>
+#include <mach/gpio.h>
+#include <mach/iomux.h>
+#include <linux/irq.h>
+#include <mach/board.h>
+#include <linux/workqueue.h>
+#include <linux/proc_fs.h>
+#include <linux/input/mt.h>
+
+#include "rk3028_gslX680_86v.h"
+
+
+//#define GSL_DEBUG
+//#define GSL_TIMER
+#define REPORT_DATA_ANDROID_4_0
+
+//#define HAVE_TOUCH_KEY
+
+#define GSLX680_I2C_NAME "gslX680"
+#define GSLX680_I2C_ADDR 0x40
+
+#define IRQ_PORT RK2928_PIN1_PB0
+#define WAKE_PORT RK2928_PIN0_PD3
+
+#define GSL_DATA_REG 0x80
+#define GSL_STATUS_REG 0xe0
+#define GSL_PAGE_REG 0xf0
+
+#define PRESS_MAX 255
+#define MAX_FINGERS 5
+#define MAX_CONTACTS 10
+#define DMA_TRANS_LEN 0x20
+//#define FILTER_POINT
+#ifdef FILTER_POINT
+#define FILTER_MAX 6
+#endif
+
+#define WRITE_I2C_SPEED 350*1000
+#define I2C_SPEED 200*1000
+
+//ÐÝÃßʱÊÇ·ñÐèÒª¹Ø±ÕTPµçÔ´
+//Ò쳣ʱÊÇ·ñÐèÒª¹Ø±ÕµçÔ´
+#define CLOSE_TP_POWER 1
+
+#if CLOSE_TP_POWER
+static void set_tp_power(bool flag);
+#endif
+
+#ifdef HAVE_TOUCH_KEY
+static u16 key = 0;
+static int key_state_flag = 0;
+
+
+struct key_data {
+ u16 key;
+ u16 x_min;
+ u16 x_max;
+ u16 y_min;
+ u16 y_max;
+};
+
+const u16 key_array[]={
+ KEY_BACK,
+ KEY_HOME,
+ KEY_MENU,
+ KEY_SEARCH,
+ };
+#define MAX_KEY_NUM (sizeof(key_array)/sizeof(key_array[0]))
+
+struct key_data gsl_key_data[MAX_KEY_NUM] = {
+ {KEY_BACK, 2048, 2048, 2048, 2048},
+ {KEY_HOME, 2048, 2048, 2048, 2048},
+ {KEY_MENU, 2048, 2048, 2048, 2048},
+ {KEY_SEARCH, 2048, 2048, 2048, 2048},
+};
+#endif
+
+struct gsl_ts_data {
+ u8 x_index;
+ u8 y_index;
+ u8 z_index;
+ u8 id_index;
+ u8 touch_index;
+ u8 data_reg;
+ u8 status_reg;
+ u8 data_size;
+ u8 touch_bytes;
+ u8 update_data;
+ u8 touch_meta_data;
+ u8 finger_size;
+};
+
+static struct gsl_ts_data devices[] = {
+ {
+ .x_index = 6,
+ .y_index = 4,
+ .z_index = 5,
+ .id_index = 7,
+ .data_reg = GSL_DATA_REG,
+ .status_reg = GSL_STATUS_REG,
+ .update_data = 0x4,
+ .touch_bytes = 4,
+ .touch_meta_data = 4,
+ .finger_size = 70,
+ },
+};
+
+struct gsl_ts {
+ struct i2c_client *client;
+ struct input_dev *input;
+ struct work_struct work;
+ struct workqueue_struct *wq;
+ struct gsl_ts_data *dd;
+ u8 *touch_data;
+ u8 device_id;
+// uint32_t gpio_irq;
+ int irq;
+#if defined(CONFIG_HAS_EARLYSUSPEND)
+ struct early_suspend early_suspend;
+#endif
+#ifdef GSL_TIMER
+ struct timer_list gsl_timer;
+#endif
+ int reset_gpio; //lizhengwei
+
+};
+
+#ifdef GSL_DEBUG
+#define print_info(fmt, args...) \
+ do{ \
+ printk(fmt, ##args); \
+ }while(0)
+#else
+#define print_info(fmt, args...)
+#endif
+
+static int ts_global_reset_pin; //lizhengwei add
+
+static u32 id_sign[MAX_CONTACTS+1] = {0};
+static u8 id_state_flag[MAX_CONTACTS+1] = {0};
+static u8 id_state_old_flag[MAX_CONTACTS+1] = {0};
+static u16 x_old[MAX_CONTACTS+1] = {0};
+static u16 y_old[MAX_CONTACTS+1] = {0};
+static u16 x_new = 0;
+static u16 y_new = 0;
+#if 0
+static int gslX680_chip_init(void)
+{
+ if (WAKE_PORT > 0) {
+ gpio_free(WAKE_PORT);
+ if (gpio_request(WAKE_PORT, "gslx680 wake")) {
+ printk("pjf gpio_request(WAKE_PORT) error\n");
+ goto exit_alloc_gpio_wake_failed;
+ }
+ }
+ gpio_direction_output(WAKE_PORT, 0);
+ gpio_set_value(WAKE_PORT,GPIO_HIGH);
+
+ if (IRQ_PORT > 0) {
+ gpio_free(IRQ_PORT);
+ if (gpio_request(IRQ_PORT, "gslx680 irq")) {
+ printk("pjf gpio_request(IRQ_PORT) error\n");
+ goto exit_alloc_gpio_irg_failed;
+ }
+ }
+ gpio_pull_updown(IRQ_PORT, 1);
+
+ msleep(20);
+ return 0;
+
+exit_alloc_gpio_irg_failed:
+ gpio_free(IRQ_PORT);
+exit_alloc_gpio_wake_failed:
+ gpio_free(WAKE_PORT);
+ return -EIO;
+}
+#endif
+static int gslX680_shutdown_low(void)
+{
+ gpio_direction_output(ts_global_reset_pin, GPIO_LOW);
+ gpio_set_value(ts_global_reset_pin,GPIO_LOW);
+ return 0;
+}
+
+static int gslX680_shutdown_high(void)
+{
+ gpio_direction_output(ts_global_reset_pin, GPIO_HIGH);
+ gpio_set_value(ts_global_reset_pin,GPIO_HIGH);
+ return 0;
+}
+
+static int gslX680_shutdown_realse(void)
+{
+ gpio_direction_input(ts_global_reset_pin);
+ return 0;
+}
+
+static inline u16 join_bytes(u8 a, u8 b)
+{
+ u16 ab = 0;
+ ab = ab | a;
+ ab = ab << 8 | b;
+ return ab;
+}
+
+static u32 gsl_read_interface(struct i2c_client *client, u8 reg, u8 *buf, u32 num)
+{
+ struct i2c_msg xfer_msg[2];
+
+ xfer_msg[0].addr = client->addr;
+ xfer_msg[0].len = 1;
+ xfer_msg[0].flags = client->flags & I2C_M_TEN;
+ xfer_msg[0].buf = ®
+ xfer_msg[0].scl_rate = I2C_SPEED;
+
+ xfer_msg[1].addr = client->addr;
+ xfer_msg[1].len = num;
+ xfer_msg[1].flags |= I2C_M_RD;
+ xfer_msg[1].buf = buf;
+ xfer_msg[1].scl_rate = I2C_SPEED;
+
+ if (reg < 0x80) {
+ i2c_transfer(client->adapter, xfer_msg, ARRAY_SIZE(xfer_msg));
+ msleep(5);
+ }
+
+ return i2c_transfer(client->adapter, xfer_msg, ARRAY_SIZE(xfer_msg)) == ARRAY_SIZE(xfer_msg) ? 0 : -EFAULT;
+}
+
+static u32 gsl_write_interface(struct i2c_client *client, const u8 reg, u8 *buf, u32 num)
+{
+ struct i2c_msg xfer_msg[1];
+
+ buf[0] = reg;
+
+ xfer_msg[0].addr = client->addr;
+ xfer_msg[0].len = num + 1;
+ xfer_msg[0].flags = client->flags & I2C_M_TEN;
+ xfer_msg[0].buf = buf;
+ xfer_msg[0].scl_rate = WRITE_I2C_SPEED;
+
+ return i2c_transfer(client->adapter, xfer_msg, 1) == 1 ? 0 : -EFAULT;
+}
+
+static int gsl_ts_write(struct i2c_client *client, u8 addr, u8 *pdata, int datalen)
+{
+ int ret = 0;
+ u8 tmp_buf[128];
+ unsigned int bytelen = 0;
+ if (datalen > 125)
+ {
+ printk("%s too big datalen = %d!\n", __func__, datalen);
+ return -1;
+ }
+
+ tmp_buf[0] = addr;
+ bytelen++;
+
+ if (datalen != 0 && pdata != NULL)
+ {
+ memcpy(&tmp_buf[bytelen], pdata, datalen);
+ bytelen += datalen;
+ }
+
+ ret = i2c_master_normal_send(client, tmp_buf, bytelen,I2C_SPEED);
+ return ret;
+}
+
+static int gsl_ts_read(struct i2c_client *client, u8 addr, u8 *pdata, unsigned int datalen)
+{
+ int ret = 0;
+
+ if (datalen > 126)
+ {
+ printk("%s too big datalen = %d!\n", __func__, datalen);
+ return -1;
+ }
+
+ ret = gsl_ts_write(client, addr, NULL, 0);
+ if (ret < 0)
+ {
+ printk("%s set data address fail!\n", __func__);
+ return ret;
+ }
+
+ return i2c_master_normal_recv(client, pdata, datalen,I2C_SPEED);
+}
+
+
+static __inline__ void fw2buf(u8 *buf, const u32 *fw)
+{
+ u32 *u32_buf = (int *)buf;
+ *u32_buf = *fw;
+}
+
+static void gsl_load_fw(struct i2c_client *client)
+{
+ u8 buf[DMA_TRANS_LEN*4 + 1] = {0};
+ u8 send_flag = 1;
+ u8 *cur = buf + 1;
+ u32 source_line = 0;
+ u32 source_len;
+ u8 read_buf[4] = {0};
+ struct fw_data *ptr_fw;
+
+ printk("=============gsl_load_fw start==============\n");
+
+#ifdef GSL1680E_COMPATIBLE
+ msleep(50);
+ gsl_ts_read(client, 0xfc, read_buf, 4);
+ //printk("read 0xfc = %x %x %x %x\n", read_buf[3], read_buf[2], read_buf[1], read_buf[0]);
+
+ if(read_buf[2] != 0x82 && read_buf[2] != 0x88)
+ {
+ msleep(100);
+ gsl_ts_read(client, 0xfc, read_buf, 4);
+ //printk("read 0xfc = %x %x %x %x\n", read_buf[3], read_buf[2], read_buf[1], read_buf[0]);
+ }
+
+ if(read_buf[2] == 0x82)
+ {
+ ptr_fw = GSL1680E_FW;
+ source_len = ARRAY_SIZE(GSL1680E_FW);
+ }
+ else
+#endif
+ {
+ ptr_fw = GSLX680_FW;
+ source_len = ARRAY_SIZE(GSLX680_FW);
+ }
+
+ for (source_line = 0; source_line < source_len; source_line++)
+ {
+ /* init page trans, set the page val */
+ if (GSL_PAGE_REG == ptr_fw[source_line].offset)
+ {
+ fw2buf(cur, &ptr_fw[source_line].val);
+ gsl_write_interface(client, GSL_PAGE_REG, buf, 4);
+ send_flag = 1;
+ }
+ else
+ {
+ if (1 == send_flag % (DMA_TRANS_LEN < 0x20 ? DMA_TRANS_LEN : 0x20))
+ buf[0] = (u8)ptr_fw[source_line].offset;
+
+ fw2buf(cur, &ptr_fw[source_line].val);
+ cur += 4;
+
+ if (0 == send_flag % (DMA_TRANS_LEN < 0x20 ? DMA_TRANS_LEN : 0x20))
+ {
+ gsl_write_interface(client, buf[0], buf, cur - buf - 1);
+ cur = buf + 1;
+ }
+
+ send_flag++;
+ }
+ }
+
+ printk("=============gsl_load_fw end==============\n");
+
+}
+
+
+static void test_i2c(struct i2c_client *client)
+{
+ u8 read_buf = 0;
+ u8 write_buf = 0x12;
+ int ret;
+ ret = gsl_ts_read( client, 0xf0, &read_buf, sizeof(read_buf) );
+ if (ret < 0)
+ {
+ pr_info("I2C transfer error!\n");
+ }
+ else
+ {
+ pr_info("I read reg 0xf0 is %x\n", read_buf);
+ }
+ msleep(10);
+
+ ret = gsl_ts_write(client, 0xf0, &write_buf, sizeof(write_buf));
+ if (ret < 0)
+ {
+ pr_info("I2C transfer error!\n");
+ }
+ else
+ {
+ pr_info("I write reg 0xf0 0x12\n");
+ }
+ msleep(10);
+
+ ret = gsl_ts_read( client, 0xf0, &read_buf, sizeof(read_buf) );
+ if (ret < 0 )
+ {
+ pr_info("I2C transfer error!\n");
+ }
+ else
+ {
+ pr_info("I read reg 0xf0 is 0x%x\n", read_buf);
+ }
+ msleep(10);
+
+}
+
+
+static void startup_chip(struct i2c_client *client)
+{
+ u8 tmp = 0x00;
+ u8 buf[4] = {0x00};
+ buf[3] = 0x01;
+ buf[2] = 0xfe;
+ buf[1] = 0x10;
+ buf[0] = 0x00;
+ gsl_ts_write(client, 0xf0, buf, sizeof(buf));
+ buf[3] = 0x00;
+ buf[2] = 0x00;
+ buf[1] = 0x00;
+ buf[0] = 0x0f;
+ gsl_ts_write(client, 0x04, buf, sizeof(buf));
+ msleep(20);
+ gsl_ts_write(client, 0xe0, &tmp, 1);
+ msleep(10);
+}
+
+static void reset_chip(struct i2c_client *client)
+{
+ u8 tmp = 0x88;
+ u8 buf[4] = {0x00};
+
+ gsl_ts_write(client, 0xe0, &tmp, sizeof(tmp));
+ msleep(20);
+ tmp = 0x04;
+ gsl_ts_write(client, 0xe4, &tmp, sizeof(tmp));
+ msleep(10);
+ gsl_ts_write(client, 0xbc, buf, sizeof(buf));
+ msleep(10);
+}
+
+static void clr_reg(struct i2c_client *client)
+{
+ u8 write_buf[4] = {0};
+
+ write_buf[0] = 0x88;
+ gsl_ts_write(client, 0xe0, &write_buf[0], 1);
+ msleep(20);
+ write_buf[0] = 0x01;
+ gsl_ts_write(client, 0x80, &write_buf[0], 1);
+ msleep(5);
+ write_buf[0] = 0x04;
+ gsl_ts_write(client, 0xe4, &write_buf[0], 1);
+ msleep(5);
+ write_buf[0] = 0x00;
+ gsl_ts_write(client, 0xe0, &write_buf[0], 1);
+ msleep(20);
+}
+
+static void init_chip(struct i2c_client *client)
+{
+ gslX680_shutdown_low();
+ msleep(20);
+ gslX680_shutdown_high();
+ msleep(20);
+ clr_reg(client);
+ reset_chip(client);
+ gsl_load_fw(client);
+ startup_chip(client);
+ reset_chip(client);
+ startup_chip(client);
+}
+
+static void check_mem_data(struct i2c_client *client)
+{
+ u8 read_buf[4] = {0};
+
+ msleep(50);
+ gsl_ts_read(client,0xb0, read_buf, sizeof(read_buf));
+ if (read_buf[3] != 0x5a || read_buf[2] != 0x5a || read_buf[1] != 0x5a || read_buf[0] != 0x5a)
+ {
+ printk("#########check mem read 0xb0 = %x %x %x %x #########\n", read_buf[3], read_buf[2], read_buf[1], read_buf[0]);
+ #if CLOSE_TP_POWER
+ set_tp_power(false);
+ msleep(200);
+ set_tp_power(true);
+ msleep(100);
+ #endif
+ init_chip(client);
+ }
+}
+
+#ifdef FILTER_POINT
+static void filter_point(u16 x, u16 y , u8 id)
+{
+ u16 x_err =0;
+ u16 y_err =0;
+ u16 filter_step_x = 0, filter_step_y = 0;
+
+ id_sign[id] = id_sign[id] + 1;
+ if(id_sign[id] == 1)
+ {
+ x_old[id] = x;
+ y_old[id] = y;
+ }
+
+ x_err = x > x_old[id] ? (x -x_old[id]) : (x_old[id] - x);
+ y_err = y > y_old[id] ? (y -y_old[id]) : (y_old[id] - y);
+
+ if( (x_err > FILTER_MAX && y_err > FILTER_MAX/3) || (x_err > FILTER_MAX/3 && y_err > FILTER_MAX) )
+ {
+ filter_step_x = x_err;
+ filter_step_y = y_err;
+ }
+ else
+ {
+ if(x_err > FILTER_MAX)
+ filter_step_x = x_err;
+ if(y_err> FILTER_MAX)
+ filter_step_y = y_err;
+ }
+
+ if(x_err <= 2*FILTER_MAX && y_err <= 2*FILTER_MAX)
+ {
+ filter_step_x >>= 2;
+ filter_step_y >>= 2;
+ }
+ else if(x_err <= 3*FILTER_MAX && y_err <= 3*FILTER_MAX)
+ {
+ filter_step_x >>= 1;
+ filter_step_y >>= 1;
+ }
+ else if(x_err <= 4*FILTER_MAX && y_err <= 4*FILTER_MAX)
+ {
+ filter_step_x = filter_step_x*3/4;
+ filter_step_y = filter_step_y*3/4;
+ }
+ x_new = x > x_old[id] ? (x_old[id] + filter_step_x) : (x_old[id] - filter_step_x);
+ y_new = y > y_old[id] ? (y_old[id] + filter_step_y) : (y_old[id] - filter_step_y);
+
+ x_old[id] = x_new;
+ y_old[id] = y_new;
+}
+#else
+
+static void record_point(u16 x, u16 y , u8 id)
+{
+ u16 x_err =0;
+ u16 y_err =0;
+
+ id_sign[id]=id_sign[id]+1;
+
+ if(id_sign[id]==1){
+ x_old[id]=x;
+ y_old[id]=y;
+ }
+
+ x = (x_old[id] + x)/2;
+ y = (y_old[id] + y)/2;
+
+ if(x>x_old[id]){
+ x_err=x -x_old[id];
+ }
+ else{
+ x_err=x_old[id]-x;
+ }
+
+ if(y>y_old[id]){
+ y_err=y -y_old[id];
+ }
+ else{
+ y_err=y_old[id]-y;
+ }
+
+ if( (x_err > 3 && y_err > 1) || (x_err > 1 && y_err > 3) ){
+ x_new = x; x_old[id] = x;
+ y_new = y; y_old[id] = y;
+ }
+ else{
+ if(x_err > 3){
+ x_new = x; x_old[id] = x;
+ }
+ else
+ x_new = x_old[id];
+ if(y_err> 3){
+ y_new = y; y_old[id] = y;
+ }
+ else
+ y_new = y_old[id];
+ }
+
+ if(id_sign[id]==1){
+ x_new= x_old[id];
+ y_new= y_old[id];
+ }
+
+}
+#endif
+
+#ifdef HAVE_TOUCH_KEY
+static void report_key(struct gsl_ts *ts, u16 x, u16 y)
+{
+ u16 i = 0;
+
+ for(i = 0; i < MAX_KEY_NUM; i++)
+ {
+ if((gsl_key_data[i].x_min < x) && (x < gsl_key_data[i].x_max)&&(gsl_key_data[i].y_min < y) && (y < gsl_key_data[i].y_max))
+ {
+ key = gsl_key_data[i].key;
+ input_report_key(ts->input, key, 1);
+ input_sync(ts->input);
+ key_state_flag = 1;
+ break;
+ }
+ }
+}
+#endif
+
+static void report_data(struct gsl_ts *ts, u16 x, u16 y, u8 pressure, u8 id)
+{
+ swap(x, y);
+
+ print_info("#####id=%d,x=%d,y=%d######\n",id,x,y);
+
+ if(x > SCREEN_MAX_X || y > SCREEN_MAX_Y)
+ {
+ #ifdef HAVE_TOUCH_KEY
+ report_key(ts,x,y);
+ #endif
+ return;
+ }
+
+#ifdef REPORT_DATA_ANDROID_4_0
+ input_mt_slot(ts->input, id);
+ input_report_abs(ts->input, ABS_MT_TRACKING_ID, id);
+ input_report_abs(ts->input, ABS_MT_TOUCH_MAJOR, pressure);
+ input_report_abs(ts->input, ABS_MT_POSITION_X, x);
+ input_report_abs(ts->input, ABS_MT_POSITION_Y, y);
+ input_report_abs(ts->input, ABS_MT_WIDTH_MAJOR, 1);
+#else
+ input_report_abs(ts->input, ABS_MT_TRACKING_ID, id);
+ input_report_abs(ts->input, ABS_MT_TOUCH_MAJOR, pressure);
+ input_report_abs(ts->input, ABS_MT_POSITION_X,x);
+ input_report_abs(ts->input, ABS_MT_POSITION_Y, y);
+ input_report_abs(ts->input, ABS_MT_WIDTH_MAJOR, 1);
+ input_mt_sync(ts->input);
+#endif
+}
+
+static void process_gslX680_data(struct gsl_ts *ts)
+{
+ u8 id, touches;
+ u16 x, y;
+ int i = 0;
+
+ touches = ts->touch_data[ts->dd->touch_index];
+ for(i=1;i<=MAX_CONTACTS;i++)
+ {
+ if(touches == 0)
+ id_sign[i] = 0;
+ id_state_flag[i] = 0;
+ }
+ for(i= 0;i < (touches > MAX_FINGERS ? MAX_FINGERS : touches);i ++)
+ {
+ x = join_bytes( ( ts->touch_data[ts->dd->x_index + 4 * i + 1] & 0xf),
+ ts->touch_data[ts->dd->x_index + 4 * i]);
+ y = join_bytes(ts->touch_data[ts->dd->y_index + 4 * i + 1],
+ ts->touch_data[ts->dd->y_index + 4 * i ]);
+ id = ts->touch_data[ts->dd->id_index + 4 * i] >> 4;
+
+ if(1 <=id && id <= MAX_CONTACTS)
+ {
+ #ifdef FILTER_POINT
+ filter_point(x, y ,id);
+ #else
+ record_point(x, y , id);
+ #endif
+ report_data(ts, x_new, y_new, 50, id);
+ id_state_flag[id] = 1;
+ }
+ }
+ for(i=1;i<=MAX_CONTACTS;i++)
+ {
+ if( (0 == touches) || ((0 != id_state_old_flag[i]) && (0 == id_state_flag[i])) )
+ {
+ #ifdef REPORT_DATA_ANDROID_4_0
+ input_mt_slot(ts->input, i);
+ input_report_abs(ts->input, ABS_MT_TRACKING_ID, -1);
+ input_mt_report_slot_state(ts->input, MT_TOOL_FINGER, false);
+ #endif
+ id_sign[i]=0;
+ }
+ id_state_old_flag[i] = id_state_flag[i];
+ }
+#ifndef REPORT_DATA_ANDROID_4_0
+ if(0 == touches)
+ {
+ input_mt_sync(ts->input);
+ #ifdef HAVE_TOUCH_KEY
+ if(key_state_flag)
+ {
+ input_report_key(ts->input, key, 0);
+ input_sync(ts->input);
+ key_state_flag = 0;
+ }
+ #endif
+ }
+#endif
+ input_sync(ts->input);
+}
+
+
+static void gsl_ts_xy_worker(struct work_struct *work)
+{
+ int rc;
+ u8 read_buf[4] = {0};
+
+ struct gsl_ts *ts = container_of(work, struct gsl_ts,work);
+
+ print_info("---gsl_ts_xy_worker---\n");
+ /* read data from DATA_REG */
+ rc = gsl_ts_read(ts->client, 0x80, ts->touch_data, ts->dd->data_size);
+ print_info("---touches: %d ---\n",ts->touch_data[0]);
+
+ if (rc < 0)
+ {
+ dev_err(&ts->client->dev, "read failed\n");
+ goto schedule;
+ }
+
+ if (ts->touch_data[ts->dd->touch_index] == 0xff) {
+ goto schedule;
+ }
+
+ rc = gsl_ts_read( ts->client, 0xbc, read_buf, sizeof(read_buf));
+ if (rc < 0)
+ {
+ dev_err(&ts->client->dev, "read 0xbc failed\n");
+ goto schedule;
+ }
+ print_info("//////// reg %x : %x %x %x %x\n",0xbc, read_buf[3], read_buf[2], read_buf[1], read_buf[0]);
+
+ if (read_buf[3] == 0 && read_buf[2] == 0 && read_buf[1] == 0 && read_buf[0] == 0)
+ {
+ process_gslX680_data(ts);
+ }
+ else
+ {
+ reset_chip(ts->client);
+ startup_chip(ts->client);
+ }
+
+schedule:
+ enable_irq(ts->irq);
+
+}
+
+static irqreturn_t gsl_ts_irq(int irq, void *dev_id)
+{
+ struct gsl_ts *ts = dev_id;
+
+ print_info("==========GSLX680 Interrupt============\n");
+
+ disable_irq_nosync(ts->irq);
+
+ if (!work_pending(&ts->work))
+ {
+ queue_work(ts->wq, &ts->work);
+ }
+
+ return IRQ_HANDLED;
+
+}
+
+#ifdef GSL_TIMER
+static void gsl_timer_handle(unsigned long data)
+{
+ struct gsl_ts *ts = (struct gsl_ts *)data;
+
+#ifdef GSL_DEBUG
+ printk("----------------gsl_timer_handle-----------------\n");
+#endif
+
+ disable_irq_nosync(ts->irq);
+ check_mem_data(ts->client);
+ ts->gsl_timer.expires = jiffies + 3 * HZ;
+ add_timer(&ts->gsl_timer);
+ enable_irq(ts->irq);
+
+}
+#endif
+
+static int gsl_ts_init_ts(struct i2c_client *client, struct gsl_ts *ts)
+{
+ struct input_dev *input_device;
+ int i, rc = 0;
+
+ printk("[GSLX680] Enter %s\n", __func__);
+
+
+ ts->dd = &devices[ts->device_id];
+
+ if (ts->device_id == 0) {
+ ts->dd->data_size = MAX_FINGERS * ts->dd->touch_bytes + ts->dd->touch_meta_data;
+ ts->dd->touch_index = 0;
+ }
+
+ ts->touch_data = kzalloc(ts->dd->data_size, GFP_KERNEL);
+ if (!ts->touch_data) {
+ pr_err("%s: Unable to allocate memory\n", __func__);
+ return -ENOMEM;
+ }
+
+
+ input_device = input_allocate_device();
+ if (!input_device) {
+ rc = -ENOMEM;
+ goto error_alloc_dev;
+ }
+
+ ts->input = input_device;
+ input_device->name = GSLX680_I2C_NAME;
+ input_device->id.bustype = BUS_I2C;
+ input_device->dev.parent = &client->dev;
+ input_set_drvdata(input_device, ts);
+
+#ifdef REPORT_DATA_ANDROID_4_0
+ __set_bit(EV_ABS, input_device->evbit);
+ __set_bit(EV_KEY, input_device->evbit);
+ __set_bit(EV_REP, input_device->evbit);
+ __set_bit(INPUT_PROP_DIRECT, input_device->propbit);
+ input_mt_init_slots(input_device, (MAX_CONTACTS+1));
+#else
+ input_set_abs_params(input_device,ABS_MT_TRACKING_ID, 0, (MAX_CONTACTS+1), 0, 0);
+ set_bit(EV_ABS, input_device->evbit);
+ set_bit(EV_KEY, input_device->evbit);
+#endif
+
+#ifdef HAVE_TOUCH_KEY
+ input_device->evbit[0] = BIT_MASK(EV_KEY);
+ for (i = 0; i < MAX_KEY_NUM; i++)
+ set_bit(key_array[i], input_device->keybit);
+#endif
+
+ set_bit(ABS_MT_POSITION_X, input_device->absbit);
+ set_bit(ABS_MT_POSITION_Y, input_device->absbit);
+ set_bit(ABS_MT_TOUCH_MAJOR, input_device->absbit);
+ set_bit(ABS_MT_WIDTH_MAJOR, input_device->absbit);
+
+ input_set_abs_params(input_device,ABS_MT_POSITION_X, 0, SCREEN_MAX_X, 0, 0);
+ input_set_abs_params(input_device,ABS_MT_POSITION_Y, 0, SCREEN_MAX_Y, 0, 0);
+ input_set_abs_params(input_device,ABS_MT_TOUCH_MAJOR, 0, PRESS_MAX, 0, 0);
+ input_set_abs_params(input_device,ABS_MT_WIDTH_MAJOR, 0, 200, 0, 0);
+
+ client->irq = ts->irq; //IRQ_PORT,
+
+ ts->wq = create_singlethread_workqueue("kworkqueue_ts");
+ if (!ts->wq) {
+ dev_err(&client->dev, "Could not create workqueue\n");
+ goto error_wq_create;
+ }
+ flush_workqueue(ts->wq);
+
+ INIT_WORK(&ts->work, gsl_ts_xy_worker);
+
+ rc = input_register_device(input_device);
+ if (rc)
+ goto error_unreg_device;
+
+ return 0;
+
+error_unreg_device:
+ destroy_workqueue(ts->wq);
+error_wq_create:
+ input_free_device(input_device);
+error_alloc_dev:
+ kfree(ts->touch_data);
+ return rc;
+}
+
+#if CLOSE_TP_POWER
+#include <linux/regulator/rk29-pwm-regulator.h>
+#include <linux/mfd/tps65910.h>
+static void set_tp_power(bool flag)
+{
+ struct regulator *ldo=NULL;
+ ldo = regulator_get(NULL, "vaux33");
+
+ if(ldo==NULL){
+ printk("set_tp_power ldo is null\n");
+ return;
+ }
+ if(flag){
+ regulator_set_voltage(ldo, 3300000, 3300000);
+ regulator_enable(ldo);
+ regulator_put(ldo);
+
+ }else{
+ regulator_disable(ldo);
+ regulator_put(ldo);
+ }
+}
+#endif
+
+static int gsl_ts_suspend(struct device *dev)
+{
+ struct gsl_ts *ts = dev_get_drvdata(dev);
+ printk("I'am in gsl_ts_suspend() start\n");
+ flush_workqueue(ts->wq);
+#ifdef GSL_TIMER
+ printk( "gsl_ts_suspend () : delete gsl_timer\n");
+ del_timer(&ts->gsl_timer);
+#endif
+ disable_irq_nosync(ts->irq);
+ gslX680_shutdown_low();
+ return 0;
+}
+
+static int gsl_ts_resume(struct device *dev)
+{
+ struct gsl_ts *ts = dev_get_drvdata(dev);
+ int i,rc = 0;
+ printk("I'am in gsl_ts_resume() start\n");
+ gslX680_shutdown_high();
+ msleep(20);
+ reset_chip(ts->client);
+ startup_chip(ts->client);
+ check_mem_data(ts->client);
+ //add
+ msleep(100);
+ reset_chip(ts->client);
+ startup_chip(ts->client);
+ msleep(100);
+ reset_chip(ts->client);
+ startup_chip(ts->client);
+#ifdef GSL_TIMER
+ printk( "gsl_ts_resume () : add gsl_timer\n");
+ init_timer(&ts->gsl_timer);
+ ts->gsl_timer.expires = jiffies + 3 * HZ;
+ ts->gsl_timer.function = &gsl_timer_handle;
+ ts->gsl_timer.data = (unsigned long)ts;
+ add_timer(&ts->gsl_timer);
+#endif
+
+ for(i=1;i<=MAX_CONTACTS;i++){
+ if(0!= id_state_old_flag[i])
+ {
+ #ifdef REPORT_DATA_ANDROID_4_0
+ input_mt_slot(ts->input, i);
+ input_report_abs(ts->input, ABS_MT_TRACKING_ID, -1);
+ input_mt_report_slot_state(ts->input, MT_TOOL_FINGER, false);
+ input_sync(ts->input);
+ #endif
+ id_sign[i]=0;
+ }
+ id_state_old_flag[i] = id_state_flag[i]=0;
+ }
+ enable_irq(ts->irq);
+ return 0;
+
+
+}
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+static void gsl_ts_early_suspend(struct early_suspend *h)
+{
+ struct gsl_ts *ts = container_of(h, struct gsl_ts, early_suspend);
+ gsl_ts_suspend(&ts->client->dev);
+}
+
+static void gsl_ts_late_resume(struct early_suspend *h)
+{
+ struct gsl_ts *ts = container_of(h, struct gsl_ts, early_suspend);
+ gsl_ts_resume(&ts->client->dev);
+}
+#endif
+
+static int __devinit gsl_ts_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct ts_hw_data *pdata = client->dev.platform_data;
+
+ struct gsl_ts *ts;
+ int rc;
+
+ printk("GSLX680 Enter %s\n", __func__);
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ dev_err(&client->dev, "I2C functionality not supported\n");
+ return -ENODEV;
+ }
+
+ ts = kzalloc(sizeof(*ts), GFP_KERNEL);
+ if (!ts)
+ return -ENOMEM;
+ printk("==kzalloc success=\n");
+
+ ts->client = client;
+ ts->device_id = id->driver_data;
+
+ ts->reset_gpio = pdata->reset_gpio; //lizhengwei
+ ts->irq= gpio_to_irq(pdata->touch_en_gpio); //lizhengwei
+
+ ts_global_reset_pin=ts->reset_gpio;
+
+ i2c_set_clientdata(client, ts);
+
+ if (pdata->init_platform_hw)
+ pdata->init_platform_hw();
+
+ rc = gsl_ts_init_ts(client, ts);
+ if (rc < 0) {
+ dev_err(&client->dev, "GSLX680 init failed\n");
+ goto error_mutex_destroy;
+ }
+
+ init_chip(ts->client);
+ check_mem_data(ts->client);
+
+ rc= request_irq(client->irq, gsl_ts_irq, IRQF_TRIGGER_RISING, client->name, ts);
+ if (rc < 0) {
+ printk( "gsl_probe: request irq failed\n");
+ goto error_req_irq_fail;
+ }
+
+ //lizhengwei add
+ if(1)
+ {
+ u8 read_buf = 0;
+ int ret;
+ ret = gsl_ts_read( client, 0xf0, &read_buf, sizeof(read_buf) );
+ if (ret < 0)
+ {
+ pr_info("gslx680 I2C transfer error!\n");
+ goto error_req_irq_fail;
+ }
+ }
+
+
+
+#ifdef GSL_TIMER
+ printk( "gsl_ts_probe () : add gsl_timer\n");
+
+ init_timer(&ts->gsl_timer);
+ ts->gsl_timer.expires = jiffies + 3 * HZ; //¶¨Ê±3 ÃëÖÓ
+ ts->gsl_timer.function = &gsl_timer_handle;
+ ts->gsl_timer.data = (unsigned long)ts;
+ add_timer(&ts->gsl_timer);
+#endif
+
+ /* create debug attribute */
+ //rc = device_create_file(&ts->input->dev, &dev_attr_debug_enable);
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+ ts->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 1;
+ ts->early_suspend.suspend = gsl_ts_early_suspend;
+ ts->early_suspend.resume = gsl_ts_late_resume;
+ register_early_suspend(&ts->early_suspend);
+#endif
+
+ printk("[GSLX680] End %s\n", __func__);
+
+ return 0;
+
+//exit_set_irq_mode:
+error_req_irq_fail:
+ free_irq(ts->irq, ts);
+
+error_mutex_destroy:
+ input_free_device(ts->input);
+ kfree(ts);
+ return rc;
+}
+
+static int __devexit gsl_ts_remove(struct i2c_client *client)
+{
+ struct gsl_ts *ts = i2c_get_clientdata(client);
+ printk("==gsl_ts_remove=\n");
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+ unregister_early_suspend(&ts->early_suspend);
+#endif
+
+ device_init_wakeup(&client->dev, 0);
+ cancel_work_sync(&ts->work);
+ free_irq(ts->irq, ts);
+ destroy_workqueue(ts->wq);
+ input_unregister_device(ts->input);
+
+ //device_remove_file(&ts->input->dev, &dev_attr_debug_enable);
+
+ kfree(ts->touch_data);
+ kfree(ts);
+
+ return 0;
+}
+
+static const struct i2c_device_id gsl_ts_id[] = {
+ {GSLX680_I2C_NAME, 0},
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, gsl_ts_id);
+
+
+static struct i2c_driver gsl_ts_driver = {
+ .driver = {
+ .name = GSLX680_I2C_NAME,
+ .owner = THIS_MODULE,
+ },
+#ifndef CONFIG_HAS_EARLYSUSPEND
+ .suspend = gsl_ts_suspend,
+ .resume = gsl_ts_resume,
+#endif
+ .probe = gsl_ts_probe,
+ .remove = __devexit_p(gsl_ts_remove),
+ .id_table = gsl_ts_id,
+};
+
+static int __init gsl_ts_init(void)
+{
+ int ret;
+ printk("==gsl_ts_init==\n");
+ ret = i2c_add_driver(&gsl_ts_driver);
+ printk("ret=%d\n",ret);
+ return ret;
+}
+static void __exit gsl_ts_exit(void)
+{
+ printk("==gsl_ts_exit==\n");
+ i2c_del_driver(&gsl_ts_driver);
+ return;
+}
+
+module_init(gsl_ts_init);
+module_exit(gsl_ts_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("GSLX680 touchscreen controller driver");
+MODULE_AUTHOR("Guan Yuwei, guanyuwei@basewin.com");
+MODULE_ALIAS("platform:gsl_ts");
#include <linux/workqueue.h>
#include <linux/proc_fs.h>
#include <linux/input/mt.h>
-
#include "rockchip_gslX680_rk3168.h"
//#define GSL_DEBUG
#define FILTER_MAX 6
#endif
-#define I2C_SPEED 200*1000
+#define WRITE_I2C_SPEED 350*1000
+#define I2C_SPEED 200*1000
+
+//ÐÝÃßʱÊÇ·ñÐèÒª¹Ø±ÕTPµçÔ´
+//Ò쳣ʱÊÇ·ñÐèÒª¹Ø±ÕµçÔ´
+#define CLOSE_TP_POWER 1
+
+#if CLOSE_TP_POWER
+static void set_tp_power(bool flag);
+#endif
#ifdef HAVE_TOUCH_KEY
static u16 key = 0;
static int key_state_flag = 0;
+
+
struct key_data {
u16 key;
u16 x_min;
struct gsl_ts {
struct i2c_client *client;
struct input_dev *input;
- struct delayed_work work;
+ struct work_struct work;
struct workqueue_struct *wq;
struct gsl_ts_data *dd;
u8 *touch_data;
u8 device_id;
- u8 prev_touches;
- bool is_suspended;
- bool int_pending;
- struct mutex sus_lock;
// uint32_t gpio_irq;
int irq;
#if defined(CONFIG_HAS_EARLYSUSPEND)
#endif
static int gslX680_shutdown_low(void)
{
- gpio_direction_output(ts_global_reset_pin, 0);
+ gpio_direction_output(ts_global_reset_pin, GPIO_LOW);
gpio_set_value(ts_global_reset_pin,GPIO_LOW);
return 0;
}
static int gslX680_shutdown_high(void)
{
- gpio_direction_output(ts_global_reset_pin, 0);
+ gpio_direction_output(ts_global_reset_pin, GPIO_HIGH);
gpio_set_value(ts_global_reset_pin,GPIO_HIGH);
return 0;
}
+static int gslX680_shutdown_realse(void)
+{
+ gpio_direction_input(ts_global_reset_pin);
+ return 0;
+}
+
static inline u16 join_bytes(u8 a, u8 b)
{
u16 ab = 0;
xfer_msg[0].len = 1;
xfer_msg[0].flags = client->flags & I2C_M_TEN;
xfer_msg[0].buf = ®
-
+ xfer_msg[0].scl_rate = I2C_SPEED;
+
xfer_msg[1].addr = client->addr;
xfer_msg[1].len = num;
xfer_msg[1].flags |= I2C_M_RD;
xfer_msg[1].buf = buf;
-
+ xfer_msg[1].scl_rate = I2C_SPEED;
+
if (reg < 0x80) {
i2c_transfer(client->adapter, xfer_msg, ARRAY_SIZE(xfer_msg));
msleep(5);
xfer_msg[0].len = num + 1;
xfer_msg[0].flags = client->flags & I2C_M_TEN;
xfer_msg[0].buf = buf;
- xfer_msg[0].scl_rate = I2C_SPEED;
+ xfer_msg[0].scl_rate = WRITE_I2C_SPEED;
return i2c_transfer(client->adapter, xfer_msg, 1) == 1 ? 0 : -EFAULT;
}
bytelen += datalen;
}
- ret = i2c_master_send(client, tmp_buf, bytelen);
+ ret = i2c_master_normal_send(client, tmp_buf, bytelen,I2C_SPEED);
return ret;
}
return ret;
}
- return i2c_master_recv(client, pdata, datalen);
+ return i2c_master_normal_recv(client, pdata, datalen,I2C_SPEED);
}
static void startup_chip(struct i2c_client *client)
{
u8 tmp = 0x00;
+ u8 buf[4] = {0x00};
+ buf[3] = 0x01;
+ buf[2] = 0xfe;
+ buf[1] = 0x10;
+ buf[0] = 0x00;
+ gsl_ts_write(client, 0xf0, buf, sizeof(buf));
+ buf[3] = 0x00;
+ buf[2] = 0x00;
+ buf[1] = 0x00;
+ buf[0] = 0x0f;
+ gsl_ts_write(client, 0x04, buf, sizeof(buf));
+ msleep(20);
gsl_ts_write(client, 0xe0, &tmp, 1);
msleep(10);
}
static void reset_chip(struct i2c_client *client)
{
- u8 buf[4] = {0x00};
u8 tmp = 0x88;
+ u8 buf[4] = {0x00};
+
gsl_ts_write(client, 0xe0, &tmp, sizeof(tmp));
- msleep(10);
-
+ msleep(20);
tmp = 0x04;
gsl_ts_write(client, 0xe4, &tmp, sizeof(tmp));
msleep(10);
-
gsl_ts_write(client, 0xbc, buf, sizeof(buf));
msleep(10);
}
+static void clr_reg(struct i2c_client *client)
+{
+ u8 write_buf[4] = {0};
+
+ write_buf[0] = 0x88;
+ gsl_ts_write(client, 0xe0, &write_buf[0], 1);
+ msleep(20);
+ write_buf[0] = 0x01;
+ gsl_ts_write(client, 0x80, &write_buf[0], 1);
+ msleep(5);
+ write_buf[0] = 0x04;
+ gsl_ts_write(client, 0xe4, &write_buf[0], 1);
+ msleep(5);
+ write_buf[0] = 0x00;
+ gsl_ts_write(client, 0xe0, &write_buf[0], 1);
+ msleep(20);
+}
+
static void init_chip(struct i2c_client *client)
{
gslX680_shutdown_low();
- msleep(50);
+ msleep(20);
gslX680_shutdown_high();
- msleep(30);
+ msleep(20);
+ clr_reg(client);
reset_chip(client);
gsl_load_fw(client);
startup_chip(client);
static void check_mem_data(struct i2c_client *client)
{
- char write_buf;
- char read_buf[4] = {0};
-
- msleep(30);
- write_buf = 0x00;
- gsl_ts_write(client,0xf0, &write_buf, sizeof(write_buf));
- gsl_ts_read(client,0x00, read_buf, sizeof(read_buf));
- gsl_ts_read(client,0x00, read_buf, sizeof(read_buf));
- if (read_buf[3] != 0x1 || read_buf[2] != 0 || read_buf[1] != 0 || read_buf[0] != 0)
+ u8 read_buf[4] = {0};
+
+ msleep(50);
+ gsl_ts_read(client,0xb0, read_buf, sizeof(read_buf));
+ if (read_buf[3] != 0x5a || read_buf[2] != 0x5a || read_buf[1] != 0x5a || read_buf[0] != 0x5a)
{
- printk("!!!!!!!!!!!page: %x offset: %x val: %x %x %x %x\n",0x0, 0x0, read_buf[3], read_buf[2], read_buf[1], read_buf[0]);
- init_chip(client);
+ printk("#########check mem read 0xb0 = %x %x %x %x #########\n", read_buf[3], read_buf[2], read_buf[1], read_buf[0]);
+ #if CLOSE_TP_POWER
+ set_tp_power(false);
+ msleep(200);
+ set_tp_power(true);
+ msleep(100);
+ #endif
+ init_chip(client);
}
}
filter_step_x >>= 1;
filter_step_y >>= 1;
}
-
+ else if(x_err <= 4*FILTER_MAX && y_err <= 4*FILTER_MAX)
+ {
+ filter_step_x = filter_step_x*3/4;
+ filter_step_y = filter_step_y*3/4;
+ }
x_new = x > x_old[id] ? (x_old[id] + filter_step_x) : (x_old[id] - filter_step_x);
y_new = y > y_old[id] ? (y_old[id] + filter_step_y) : (y_old[id] - filter_step_y);
print_info("#####id=%d,x=%d,y=%d######\n",id,x,y);
- if(x>=SCREEN_MAX_X||y>=SCREEN_MAX_Y)
+ if(x > SCREEN_MAX_X || y > SCREEN_MAX_Y)
{
#ifdef HAVE_TOUCH_KEY
report_key(ts,x,y);
}
#endif
input_sync(ts->input);
- ts->prev_touches = touches;
}
struct gsl_ts *ts = container_of(work, struct gsl_ts,work);
print_info("---gsl_ts_xy_worker---\n");
-
/* read data from DATA_REG */
rc = gsl_ts_read(ts->client, 0x80, ts->touch_data, ts->dd->data_size);
print_info("---touches: %d ---\n",ts->touch_data[0]);
disable_irq_nosync(ts->irq);
-// if (!work_pending(&ts->work))
+ if (!work_pending(&ts->work))
{
- queue_delayed_work(ts->wq, &ts->work,msecs_to_jiffies(10));
+ queue_work(ts->wq, &ts->work);
}
return IRQ_HANDLED;
return -ENOMEM;
}
- ts->prev_touches = 0;
input_device = input_allocate_device();
if (!input_device) {
#ifdef HAVE_TOUCH_KEY
input_device->evbit[0] = BIT_MASK(EV_KEY);
- //input_device->evbit[0] = BIT_MASK(EV_SYN) | BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
for (i = 0; i < MAX_KEY_NUM; i++)
set_bit(key_array[i], input_device->keybit);
#endif
input_set_abs_params(input_device,ABS_MT_WIDTH_MAJOR, 0, 200, 0, 0);
client->irq = ts->irq; //IRQ_PORT,
- //ts->irq = client->irq;
ts->wq = create_singlethread_workqueue("kworkqueue_ts");
if (!ts->wq) {
}
flush_workqueue(ts->wq);
- INIT_DELAYED_WORK(&ts->work, gsl_ts_xy_worker);
-
+ INIT_WORK(&ts->work, gsl_ts_xy_worker);
+
rc = input_register_device(input_device);
if (rc)
goto error_unreg_device;
return rc;
}
+#if CLOSE_TP_POWER
+#include <linux/regulator/rk29-pwm-regulator.h>
+#include <linux/mfd/tps65910.h>
+static void set_tp_power(bool flag)
+{
+ struct regulator *ldo=NULL;
+ ldo = regulator_get(NULL, "vaux33");
+
+ if(ldo==NULL){
+ printk("set_tp_power ldo is null\n");
+ return;
+ }
+ if(flag){
+ regulator_set_voltage(ldo, 3300000, 3300000);
+ regulator_enable(ldo);
+ regulator_put(ldo);
+
+ }else{
+ regulator_disable(ldo);
+ regulator_put(ldo);
+ }
+}
+#endif
+
static int gsl_ts_suspend(struct device *dev)
{
struct gsl_ts *ts = dev_get_drvdata(dev);
- int rc = 0;
-
- printk("I'am in gsl_ts_suspend() start\n");
-
+ printk("I'am in gsl_ts_suspend() start\n");
+ flush_workqueue(ts->wq);
#ifdef GSL_TIMER
printk( "gsl_ts_suspend () : delete gsl_timer\n");
-
del_timer(&ts->gsl_timer);
#endif
- disable_irq_nosync(ts->irq);
-
+ disable_irq_nosync(ts->irq);
gslX680_shutdown_low();
-
return 0;
}
static int gsl_ts_resume(struct device *dev)
{
struct gsl_ts *ts = dev_get_drvdata(dev);
- int rc = 0;
-
- printk("I'am in gsl_ts_resume() start\n");
-
- gslX680_shutdown_low();
- msleep(50);
+ int i,rc = 0;
+ printk("I'am in gsl_ts_resume() start\n");
gslX680_shutdown_high();
- msleep(30);
- reset_chip(ts->client);
- startup_chip(ts->client);
+ msleep(20);
+ reset_chip(ts->client);
+ startup_chip(ts->client);
check_mem_data(ts->client);
-
+ //add
+ msleep(100);
+ reset_chip(ts->client);
+ startup_chip(ts->client);
+ msleep(100);
+ reset_chip(ts->client);
+ startup_chip(ts->client);
#ifdef GSL_TIMER
printk( "gsl_ts_resume () : add gsl_timer\n");
-
init_timer(&ts->gsl_timer);
ts->gsl_timer.expires = jiffies + 3 * HZ;
ts->gsl_timer.function = &gsl_timer_handle;
add_timer(&ts->gsl_timer);
#endif
+ for(i=1;i<=MAX_CONTACTS;i++){
+ if(0!= id_state_old_flag[i])
+ {
+ #ifdef REPORT_DATA_ANDROID_4_0
+ input_mt_slot(ts->input, i);
+ input_report_abs(ts->input, ABS_MT_TRACKING_ID, -1);
+ input_mt_report_slot_state(ts->input, MT_TOOL_FINGER, false);
+ input_sync(ts->input);
+ #endif
+ id_sign[i]=0;
+ }
+ id_state_old_flag[i] = id_state_flag[i]=0;
+ }
enable_irq(ts->irq);
-
return 0;
+
+
}
#ifdef CONFIG_HAS_EARLYSUSPEND
static void gsl_ts_early_suspend(struct early_suspend *h)
{
struct gsl_ts *ts = container_of(h, struct gsl_ts, early_suspend);
- printk("[GSL1680] Enter %s\n", __func__);
gsl_ts_suspend(&ts->client->dev);
}
static void gsl_ts_late_resume(struct early_suspend *h)
{
struct gsl_ts *ts = container_of(h, struct gsl_ts, early_suspend);
- printk("[GSL1680] Enter %s\n", __func__);
gsl_ts_resume(&ts->client->dev);
}
#endif
ts->client = client;
ts->device_id = id->driver_data;
- ts->is_suspended = false;
- ts->int_pending = false;
ts->reset_gpio = pdata->reset_gpio; //lizhengwei
ts->irq= gpio_to_irq(pdata->touch_en_gpio); //lizhengwei
- mutex_init(&ts->sus_lock);
-ts_global_reset_pin=ts->reset_gpio;
+ ts_global_reset_pin=ts->reset_gpio;
i2c_set_clientdata(client, ts);
dev_err(&client->dev, "GSLX680 init failed\n");
goto error_mutex_destroy;
}
-
+
+ init_chip(ts->client);
+ check_mem_data(ts->client);
+
rc= request_irq(client->irq, gsl_ts_irq, IRQF_TRIGGER_RISING, client->name, ts);
if (rc < 0) {
printk( "gsl_probe: request irq failed\n");
}
- //gslX680_chip_init();
- init_chip(ts->client);
- check_mem_data(ts->client);
-
#ifdef GSL_TIMER
printk( "gsl_ts_probe () : add gsl_timer\n");
free_irq(ts->irq, ts);
error_mutex_destroy:
- mutex_destroy(&ts->sus_lock);
input_free_device(ts->input);
kfree(ts);
return rc;
#endif
device_init_wakeup(&client->dev, 0);
- cancel_delayed_work_sync(&ts->work);
+ cancel_work_sync(&ts->work);
free_irq(ts->irq, ts);
destroy_workqueue(ts->wq);
input_unregister_device(ts->input);
- mutex_destroy(&ts->sus_lock);
//device_remove_file(&ts->input->dev, &dev_attr_debug_enable);
#ifndef _GSLX680_H_\r
#define _GSLX680_H_\r
\r
+#define GSL1680E_COMPATIBLE //GSL1680а汾оƬÐèÒª´ò¿ª´Ëºê£¬ÀÏ°æоƬÐèÒªÆÁ±Î´Ëºê\r
\r
#define SCREEN_MAX_X 1024\r
#define SCREEN_MAX_Y 600\r
\r
-#define GSL1680E_COMPATIBLE\r
struct fw_data\r
{\r
u32 offset : 8;\r
{0x10,0xd7c56634},\r
{0x14,0xe3505a2a},\r
{0x18,0x514d494f},\r
-{0x1c,0x84a36ccb},\r
+{0x1c,0x859e5316},\r
{0x20,0x00000000},\r
{0x24,0x00000000},\r
{0x28,0x00000000},\r
{0x44,0x80808080},\r
{0x48,0x80808080},\r
{0x4c,0x80808080},\r
-{0x50,0x000005dc},\r
+{0x50,0x00000000},\r
{0x54,0x00010203},\r
{0x58,0x04050506},\r
{0x5c,0x07080809},\r
{0x08,0x0000000a},\r
{0x0c,0x00000000},\r
{0x10,0x00000032},\r
-{0x14,0x00000032},\r
+{0x14,0x0000000a},\r
{0x18,0x00000000},\r
{0x1c,0x00000001},\r
{0x20,0x00002904},\r
{0x2c,0xf8010015},\r
{0x30,0xf8010015},\r
{0x34,0x00000003},\r
-{0x38,0x00000003},\r
+{0x38,0x00000000},\r
{0x3c,0x00000fff},\r
{0x40,0x80000000},\r
-{0x44,0x001c001c},\r
+{0x44,0x00180018},\r
{0x48,0x00000fff},\r
-{0x4c,0x00000004},\r
-{0x50,0x00020001},\r
+{0x4c,0x00000003},\r
+{0x50,0x00030002},\r
{0x54,0x00000000},\r
{0x58,0x00001000},\r
{0x5c,0x12492488},\r
{0x60,0x00000000},\r
-{0x64,0x00000000},\r
-{0x68,0x00000000},\r
-{0x6c,0x00000000},\r
-{0x70,0x00000000},\r
+{0x64,0x000007d0},\r
+{0x68,0x000007d0},\r
+{0x6c,0x000007d0},\r
+{0x70,0x000007d0},\r
{0x74,0x0000014f},\r
-{0x78,0x00000032},\r
+{0x78,0x0000003c},\r
{0x7c,0x00000000},\r
{0xf0,0x7},\r
{0x00,0x04010700},\r
{0x28,0xff080120},\r
{0x2c,0xff080140},\r
{0x30,0xff080160},\r
-{0x34,0x000000c8},\r
-{0x38,0x000000ad},\r
-{0x3c,0x00000092},\r
-{0x40,0x00000000},\r
+{0x34,0x000000e1},\r
+{0x38,0x000000c3},\r
+{0x3c,0x000000a5},\r
+{0x40,0x00000011},\r
{0x44,0x00000100},\r
{0x48,0x00000000},\r
{0x4c,0x00000000},\r
{0x04,0x00070011},\r
{0x08,0xff080090},\r
{0x0c,0x00040000},\r
-{0x10,0xfffffff0},\r
-{0x14,0x00000000},\r
+{0x10,0xff080004},\r
+{0x14,0x0000000f},\r
{0x18,0xfffffff0},\r
{0x1c,0x00000000},\r
{0x20,0xfffffff0},\r
{0x50,0x00500050},\r
{0x54,0x012c0050},\r
{0x58,0x012c012c},\r
-{0x5c,0x0028012c},\r
+{0x5c,0x002d012c},\r
{0x60,0x00640000},\r
{0x64,0x00640064},\r
{0x68,0x00000032},\r
};\r
#endif\r
static const struct fw_data GSLX680_FW[] = {\r
-};\r
-\r
+{0xf0,0x97},\r
+{0x00,0x00000000},\r
+{0x04,0x00000000},\r
+{0x08,0x00000000},\r
+{0x0c,0x00000000},\r
+{0x10,0x00000000},\r
+{0x14,0x00000000},\r
+{0x18,0x00000000},\r
+{0x1c,0x00000000},\r
+{0x20,0x0f0f0f0f},\r
+{0x24,0x00000000},\r
+{0x28,0x00000000},\r
+{0x2c,0x00000000},\r
+{0x30,0x00010203},\r
+{0x34,0x04050607},\r
+{0x38,0x08090a0b},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000000},\r
+{0x44,0x00000000},\r
+{0x48,0x00000000},\r
+{0x4c,0x00000000},\r
+{0x50,0x00000000},\r
+{0x54,0x00000000},\r
+{0x58,0x00000000},\r
+{0x5c,0x00000000},\r
+{0x60,0x00000000},\r
+{0x64,0x00000000},\r
+{0x68,0x00000000},\r
+{0x6c,0x00000000},\r
+{0x70,0x00000000},\r
+{0x74,0x00000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000001},\r
+{0xf0,0x94},\r
+{0x00,0x01030608},\r
+{0x04,0x080a0c0d},\r
+{0x08,0x0e101112},\r
+{0x0c,0x13131416},\r
+{0x10,0x16171718},\r
+{0x14,0x19191a1b},\r
+{0x18,0x1b1d1d1e},\r
+{0x1c,0x1e1f1f1f},\r
+{0x20,0x00000001},\r
+{0x24,0x00000000},\r
+{0x28,0x00000000},\r
+{0x2c,0x00000000},\r
+{0x30,0x00000000},\r
+{0x34,0x00000000},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000000},\r
+{0x44,0x00000000},\r
+{0x48,0x00000000},\r
+{0x4c,0x00000000},\r
+{0x50,0x00000000},\r
+{0x54,0x00000000},\r
+{0x58,0x00000000},\r
+{0x5c,0x00000000},\r
+{0x60,0x00000000},\r
+{0x64,0x00000000},\r
+{0x68,0x00000000},\r
+{0x6c,0x00000000},\r
+{0x70,0x00000000},\r
+{0x74,0x00000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000001},\r
+{0xf0,0x9d},\r
+{0x00,0x00000000},\r
+{0x04,0x00000005},\r
+{0x08,0x00000080},\r
+{0x0c,0x00000fff},\r
+{0x10,0x00000000},\r
+{0x14,0x00040008},\r
+{0x18,0x00000000},\r
+{0x1c,0x000000b3},\r
+{0x20,0x00000000},\r
+{0x24,0x00000003},\r
+{0x28,0x00000000},\r
+{0x2c,0x0000000e},\r
+{0x30,0x0000000a},\r
+{0x34,0x00000000},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000207},\r
+{0x44,0x00000227},\r
+{0x48,0x00000247},\r
+{0x4c,0x00000267},\r
+{0x50,0x00000287},\r
+{0x54,0x000002a7},\r
+{0x58,0x000002c7},\r
+{0x5c,0x000002e7},\r
+{0x60,0x000000f0},\r
+{0x64,0x000000f1},\r
+{0x68,0x000000f2},\r
+{0x6c,0x000000f3},\r
+{0x70,0x000000f4},\r
+{0x74,0x000000f5},\r
+{0x78,0x000000f6},\r
+{0x7c,0x000010f7},\r
+{0xf0,0x9e},\r
+{0x00,0x00000000},\r
+{0x04,0x00000000},\r
+{0x08,0x387fe4e8},\r
+{0x0c,0x00000000},\r
+{0x10,0x00000001},\r
+{0x14,0x00000000},\r
+{0x18,0x00000010},\r
+{0x1c,0x00000000},\r
+{0x20,0x00000100},\r
+{0x24,0x00000001},\r
+{0x28,0x1f000000},\r
+{0x2c,0x000f000c},\r
+{0x30,0x00080000},\r
+{0x34,0x1fff0000},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000fff},\r
+{0x44,0x00000000},\r
+{0x48,0x00000000},\r
+{0x4c,0x0000000a},\r
+{0x50,0x00000000},\r
+{0x54,0x00002904},\r
+{0x58,0x00000001},\r
+{0x5c,0x00000003},\r
+{0x60,0x00000014},\r
+{0x64,0x00000014},\r
+{0x68,0x000a9876},\r
+{0x6c,0x0054321b},\r
+{0x70,0x00000001},\r
+{0x74,0x80000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000000},\r
+{0xf0,0x9f},\r
+{0x00,0x00000000},\r
+{0x04,0x00000040},\r
+{0x08,0x00000fff},\r
+{0x0c,0x00000000},\r
+{0x10,0x00000000},\r
+{0x14,0x00000000},\r
+{0x18,0x000000c8},\r
+{0x1c,0x00000220},\r
+{0x20,0x00000000},\r
+{0x24,0x0fff0fff},\r
+{0x28,0xf8010025},\r
+{0x2c,0x00000000},\r
+{0x30,0x00180018},\r
+{0x34,0x0000000f},\r
+{0x38,0x00000000},\r
+{0x3c,0x00000000},\r
+{0x40,0x00000000},\r
+{0x44,0x00000300},\r
+{0x48,0x00000400},\r
+{0x4c,0x00000fff},\r
+{0x50,0x00293fff},\r
+{0x54,0x003fffff},\r
+{0x58,0x00000001},\r
+{0x5c,0x00000400},\r
+{0x60,0x00000258},\r
+{0x64,0x00000010},\r
+{0x68,0x00000100},\r
+{0x6c,0x00000000},\r
+{0x70,0x00000000},\r
+{0x74,0x00000000},\r
+{0x78,0x00000000},\r
+{0x7c,0x00000005},\r
+{0xf0,0x96},\r
+{0x00,0xff050010},\r
+{0x04,0x0001ffff},\r
+{0x08,0xff050014},\r
+{0x0c,0x1fff0000},\r
+{0x10,0xff080068},\r
+{0x14,0x00010000},\r
+{0x18,0xff090008},\r
+{0x1c,0x00540213},\r
+{0x20,0xff080004},\r
+{0x24,0x0000000b},\r
+{0x28,0xff08004c},\r
+{0x2c,0x00327fe4},\r
+{0x30,0xff080084},\r
+{0x34,0x014f0000},\r
+{0x38,0xff080088},\r
+{0x3c,0x014f0000},\r
+{0x40,0xff08008c},\r
+{0x44,0x01500151},\r
+{0x48,0xff080090},\r
+{0x4c,0x00060000},\r
+{0x50,0xff080094},\r
+{0x54,0x000a0022},\r
+{0x58,0xff080064},\r
+{0x5c,0x01004102},\r
+{0x60,0xff080060},\r
+{0x64,0x00000000},\r
+{0x68,0xff070104},\r
+{0x6c,0x000a0040},\r
+{0x70,0xff000030},\r
+{0x74,0x00000003},\r
+{0x78,0xfffffff0},\r
+{0x7c,0x00000000},\r
+//main\r
+{0xf0,0x0},\r
+{0x00,0x01000000},\r
+{0x04,0x01000000},\r
+{0x08,0x233fc0c0},\r
+{0x0c,0xa2146004},\r
+{0x10,0xa4102000},\r
+{0x14,0xe4244000},\r
+{0x18,0x233fc0c0},\r
+{0x1c,0xa2146010},\r
+{0x20,0x2500003f},\r
+{0x24,0xa414a3ff},\r
+{0x28,0xe4244000},\r
+{0x2c,0x01000000},\r
+{0x30,0x821020e0},\r
+{0x34,0x81880001},\r
+{0x38,0x01000000},\r
+{0x3c,0x81d82000},\r
+{0x40,0x25000180},\r
+{0x44,0xa414a00f},\r
+{0x48,0xe4a00040},\r
+{0x4c,0x01000000},\r
+{0x50,0x82100000},\r
+{0x54,0x81900001},\r
+{0x58,0x82100000},\r
+{0x5c,0x81980001},\r
+{0x60,0x81800000},\r
+{0x64,0x01000000},\r
+{0x68,0x3d000017},\r
+{0x6c,0xbc17a3f8},\r
+{0x70,0x1d000017},\r
+{0x74,0x9c13a378},\r
+{0x78,0x81d82000},\r
+{0x7c,0x400000bf},\r
+{0xf0,0x1},\r
+{0x00,0x01000000},\r
+{0x04,0x13000011},\r
+{0x08,0x9a102000},\r
+{0x0c,0x96126314},\r
+{0x10,0x19000004},\r
+{0x14,0x832b6002},\r
+{0x18,0x9a036001},\r
+{0x1c,0x80a36031},\r
+{0x20,0x04bffffd},\r
+{0x24,0xd820400b},\r
+{0x28,0x03000013},\r
+{0x2c,0x82106358},\r
+{0x30,0xc2004000},\r
+{0x34,0x9a1263ec},\r
+{0x38,0xc2234000},\r
+{0x3c,0x981263dc},\r
+{0x40,0xc2230000},\r
+{0x44,0x961263e0},\r
+{0x48,0x941263e4},\r
+{0x4c,0xc222c000},\r
+{0x50,0x921263e8},\r
+{0x54,0xc2228000},\r
+{0x58,0x81c3e008},\r
+{0x5c,0xc2224000},\r
+{0x60,0x9de3bf98},\r
+{0x64,0x03000012},\r
+{0x68,0x94106304},\r
+{0x6c,0x96102000},\r
+{0x70,0x82106300},\r
+{0x74,0xda02c001},\r
+{0x78,0xd802c00a},\r
+{0x7c,0x80a37ff0},\r
+{0xf0,0x2},\r
+{0x00,0x02800004},\r
+{0x04,0x9602e008},\r
+{0x08,0x10bffffb},\r
+{0x0c,0xd8234000},\r
+{0x10,0x21000013},\r
+{0x14,0x82142350},\r
+{0x18,0xda004000},\r
+{0x1c,0x033fc000},\r
+{0x20,0x82106020},\r
+{0x24,0xda204000},\r
+{0x28,0x981423f0},\r
+{0x2c,0xc0230000},\r
+{0x30,0x9614231c},\r
+{0x34,0x941423bc},\r
+{0x38,0xc022c000},\r
+{0x3c,0x921423c0},\r
+{0x40,0xc0228000},\r
+{0x44,0x7fffffd0},\r
+{0x48,0xc0224000},\r
+{0x4c,0x9a142374},\r
+{0x50,0xd8034000},\r
+{0x54,0x941423a8},\r
+{0x58,0x033fc1c0},\r
+{0x5c,0x9a106140},\r
+{0x60,0xa0142318},\r
+{0x64,0xd6040000},\r
+{0x68,0xd4028000},\r
+{0x6c,0x82106064},\r
+{0x70,0xd8204000},\r
+{0x74,0x033fc200},\r
+{0x78,0xd6234000},\r
+{0x7c,0x82106074},\r
+{0xf0,0x3},\r
+{0x00,0xd4204000},\r
+{0x04,0x81c7e008},\r
+{0x08,0x81e80000},\r
+{0x0c,0x03000013},\r
+{0x10,0x9a1063f4},\r
+{0x14,0x941062c0},\r
+{0x18,0x033fc200},\r
+{0x1c,0xc0234000},\r
+{0x20,0x961060a0},\r
+{0x24,0x98102000},\r
+{0x28,0x9b2b2002},\r
+{0x2c,0x98032001},\r
+{0x30,0xc203400a},\r
+{0x34,0x80a3200f},\r
+{0x38,0x08bffffc},\r
+{0x3c,0xc223400b},\r
+{0x40,0x033fc140},\r
+{0x44,0x9210608c},\r
+{0x48,0x96106080},\r
+{0x4c,0x94106084},\r
+{0x50,0x1b000010},\r
+{0x54,0x82106088},\r
+{0x58,0xda204000},\r
+{0x5c,0x98136180},\r
+{0x60,0xd8224000},\r
+{0x64,0xda22c000},\r
+{0x68,0x81c3e008},\r
+{0x6c,0xd8228000},\r
+{0x70,0x01000000},\r
+{0x74,0xa6103fff},\r
+{0x78,0x293fc0c0},\r
+{0x7c,0xa8152004},\r
+{0xf0,0x4},\r
+{0x00,0xe6250000},\r
+{0x04,0xa7800000},\r
+{0x08,0x01000000},\r
+{0x0c,0x81c3e008},\r
+{0x10,0x01000000},\r
+{0x14,0x0300000b},\r
+{0x18,0x82106220},\r
+{0x1c,0x82087f80},\r
+{0x20,0x96102000},\r
+{0x24,0x80a2c001},\r
+{0x28,0x1a800008},\r
+{0x2c,0x9a102000},\r
+{0x30,0x98100001},\r
+{0x34,0xc2034000},\r
+{0x38,0x9a036004},\r
+{0x3c,0x80a3400c},\r
+{0x40,0x0abffffd},\r
+{0x44,0x9602c001},\r
+{0x48,0x0300000c},\r
+{0x4c,0x8210619f},\r
+{0x50,0x9a087c00},\r
+{0x54,0x0300000d},\r
+{0x58,0x8210603c},\r
+{0x5c,0x82087f80},\r
+{0x60,0x80a34001},\r
+{0x64,0x1a800007},\r
+{0x68,0x98100001},\r
+{0x6c,0xc2034000},\r
+{0x70,0x9a036004},\r
+{0x74,0x80a3400c},\r
+{0x78,0x0abffffd},\r
+{0x7c,0x9602c001},\r
+{0xf0,0x5},\r
+{0x00,0x0300000d},\r
+{0x04,0x821063bb},\r
+{0x08,0x9a087c00},\r
+{0x0c,0x0300000e},\r
+{0x10,0x82106090},\r
+{0x14,0x82087f80},\r
+{0x18,0x80a34001},\r
+{0x1c,0x1a800007},\r
+{0x20,0x98100001},\r
+{0x24,0xc2034000},\r
+{0x28,0x9a036004},\r
+{0x2c,0x80a3400c},\r
+{0x30,0x0abffffd},\r
+{0x34,0x9602c001},\r
+{0x38,0x03000013},\r
+{0x3c,0x981063ff},\r
+{0x40,0x9a106280},\r
+{0x44,0xc2034000},\r
+{0x48,0x9a036004},\r
+{0x4c,0x80a3400c},\r
+{0x50,0x08bffffd},\r
+{0x54,0x9602c001},\r
+{0x58,0x03000012},\r
+{0x5c,0x981063ff},\r
+{0x60,0x9a106300},\r
+{0x64,0xc2034000},\r
+{0x68,0x9a036004},\r
+{0x6c,0x80a3400c},\r
+{0x70,0x08bffffd},\r
+{0x74,0x9602c001},\r
+{0x78,0x033fc180},\r
+{0x7c,0x82106030},\r
+{0xf0,0x6},\r
+{0x00,0x81c3e008},\r
+{0x04,0xd6204000},\r
+{0x08,0x9de3bf98},\r
+{0x0c,0x03000013},\r
+{0x10,0xba1063f4},\r
+{0x14,0xc0274000},\r
+{0x18,0xb81063f0},\r
+{0x1c,0xc0270000},\r
+{0x20,0xb6106280},\r
+{0x24,0xc026c000},\r
+{0x28,0xb41062bc},\r
+{0x2c,0xc0268000},\r
+{0x30,0xb210631c},\r
+{0x34,0xc0264000},\r
+{0x38,0xb0106344},\r
+{0x3c,0xc0260000},\r
+{0x40,0x9e106394},\r
+{0x44,0xc023c000},\r
+{0x48,0x9a1063bc},\r
+{0x4c,0xc0234000},\r
+{0x50,0x981063c0},\r
+{0x54,0xc0230000},\r
+{0x58,0x94106304},\r
+{0x5c,0x961063b8},\r
+{0x60,0xc022c000},\r
+{0x64,0x82106300},\r
+{0x68,0xc0204000},\r
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+{0x34,0xfffffefb},\r
+{0x38,0xffffff31},\r
+{0x3c,0xffffff90},\r
+{0x40,0x00000873},\r
+{0x44,0x00000915},\r
+{0x48,0x00000002},\r
+{0x4c,0xffffff04},\r
+{0x50,0xffffff28},\r
+{0x54,0xffffffa5},\r
+{0x58,0x00000895},\r
+{0x5c,0x000008f6},\r
+{0x60,0xffffffea},\r
+{0x64,0xffffff0d},\r
+{0x68,0xffffff1f},\r
+{0x6c,0xffffffbb},\r
+{0x70,0x000008b6},\r
+{0x74,0x000008d6},\r
+{0x78,0xffffffd2},\r
+{0x7c,0xffffff16},\r
+};\r
#endif\r
config LCD_E242868_1024X600
bool "RK3168 86v RGB 1024*600 "
-
+config LCD_E242868_RK616_1024X600
+ bool "RK3168 RK616 86v RGB 1024*600 "
config LCD_WY_800X480
bool "lcd for 760"
config LCD_HH070D_LVDS
bool "lcd lvds for 760"
+config LCD_RK3028_86V
+ bool "RGB 1024*600 for RK3028 86V"
config LCD_LD089WU1_MIPI
bool "mipi dsi lcd LD089WU1 1920X1200"
endchoice
obj-$(CONFIG_LCD_DS1006H) += lcd_ds1006h.o
obj-$(CONFIG_LCD_B101UANO_1920x1200) += lcd_b101uano_1920x1200.o
obj-$(CONFIG_LCD_E242868_1024X600) += lcd_E242868_rk3168_86v.o
+obj-$(CONFIG_LCD_E242868_RK616_1024X600) += lcd_E242868_rk3168_rk616_86v.o
obj-$(CONFIG_LCD_WY_800X480) += lcd_wy_800x480.o
obj-$(CONFIG_LCD_HH070D_LVDS) += lcd_hh070d_lvds.o
+obj-$(CONFIG_LCD_RK3028_86V) += lcd_E242868_rk3028_86v.o
obj-$(CONFIG_LCD_MQ0801D) += lcd_mq0801d.o
obj-$(CONFIG_LCD_LD089WU1_MIPI) += lcd_LD089WU1_mipi.o
--- /dev/null
+#ifndef __LCD_E242868_RK3028__
+#define __LCD_E242868_RK3028__
+/* Base */
+#define SCREEN_TYPE SCREEN_RGB
+#define LVDS_FORMAT LVDS_8BIT_1
+#define OUT_FACE OUT_P666
+#define DCLK 50000000
+#define LCDC_ACLK 500000000 //29 lcdc axi DMA ƵÂÊ
+
+/* Timing */
+#define H_PW 30
+#define H_BP 10
+#define H_VD 1024
+#define H_FP 210
+
+#define V_PW 13
+#define V_BP 10
+#define V_VD 600
+#define V_FP 22
+
+#define LCD_WIDTH 154
+#define LCD_HEIGHT 85
+
+/* Other */
+#define DCLK_POL 0
+#define DEN_POL 0
+#define VSYNC_POL 0
+#define HSYNC_POL 0
+
+#define SWAP_RB 0
+int dsp_lut[256] ={
+ 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707,
+ 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f,
+ 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717,
+ 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f,
+ 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727,
+ 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f,
+ 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737,
+ 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f,
+ 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747,
+ 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f,
+ 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757,
+ 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f,
+ 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767,
+ 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f,
+ 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777,
+ 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f,
+ 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787,
+ 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f,
+ 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797,
+ 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f,
+ 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7,
+ 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf,
+ 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7,
+ 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf,
+ 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7,
+ 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf,
+ 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7,
+ 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf,
+ 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7,
+ 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef,
+ 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7,
+ 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff,
+};
+#define SWAP_RG 0
+#define SWAP_GB 0
+
+#endif
#define HSYNC_POL 0
#define SWAP_RB 0
+int dsp_lut[256] ={
+ 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707,
+ 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f,
+ 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717,
+ 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f,
+ 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727,
+ 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f,
+ 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737,
+ 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f,
+ 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747,
+ 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f,
+ 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757,
+ 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f,
+ 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767,
+ 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f,
+ 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777,
+ 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f,
+ 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787,
+ 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f,
+ 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797,
+ 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f,
+ 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7,
+ 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf,
+ 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7,
+ 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf,
+ 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7,
+ 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf,
+ 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7,
+ 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf,
+ 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7,
+ 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef,
+ 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7,
+ 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff,
+};
#define SWAP_RG 0
#define SWAP_GB 0
--- /dev/null
+
+#ifndef __E242868_RK616__
+#define __E242868_RK616__
+
+#ifdef CONFIG_RK610_LVDS
+#include "../transmitter/rk610_lcd.h"
+#endif
+
+
+/* Base */
+#define SCREEN_TYPE SCREEN_RGB
+#define LVDS_FORMAT LVDS_8BIT_2
+#define OUT_FACE OUT_P888
+#define DCLK 50000000
+#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ
+
+/* Timing */
+#define H_PW 30
+#define H_BP 10
+#define H_VD 1024
+#define H_FP 210
+
+#define V_PW 13
+#define V_BP 10
+#define V_VD 600
+#define V_FP 22
+
+#define LCD_WIDTH 154
+#define LCD_HEIGHT 85
+#define DCLK_POL 1
+
+#define DEN_POL 0
+#define VSYNC_POL 0
+#define HSYNC_POL 0
+
+#define SWAP_RB 0
+#define SWAP_RG 0
+#define SWAP_GB 0
+
+int dsp_lut[256] ={
+ 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707,
+ 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f,
+ 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717,
+ 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f,
+ 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727,
+ 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f,
+ 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737,
+ 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f,
+ 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747,
+ 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f,
+ 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757,
+ 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f,
+ 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767,
+ 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f,
+ 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777,
+ 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f,
+ 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787,
+ 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f,
+ 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797,
+ 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f,
+ 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7,
+ 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf,
+ 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7,
+ 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf,
+ 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7,
+ 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf,
+ 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7,
+ 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf,
+ 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7,
+ 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef,
+ 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7,
+ 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff,
+};
+
+#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& ( defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS))
+
+/* scaler Timing */
+//1920*1080*60
+
+#define S_OUT_CLK SCALE_RATE(148500000,50625000)
+#define S_H_PW 10
+#define S_H_BP 10
+#define S_H_VD 1024
+#define S_H_FP 306
+
+#define S_V_PW 10
+#define S_V_BP 10
+#define S_V_VD 600
+#define S_V_FP 5
+
+#define S_H_ST 0
+#define S_V_ST 5
+
+#define S_PLL_CFG_VAL 0x01443013//0x01842016
+#define S_FRAC 0x4d9380//0xc16c2d
+#define S_SCL_VST 0x00b//0x25
+#define S_SCL_HST 0x000//0x4ba
+#define S_VIF_VST 0x1//0x1
+#define S_VIF_HST 0xca//0xca
+
+//1920*1080*50
+#define S1_OUT_CLK SCALE_RATE(148500000,45375000)
+#define S1_H_PW 10
+#define S1_H_BP 10
+#define S1_H_VD 1024
+#define S1_H_FP 408
+
+#define S1_V_PW 10
+#define S1_V_BP 10
+#define S1_V_VD 600
+#define S1_V_FP 5
+
+#define S1_H_ST 0
+#define S1_V_ST 5
+
+#define S1_PLL_CFG_VAL 0x01843013//0x01c42016
+#define S1_FRAC 0x4d9365//0x1f9ad4
+#define S1_SCL_VST 0x00a//0x25
+#define S1_SCL_HST 0xa4f//0x5ab
+#define S1_VIF_VST 0x1//0x1
+#define S1_VIF_HST 0xca//0xca
+
+
+//1280*720*60
+#define S2_OUT_CLK SCALE_RATE(74250000,50625000)
+#define S2_H_PW 10
+#define S2_H_BP 10
+#define S2_H_VD 1024
+#define S2_H_FP 306
+
+#define S2_V_PW 10
+#define S2_V_BP 10
+#define S2_V_VD 600
+#define S2_V_FP 5
+
+#define S2_H_ST 0
+#define S2_V_ST 3
+
+
+//bellow are for jettaB
+#define S2_PLL_CFG_VAL 0x01423013//0x01822016
+#define S2_FRAC 0x4d9380//0xc16c2d
+#define S2_SCL_VST 0x008//0x19
+#define S2_SCL_HST 0x000//0x483
+#define S2_VIF_VST 0x1//0x1
+#define S2_VIF_HST 0xcf//0xcf
+
+
+//1280*720*50
+
+#define S3_OUT_CLK SCALE_RATE(74250000,44343750)
+#define S3_H_PW 10
+#define S3_H_BP 10
+#define S3_H_VD 1024
+#define S3_H_FP 375
+
+#define S3_V_PW 10
+#define S3_V_BP 10
+#define S3_V_VD 600
+#define S3_V_FP 3
+
+#define S3_H_ST 0
+#define S3_V_ST 3
+
+#define S3_PLL_CFG_VAL 0x01823013//0x01c22016
+#define S3_FRAC 0x4d9365//0x1f9ad4
+#define S3_SCL_VST 0x007//0x19
+#define S3_SCL_HST 0x7bb//0x569
+#define S3_VIF_VST 0x1//0x1
+#define S3_VIF_HST 0xcf//0xcf
+
+
+//720*576*50
+#define S4_OUT_CLK SCALE_RATE(27000000,46875000)
+#define S4_H_PW 10
+#define S4_H_BP 10
+#define S4_H_VD 1024
+#define S4_H_FP 396
+
+#define S4_V_PW 10
+#define S4_V_BP 10
+#define S4_V_VD 600
+#define S4_V_FP 31
+
+#define S4_H_ST 0
+#define S4_V_ST 28
+
+#define S4_PLL_CFG_VAL 0x01c12015//0x01412016
+#define S4_FRAC 0x80f04c//0xa23d09
+#define S4_SCL_VST 0x01f//0x2d
+#define S4_SCL_HST 0x2b3//0x33d
+#define S4_VIF_VST 0x1//0x1
+#define S4_VIF_HST 0xc1//0xc1
+
+
+//720*480*60
+#define S5_OUT_CLK SCALE_RATE(27000000,56250000) //m=100 n=9 no=4
+#define S5_H_PW 10
+#define S5_H_BP 10
+#define S5_H_VD 1024
+#define S5_H_FP 386
+
+#define S5_V_PW 10
+#define S5_V_BP 10
+#define S5_V_VD 600
+#define S5_V_FP 35
+
+#define S5_H_ST 0
+#define S5_V_ST 22
+
+#define S5_PLL_CFG_VAL 0x01812016//0x01c11013
+#define S5_FRAC 0x45d17b//0x25325e
+#define S5_SCL_VST 0x01a//0x26
+#define S5_SCL_HST 0x359//0x2ae
+#define S5_VIF_VST 0x1//0x1
+#define S5_VIF_HST 0xc1//0xc1
+
+
+#define S_DCLK_POL 1
+
+#endif
+
+#endif
projects / firefly-linux-kernel-4.4.55.git / commitdiff