This isn't compatible with the new binding and should be
handled via a proper regulator. It shouldn't be needed as
the driver has always ignored this property.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
pinctrl_pcie: pciegrp {
fsl,pins = <
- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
>;
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
- power-on-gpio = <&gpio3 19 0>;
reset-gpio = <&gpio7 12 0>;
status = "okay";
};