// Specific F2 classes: SparcV8 manual, page 44
//
-class F2_1<bits<3> op2Val, string name> : F2 {
+class F2_1<bits<3> op2Val, dag ops, string asmstr> : F2 {
bits<5> rd;
+ dag OperandList = ops;
+ let AsmString = asmstr;
+
let op2 = op2Val;
- let Name = name;
let Inst{29-25} = rd;
}
"std $src, [$base+$offset]">;
// Section B.9 - SETHI Instruction, p. 104
-def SETHIi: F2_1<0b100, "sethi">;
+def SETHIi: F2_1<0b100,
+ (ops IntRegs:$dst, i32imm:$src),
+ "sethi $src, $dst">;
// Section B.10 - NOP Instruction, p. 105
// (It's a special case of SETHI)
let rd = 0, imm22 = 0 in
- def NOP : F2_1<0b100, "nop">;
+ def NOP : F2_1<0b100, (ops), "nop">;
// Section B.11 - Logical Instructions, p. 106
def ANDrr : F3_1<2, 0b000001,
// Specific F2 classes: SparcV8 manual, page 44
//
-class F2_1<bits<3> op2Val, string name> : F2 {
+class F2_1<bits<3> op2Val, dag ops, string asmstr> : F2 {
bits<5> rd;
+ dag OperandList = ops;
+ let AsmString = asmstr;
+
let op2 = op2Val;
- let Name = name;
let Inst{29-25} = rd;
}
"std $src, [$base+$offset]">;
// Section B.9 - SETHI Instruction, p. 104
-def SETHIi: F2_1<0b100, "sethi">;
+def SETHIi: F2_1<0b100,
+ (ops IntRegs:$dst, i32imm:$src),
+ "sethi $src, $dst">;
// Section B.10 - NOP Instruction, p. 105
// (It's a special case of SETHI)
let rd = 0, imm22 = 0 in
- def NOP : F2_1<0b100, "nop">;
+ def NOP : F2_1<0b100, (ops), "nop">;
// Section B.11 - Logical Instructions, p. 106
def ANDrr : F3_1<2, 0b000001,