x86: Simplify code by removing a !SMP #ifdefs from 'struct cpuinfo_x86'
authorKevin Winchester <kjwinchester@gmail.com>
Wed, 21 Dec 2011 00:52:22 +0000 (20:52 -0400)
committerIngo Molnar <mingo@elte.hu>
Wed, 21 Dec 2011 08:25:09 +0000 (09:25 +0100)
Several fields in struct cpuinfo_x86 were not defined for the
!SMP case, likely to save space.  However, those fields still
have some meaning for UP, and keeping them allows some #ifdef
removal from other files.  The additional size of the UP kernel
from this change is not significant enough to worry about
keeping up the distinction:

   text    data     bss     dec     hex filename
4737168  506459  972040 6215667  5ed7f3 vmlinux.o.before
4737444  506459  972040 6215943  5ed907 vmlinux.o.after

for a difference of 276 bytes for an example UP config.

If someone wants those 276 bytes back badly then it should
be implemented in a cleaner way.

Signed-off-by: Kevin Winchester <kjwinchester@gmail.com>
Cc: Steffen Persvold <sp@numascale.com>
Link: http://lkml.kernel.org/r/1324428742-12498-1-git-send-email-kjwinchester@gmail.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/include/asm/processor.h
arch/x86/kernel/amd_nb.c
arch/x86/kernel/cpu/amd.c
arch/x86/kernel/cpu/common.c
arch/x86/kernel/cpu/intel.c
arch/x86/kernel/cpu/mcheck/mce.c
arch/x86/kernel/cpu/mcheck/mce_amd.c
arch/x86/kernel/cpu/proc.c
drivers/edac/sb_edac.c
drivers/hwmon/coretemp.c

index b650435ffb538d97df113a7b662975e88a60c375..aa9088c26931ae349c0bc6fbfece5fe0b10edfb9 100644 (file)
@@ -99,7 +99,6 @@ struct cpuinfo_x86 {
        u16                     apicid;
        u16                     initial_apicid;
        u16                     x86_clflush_size;
-#ifdef CONFIG_SMP
        /* number of cores as seen by the OS: */
        u16                     booted_cores;
        /* Physical processor id: */
@@ -110,7 +109,6 @@ struct cpuinfo_x86 {
        u8                      compute_unit_id;
        /* Index into per_cpu list: */
        u16                     cpu_index;
-#endif
        u32                     microcode;
 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
 
index 4c39baa8facc25529c7018e53b38de43eab823d9..013c1810ce72938c3bbe18a57f22664d1732f27b 100644 (file)
@@ -123,16 +123,14 @@ int amd_get_subcaches(int cpu)
 {
        struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
        unsigned int mask;
-       int cuid = 0;
+       int cuid;
 
        if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
                return 0;
 
        pci_read_config_dword(link, 0x1d4, &mask);
 
-#ifdef CONFIG_SMP
        cuid = cpu_data(cpu).compute_unit_id;
-#endif
        return (mask >> (4 * cuid)) & 0xf;
 }
 
@@ -141,7 +139,7 @@ int amd_set_subcaches(int cpu, int mask)
        static unsigned int reset, ban;
        struct amd_northbridge *nb = node_to_amd_nb(amd_get_nb_id(cpu));
        unsigned int reg;
-       int cuid = 0;
+       int cuid;
 
        if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING) || mask > 0xf)
                return -EINVAL;
@@ -159,9 +157,7 @@ int amd_set_subcaches(int cpu, int mask)
                pci_write_config_dword(nb->misc, 0x1b8, reg & ~0x180000);
        }
 
-#ifdef CONFIG_SMP
        cuid = cpu_data(cpu).compute_unit_id;
-#endif
        mask <<= 4 * cuid;
        mask |= (0xf ^ (1 << cuid)) << 26;
 
index ef21bdccd674db5b333ae90f135de6cd7990c014..f4773f4aae35be4964827563d6f2843199f639b3 100644 (file)
@@ -148,7 +148,6 @@ static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)
 
 static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_SMP
        /* calling is from identify_secondary_cpu() ? */
        if (!c->cpu_index)
                return;
@@ -192,7 +191,6 @@ static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
 
 valid_k7:
        ;
-#endif
 }
 
 static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
index a70bd5b96b9eec6d006fc168e320794402ce50ea..850f2963a4209c8ab62a96d79c043e10f9689e87 100644 (file)
@@ -676,9 +676,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
        if (this_cpu->c_early_init)
                this_cpu->c_early_init(c);
 
-#ifdef CONFIG_SMP
        c->cpu_index = 0;
-#endif
        filter_cpuid_features(c, false);
 
        setup_smep(c);
@@ -764,10 +762,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
                c->apicid = c->initial_apicid;
 # endif
 #endif
-
-#ifdef CONFIG_X86_HT
                c->phys_proc_id = c->initial_apicid;
-#endif
        }
 
        setup_smep(c);
@@ -1146,9 +1141,7 @@ static void dbg_restore_debug_regs(void)
  */
 void __cpuinit x86_default_fixup_cpu_id(struct cpuinfo_x86 *c, int node)
 {
-#ifdef CONFIG_NUMA
        pr_err("NUMA core number %d differs from configured core number %d\n", node, c->phys_proc_id);
-#endif
 }
 
 /*
index 523131213f084c8b4696563410b0cd60f1ccf623..3e6ff6cbf42af90b87ff625cee1d9d785802656d 100644 (file)
@@ -181,7 +181,6 @@ static void __cpuinit trap_init_f00f_bug(void)
 
 static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_SMP
        /* calling is from identify_secondary_cpu() ? */
        if (!c->cpu_index)
                return;
@@ -198,7 +197,6 @@ static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
                WARN_ONCE(1, "WARNING: SMP operation may be unreliable"
                                    "with B stepping processors.\n");
        }
-#endif
 }
 
 static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
index 2af127d4c3d1dc2ebdab3e0e2ff95d2d07595a46..e9c9d0aab36ab55ae508a9432510387a4c7a735d 100644 (file)
@@ -119,9 +119,7 @@ void mce_setup(struct mce *m)
        m->time = get_seconds();
        m->cpuvendor = boot_cpu_data.x86_vendor;
        m->cpuid = cpuid_eax(1);
-#ifdef CONFIG_SMP
        m->socketid = cpu_data(m->extcpu).phys_proc_id;
-#endif
        m->apicid = cpu_data(m->extcpu).initial_apicid;
        rdmsrl(MSR_IA32_MCG_CAP, m->mcgcap);
 }
index f5474218cffede0c71793dfed39f1866cb3713c3..1d76872b6a45fccaa0018ee6d6c13bcab35caff4 100644 (file)
@@ -64,11 +64,9 @@ struct threshold_bank {
 };
 static DEFINE_PER_CPU(struct threshold_bank * [NR_BANKS], threshold_banks);
 
-#ifdef CONFIG_SMP
 static unsigned char shared_bank[NR_BANKS] = {
        0, 0, 0, 0, 1
 };
-#endif
 
 static DEFINE_PER_CPU(unsigned char, bank_map);        /* see which banks are on */
 
@@ -202,10 +200,9 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
 
                        if (!block)
                                per_cpu(bank_map, cpu) |= (1 << bank);
-#ifdef CONFIG_SMP
                        if (shared_bank[bank] && c->cpu_core_id)
                                break;
-#endif
+
                        offset = setup_APIC_mce(offset,
                                                (high & MASK_LVTOFF_HI) >> 20);
 
@@ -531,7 +528,6 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
        sprintf(name, "threshold_bank%i", bank);
 
-#ifdef CONFIG_SMP
        if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) {   /* symlink */
                i = cpumask_first(cpu_llc_shared_mask(cpu));
 
@@ -558,7 +554,6 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
                goto out;
        }
-#endif
 
        b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
        if (!b) {
index 14b23140e81fc3056a55e880552e2e7064f722ab..8022c668148518ec03ced2a38b01d8b55b677c46 100644 (file)
@@ -64,12 +64,10 @@ static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
 static int show_cpuinfo(struct seq_file *m, void *v)
 {
        struct cpuinfo_x86 *c = v;
-       unsigned int cpu = 0;
+       unsigned int cpu;
        int i;
 
-#ifdef CONFIG_SMP
        cpu = c->cpu_index;
-#endif
        seq_printf(m, "processor\t: %u\n"
                   "vendor_id\t: %s\n"
                   "cpu family\t: %d\n"
index 7a402bfbee7d910bacc252c0cc200285ac27af26..88df48956c1b2e83d3826d2a90191d0ee36b81e1 100644 (file)
@@ -1609,11 +1609,9 @@ static int sbridge_mce_check_error(struct notifier_block *nb, unsigned long val,
                mce->cpuvendor, mce->cpuid, mce->time,
                mce->socketid, mce->apicid);
 
-#ifdef CONFIG_SMP
        /* Only handle if it is the right mc controller */
        if (cpu_data(mce->cpu).phys_proc_id != pvt->sbridge_dev->mc)
                return NOTIFY_DONE;
-#endif
 
        smp_rmb();
        if ((pvt->mce_out + 1) % MCE_LOG_LEN == pvt->mce_in) {
index 104b3767516cb91b95d310a52c0968adf0d2c639..1fdef885341c4438842c92a381726e864dd3868c 100644 (file)
@@ -57,16 +57,15 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
 #define TOTAL_ATTRS            (MAX_CORE_ATTRS + 1)
 #define MAX_CORE_DATA          (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
 
-#ifdef CONFIG_SMP
 #define TO_PHYS_ID(cpu)                cpu_data(cpu).phys_proc_id
 #define TO_CORE_ID(cpu)                cpu_data(cpu).cpu_core_id
+#define TO_ATTR_NO(cpu)                (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
+
+#ifdef CONFIG_SMP
 #define for_each_sibling(i, cpu)       for_each_cpu(i, cpu_sibling_mask(cpu))
 #else
-#define TO_PHYS_ID(cpu)                (cpu)
-#define TO_CORE_ID(cpu)                (cpu)
 #define for_each_sibling(i, cpu)       for (i = 0; false; )
 #endif
-#define TO_ATTR_NO(cpu)                (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
 
 /*
  * Per-Core Temperature Data