constant fold FP_ROUND_INREG, ZERO_EXTEND_INREG, and SIGN_EXTEND_INREG

This allows the alpha backend to compile:

bool %test(uint %P) {
        %c = seteq uint %P, 0
        ret bool %c
}

into:

test:
        ldgp $29, 0($27)
        ZAP $16,240,$0
        CMPEQ $0,0,$0
        AND $0,1,$0
        ret $31,($26),1

instead of:

test:
        ldgp $29, 0($27)
        ZAP $16,240,$0
        ldiq $1,0
        ZAP $1,240,$1
        CMPEQ $0,$1,$0
        AND $0,1,$0
        ret $31,($26),1

... and fixes PR534.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20534 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index a0e5d93f62e1570e6bdf83509bcc70e19fba0e86..fb52d11bd3d5edab805da23b9ad579c3b769f529 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -946,6 +946,9 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1,
            "Cannot FP_ROUND_INREG integer types");
     if (EVT == VT) return N1;  // Not actually rounding
     assert(EVT < VT && "Not rounding down!");
+
+    if (isa<ConstantFPSDNode>(N1))
+      return getNode(ISD::FP_EXTEND, VT, getNode(ISD::FP_ROUND, EVT, N1));
     break;
   case ISD::ZERO_EXTEND_INREG:
   case ISD::SIGN_EXTEND_INREG:
@@ -955,6 +958,15 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1,
     if (EVT == VT) return N1;  // Not actually extending
     assert(EVT < VT && "Not extending!");
 
+    // Extending a constant?  Just return the constant.
+    if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
+      SDOperand Tmp = getNode(ISD::TRUNCATE, EVT, N1);
+      if (N1.getOpcode() == ISD::ZERO_EXTEND_INREG)
+        return getNode(ISD::ZERO_EXTEND, VT, Tmp);
+      else
+        return getNode(ISD::SIGN_EXTEND, VT, Tmp);
+    }
+
     // If we are sign extending an extension, use the original source.
     if (N1.getOpcode() == ISD::ZERO_EXTEND_INREG ||
         N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {