drm/rockchip: cdn-dp: fix some error

This commit is for fixing some error, according to the comments from
CL:5442
1. correct the use of rate
2. remove the phy switch from DP driver, it is controlled in PHY driver
3. add some const keyword
4. clear int_mask to 0
5. modify spelling errors

Change-Id: I239a9e7183593b85485abb6d288d6cb1558c65f7
Signed-off-by: Chris Zhong <zyw@rock-chips.com>

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 8644fd0e28fe07b3c9a14cc8430e3bc06b35b586..b84ea307647dcdc88e5cf416cd28517e5376b03b 100644 (file)
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -43,8 +43,6 @@
 #define GRF_SOC_CON9           0x6224
 #define DP_SEL_VOP_LIT         BIT(12)
 #define GRF_SOC_CON26          0x6268
-#define UPHY_SEL_BIT           3
-#define UPHY_SEL_MASK          BIT(19)
 #define DPTX_HPD_SEL           (3 << 12)
 #define DPTX_HPD_DEL           (2 << 12)
 #define DPTX_HPD_SEL_MASK      (3 << 28)
@@ -122,7 +120,7 @@ static int cdn_dp_clk_enable(struct cdn_dp_device *dp)
        reset_control_deassert(dp->apb_rst);
 
        rate = clk_get_rate(dp->core_clk);
-       if (rate < 0) {
+       if (!rate) {
                DRM_DEV_ERROR(dp->dev, "get clk rate failed: %d\n", rate);
                goto err_set_rate;
        }
@@ -217,7 +215,7 @@ static void cdn_dp_connector_destroy(struct drm_connector *connector)
        drm_connector_cleanup(connector);
 }
 
-static struct drm_connector_funcs cdn_dp_atomic_connector_funcs = {
+static const struct drm_connector_funcs cdn_dp_atomic_connector_funcs = {
        .dpms = drm_atomic_helper_connector_dpms,
        .detect = cdn_dp_connector_detect,
        .destroy = cdn_dp_connector_destroy,
@@ -393,11 +391,6 @@ static int cdn_dp_enable_phy(struct cdn_dp_device *dp, struct cdn_dp_port *port)
        union extcon_property_value property;
        int ret;
 
-       ret = cdn_dp_grf_write(dp, GRF_SOC_CON26,
-                              (port->id << UPHY_SEL_BIT) | UPHY_SEL_MASK);
-       if (ret)
-               return ret;
-
        if (!port->phy_enabled) {
                ret = phy_power_on(port->phy);
                if (ret) {
@@ -702,14 +695,14 @@ static int cdn_dp_encoder_atomic_check(struct drm_encoder *encoder,
        return 0;
 }
 
-static struct drm_encoder_helper_funcs cdn_dp_encoder_helper_funcs = {
+static const struct drm_encoder_helper_funcs cdn_dp_encoder_helper_funcs = {
        .mode_set = cdn_dp_encoder_mode_set,
        .enable = cdn_dp_encoder_enable,
        .disable = cdn_dp_encoder_disable,
        .atomic_check = cdn_dp_encoder_atomic_check,
 };
 
-static struct drm_encoder_funcs cdn_dp_encoder_funcs = {
+static const struct drm_encoder_funcs cdn_dp_encoder_funcs = {
        .destroy = drm_encoder_cleanup,
 };
 

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
index 39581986e7225d586fd2169caf8ba31d3607eeb8..3a5b8a4aa1e7a360adeb83d240abf316f5f3fbcc 100644 (file)
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
@@ -79,8 +79,8 @@ void cdn_dp_clock_reset(struct cdn_dp_device *dp)
              SOURCE_CRYPTO_SYS_CLK_EN;
        writel(val, dp->regs + SOURCE_CRYPTO_CAR);
 
-       val = ~(MAILBOX_INT_MASK_BIT | PIF_INT_MASK_BIT) & ALL_INT_MASK;
-       writel(val, dp->regs + APB_INT_MASK);
+       /* enable Mailbox and PIF interrupt */
+       writel(0, dp->regs + APB_INT_MASK);
 }
 
 static int cdn_dp_mailbox_read(struct cdn_dp_device *dp)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
index 6cf1165657d7d841db4e7c4b64e196939c7d4fdb..4d5ba9f1d18a3f6866a77bf4c9fe8b1f469b3c5d 100644 (file)
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
@@ -422,7 +422,7 @@
 #define SPDIF_JITTER_THRSH(x)                  (((x) & 0xff) << 3)
 #define SPDIF_JITTER_AVG_WIN(x)                        ((x) & 0x7)
 
-/* Refernce cycles when using lane clock as refernce */
+/* Reference cycles when using lane clock as reference */
 #define LANE_REF_CYC                           0xf000
 
 enum voltage_swing_level {