X86ISelLowering.cpp: Fix warnings. [-Wlogical-op-parentheses]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170523 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index fee9d932e522148419e32e299d0fdf0781d099ef..93ea3721fe256df37c4ceedb008bfdf7ca828c12 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -15934,8 +15934,8 @@ static SDValue PerformLOADCombine(SDNode *N, SelectionDAG &DAG,
   // TODO: It is possible to support ZExt by zeroing the undef values
   // during the shuffle phase or after the shuffle.
   if (RegVT.isVector() && RegVT.isInteger() &&
-      (Ext == ISD::EXTLOAD && Subtarget->hasSSSE3() ||
-       Ext == ISD::SEXTLOAD && Subtarget->hasSSE41())){
+      ((Ext == ISD::EXTLOAD && Subtarget->hasSSSE3()) ||
+       (Ext == ISD::SEXTLOAD && Subtarget->hasSSE41()))){
     assert(MemVT != RegVT && "Cannot extend to the same type");
     assert(MemVT.isVector() && "Must load a vector from memory");