ARM: OMAP2: am33xx-hwmod: Fix "register offset NULL check" bug

am33xx_cm_wait_module_ready() checks if register offset is NULL.

int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
{
	int i = 0;

	if (!clkctrl_offs)
		return 0;

In case of AM33xx, CLKCTRL register offset for different clock domains
are not uniformly placed. An example of this would be the RTC clock
domain with CLKCTRL offset at 0x00.
In such cases the module ready check is skipped which leads to a data
abort during boot-up when RTC registers is accessed.

Remove this check here to avoid checking module readiness for modules
with clkctrl register offset at 0x00.

Koen Kooi notes that this patch fixes a crash on boot with
CONFIG_RTC_DRV_OMAP=y with v3.8-rc5.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
Cc: Koen Kooi <koen@dominion.thruhere.net>
[paul@pwsan.com: noted Koen's test in the patch description]
Signed-off-by: Paul Walmsley <paul@pwsan.com>

diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index 058ce3c0873ecb7aa0f4356d4d596c152aea5f03..325a515765766c1757c5fd858e9bd8b3c226f44e 100644 (file)
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -241,9 +241,6 @@ int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
 {
        int i = 0;
 
-       if (!clkctrl_offs)
-               return 0;
-
        omap_test_timeout(_is_module_ready(inst, cdoffs, clkctrl_offs),
                          MAX_MODULE_READY_TIME, i);