wlcore/wl18xx: add hw op for Rx HW checksum
authorArik Nemtsov <arik@wizery.com>
Thu, 10 May 2012 09:13:28 +0000 (12:13 +0300)
committerLuciano Coelho <coelho@ti.com>
Tue, 5 Jun 2012 12:55:23 +0000 (15:55 +0300)
Some chip families can checksum certain classes of Rx packets in FW.
Implement the Rx-checksum feature as a HW-op. For the 18xx chip-family,
set Rx-checsum according to indication from FW.

Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
drivers/net/wireless/ti/wl12xx/main.c
drivers/net/wireless/ti/wl18xx/main.c
drivers/net/wireless/ti/wlcore/hw_ops.h
drivers/net/wireless/ti/wlcore/rx.c
drivers/net/wireless/ti/wlcore/wlcore.h

index 8141447e8f964d2bcf5cc59d80a70ad9610a2b27..a3336534eb2a252ed3d70fd11bdfe4804ccab9b0 100644 (file)
@@ -1314,6 +1314,7 @@ static struct wlcore_ops wl12xx_ops = {
        .get_pg_ver             = wl12xx_get_pg_ver,
        .get_mac                = wl12xx_get_mac,
        .set_tx_desc_csum       = wl12xx_set_tx_desc_csum,
+       .set_rx_csum            = NULL,
 };
 
 static struct ieee80211_sta_ht_cap wl12xx_ht_cap = {
index c47f52c81a72017503872f46d3af1cc165ad3c12..90fccb775727695a12c0985156d58613e1910640 100644 (file)
@@ -39,6 +39,8 @@
 #include "wl18xx.h"
 
 
+#define WL18XX_RX_CHECKSUM_MASK      0x40
+
 static const u8 wl18xx_rate_to_idx_2ghz[] = {
        /* MCS rates are used only with 11n */
        15,                            /* WL18XX_CONF_HW_RXTX_RATE_MCS15 */
@@ -534,6 +536,14 @@ static void wl18xx_set_tx_desc_csum(struct wl1271 *wl,
        desc->wl18xx_checksum_data |= (ip_hdr->protocol & 0x01);
 }
 
+static void wl18xx_set_rx_csum(struct wl1271 *wl,
+                              struct wl1271_rx_descriptor *desc,
+                              struct sk_buff *skb)
+{
+       if (desc->status & WL18XX_RX_CHECKSUM_MASK)
+               skb->ip_summed = CHECKSUM_UNNECESSARY;
+}
+
 static struct wlcore_ops wl18xx_ops = {
        .identify_chip  = wl18xx_identify_chip,
        .boot           = wl18xx_boot,
@@ -548,6 +558,7 @@ static struct wlcore_ops wl18xx_ops = {
        .tx_delayed_compl = NULL,
        .hw_init        = wl18xx_hw_init,
        .set_tx_desc_csum = wl18xx_set_tx_desc_csum,
+       .set_rx_csum = wl18xx_set_rx_csum,
 };
 
 int __devinit wl18xx_probe(struct platform_device *pdev)
index 4573249ea89f5d60d40c881748c5974b1fb961f9..80f3d75ceddf5341e0323df7145f91c52669de44 100644 (file)
@@ -130,4 +130,13 @@ wlcore_hw_set_tx_desc_csum(struct wl1271 *wl,
        wl->ops->set_tx_desc_csum(wl, desc, skb);
 }
 
+static inline void
+wlcore_hw_set_rx_csum(struct wl1271 *wl,
+                     struct wl1271_rx_descriptor *desc,
+                     struct sk_buff *skb)
+{
+       if (wl->ops->set_rx_csum)
+               wl->ops->set_rx_csum(wl, desc, skb);
+}
+
 #endif
index d6a3c6b07827738bbc3e0f3ea0ea977e1a6e9dad..2672b1d16cef37a22e9e0259c4b5eb377b7ab65b 100644 (file)
@@ -186,6 +186,7 @@ static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,
                is_data = 1;
 
        wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon);
+       wlcore_hw_set_rx_csum(wl, desc, skb);
 
        seq_num = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
        wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s seq %d hlid %d", skb,
index c062d304ab0d760c6f377875f9fa968e7760ad6e..2922d8aec6991081dfc53e60e6f374161e51c47e 100644 (file)
@@ -33,6 +33,7 @@
 /* forward declaration */
 struct wl1271_tx_hw_descr;
 enum wl_rx_buf_align;
+struct wl1271_rx_descriptor;
 
 struct wlcore_ops {
        int (*identify_chip)(struct wl1271 *wl);
@@ -64,6 +65,9 @@ struct wlcore_ops {
        void (*set_tx_desc_csum)(struct wl1271 *wl,
                                 struct wl1271_tx_hw_descr *desc,
                                 struct sk_buff *skb);
+       void (*set_rx_csum)(struct wl1271 *wl,
+                           struct wl1271_rx_descriptor *desc,
+                           struct sk_buff *skb);
 };
 
 enum wlcore_partitions {