arm64: dts: rockchip: add u2phy grf and usb2.0 controller node

Support usb2.0 for rk3328.
Add node usb2phy_grf for usb2.0 phy.
Add node usb_host0_ehci for ehci controller.
Add node usb_host0_ohci for ohci controller.

Change-Id: Ia0adfa4c8cd16735e899491e1dc91d37bd348364
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 3001fbe95710d1a46a7596b04a34b7d65ceb12ae..bf661ed6676d2684ee5c74e63dcc796221536ddf 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -75,11 +75,27 @@
        status = "okay";
 };
 
+&u2phy {
+       status = "okay";
+
+       u2phy_host: host-port {
+               status = "okay";
+       };
+};
+
 &usb20_otg {
        dr_mode = "peripheral";
        status = "okay";
 };
 
+&usb_host0_ehci {
+       status = "okay";
+};
+
+&usb_host0_ohci {
+       status = "okay";
+};
+
 &i2c1 {
        status = "okay";
 

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 767a9f2a25c27318583f50ef94511babdf5b45b3..f410ca5a0b4310b7de94479148bbc06c45168025 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -479,6 +479,33 @@
                        <32768>, <32768>;
        };
 
+       usb2phy_grf: syscon@ff450000 {
+               compatible = "rockchip,rk3328-usb2phy-grf", "syscon",
+                            "simple-mfd";
+               reg = <0x0 0xff450000 0x0 0x10000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               u2phy: usb2-phy@100 {
+                       compatible = "rockchip,rk3328-usb2phy";
+                       reg = <0x100 0x10>;
+                       clocks = <&xin24m>;
+                       clock-names = "phyclk";
+                       #clock-cells = <0>;
+                       assigned-clocks = <&cru USB480M>;
+                       assigned-clock-parents = <&u2phy>;
+                       clock-output-names = "usb480m_phy";
+                       status = "disabled";
+
+                       u2phy_host: host-port {
+                               #phy-cells = <0>;
+                               interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "linestate";
+                               status = "disabled";
+                       };
+               };
+       };
+
        sdmmc: rksdmmc@ff500000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff500000 0x0 0x4000>;
@@ -528,6 +555,30 @@
                status = "disabled";
        };
 
+       usb_host0_ehci: usb@ff5c0000 {
+               compatible = "generic-ehci";
+               reg = <0x0 0xff5c0000 0x0 0x10000>;
+               interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
+                        <&u2phy>;
+               clock-names = "usbhost", "arbiter", "utmi";
+               phys = <&u2phy_host>;
+               phy-names = "usb";
+               status = "disabled";
+       };
+
+       usb_host0_ohci: usb@ff5d0000 {
+               compatible = "generic-ohci";
+               reg = <0x0 0xff5d0000 0x0 0x10000>;
+               interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
+                        <&u2phy>;
+               clock-names = "usbhost", "arbiter", "utmi";
+               phys = <&u2phy_host>;
+               phy-names = "usb";
+               status = "disabled";
+       };
+
        sdmmc_ext: rksdmmc@ff5f0000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff5f0000 0x0 0x4000>;