rk3188: enable dvfs clk after adjust dvfs table

diff --git a/arch/arm/mach-rk3188/cpufreq.c b/arch/arm/mach-rk3188/cpufreq.c
index 599fe9cae0fe0b792d4870b2392a31e4089500a0..520cb1d158195bb0a2554afc9e0a0b7e2cb549c2 100644 (file)
--- a/arch/arm/mach-rk3188/cpufreq.c
+++ b/arch/arm/mach-rk3188/cpufreq.c
@@ -350,15 +350,12 @@ static int rk3188_cpufreq_init_cpu0(struct cpufreq_policy *policy)
 
        gpu_is_mali400 = cpu_is_rk3188();
        gpu_clk = clk_get(NULL, "gpu");
-       if (!IS_ERR(gpu_clk)) {
-               clk_enable_dvfs(gpu_clk);
-               if (gpu_is_mali400)
-                       dvfs_clk_enable_limit(gpu_clk, 133000000, 600000000);
-       }
+       if (IS_ERR(gpu_clk))
+               return PTR_ERR(gpu_clk);
 
        ddr_clk = clk_get(NULL, "ddr");
-       if (!IS_ERR(ddr_clk))
-               clk_enable_dvfs(ddr_clk);
+       if (IS_ERR(ddr_clk))
+               return PTR_ERR(ddr_clk);
 
        cpu_clk = clk_get(NULL, "cpu");
        if (IS_ERR(cpu_clk))
@@ -372,6 +369,12 @@ static int rk3188_cpufreq_init_cpu0(struct cpufreq_policy *policy)
                dvfs_adjust_table_lmtvolt(gpu_clk, table_adjust);
        }
 
+       clk_enable_dvfs(gpu_clk);
+       if (gpu_is_mali400)
+               dvfs_clk_enable_limit(gpu_clk, 133000000, 600000000);
+
+       clk_enable_dvfs(ddr_clk);
+
        dvfs_clk_register_set_rate_callback(cpu_clk, cpufreq_scale_rate_for_dvfs);
        freq_table = dvfs_get_freq_volt_table(cpu_clk);
        if (freq_table == NULL) {