void gc_output_cache_sampling();
void gc_output_cache_sampling_r();
-#ifdef GC_CACHE_SAMPLING
+#if defined(GC_CACHE_SAMPLING)&&defined(GC_CACHE_ADAPT_POLICY4)
// enable the timer interrupt
#define CACHEADAPT_ENABLE_TIMER() \
{ \
bamboo_unmask_timer_intr(); \
bamboo_dtlb_sampling_process(); \
}
-#else
-#define CACHEADAPT_ENABLE_TIMER()
-#endif
// disable the TILE_TIMER interrupt
#define CACHEADAPT_DISABLE_TIMER() bamboo_mask_timer_intr()
-
-#ifdef GC_CACHE_SAMPLING
// reset the sampling arrays
#define CACHEADAPT_SAMPLING_RESET() bamboo_dtlb_sampling_reset()
#else // GC_CACHE_SAMPING
+#define CACHEADAPT_ENABLE_TIMER()
+#define CACHEADAPT_DISABLE_TIMER()
#define CACHEADAPT_SAMPLING_RESET()
#endif
}
void pregcprocessing() {
-#if defined(GC_CACHE_ADAPT)&&defined(GC_CACHE_SAMPLING)
+#if defined(GC_CACHE_ADAPT)&&defined(GC_CACHE_SAMPLING)&&defined(GC_CACHE_ADAPT_POLICY4)
// disable the timer interrupt
bamboo_mask_timer_intr();
// get the sampling data
}
void postgcprocessing() {
-#if defined(GC_CACHE_ADAPT)&&defined(GC_CACHE_SAMPLING)
+#if defined(GC_CACHE_ADAPT)&&defined(GC_CACHE_SAMPLING)&&defined(GC_CACHE_ADAPT_POLICY4)
// enable the timer interrupt
bamboo_tile_timer_set_next_event(GC_TILE_TIMER_EVENT_SETTING);
bamboo_unmask_timer_intr();
gcInfo->time[gcInfo->index++] = gc_num_liveobj;
gcInfo->time[gcInfo->index++] = gc_num_forwardobj;
gc_infoIndex++;
+ if(gcInfo->index != GC_PROFILE_NUM_FIELD) BAMBOO_EXIT();
gc_size_allocatedobj = 0; // reset the counter of allocated obj
if(gc_infoIndex == GCINFOLENGTH) {
gc_infoOverflow = true;
void processmsg_terminate_I() {
disruntimedata();
-#ifdef MULTICORE_GC
-#ifdef GC_CACHE_ADAPT
+#if defined(MULTICORE_GC)&&defined(GC_CACHE_ADAPT)&&defined(GC_CACHE_SAMPLING)&&defined(GC_CACHE_ADAPT_POLICY4)
bamboo_mask_timer_intr(); // disable the TILE_TIMER interrupt
-#endif
#endif
BAMBOO_EXIT_APP(0);
}
fi
# for tilera code, generate multicorememsize.h
-./generate_memsize.sh ${TILERA_PAGE_SIZE} ${TILERA_PAGE_SIZE_BITS} ${TILERA_NUM_BLOCKS} ${TILERA_NUM_PAGES_PER_BLOCK}
+./generate_memsize.sh ${TILERA_PAGE_SIZE} ${TILERA_PAGE_SIZE_BITS} ${TILERA_NUM_BLOCKS} ${TILERA_NUM_PAGES_PER_BLOCK} ${BUILDDIR}
#########################