MIR Serialization: Serialize the 'volatile' machine memory operand flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243923 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/MIRParser/MILexer.cpp b/lib/CodeGen/MIRParser/MILexer.cpp
index 81cb9e7d6f91e24afcd57325be71b25b2ea573c2..adc72e2a5668511a17cf1a9d07ef01dca9b7ee84 100644 (file)
--- a/lib/CodeGen/MIRParser/MILexer.cpp
+++ b/lib/CodeGen/MIRParser/MILexer.cpp
@@ -156,6 +156,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
       .Case("x86_fp80", MIToken::kw_x86_fp80)
       .Case("fp128", MIToken::kw_fp128)
       .Case("ppc_fp128", MIToken::kw_ppc_fp128)
+      .Case("volatile", MIToken::kw_volatile)
       .Default(MIToken::Identifier);
 }
 

diff --git a/lib/CodeGen/MIRParser/MILexer.h b/lib/CodeGen/MIRParser/MILexer.h
index d33e0499f27c31c353671f39d823edc3008c381e..ccf8ffe15e58cd808618ca9c9f25ae9c9a85c03f 100644 (file)
--- a/lib/CodeGen/MIRParser/MILexer.h
+++ b/lib/CodeGen/MIRParser/MILexer.h
@@ -61,6 +61,7 @@ struct MIToken {
     kw_x86_fp80,
     kw_fp128,
     kw_ppc_fp128,
+    kw_volatile,
 
     // Identifier tokens
     Identifier,
@@ -115,6 +116,8 @@ public:
            Kind == kw_dead || Kind == kw_killed || Kind == kw_undef;
   }
 
+  bool isMemoryOperandFlag() const { return Kind == kw_volatile; }
+
   bool is(TokenKind K) const { return Kind == K; }
 
   bool isNot(TokenKind K) const { return Kind != K; }

diff --git a/lib/CodeGen/MIRParser/MIParser.cpp b/lib/CodeGen/MIRParser/MIParser.cpp
index e1770cd7fdb46df1409c2da0b3b2132b17f41739..70ce67f132f6a0410f42acf44dab53fefdb3a5c3 100644 (file)
--- a/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/lib/CodeGen/MIRParser/MIParser.cpp
@@ -135,6 +135,7 @@ public:
   bool parseTargetIndexOperand(MachineOperand &Dest);
   bool parseMachineOperand(MachineOperand &Dest);
   bool parseIRValue(Value *&V);
+  bool parseMemoryOperandFlag(unsigned &Flags);
   bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
 
 private:
@@ -987,14 +988,31 @@ bool MIParser::getUint64(uint64_t &Result) {
   return false;
 }
 
+bool MIParser::parseMemoryOperandFlag(unsigned &Flags) {
+  switch (Token.kind()) {
+  case MIToken::kw_volatile:
+    Flags |= MachineMemOperand::MOVolatile;
+    break;
+  // TODO: report an error when we specify the same flag more than once.
+  // TODO: parse the other memory operand flags.
+  default:
+    llvm_unreachable("The current token should be a memory operand flag");
+  }
+  lex();
+  return false;
+}
+
 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
   if (expectAndConsume(MIToken::lparen))
     return true;
-  // TODO: Parse the operand's flags.
+  unsigned Flags = 0;
+  while (Token.isMemoryOperandFlag()) {
+    if (parseMemoryOperandFlag(Flags))
+      return true;
+  }
   if (Token.isNot(MIToken::Identifier) ||
       (Token.stringValue() != "load" && Token.stringValue() != "store"))
     return error("expected 'load' or 'store' memory operation");
-  unsigned Flags = 0;
   if (Token.stringValue() == "load")
     Flags |= MachineMemOperand::MOLoad;
   else

diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp
index 9c5988c32e4125f5101b7083262aa6f510d427c2..fb5a36ce9a799486c5ff7e0babf7807fd35b5698 100644 (file)
--- a/lib/CodeGen/MIRPrinter.cpp
+++ b/lib/CodeGen/MIRPrinter.cpp
@@ -608,6 +608,8 @@ void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI) {
 void MIPrinter::print(const MachineMemOperand &Op) {
   OS << '(';
   // TODO: Print operand's other flags.
+  if (Op.isVolatile())
+    OS << "volatile ";
   if (Op.isLoad())
     OS << "load ";
   else {

diff --git a/test/CodeGen/MIR/X86/memory-operands.mir b/test/CodeGen/MIR/X86/memory-operands.mir
index e220761357fa9a3ed8145b2e5b6d5f148338c4ad..cc73263728e62d04a8dff025662bd13b5b88c32c 100644 (file)
--- a/test/CodeGen/MIR/X86/memory-operands.mir
+++ b/test/CodeGen/MIR/X86/memory-operands.mir
@@ -19,6 +19,14 @@
     ret void
   }
 
+  define i32 @volatile_inc(i32* %x) {
+  entry:
+    %0 = load volatile i32, i32* %x
+    %1 = add i32 %0, 1
+    store volatile i32 %1, i32* %x
+    ret i32 %1
+  }
+
 ...
 ---
 name:            test
@@ -50,3 +58,21 @@ body:
       - 'INC32m killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (store 4 into %ir."a value"), (load 4 from %ir."a value")'
       - RETQ
 ...
+---
+name:            volatile_inc
+tracksRegLiveness: true
+liveins:
+  - { reg: '%rdi' }
+body:
+  - id:          0
+    name:        entry
+    liveins:     [ '%rdi' ]
+    instructions:
+    # CHECK: name: volatile_inc
+    # CHECK: %eax = MOV32rm %rdi, 1, _, 0, _ :: (volatile load 4 from %ir.x)
+    # CHECK: MOV32mr killed %rdi, 1, _, 0, _, %eax :: (volatile store 4 into %ir.x)
+      - '%eax = MOV32rm %rdi, 1, _, 0, _ :: (volatile load 4 from %ir.x)'
+      - '%eax = INC32r killed %eax, implicit-def dead %eflags'
+      - 'MOV32mr killed %rdi, 1, _, 0, _, %eax :: (volatile store 4 into %ir.x)'
+      - 'RETQ %eax'
+...