i40e: delay after VF reset
authorMitch Williams <mitch.a.williams@intel.com>
Fri, 9 Jan 2015 11:18:13 +0000 (11:18 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Mon, 9 Feb 2015 03:30:29 +0000 (19:30 -0800)
Delay a minimum of 10ms after VF reset, to allow the hardware's internal
FIFOs to flush.

Change-ID: I8a02ddb28c9f0d7303a1eb21d0b2443e5b4c1cda
Signed-off-by: Mitch Williams <mitch.a.williams@intel.com>
Tested-by: Jim Young <james.m.young@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c

index 044019b9d406148c1e3990572cf6fcdff9cc3bdd..4e4232a58843e09da7c957171fd873cfb8387692 100644 (file)
@@ -668,13 +668,13 @@ void i40e_reset_vf(struct i40e_vf *vf, bool flr)
        /* poll VPGEN_VFRSTAT reg to make sure
         * that reset is complete
         */
-       for (i = 0; i < 100; i++) {
-               /* vf reset requires driver to first reset the
-                * vf and then poll the status register to make sure
-                * that the requested op was completed
-                * successfully
+       for (i = 0; i < 10; i++) {
+               /* VF reset requires driver to first reset the VF and then
+                * poll the status register to make sure that the reset
+                * completed successfully. Due to internal HW FIFO flushes,
+                * we must wait 10ms before the register will be valid.
                 */
-               usleep_range(10, 20);
+               usleep_range(10000, 20000);
                reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
                if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
                        rsd = true;