{
u32 TxAGC=0;
struct r8192_priv *priv = rtllib_priv(dev);
-#ifdef RTL8190P
- u8 byte0, byte1;
-
- TxAGC |= ((powerlevel<<8)|powerlevel);
- TxAGC += priv->CCKTxPowerLevelOriginalOffset;
-
- if (priv->bDynamicTxLowPower == true
- /*pMgntInfo->bScanInProgress == true*/ )
- {
- if (priv->CustomerID == RT_CID_819x_Netcore)
- TxAGC = 0x2222;
- else
- TxAGC += ((priv->CckPwEnl<<8)|priv->CckPwEnl);
- }
-
- byte0 = (u8)(TxAGC & 0xff);
- byte1 = (u8)((TxAGC & 0xff00)>>8);
- if (byte0 > 0x24)
- byte0 = 0x24;
- if (byte1 > 0x24)
- byte1 = 0x24;
- if (priv->rf_type == RF_2T4R)
- {
- if (priv->RF_C_TxPwDiff > 0)
- {
- if ( (byte0 + (u8)priv->RF_C_TxPwDiff) > 0x24)
- byte0 = 0x24 - priv->RF_C_TxPwDiff;
- if ( (byte1 + (u8)priv->RF_C_TxPwDiff) > 0x24)
- byte1 = 0x24 - priv->RF_C_TxPwDiff;
- }
- }
- TxAGC = (byte1<<8) |byte0;
- write_nic_dword(dev, CCK_TXAGC, TxAGC);
-#else
#ifdef RTL8192E
TxAGC = powerlevel;
TxAGC = 0x24;
rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC);
#endif
-#endif
}
void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
{
struct r8192_priv *priv = rtllib_priv(dev);
-#ifdef RTL8190P
- u32 TxAGC1=0, TxAGC2=0, TxAGC2_tmp = 0;
- u8 i, byteVal1[4], byteVal2[4], byteVal3[4];
-
- if (priv->bDynamicTxHighPower == true)
- {
- TxAGC1 |= ((powerlevel<<24)|(powerlevel<<16)|(powerlevel<<8)|powerlevel);
- TxAGC2_tmp = TxAGC1;
-
- TxAGC1 += priv->MCSTxPowerLevelOriginalOffset[0];
- TxAGC2 =0x03030303;
-
- TxAGC2_tmp += priv->MCSTxPowerLevelOriginalOffset[1];
- }
- else
- {
- TxAGC1 |= ((powerlevel<<24)|(powerlevel<<16)|(powerlevel<<8)|powerlevel);
- TxAGC2 = TxAGC1;
-
- TxAGC1 += priv->MCSTxPowerLevelOriginalOffset[0];
- TxAGC2 += priv->MCSTxPowerLevelOriginalOffset[1];
-
- TxAGC2_tmp = TxAGC2;
-
- }
- for (i=0; i<4; i++)
- {
- byteVal1[i] = (u8)( (TxAGC1 & (0xff<<(i*8))) >>(i*8) );
- if (byteVal1[i] > 0x24)
- byteVal1[i] = 0x24;
- byteVal2[i] = (u8)( (TxAGC2 & (0xff<<(i*8))) >>(i*8) );
- if (byteVal2[i] > 0x24)
- byteVal2[i] = 0x24;
-
- byteVal3[i] = (u8)( (TxAGC2_tmp & (0xff<<(i*8))) >>(i*8) );
- if (byteVal3[i] > 0x24)
- byteVal3[i] = 0x24;
- }
-
- if (priv->rf_type == RF_2T4R)
- {
- if (priv->RF_C_TxPwDiff > 0)
- {
- for (i=0; i<4; i++)
- {
- if ( (byteVal1[i] + (u8)priv->RF_C_TxPwDiff) > 0x24)
- byteVal1[i] = 0x24 - priv->RF_C_TxPwDiff;
- if ( (byteVal2[i] + (u8)priv->RF_C_TxPwDiff) > 0x24)
- byteVal2[i] = 0x24 - priv->RF_C_TxPwDiff;
- if ( (byteVal3[i] + (u8)priv->RF_C_TxPwDiff) > 0x24)
- byteVal3[i] = 0x24 - priv->RF_C_TxPwDiff;
- }
- }
- }
-
- TxAGC1 = (byteVal1[3]<<24) | (byteVal1[2]<<16) |(byteVal1[1]<<8) |byteVal1[0];
- TxAGC2 = (byteVal2[3]<<24) | (byteVal2[2]<<16) |(byteVal2[1]<<8) |byteVal2[0];
-
- TxAGC2_tmp = (byteVal3[3]<<24) | (byteVal3[2]<<16) |(byteVal3[1]<<8) |byteVal3[0];
- priv->Pwr_Track = TxAGC2_tmp;
-
- write_nic_dword(dev, MCS_TXAGC, TxAGC1);
- write_nic_dword(dev, MCS_TXAGC+4, TxAGC2);
-#else
#ifdef RTL8192E
u32 writeVal, powerBase0, powerBase1, writeVal_tmp;
u8 index = 0;
rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
}
-#endif
#endif
return;
}
#ifndef RTL8225H
#define RTL8225H
-#ifdef RTL8190P
-#define RTL819X_TOTAL_RF_PATH 4
-#else
#define RTL819X_TOTAL_RF_PATH 2
-#endif
extern void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth);
extern bool PHY_RF8256_Config(struct net_device* dev);
extern bool phy_RF8256_Config_ParaFile(struct net_device* dev);
* Contact Information:
* wlanfae <wlanfae@realtek.com>
******************************************************************************/
-#if (defined(RTL8192E) || defined(RTL8190P))
#include "rtl_core.h"
#include "r8192E_hw.h"
RT_TRACE(COMP_CMDPKT, "<----cmpk_message_handle_rx()\n");
}
-
-
-#endif
#endif
u16 i,usValue, IC_Version;
u16 EEPROMId;
-#ifdef RTL8190P
- u8 offset;
- u8 EepromTxPower[100];
-#endif
u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
priv->eeprom_ChannelPlan = usValue&0xff;
IC_Version = ((usValue&0xff00)>>8);
-#ifdef RTL8190P
- priv->card_8192_version = (VERSION_8190)(IC_Version);
-#elif defined RTL8192E
ICVer8192 = (IC_Version&0xf);
ICVer8256 = ((IC_Version&0xf0)>>4);
RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
if (ICVer8256 == 0x5)
priv->card_8192_version= VERSION_8190_BE;
}
-#endif
switch (priv->card_8192_version)
{
case VERSION_8190_BD:
}
else if (priv->epromtype== EEPROM_93C56)
{
-#ifdef RTL8190P
- if (!priv->AutoloadFailFlag)
- {
- priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
- priv->EEPROMCrystalCap = (u8)(((eprom_read(dev, (EEPROM_C56_CrystalCap>>1))) & 0xf000)>>12);
- }
- else
- {
- priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
- priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
- }
- RT_TRACE(COMP_INIT,"EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
- RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
-
- if (!priv->AutoloadFailFlag)
- {
- for (i = 0; i < 12; i+=2)
- {
- if (i <6)
- offset = EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex + i;
- else
- offset = EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex + i - 6;
- usValue = eprom_read(dev, (offset>>1));
- *((u16*)(&EepromTxPower[i])) = usValue;
- }
-
- for (i = 0; i < 12; i++)
- {
- if (i <= 2)
- priv->EEPROMRfACCKChnl1TxPwLevel[i] = EepromTxPower[i];
- else if ((i >=3 )&&(i <= 5))
- priv->EEPROMRfAOfdmChnlTxPwLevel[i-3] = EepromTxPower[i];
- else if ((i >=6 )&&(i <= 8))
- priv->EEPROMRfCCCKChnl1TxPwLevel[i-6] = EepromTxPower[i];
- else
- priv->EEPROMRfCOfdmChnlTxPwLevel[i-9] = EepromTxPower[i];
- }
- }
- else
- {
- priv->EEPROMRfACCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
- priv->EEPROMRfACCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
- priv->EEPROMRfACCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
-
- priv->EEPROMRfAOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
- priv->EEPROMRfAOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
- priv->EEPROMRfAOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
-
- priv->EEPROMRfCCCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
- priv->EEPROMRfCCCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
- priv->EEPROMRfCCCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
-
- priv->EEPROMRfCOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
- priv->EEPROMRfCOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
- priv->EEPROMRfCOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
- }
- RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[0]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[1]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[2]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[0]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[1]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[2]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[0]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[1]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[2]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[0]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[1]);
- RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[2]);
-#endif
}
if (priv->epromtype == EEPROM_93C46)
switch (priv->CustomerID)
{
case RT_CID_DEFAULT:
-#ifdef RTL8190P
- priv->LedStrategy = HW_LED;
-#elif defined RTL8192E
priv->LedStrategy = SW_LED_MODE1;
-#endif
break;
case RT_CID_819x_CAMEO:
case RT_CID_TOSHIBA:
default:
-#ifdef RTL8190P
- priv->LedStrategy = HW_LED;
-#elif defined RTL8192E
priv->LedStrategy = SW_LED_MODE1;
-#endif
break;
}
RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
u8 ICVersion,SwitchingRegulatorOutput;
#endif
bool bfirmwareok = true;
-#ifdef RTL8190P
- u8 ucRegRead;
-#endif
u32 tmpRegA, tmpRegC, TempCCk;
int i = 0;
u32 retry_times = 0;
else
RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __func__, priv->pFirmware->firmware_status);
-#ifdef RTL8190P
- ulRegRead &= (~(CPU_GEN_GPIO_UART));
-#endif
write_nic_dword(dev, CPU_GEN, ulRegRead);
rtl8192_hwconfig(dev);
write_nic_byte(dev, CMDR, CR_RE|CR_TE);
-#ifdef RTL8190P
- write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) | \
- (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) | \
- (1<<MULRW_SHIFT)));
-#elif defined RTL8192E
write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |\
(MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
-#endif
write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
write_nic_dword(dev, RCR, priv->ReceiveConfig);
#ifdef RTL8192E
write_nic_byte(dev, 0x87, 0x0);
#endif
-#ifdef RTL8190P
- ucRegRead = read_nic_byte(dev, GPE);
- ucRegRead |= BIT0;
- write_nic_byte(dev, GPE, ucRegRead);
-
- ucRegRead = read_nic_byte(dev, GPO);
- ucRegRead &= ~BIT0;
- write_nic_byte(dev, GPO, ucRegRead);
-#endif
if (priv->RegRfOff == true) {
RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__func__);
if (cb_desc->bPacketBW)
{
pTxFwInfo->TxBandwidth = 1;
-#ifdef RTL8190P
- pTxFwInfo->TxSubCarrier = 3;
-#else
pTxFwInfo->TxSubCarrier = 0;
-#endif
}
else
{
{
u8 report;
-#ifdef RTL8190P
- u8 tmp_pwdb;
- char cck_adc_pwdb[4];
-#endif
- priv->stats.numqry_phystatusCCK++;
-
-#ifdef RTL8190P
- if (priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable && bpacket_match_bssid)
- {
- for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
- {
- tmp_pwdb = pcck_buf->adc_pwdb_X[i];
- cck_adc_pwdb[i] = (char)tmp_pwdb;
- cck_adc_pwdb[i] /= 2;
- pstats->cck_adc_pwdb[i] = precord_stats->cck_adc_pwdb[i] = cck_adc_pwdb[i];
- }
- }
-#endif
-
if (!reg824_bit9)
{
report = pcck_buf->cck_agc_rpt & 0xc0;
if (priv->brfpath_rxenable[i])
rf_rx_num++;
-#ifdef RTL8190P
- rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
-#else
rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
-#endif
tmp_rxsnr = pofdm_buf->rxsnr_X[i];
rx_snrX = (char)(tmp_rxsnr);
u8 OpMode;
u8 u1bTmp;
u32 ulRegRead;
-#ifdef RTL8190P
- u8 ucRegRead;
-#endif
OpMode = RT_OP_MODE_NO_LINK;
priv->rtllib->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
if (!priv->rtllib->bSupportRemoteWakeUp)
{
-#ifdef RTL8190P
- {
- PHY_SetRtl8190pRfOff(dev);
- }
-#elif defined RTL8192E
{
PHY_SetRtl8192eRfOff(dev);
}
-#endif
ulRegRead = read_nic_dword(dev,CPU_GEN);
ulRegRead|=CPU_GEN_SYSTEM_RESET;
write_nic_dword(dev,CPU_GEN, ulRegRead);
write_nic_dword(dev, WFCRC2, 0xffffffff);
-#ifdef RTL8190P
- {
- ucRegRead = read_nic_byte(dev, GPO);
- ucRegRead |= BIT0;
- write_nic_byte(dev, GPO, ucRegRead);
- }
-#endif
write_nic_byte(dev, PMR, 0x5);
write_nic_byte(dev, MacBlkCtrl, 0xa);
}
{
struct r8192_priv *priv = rtllib_priv(dev);
-#ifdef RTL8190P
- strcpy(priv->nick, "rtl8190p");
-#elif defined(RTL8192E)
strcpy(priv->nick, "rtl8192E");
-#endif
#ifdef _ENABLE_SW_BEACON
priv->rtllib->softmac_features = IEEE_SOFTMAC_SCAN |
{
struct r8192_priv *priv = rtllib_priv(dev);
bool bStuck = false;
-#if defined(RTL8192E) || defined(RTL8190P)
u16 RegTxCounter = read_nic_word(dev, 0x128);
-#elif defined (RTL8192SE) || defined (RTL8192CE)
- u16 RegTxCounter = read_nic_word(dev, 0x366);
-#else
- u16 RegTxCounter = priv->TxCounter + 1;
- WARN_ON(1);
-#endif
RT_TRACE(COMP_RESET, "%s():RegTxCounter is %d,TxCounter is %d\n",
__func__,RegTxCounter,priv->TxCounter);
u8 tmp_Short;
tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
-#if defined RTL8192SE || defined RTL8192CE
- if (TxHT==1 && TxRate != DESC92S_RATEMCS15)
-#elif defined RTL8192E || defined RTL8190P
if (TxHT==1 && TxRate != DESC90_RATEMCS15)
-#endif
tmp_Short = 0;
return tmp_Short;
switch (load_fw_status) {
case FW_INIT_STEP0_BOOT:
pfirmware->firmware_status = FW_STATUS_1_MOVE_BOOT_CODE;
-#ifdef RTL8190P
- rt_status = fwSendNullPacket(dev, RTL8190_CPU_START_OFFSET);
- if (!rt_status) {
- RT_TRACE(COMP_INIT, "fwSendNullPacket() fail ! \n");
- }
-#endif
break;
case FW_INIT_STEP1_MAIN:
struct r8192_priv *priv = rtllib_priv(dev);
bool rt_status = true;
-#ifdef RTL8190P
- u8 *firmware_img_buf[3] = { &Rtl8190PciFwBootArray[0],
- &Rtl8190PciFwMainArray[0],
- &Rtl8190PciFwDataArray[0]};
-
- u32 firmware_img_len[3] = { sizeof(Rtl8190PciFwBootArray),
- sizeof(Rtl8190PciFwMainArray),
- sizeof(Rtl8190PciFwDataArray)};
-#else
u8 *firmware_img_buf[3] = { &Rtl8192PciEFwBootArray[0],
&Rtl8192PciEFwMainArray[0],
&Rtl8192PciEFwDataArray[0]};
u32 firmware_img_len[3] = { sizeof(Rtl8192PciEFwBootArray),
sizeof(Rtl8192PciEFwMainArray),
sizeof(Rtl8192PciEFwDataArray)};
-#endif
u32 file_length = 0;
u8 *mapped_file = NULL;
u8 init_step = 0;
#define EEPROM_Default_TxPower 0x1010
#define EEPROM_ICVersion_ChannelPlan 0x7C
#define EEPROM_Customer_ID 0x7B
-#ifdef RTL8190P
-#define EEPROM_RFInd_PowerDiff 0x14
-#define EEPROM_ThermalMeter 0x15
-#define EEPROM_TxPwDiff_CrystalCap 0x16
-#define EEPROM_TxPwIndex_CCK 0x18
-#define EEPROM_TxPwIndex_OFDM_24G 0x26
-#define EEPROM_TxPwIndex_OFDM_5G 0x34
-#define EEPROM_C56_CrystalCap 0x17
-#define EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex 0x80
-#define EEPROM_C56_RfA_HT_OFDM_TxPwIndex 0x81
-#define EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex 0xbc
-#define EEPROM_C56_RfC_HT_OFDM_TxPwIndex 0xb9
-#else
#ifdef RTL8192E
#define EEPROM_RFInd_PowerDiff 0x28
#define EEPROM_ThermalMeter 0x29
#define EEPROM_TxPwIndex_CCK 0x2C
#define EEPROM_TxPwIndex_OFDM_24G 0x3A
#endif
-#endif
#define EEPROM_Default_TxPowerLevel 0x10
#define EEPROM_IC_VER 0x7d
#define EEPROM_CRC 0x7e
* Contact Information:
* wlanfae <wlanfae@realtek.com>
******************************************************************************/
-#if (defined(RTL8192E) || defined(RTL8190P))
-
#include "rtl_core.h"
#include "r8192E_hw.h"
#include "dot11d.h"
#endif
-#ifdef RTL8190P
-#include "r8190P_hwimg.h"
-#endif
-
#ifdef RTL8192E
#include "r8192E_hwimg.h"
#endif
{
u8 ret = 1;
struct r8192_priv *priv = rtllib_priv(dev);
-#ifdef RTL8190P
- if (priv->rf_type == RF_2T4R)
- {
- ret= 1;
- }
- else if (priv->rf_type == RF_1T2R)
- {
- if (eRFPath == RF90_PATH_A || eRFPath == RF90_PATH_B)
- ret = 0;
- else if (eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D)
- ret = 1;
- }
-#else
#ifdef RTL8192E
if (priv->rf_type == RF_2T4R)
ret = 0;
ret = 0;
}
#endif
-#endif
return ret;
}
void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData)
if (priv->rf_chip == RF_8256)
{
-#ifdef RTL8190P
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
-#else
#ifdef RTL8192E
rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
#endif
-#endif
if (Offset >= 31)
{
priv->RfReg0Value[eRFPath] |= 0x140;
bMaskDWord,
(priv->RfReg0Value[eRFPath] << 16));
-#ifdef RTL8190P
- if (priv->rf_type == RF_2T4R)
- {
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);
- }
- else if (priv->rf_type == RF_1T2R)
- {
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xc00, 0x3);
- }
-#else
#ifdef RTL8192E
rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
#endif
-#endif
}
if (priv->rf_chip == RF_8256)
{
-#ifdef RTL8190P
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
-#else
#ifdef RTL8192E
rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
#endif
-#endif
if (Offset >= 31)
{
bMaskDWord,
(priv->RfReg0Value[eRFPath] << 16));
}
-#ifdef RTL8190P
- if (priv->rf_type == RF_2T4R)
- {
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);
- }
- else if (priv->rf_type == RF_1T2R)
- {
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xc00, 0x3);
- }
-#else
#ifdef RTL8192E
rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
#endif
-#endif
}
return;
(bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue);
-#ifdef RTL8190P
- dwRegValue = priv->CrystalCap & 0x3;
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap01, dwRegValue);
- dwRegValue = ((priv->CrystalCap & 0xc)>>2);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, bXtalCap23, dwRegValue);
-#else
#ifdef RTL8192E
dwRegValue = priv->CrystalCap;
rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap92x, dwRegValue);
#endif
-#endif
}
void rtl8192_phy_getTxPower(struct net_device* dev)
{
struct r8192_priv *priv = rtllib_priv(dev);
-#ifdef RTL8190P
- priv->MCSTxPowerLevelOriginalOffset[0] =
- read_nic_dword(dev, MCS_TXAGC);
- priv->MCSTxPowerLevelOriginalOffset[1] =
- read_nic_dword(dev, (MCS_TXAGC+4));
- priv->CCKTxPowerLevelOriginalOffset =
- read_nic_dword(dev, CCK_TXAGC);
-#else
#ifdef RTL8192E
priv->MCSTxPowerLevelOriginalOffset[0] =
read_nic_dword(dev, rTxAGC_Rate18_06);
priv->MCSTxPowerLevelOriginalOffset[5] =
read_nic_dword(dev, rTxAGC_Mcs15_Mcs12);
#endif
-#endif
priv->DefaultInitialGain[0] = read_nic_byte(dev, rOFDM0_XAAGCCore1);
priv->DefaultInitialGain[1] = read_nic_byte(dev, rOFDM0_XBAGCCore1);
}
}
-#ifndef RTL8190P
static void CCK_Tx_Power_Track_BW_Switch_ThermalMeter(struct net_device *dev)
{
struct r8192_priv *priv = rtllib_priv(dev);
}
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
}
-#endif
static void CCK_Tx_Power_Track_BW_Switch(struct net_device *dev)
{
struct r8192_priv *priv = rtllib_priv(dev);
#endif
-#ifdef RTL8190P
- CCK_Tx_Power_Track_BW_Switch_TSSI(dev);
-#else
if (priv->IC_Cut >= IC_VersionCut_D)
CCK_Tx_Power_Track_BW_Switch_TSSI(dev);
else
CCK_Tx_Power_Track_BW_Switch_ThermalMeter(dev);
-#endif
}
void rtl8192_SetBWModeWorkItem(struct net_device *dev)
else
CCK_Tx_Power_Track_BW_Switch(dev);
-#ifdef RTL8190P
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bADClkPhase, 1);
- rtl8192_setBBreg(dev, rOFDM0_RxDetector1, bMaskByte0, 0x44);
-#else
#ifdef RTL8192E
rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 1);
#endif
-#endif
break;
case HT_CHANNEL_WIDTH_20_40:
rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00, priv->nCur40MhzPrimeSC);
-#ifdef RTL8190P
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bADClkPhase, 0);
- rtl8192_setBBreg(dev, rOFDM0_RxDetector1, bMaskByte0, 0x42);
-
- if (priv->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
- {
- rtl8192_setBBreg(dev, rFPGA0_RFMOD, (BIT6|BIT5), 0x01);
- }else if (priv->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
- {
- rtl8192_setBBreg(dev, rFPGA0_RFMOD, (BIT6|BIT5), 0x02);
- }
-
-#else
#ifdef RTL8192E
rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0);
#endif
-#endif
break;
default:
RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n" ,priv->CurrentChannelBW);
}
}
-#if defined RTL8190P
-extern void
-PHY_SetRtl8190pRfOff(struct net_device* dev )
-{
- struct r8192_priv *priv = rtllib_priv(dev);
-
- if (priv->rf_type == RF_2T4R)
- {
- rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
- }
- rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x0);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e0, 0x0);
- rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
- rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e00, 0x0);
-
-}
-#endif
-
#if defined RTL8192E
extern void
PHY_SetRtl8192eRfOff(struct net_device* dev )
{
case eRfOn:
RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOn !\n");
- #ifdef RTL8190P
- if (priv->rf_type == RF_2T4R)
- {
- rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1);
- rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e0, 0xf);
- rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0xf);
- rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0xf);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e00, 0xf);
- }
- else if (priv->rf_type == RF_1T2R)
- {
- rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xc00, 0x3);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x180, 0x3);
- rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xc, 0x3);
- rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xc, 0x3);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1800, 0x3);
- }
- else if (priv->rf_type == RF_1T1R)
- {
- rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x400, 0x1);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x80, 0x1);
- rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x4, 0x1);
- rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x4, 0x1);
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x800, 0x1);
- }
-
-#elif defined RTL8192E
if ((priv->rtllib->eRFPowerState == eRfOff) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))
{
bool rtstatus = true;
}
- #endif
break;
case eRfSleep:
}
}
-#ifdef RTL8190P
- {
- PHY_SetRtl8190pRfOff(dev);
- }
-#elif defined RTL8192E
{
PHY_SetRtl8192eRfOff(dev);
}
-#endif
}
break;
}
}
-#if defined RTL8190P
- {
- PHY_SetRtl8190pRfOff(dev);
- }
-#elif defined RTL8192E
{
if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))
{
}
#endif
}
-#else
- else
- {
- RT_TRACE(COMP_DBG,DBG_TRACE,("It is not 8190Pci and 8192PciE \n"));
- }
- #endif
break;
}
}
-
-#endif
#define MAX_RFDEPENDCMD_CNT 16
#define MAX_POSTCMD_CNT 16
-#ifdef RTL8190P
-#define AGCTAB_ArrayLength AGCTAB_ArrayLengthPci
-#define MACPHY_ArrayLength MACPHY_ArrayLengthPci
-#define RadioA_ArrayLength RadioA_ArrayLengthPci
-#define RadioB_ArrayLength RadioB_ArrayLengthPci
-#define MACPHY_Array_PGLength MACPHY_Array_PGLengthPci
-#define RadioC_ArrayLength RadioC_ArrayLengthPci
-#define RadioD_ArrayLength RadioD_ArrayLengthPci
-#define PHY_REGArrayLength PHY_REGArrayLengthPci
-#define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPci
-
-#define Rtl819XMACPHY_Array_PG Rtl8190PciMACPHY_Array_PG
-#define Rtl819XMACPHY_Array Rtl8190PciMACPHY_Array
-#define Rtl819XRadioA_Array Rtl8190PciRadioA_Array
-#define Rtl819XRadioB_Array Rtl8190PciRadioB_Array
-#define Rtl819XRadioC_Array Rtl8190PciRadioC_Array
-#define Rtl819XRadioD_Array Rtl8190PciRadioD_Array
-#define Rtl819XAGCTAB_Array Rtl8190PciAGCTAB_Array
-#define Rtl819XPHY_REGArray Rtl8190PciPHY_REGArray
-#define Rtl819XPHY_REG_1T2RArray Rtl8190PciPHY_REG_1T2RArray
-#endif
-
#ifdef RTL8192E
#define AGCTAB_ArrayLength AGCTAB_ArrayLengthPciE
#define MACPHY_ArrayLength MACPHY_ArrayLengthPciE
extern void rtl8192_SetBWModeWorkItem(struct net_device *dev);
extern void InitialGain819xPci(struct net_device *dev, u8 Operation);
-#if defined RTL8190P
-extern void
-PHY_SetRtl8190pRfOff(struct net_device* dev );
-#endif
-
#if defined RTL8192E
extern void
PHY_SetRtl8192eRfOff(struct net_device* dev );
u8 retValue = 0;
-#if (defined RTL8192U || defined RTL8192E || defined RTL8190P)
- {
if (ieee->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
{
retValue = 1;
}
- }
-#endif
return retValue;
}
u8 HTIOTActIsCCDFsync(struct rtllib_device *ieee)
{
u8 retValue = 0;
-#if (defined RTL8190P || defined RTL8192U || defined RTL8192SU)
if (ieee->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
{
retValue = 1;
}
-#endif
return retValue;
}
ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_MIN_SPACE, &pHTInfo->CurrentMPDUDensity);
}
#endif
-#ifndef RTL8190P
if (pHTInfo->IOTAction & HT_IOT_ACT_TX_USE_AMSDU_8K)
-#else
- if ( 0 )
-#endif
{
pHTInfo->bCurrentAMPDUEnable = false;
pHTInfo->ForcedAMSDUMode = HT_AGG_FORCE_ENABLE;
if (bIOTAction)
pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_EDCA_TURBO;
-#if defined(RTL8190P) || defined(RTL8192E) || defined(RTL8192U)
bIOTAction = HTIOTActIsMgntUseCCK6M(ieee,pNetwork);
if (bIOTAction)
pHTInfo->IOTAction |= HT_IOT_ACT_MGNT_USE_CCK_6M;
-#elif defined(RTL8192SE) || defined(RTL8192SU) || defined RTL8192CE
- bIOTAction = HTIOTActWAIOTBroadcom(ieee);
- if (bIOTAction)
- {
- pHTInfo->IOTAction |= HT_IOT_ACT_WA_IOT_Broadcom;
- }
-#endif
bIOTAction = HTIOTActIsCCDFsync(ieee);
if (bIOTAction)
pHTInfo->IOTAction |= HT_IOT_ACT_CDD_FSYNC;
}
}
-#ifdef RTL8192CE
- if ( net->mode & IEEE_G)
-#elif defined RTL8192SE || defined RTL8192E || defined RTL8190P
if (net->mode & (IEEE_G|IEEE_N_24G))
-#endif
{
u8 slot_time_val;
u8 CurSlotTime = priv->slot_time;
-#ifdef RTL8192CE
- if ( (cap & WLAN_CAPABILITY_SHORT_SLOT_TIME) && (!(priv->rtllib->pHTInfo->RT2RT_HT_Mode & RT_HT_CAP_USE_LONG_PREAMBLE)))
-#elif defined RTL8192SE || defined RTL8192E || defined RTL8190P
if ((cap & WLAN_CAPABILITY_SHORT_SLOT_TIME) && (!priv->rtllib->pHTInfo->bCurrentRT2RTLongSlotTime))
-#endif
{
if (CurSlotTime != SHORT_SLOT_TIME)
{
priv->RegSupportPciASPM = 2;
-#elif defined RTL8190P
#endif
}
dm_backup_dynamic_mechanism_state(dev);
#endif
-#ifdef RTL8190P
- priv->ops->stop_adapter(dev, true);
-#endif
up(&priv->wx_sem);
RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__func__);
struct rtllib_rx_stats * pprevious_stats
)
{
-#ifdef RTL8190P
- char last_cck_adc_pwdb[4]={0,0,0,0};
- u8 i;
- if (priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable)
- {
- if (pprevious_stats->bIsCCK &&
- (pprevious_stats->bPacketToSelf ||pprevious_stats->bPacketBeacon))
- {
- if (priv->stats.cck_adc_pwdb.TotalNum++ >= PHY_RSSI_SLID_WIN_MAX)
- {
- priv->stats.cck_adc_pwdb.TotalNum = PHY_RSSI_SLID_WIN_MAX;
- for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
- {
- last_cck_adc_pwdb[i] = priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index];
- priv->stats.cck_adc_pwdb.TotalVal[i] -= last_cck_adc_pwdb[i];
- }
- }
- for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
- {
- priv->stats.cck_adc_pwdb.TotalVal[i] += pprevious_stats->cck_adc_pwdb[i];
- priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index] = pprevious_stats->cck_adc_pwdb[i];
- }
- priv->stats.cck_adc_pwdb.index++;
- if (priv->stats.cck_adc_pwdb.index >= PHY_RSSI_SLID_WIN_MAX)
- priv->stats.cck_adc_pwdb.index = 0;
-
- for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
- {
- DM_RxPathSelTable.cck_pwdb_sta[i] = priv->stats.cck_adc_pwdb.TotalVal[i]/priv->stats.cck_adc_pwdb.TotalNum;
- }
-
- for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
- {
- if (pprevious_stats->cck_adc_pwdb[i] > (char)priv->undecorated_smoothed_cck_adc_pwdb[i])
- {
- priv->undecorated_smoothed_cck_adc_pwdb[i] =
- ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
- (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
- priv->undecorated_smoothed_cck_adc_pwdb[i] = priv->undecorated_smoothed_cck_adc_pwdb[i] + 1;
- }
- else
- {
- priv->undecorated_smoothed_cck_adc_pwdb[i] =
- ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
- (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
- }
- }
- }
- }
-#endif
}
-#if defined(RTL8192E)||defined(RTL8190P)
static void dm_bb_initialgain_restore(struct net_device *dev);
static void dm_bb_initialgain_backup(struct net_device *dev);
-#endif
static void dm_dig_init(struct net_device *dev);
static void dm_ctrl_initgain_byrssi(struct net_device *dev);
static void dm_check_edca_turbo(struct net_device *dev);
-#ifndef RTL8190P
-#endif
static void dm_check_pbc_gpio(struct net_device *dev);
RT_TRACE(COMP_POWER_TRACKING, "powerlevelOFDM24G = %x\n", powerlevelOFDM24G);
-#ifdef RTL8190P
- for (j = 0; j<1; j++)
-#else
for (j = 0; j<=30; j++)
-#endif
{
tx_cmd.Op = TXCMD_SET_TX_PWR_TRACKING;
RT_TRACE(COMP_POWER_TRACKING, "tx power track is done\n");
RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real = %d\n", priv->rfa_txpowertrackingindex_real);
-#ifdef RTL8190P
- RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex = %d\n", priv->rfc_txpowertrackingindex);
- RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real = %d\n", priv->rfc_txpowertrackingindex_real);
-#endif
RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference = %d\n", priv->CCKPresentAttentuation_difference);
RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
return;
else
{
{
-#ifdef RTL8190P
- {
- if (priv->rfc_txpowertrackingindex > 0)
- {
- priv->rfc_txpowertrackingindex--;
- if (priv->rfc_txpowertrackingindex_real > 4)
- {
- priv->rfc_txpowertrackingindex_real--;
- rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
- }
- }
- else
- rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
- }
-#endif
#ifdef RTL8192E
{
if (priv->rfa_txpowertrackingindex > 0)
else
{
{
-#ifdef RTL8190P
- {
- if (priv->rfc_txpowertrackingindex < (TxBBGainTableLength - 1))
- {
- priv->rfc_txpowertrackingindex++;
- priv->rfc_txpowertrackingindex_real++;
- rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
- }
- else
- rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
- }
-#endif
#ifdef RTL8192E
{
if (priv->rfa_txpowertrackingindex < (TxBBGainTableLength - 1))
= priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
}else{
{
-#ifdef RTL8190P
- priv->CCKPresentAttentuation_difference
- = priv->rfc_txpowertrackingindex - priv->rfc_txpowertracking_default;
-#endif
#ifdef RTL8192E
priv->CCKPresentAttentuation_difference
= priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
}
RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real = %d\n", priv->rfa_txpowertrackingindex_real);
-#ifdef RTL8190P
- RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex = %d\n", priv->rfc_txpowertrackingindex);
- RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real = %d\n", priv->rfc_txpowertrackingindex_real);
-#endif
RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference = %d\n", priv->CCKPresentAttentuation_difference);
RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
void dm_initialize_txpower_tracking(struct net_device *dev)
{
struct r8192_priv *priv = rtllib_priv(dev);
-#ifdef RTL8190P
- dm_InitializeTXPowerTracking_TSSI(dev);
-#elif defined RTL8192E
if (priv->IC_Cut >= IC_VersionCut_D)
dm_InitializeTXPowerTracking_TSSI(dev);
else
dm_InitializeTXPowerTracking_ThermalMeter(dev);
-#elif defined RTL8192SE
- dm_InitializeTXPowerTracking_ThermalMeter(dev);
-#endif
}
-#if (defined RTL8192E || defined RTL8190P)
static void dm_CheckTXPowerTracking_TSSI(struct net_device *dev)
{
struct r8192_priv *priv = rtllib_priv(dev);
}
}
-#endif
-#ifndef RTL8190P
static void dm_CheckTXPowerTracking_ThermalMeter(struct net_device *dev)
{
struct r8192_priv *priv = rtllib_priv(dev);
}
}
-#endif
#ifdef RTL8192SE
void DM_TXPowerTracking92SDirectCall(struct net_device *dev)
#ifdef RTL8192E
struct r8192_priv *priv = rtllib_priv(dev);
#endif
-#ifdef RTL8190P
- dm_CheckTXPowerTracking_TSSI(dev);
-#elif defined RTL8192E
if (priv->IC_Cut >= IC_VersionCut_D)
dm_CheckTXPowerTracking_TSSI(dev);
else
dm_CheckTXPowerTracking_ThermalMeter(dev);
-#elif defined RTL8192SE
- dm_CheckTXPowerTracking_ThermalMeter(dev);
-#endif
-
}
#ifndef RTL8192SE
bool binch14
)
{
-#ifndef RTL8190P
struct r8192_priv *priv = rtllib_priv(dev);
-#endif
-#ifdef RTL8190P
- dm_CCKTxPowerAdjust_TSSI(dev, binch14);
-#else
if (priv->IC_Cut >= IC_VersionCut_D)
dm_CCKTxPowerAdjust_TSSI(dev, binch14);
else
dm_CCKTxPowerAdjust_ThermalMeter(dev, binch14);
-#endif
}
#endif
-
-#if defined(RTL8192E)||defined(RTL8190P)
static void dm_txpower_reset_recovery(
struct net_device *dev
)
}
-#endif
extern void dm_change_dynamic_initgain_thresh(struct net_device *dev,
u32 dm_type,
u32 dm_value)
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
{
- #ifdef RTL8190P
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
- #else
write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
- #endif
- /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
- write_nic_byte(pAdapter, rOFDM0_RxDetector1, 0x40);
- */
-
-
}
else
write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
{
- #ifdef RTL8190P
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
- #else
write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
- #endif
- /*
- else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
- */
-
}
else
write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
{
- #ifdef RTL8190P
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
- #else
write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
- #endif
-
- /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
- */
-
}
else
write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
{
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
{
- #ifdef RTL8190P
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
- #else
write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
- #endif
- /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
- */
-
}
else
write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
{
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
{
- #ifdef RTL8190P
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
- #else
write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
- #endif
- /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
- */
}
else
write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
{
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
{
- #ifdef RTL8190P
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
- #else
write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
- #endif
- /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
- */
}
else
write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
{
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
{
- #ifdef RTL8190P
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
- #else
write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
- #endif
- /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
- */
}
else
write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
priv->bswitch_fsync = !priv->bswitch_fsync;
if (priv->bswitch_fsync)
{
- #ifdef RTL8190P
- write_nic_byte(dev,0xC36, 0x00);
-#elif defined RTL8192E
write_nic_byte(dev,0xC36, 0x1c);
- #endif
write_nic_byte(dev, 0xC3e, 0x90);
}
else
{
- #ifdef RTL8190P
- write_nic_byte(dev, 0xC36, 0x40);
- #else
write_nic_byte(dev, 0xC36, 0x5c);
- #endif
write_nic_byte(dev, 0xC3e, 0x96);
}
}
if (priv->bswitch_fsync)
{
priv->bswitch_fsync = false;
- #ifdef RTL8190P
- write_nic_byte(dev, 0xC36, 0x40);
-#elif defined RTL8192E
write_nic_byte(dev, 0xC36, 0x5c);
- #endif
write_nic_byte(dev, 0xC3e, 0x96);
}
}
if (priv->bswitch_fsync)
{
priv->bswitch_fsync = false;
- #ifdef RTL8190P
- write_nic_byte(dev, 0xC36, 0x40);
-#elif defined RTL8192E
write_nic_byte(dev, 0xC36, 0x5c);
- #endif
write_nic_byte(dev, 0xC3e, 0x96);
}
priv->ContiuneDiffCount = 0;
- #ifdef RTL8190P
- write_nic_dword(dev, rOFDM0_RxDetector2, 0x164052cd);
-#elif defined RTL8192E
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
- #endif
}
RT_TRACE(COMP_HALDM, "ContiuneDiffCount %d\n", priv->ContiuneDiffCount);
RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff , priv->bswitch_fsync);
{
priv->bswitch_fsync = false;
- #ifdef RTL8190P
- write_nic_byte(dev, 0xC36, 0x40);
-#elif defined RTL8192E
write_nic_byte(dev, 0xC36, 0x5c);
-#endif
write_nic_byte(dev, 0xC3e, 0x96);
}
{
if (reg_c38_State != RegC38_Fsync_AP_BCM)
{
- #ifdef RTL8190P
- write_nic_byte(dev, rOFDM0_RxDetector3, 0x15);
- #else
write_nic_byte(dev, rOFDM0_RxDetector3, 0x95);
- #endif
reg_c38_State = RegC38_Fsync_AP_BCM;
}
if (priv->rtllib->state == RTLLIB_LINKED) {
if (priv->undecorated_smoothed_pwdb <= RegC38_TH) {
if (reg_c38_State != RegC38_NonFsync_Other_AP) {
-#ifdef RTL8190P
- write_nic_byte(dev, rOFDM0_RxDetector3, 0x10);
-#else
write_nic_byte(dev, rOFDM0_RxDetector3, 0x90);
-#endif
reg_c38_State = RegC38_NonFsync_Other_AP;
}
#define DM_DIG_BACKOFF 12
-#ifdef RTL8192SE
-#define DM_DIG_MAX 0x3e
-#elif defined RTL8190P || defined RTL8192E
#define DM_DIG_MAX 0x36
-#endif
#define DM_DIG_MIN 0x1c
#define DM_DIG_MIN_Netcore 0x12
#define RateAdaptiveTH_Low_40M 10
#define VeryLowRSSI 15
-#ifdef RTL8192SE
-#define CTSToSelfTHVal 30
-#elif defined RTL8190P || defined RTL8192E
#define CTSToSelfTHVal 35
-#endif
#define WAIotTHVal 25
/* added for rtl819x tx procedure */
#define MAX_QUEUE_SIZE 0x10
-#if defined(RTL8192SU) || defined(RTL8190P) ||defined(RTL8192U) ||defined(RTL8192E)
#define BK_QUEUE 0
#define BE_QUEUE 1
#define VI_QUEUE 2
#define MGNT_QUEUE 6
#define HIGH_QUEUE 7
#define BEACON_QUEUE 8
-#elif defined(RTL8192SE)
-#define BK_QUEUE 0
-#define BE_QUEUE 1
-#define VI_QUEUE 2
-#define VO_QUEUE 3
-#define BEACON_QUEUE 4
-#define TXCMD_QUEUE 5
-#define MGNT_QUEUE 6
-#define HIGH_QUEUE 7
-#define HCCA_QUEUE 8
-
-#endif
#define LOW_QUEUE BE_QUEUE
#define NORMAL_QUEUE MGNT_QUEUE
{
if (rtllib->ps != RTLLIB_PS_DISABLED)
{
-#ifndef RTL8190P
rtllib->sta_wake_up(rtllib->dev);
-#endif
}
#ifdef TO_DO