USB: Fix usb clk.

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 46e95ce7cbbff68b695db036383d0adcd29052f7..ca8df4cdc6717ad19bb2d1dace5dadbcf8dc531b 100755 (executable)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -914,7 +914,7 @@
                compatible = "rockchip,rk3288_usb20_host";
                reg = <0xff540000 0x40000>;
                interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
-               /*clocks = <&clk_gates13 5>, <&clk_gates7 6>;*/
+               /*clocks = <&clk_gates13 6>, <&clk_gates7 7>;*/
                /*clock-names = "clk_usbphy1", "hclk_usb1";*/
        };
 
@@ -922,7 +922,7 @@
                compatible = "rockchip,rk3288_rk_ehci_host";
                reg = <0xff500000 0x20000>;
                interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
-               /*clocks = <&clk_gates13 6>, <&clk_gates7 7>;*/
+               /*clocks = <&clk_gates13 5>, <&clk_gates7 6>;*/
                /*clock-names = "clk_usbphy2", "hclk_usb2";*/
        };
 
@@ -930,7 +930,7 @@
                compatible = "rockchip,rk3288_rk_ohci_host";
                reg = <0xff520000 0x20000>;
                interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-               /*clocks = <&clk_gates13 6>, <&clk_gates7 7>;*/
+               /*clocks = <&clk_gates13 5>, <&clk_gates7 6>;*/
                /*clock-names = "clk_usbphy3", "hclk_usb3";*/
        };
 

diff --git a/drivers/usb/dwc_otg_310/usbdev_rk32.c b/drivers/usb/dwc_otg_310/usbdev_rk32.c
index d6ecfd13915380c4f228d213ec3dffc36258b41e..819c8c2c012202ffe9f655b3d28586c22a09fa46 100755 (executable)
--- a/drivers/usb/dwc_otg_310/usbdev_rk32.c
+++ b/drivers/usb/dwc_otg_310/usbdev_rk32.c
@@ -298,9 +298,10 @@ static void rk_hsic_hw_init(void)
        control_usb->grf_uoc3_base->CON0 = ((0xf<<6)<<16)|(0xf<<6);
 
        /* other haredware init
-        * set common_on, in suspend mode, otg/host PLL blocks remain powered
+        * set common_on = 0, in suspend mode, otg/host PLL blocks remain powered
+        * for RK3288, use host1 (DWC_OTG) 480M phy clk
         */
-
+       control_usb->grf_uoc2_base->CON0 = (1<<16)|0;
 
        /* change INCR to INCR16 or INCR8(beats less than 16)
         * or INCR4(beats less than 8) or SINGLE(beats less than 4)
@@ -330,9 +331,9 @@ static void rk_hsic_clock_init(void* pdata)
                return;
        }
 
-       phyclk_usbphy1 = devm_clk_get(usbpdata->dev, "hsic_usbphy1");
+       phyclk_usbphy1 = devm_clk_get(usbpdata->dev, "hsic_usbphy2");
        if (IS_ERR(phyclk_usbphy1)) {
-               dev_err(usbpdata->dev, "Failed to get hsic_usbphy1\n");
+               dev_err(usbpdata->dev, "Failed to get hsic_usbphy2\n");
                return;
        }