ARM assembly parsing and encoding for SSAX, SSUB16 and SSUB8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136013 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index b00b70b7b4d10d7ce6b68bee4e267dcf77ea2097..16d3fd0c8987323dfa940913bf593b9cde8f2e29 100644 (file)
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -1642,6 +1642,29 @@ _func:
 @ CHECK: ssat16        r3, #16, r5             @ encoding: [0x35,0x3f,0xaf,0xe6]
 
 
+@------------------------------------------------------------------------------
+@ SSAX
+@------------------------------------------------------------------------------
+        ssax r2, r3, r4
+        ssaxlt r2, r3, r4
+
+@ CHECK: ssax  r2, r3, r4              @ encoding: [0x54,0x2f,0x13,0xe6]
+@ CHECK: ssaxlt        r2, r3, r4              @ encoding: [0x54,0x2f,0x13,0xb6]
+
+@------------------------------------------------------------------------------
+@ SSUB16/SSUB8
+@------------------------------------------------------------------------------
+        ssub16 r1, r0, r6
+        ssub16ne r5, r3, r2
+        ssub8 r9, r2, r4
+        ssub8eq r5, r1, r2
+
+@ CHECK: ssub16        r1, r0, r6              @ encoding: [0x76,0x1f,0x10,0xe6]
+@ CHECK: ssub16ne      r5, r3, r2      @ encoding: [0x72,0x5f,0x13,0x16]
+@ CHECK: ssub8 r9, r2, r4              @ encoding: [0xf4,0x9f,0x12,0xe6]
+@ CHECK: ssub8eq       r5, r1, r2      @ encoding: [0xf2,0x5f,0x11,0x06]
+
+
 @------------------------------------------------------------------------------
 @ STM*
 @------------------------------------------------------------------------------