Vector results may be returned in XMM0 and XMM1, not just XMM0. With

the recent lowering changes, this allows types like <4 x double> to
be returned, using two vector registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37844 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td
index d8942d8c4fd122c5bee06a0cf663e51f3ae575e3..c98b3a2aec5225fcfb167b2f2a31b58e44700546 100644 (file)
--- a/lib/Target/X86/X86CallingConv.td
+++ b/lib/Target/X86/X86CallingConv.td
@@ -28,9 +28,10 @@ def RetCC_X86Common : CallingConv<[
   CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>,
   CCIfType<[i64], CCAssignToReg<[RAX, RDX]>>,
   
-  // Vector types are always returned in XMM0.  If the target doesn't have XMM0,
-  // it won't have vector types.
-  CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToReg<[XMM0]>>,
+  // Vector types are returned in XMM0 and XMM1, when they fit.  If the target
+  // doesn't have XMM registers, it won't have vector types.
+  CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
+            CCAssignToReg<[XMM0,XMM1]>>,
 
   // MMX vector types are always returned in MM0. If the target doesn't have
   // MM0, it doesn't support these vector types.