clk: rockchip: rk3399: add 216M and 96M for armclkb and armclkl

support 216M/96M for armclkb and armclkl

Change-Id: I26bf94ab0b27863a438b52be29e1a3aa208fa6ff
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index bb3a04d234300ec89ceb443a8562348259f6f64b..7fbf48b15e5b788284cf1be8f2ea876b1837a7a0 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -346,6 +346,8 @@ static struct rockchip_cpuclk_rate_table rk3399_cpuclkl_rates[] __initdata = {
        RK3399_CPUCLKL_RATE( 600000000, 1, 3, 3),
        RK3399_CPUCLKL_RATE( 408000000, 1, 2, 2),
        RK3399_CPUCLKL_RATE( 312000000, 1, 1, 1),
+       RK3399_CPUCLKL_RATE( 216000000, 1, 1, 1),
+       RK3399_CPUCLKL_RATE(  96000000, 1, 1, 1),
 };
 
 static struct rockchip_cpuclk_rate_table rk3399_cpuclkb_rates[] __initdata = {
@@ -368,6 +370,8 @@ static struct rockchip_cpuclk_rate_table rk3399_cpuclkb_rates[] __initdata = {
        RK3399_CPUCLKB_RATE( 600000000, 1, 3, 3),
        RK3399_CPUCLKB_RATE( 408000000, 1, 2, 2),
        RK3399_CPUCLKB_RATE( 312000000, 1, 1, 1),
+       RK3399_CPUCLKB_RATE( 216000000, 1, 1, 1),
+       RK3399_CPUCLKB_RATE(  96000000, 1, 1, 1),
 };
 
 static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {