[FastISel][AArch64] Move unconditional branch handling into 'SelectBranch'. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217054 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64FastISel.cpp b/lib/Target/AArch64/AArch64FastISel.cpp
index 87748c9d98e23e69f5d3fbf2f886d4665fcf66d0..02221af44c7aff2dfe86665da7a1dc3e1fc097c8 100644 (file)
--- a/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/lib/Target/AArch64/AArch64FastISel.cpp
@@ -1524,6 +1524,12 @@ static AArch64CC::CondCode getCompareCC(CmpInst::Predicate Pred) {
 
 bool AArch64FastISel::SelectBranch(const Instruction *I) {
   const BranchInst *BI = cast<BranchInst>(I);
+  if (BI->isUnconditional()) {
+    MachineBasicBlock *MSucc = FuncInfo.MBBMap[BI->getSuccessor(0)];
+    FastEmitBranch(MSucc, BI->getDebugLoc());
+    return true;
+  }
+
   MachineBasicBlock *TBB = FuncInfo.MBBMap[BI->getSuccessor(0)];
   MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)];
 
@@ -3471,16 +3477,8 @@ bool AArch64FastISel::TargetSelectInstruction(const Instruction *I) {
     return SelectBinaryOp(I, ISD::XOR);
   case Instruction::GetElementPtr:
     return SelectGetElementPtr(I);
-  case Instruction::Br: {
-    const BranchInst *BI = cast<BranchInst>(I);
-    if (BI->isUnconditional()) {
-      const BasicBlock *LLVMSucc = BI->getSuccessor(0);
-      MachineBasicBlock *MSucc = FuncInfo.MBBMap[LLVMSucc];
-      FastEmitBranch(MSucc, BI->getDebugLoc());
-      return true;
-    }
+  case Instruction::Br:
     return SelectBranch(I);
-  }
   case Instruction::IndirectBr:
     return SelectIndirectBr(I);
   case Instruction::Unreachable: