ASoC: rockchip: Fix incorrect VDW value for 24 bit
authorSjoerd Simons <sjoerd.simons@collabora.co.uk>
Wed, 25 Nov 2015 08:54:11 +0000 (09:54 +0100)
committerMark Brown <broonie@kernel.org>
Wed, 25 Nov 2015 11:58:15 +0000 (11:58 +0000)
Correct valid data word register value for 24 bit data width. The
bit value should be 10 (aka 0x2), not 0x10.

This fixes playback of 24 bit audio.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/rockchip/rockchip_spdif.h

index 07f86a21046a524b32687f7252b54affa5fce1f7..921b4095fb92c98d7b09fb8d7ec8bbea7f9139bb 100644 (file)
@@ -28,9 +28,9 @@
 #define SPDIF_CFGR_VDW(x)      (x << SPDIF_CFGR_VDW_SHIFT)
 #define SDPIF_CFGR_VDW_MASK    (0xf << SPDIF_CFGR_VDW_SHIFT)
 
-#define SPDIF_CFGR_VDW_16      SPDIF_CFGR_VDW(0x00)
-#define SPDIF_CFGR_VDW_20      SPDIF_CFGR_VDW(0x01)
-#define SPDIF_CFGR_VDW_24      SPDIF_CFGR_VDW(0x10)
+#define SPDIF_CFGR_VDW_16      SPDIF_CFGR_VDW(0x0)
+#define SPDIF_CFGR_VDW_20      SPDIF_CFGR_VDW(0x1)
+#define SPDIF_CFGR_VDW_24      SPDIF_CFGR_VDW(0x2)
 
 /*
  * DMACR