Encoding info for extension instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116560 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 703bc1a094ad3ca0ea5c410360344ff1fe829ed2..3942e18dfe1828f78d77db85591aa4eccd233dbc 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -614,6 +614,10 @@ multiclass AI_ext_rrot<bits<8> opcod, string opc, PatFrag opnode> {
                  IIC_iEXTr, opc, "\t$Rd, $Rm",
                  [(set GPR:$Rd, (opnode GPR:$Rm))]>,
               Requires<[IsARM, HasV6]> {
+    bits<4> Rd;
+    bits<4> Rm;
+    let Inst{15-12} = Rd;
+    let Inst{3-0}   = Rm;
     let Inst{11-10} = 0b00;
     let Inst{19-16} = 0b1111;
   }
@@ -621,8 +625,12 @@ multiclass AI_ext_rrot<bits<8> opcod, string opc, PatFrag opnode> {
                  IIC_iEXTr, opc, "\t$Rd, $Rm, ror $rot",
                  [(set GPR:$Rd, (opnode (rotr GPR:$Rm, rot_imm:$rot)))]>,
               Requires<[IsARM, HasV6]> {
+    bits<4> Rd;
+    bits<4> Rm;
     bits<2> rot;
+    let Inst{15-12} = Rd;
     let Inst{11-10} = rot;
+    let Inst{3-0}   = Rm;
     let Inst{19-16} = 0b1111;
   }
 }