x86: poll waiting for I/OAT DMA channel status

For certain system configurations a 5 usec udelay before checking I/OAT DMA
channel status is sometimes not sufficient, resulting in a false failure
status and unnecessary freeing of channel resources.  Conversely, for many
configurations 5 usec is longer than necessary.

Loop for up to 20 usec waiting for successful status before failing.

Signed-off-by: Dimitri Sivanich <sivanich@sgi.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c
index effd140fc042b827617bebce013dae190c7b4d76..54d1a3c24e9cf7ced38c8bbf53f56c888254c792 100644 (file)
--- a/drivers/dma/ioat/dma_v2.c
+++ b/drivers/dma/ioat/dma_v2.c
@@ -507,6 +507,7 @@ int ioat2_alloc_chan_resources(struct dma_chan *c)
        struct ioat_ring_ent **ring;
        u64 status;
        int order;
+       int i = 0;
 
        /* have we already been set up? */
        if (ioat->ring)
@@ -547,8 +548,11 @@ int ioat2_alloc_chan_resources(struct dma_chan *c)
        ioat2_start_null_desc(ioat);
 
        /* check that we got off the ground */
-       udelay(5);
-       status = ioat_chansts(chan);
+       do {
+               udelay(1);
+               status = ioat_chansts(chan);
+       } while (i++ < 20 && !is_ioat_active(status) && !is_ioat_idle(status));
+
        if (is_ioat_active(status) || is_ioat_idle(status)) {
                set_bit(IOAT_RUN, &chan->state);
                return 1 << ioat->alloc_order;