Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator
authorChris Lattner <sabre@nondot.org>
Mon, 16 Dec 2002 14:38:13 +0000 (14:38 +0000)
committerChris Lattner <sabre@nondot.org>
Mon, 16 Dec 2002 14:38:13 +0000 (14:38 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5071 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86.h
lib/Target/X86/X86TargetMachine.cpp

index f2db74eed05579382c90008047f1147a8d58b180..a917d3c45a58db09b2bc38c9734cfe0bf125912b 100644 (file)
@@ -20,11 +20,11 @@ class Pass;
 ///
 Pass *createSimpleX86InstructionSelector(TargetMachine &TM);
 
-/// X86SimpleRegisterAllocation - This function converts the specified machine
-/// code function from SSA form to use explicit registers by spilling every
-/// register.  Wow, great policy huh?
+/// createSimpleRegisterAllocation - This function converts the specified
+/// machine code function from SSA form to use explicit registers by spilling
+/// every register.  Wow, great policy huh?
 ///
-Pass *createSimpleX86RegisterAllocator(TargetMachine &TM);
+Pass *createSimpleRegisterAllocator(TargetMachine &TM);
 
 /// createX86CodePrinterPass - Print out the specified machine code function to
 /// the specified stream.  This function should work regardless of whether or
index b3c84fb821ab0bf1e40a315dcd8c13854cd5a655..d710eb473d3463cc0bb8bc67feccc77e3a867d37 100644 (file)
@@ -43,7 +43,7 @@ bool X86TargetMachine::addPassesToJITCompile(PassManager &PM) {
   DEBUG(PM.add(createMachineFunctionPrinterPass()));
 
   // Perform register allocation to convert to a concrete x86 representation
-  PM.add(createSimpleX86RegisterAllocator(*this));
+  PM.add(createSimpleRegisterAllocator(*this));
 
   // Print the instruction selected machine code...
   // PM.add(createMachineFunctionPrinterPass());