{
struct at91_request *req;
- // terminer chaque requete dans la queue
+ /* terminate any request in the queue */
ep->stopped = 1;
if (list_empty(&ep->queue))
return;
.queue = at91_ep_queue,
.dequeue = at91_ep_dequeue,
.set_halt = at91_ep_set_halt,
- // there's only imprecise fifo status reporting
+ /* there's only imprecise fifo status reporting */
};
/*-------------------------------------------------------------------------*/
ep->fifo_bank = 0;
ep->ep.maxpacket = ep->maxpacket;
ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i);
- // initialiser une queue par endpoint
+ /* initialize one queue per endpoint */
INIT_LIST_HEAD(&ep->queue);
}
}
struct at91_udc *udc = to_udc(gadget);
unsigned long flags;
- // VDBG("vbus %s\n", is_active ? "on" : "off");
+ /* VDBG("vbus %s\n", is_active ? "on" : "off"); */
spin_lock_irqsave(&udc->lock, flags);
udc->vbus = (is_active != 0);
if (udc->driver)
* VBUS-powered devices may also also want to support bigger
* power budgets after an appropriate SET_CONFIGURATION.
*/
- // .vbus_power = at91_vbus_power,
+ /* .vbus_power = at91_vbus_power, */
};
/*-------------------------------------------------------------------------*/
ep->is_in = 0;
}
} else {
- // REVISIT this happens sometimes under load; why??
+ /* REVISIT this happens sometimes under load; why?? */
ERR("SETUP len %d, csr %08x\n", rxcount, csr);
status = -EINVAL;
}
at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP);
at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM);
at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP);
- // VDBG("bus suspend\n");
+ /* VDBG("bus suspend\n"); */
if (udc->suspended)
continue;
udc->suspended = 1;
at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM);
at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP);
at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM);
- // VDBG("bus resume\n");
+ /* VDBG("bus resume\n"); */
if (!udc->suspended)
continue;
udc->suspended = 0;