Wm831x = parm;
// printk("%s\n", __func__);
gpio_request(PMU_POWER_SLEEP, "NULL");
- gpio_direction_output(PMU_POWER_SLEEP, GPIO_HIGH);
+ gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
ret = wm831x_reg_read(parm, WM831X_POWER_STATE) & 0xffff;
wm831x_reg_write(parm, WM831X_POWER_STATE, (ret & 0xfff8) | 0x04);
wm831x_set_bits(wm831x,
WM831X_GPIO1_CONTROL + i,
WM831X_GPN_POL_MASK,
- 0x0000);
+ 0x0400);
wm831x_set_bits(wm831x,
WM831X_GPIO1_CONTROL + i,
WM831X_GPN_FN_MASK,
1 << WM831X_GPN_POL_SHIFT | 1 << WM831X_GPN_PWR_DOM_SHIFT | 1 << 0);
} // set gpio3 as clkout output 32.768K
- else {
- wm831x_set_bits(wm831x,
- WM831X_GPIO1_CONTROL + i,
- WM831X_GPN_PWR_DOM_MASK,
- ~WM831X_GPN_PWR_DOM);
- }
+
}
}
{
cru_writel(CRU_CLKGATE5_GRFCLK_ON,CRU_CLKGATE5_CON_ADDR); //open grf clk
grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
- grf_writel(GPIO6_PB1_DO_LOW, GRF_GPIO6L_DO_ADDR); //set gpio6_b1 output low
+ grf_writel(GPIO6_PB1_DO_HIGH, GRF_GPIO6L_DO_ADDR); //set gpio6_b1 output low
grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
}
void __sramfunc board_pmu_resume(void)
{
grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
- grf_writel(GPIO6_PB1_DO_HIGH, GRF_GPIO6L_DO_ADDR); //set gpio6_b1 output high
+ grf_writel(GPIO6_PB1_DO_LOW, GRF_GPIO6L_DO_ADDR); //set gpio6_b1 output high
grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
sram_udelay(10000);
}
printk(KERN_ERR "rk30_pm_power_off start...\n");
gpio_direction_output(POWER_ON_PIN, GPIO_LOW);
#if defined(CONFIG_MFD_WM831X)
+ wm831x_set_bits(Wm831x,WM831X_GPIO_LEVEL,0x0001,0x0000); //set sys_pwr 0
wm831x_device_shutdown(Wm831x);//wm8326 shutdown
#endif
while (1);