ddr_rk32.c:fixed warning
authorxxx <xxx@rock-chips.com>
Thu, 26 Jun 2014 10:13:16 +0000 (18:13 +0800)
committerxxx <xxx@rock-chips.com>
Thu, 26 Jun 2014 10:13:16 +0000 (18:13 +0800)
arch/arm/mach-rockchip/ddr_rk32.c

index c10966f7de1c12dc68cf332bfae96abbb58fbb9d..3818f5db67f8f6923247024d756df05eab10da06 100755 (executable)
@@ -3656,8 +3656,10 @@ static noinline uint32 ddr_change_freq_sram(void *arg)
     uint32 gpllvaluel;
     freq_t *p_freq_t=(freq_t *)arg;    
     uint32 nMHz=p_freq_t->nMHz;
+    
+#if defined (DDR_CHANGE_FREQ_IN_LCDC_VSYNC)
     struct ddr_freq_t *p_ddr_freq_t=p_freq_t->p_ddr_freq_t;
-
+#endif
 
 #if defined(CONFIG_ARCH_RK3066B)
     if(dqstr_flag==true)
@@ -3990,10 +3992,13 @@ static int __ddr_change_freq(uint32_t nMHz, struct ddr_freq_t ddr_freq_t)
 static int _ddr_change_freq(uint32 nMHz)
 {
        struct ddr_freq_t ddr_freq_t;
+        #if defined (DDR_CHANGE_FREQ_IN_LCDC_VSYNC)
        unsigned long remain_t, vblank_t, pass_t;
        static unsigned long reserve_t = 800;//us
        unsigned long long tmp;
-       int ret, test_count=0;
+       int test_count=0;
+        #endif
+        int ret;
 
        memset(&ddr_freq_t, 0x00, sizeof(ddr_freq_t));