Include handle to TargetMachine in each Machine...Info class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1201 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetRegInfo.h b/include/llvm/Target/TargetRegInfo.h
index 9983629ad02347c8f38d7fabf2e9e57e67280e41..8f7fad57115650b002024d56dca8d4a16bbf674c 100644 (file)
--- a/include/llvm/Target/TargetRegInfo.h
+++ b/include/llvm/Target/TargetRegInfo.h
@@ -12,6 +12,7 @@
 #include <hash_map>
 #include <string>
 
+class TargetMachine;
 class IGNode;
 class Value;
 class LiveRangeInfo;
@@ -37,7 +38,6 @@ class BasicBlock;
 
 
 class MachineRegClassInfo {
-
 protected:
   
   const unsigned RegClassID;        // integer ID of a reg class
@@ -59,7 +59,7 @@ public:
 
   MachineRegClassInfo(const unsigned ID, const unsigned NVR, 
                      const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR),
-                                            NumOfAllRegs(NAR)
+                                             NumOfAllRegs(NAR)
   { }                         // empty constructor
 
 };
@@ -83,6 +83,8 @@ typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
 
 
 class MachineRegInfo : public NonCopyableV {
+public:
+  const TargetMachine& target;
 
 protected:
 
@@ -190,7 +192,7 @@ public:
 
   //virtual void printReg(const LiveRange *const LR) const =0;
 
-  MachineRegInfo() { }
+  MachineRegInfo(const TargetMachine& tgt) : target(tgt) { }
 
 };
 

diff --git a/include/llvm/Target/TargetSchedInfo.h b/include/llvm/Target/TargetSchedInfo.h
index 4730bffc91393cbac1cb47df078123c9a3a6d918..356c7851b03f69d96a180cebd02cab853de32728 100644 (file)
--- a/include/llvm/Target/TargetSchedInfo.h
+++ b/include/llvm/Target/TargetSchedInfo.h
@@ -280,6 +280,8 @@ InstrRUsage::addUsageDelta(const InstrRUsageDelta& delta)
 
 class MachineSchedInfo : public NonCopyableV {
 public:
+  const TargetMachine& target;
+  
   unsigned int maxNumIssueTotal;
   int  longestIssueConflict;
   
@@ -305,8 +307,8 @@ protected:
   }
   
 public:
-  /*ctor*/        MachineSchedInfo     (int _numSchedClasses,
-                                        const MachineInstrInfo* _mii,
+  /*ctor*/        MachineSchedInfo     (const TargetMachine& tgt,
+                                         int                  _numSchedClasses,
                                         const InstrClassRUsage* _classRUsages,
                                         const InstrRUsageDelta* _usageDeltas,
                                         const InstrIssueDelta*  _issueDeltas,