.platform_data = &android_pmem_vpu_pdata,\r
},\r
};\r
+\r
/*****************************************************************************************\r
* i2c devices\r
* author: kfx@rock-chips.com\r
.mode = I2C_MODE_IRQ,\r
.io_init = rk29_i2c0_io_init,\r
};\r
+\r
struct rk29_i2c_platform_data default_i2c1_data = { \r
.bus_num = 1,\r
.flags = 0,\r
.mode = I2C_MODE_POLL,\r
.io_init = rk29_i2c1_io_init,\r
};\r
+\r
struct rk29_i2c_platform_data default_i2c2_data = { \r
.bus_num = 2,\r
.flags = 0,\r
.mode = I2C_MODE_IRQ,\r
.io_init = rk29_i2c2_io_init,\r
};\r
+\r
struct rk29_i2c_platform_data default_i2c3_data = { \r
.bus_num = 3,\r
.flags = 0,\r
.io_init = rk29_i2c3_io_init,\r
};\r
\r
-\r
+#ifdef CONFIG_I2C0_RK29\r
static struct i2c_board_info __initdata board_i2c0_devices[] = {\r
#if defined (CONFIG_RK1000_CONTROL)\r
{\r
},\r
#endif\r
};\r
-static struct i2c_board_info __initdata board_i2c1_devices[] = {\r
+#endif\r
\r
+#ifdef CONFIG_I2C1_RK29\r
+static struct i2c_board_info __initdata board_i2c1_devices[] = {\r
};\r
-static struct i2c_board_info __initdata board_i2c2_devices[] = {\r
+#endif\r
\r
+#ifdef CONFIG_I2C2_RK29\r
+static struct i2c_board_info __initdata board_i2c2_devices[] = {\r
};\r
-static struct i2c_board_info __initdata board_i2c3_devices[] = {\r
+#endif\r
\r
+#ifdef CONFIG_I2C3_RK29\r
+static struct i2c_board_info __initdata board_i2c3_devices[] = {\r
};\r
+#endif\r
\r
\r
/*****************************************************************************************\r
* SDMMC devices\r
*****************************************************************************************/\r
#ifdef CONFIG_SDMMC0_RK29\r
-void rk29_sdmmc0_cfg_gpio(struct platform_device *dev)\r
+static int rk29_sdmmc0_cfg_gpio(void)\r
{\r
rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD);\r
rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT);\r
rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1);\r
rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2);\r
rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3);\r
- rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N); \r
+ rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);\r
+ return 0;\r
}\r
\r
#define CONFIG_SDMMC0_USE_DMA\r
#endif\r
#ifdef CONFIG_SDMMC1_RK29\r
#define CONFIG_SDMMC1_USE_DMA\r
-void rk29_sdmmc1_cfg_gpio(struct platform_device *dev)\r
+static int rk29_sdmmc1_cfg_gpio(void)\r
{\r
rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);\r
rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);\r
rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);\r
rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1);\r
rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);\r
- rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3); \r
+ rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);\r
+ return 0;\r
}\r
\r
struct rk29_sdmmc_platform_data default_sdmmc1_data = {\r
rk29_gpio = get_irq_chip_data(irq+14);
gpioRegBase = rk29_gpio->regbase;
- printk("Enter:%s--%d---gpioRegBase=0x%x\n",__FUNCTION__,__LINE__,rk29_gpio->regbase);
+
//ÆÁ±ÎÖжÏ6»ò7
desc->chip->mask(irq);
- printk("Enter:%s--%d\n",__FUNCTION__,__LINE__);
//¶ÁÈ¡µ±Ç°ÖжÏ״̬£¬¼´²éѯ¾ßÌåÊÇGPIOµÄÄĸöPINÒýÆðµÄÖжÏ
isr = rk29_gpio_read(gpioRegBase,GPIO_INT_STATUS);
- printk("Enter:%s--%d\n",__FUNCTION__,__LINE__);
if (!isr) {
desc->chip->unmask(irq);
return;
}
-printk("Enter:%s--%d\n",__FUNCTION__,__LINE__);
+
pin = rk29_gpio->chip.base;
- printk("Enter:%s--%d\n",__FUNCTION__,__LINE__);
gpioToirq = gpio_to_irq(pin);
- printk("Enter:%s--%d\n",__FUNCTION__,__LINE__);
gpio = &irq_desc[gpioToirq];
-printk("Enter:%s--%d\n",__FUNCTION__,__LINE__);
+
while (isr) {
if (isr & 1) {
{