rk3288 hdmi: add cec clk and pinctrl.
authorZheng Yang <zhengyang@rock-chips.com>
Sun, 1 Feb 2015 08:28:03 +0000 (16:28 +0800)
committerZheng Yang <zhengyang@rock-chips.com>
Sun, 1 Feb 2015 08:28:03 +0000 (16:28 +0800)
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
arch/arm/boot/dts/rk3288-pinctrl.dtsi
arch/arm/boot/dts/rk3288.dtsi

index 32d91feedde5b2739d13bddfa1f351910d9f9e06..8046018785ad775cc2ea917cf953074ee0bce201 100755 (executable)
                                rockchip,pull = <VALUE_PULL_DISABLE>;
                        };
                };
+
+               gpio7_cec {
+                       hdmi_cec: hdmi-cec {
+                               rockchip,pins = <EDPHDMI_CECINOUTRESERVED>;
+                               rockchip,pull = <VALUE_PULL_NORMAL>;
+                               rockchip,drive = <VALUE_DRV_DEFAULT>;
+                       };
+
+                       hdmi_cec_gpio: hdmi-cec-gpio {
+                               rockchip,pins = <FUNC_TO_GPIO(EDPHDMI_CECINOUTRESERVED)>;
+                               rockchip,pull = <VALUE_PULL_DISABLE>;
+                               rockchip,drive = <VALUE_DRV_DEFAULT>;
+                       };
+               };
                //to add
 
 
index 621110a49a678fd5b7d5c6018459b41a99654c0f..a122e61efd9f0d78140324a631debbebbe521254 100644 (file)
                reg = <0xff980000 0x20000>;
                interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
                pinctrl-names = "default", "sleep";
-               pinctrl-0 = <&i2c5_sda &i2c5_scl>;
+               pinctrl-0 = <&i2c5_sda &i2c5_scl &hdmi_cec>;
                pinctrl-1 = <&i2c5_gpio>;
-               clocks = <&clk_gates16 9>, <&clk_gates5 12>;
-               clock-names = "pclk_hdmi", "hdcp_clk_hdmi";
+               clocks = <&clk_gates16 9>, <&clk_gates5 12>, <&clk_gates5 11>;
+               clock-names = "pclk_hdmi", "hdcp_clk_hdmi", "cec_clk_hdmi";
                status = "disabled";
        };