Thumb2 assembly parsing for mul.w in IT block fix.

When the 3rd operand is not a low-register, and the first two operands are
the same low register, the parser was incorrectly trying to use the 16-bit
instruction encoding.

rdar://10449281

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144679 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 1d66d125a0e97568d92f66969697d43093c5bed0..fda1c88e72efa042fa320e0111f9e6689b7429f6 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -4098,6 +4098,7 @@ bool ARMAsmParser::shouldOmitCCOutOperand(StringRef Mnemonic,
       // remove the cc_out operand.
       (!isARMLowRegister(static_cast<ARMOperand*>(Operands[3])->getReg()) ||
        !isARMLowRegister(static_cast<ARMOperand*>(Operands[4])->getReg()) ||
+       !isARMLowRegister(static_cast<ARMOperand*>(Operands[5])->getReg()) ||
        !inITBlock() ||
        (static_cast<ARMOperand*>(Operands[3])->getReg() !=
         static_cast<ARMOperand*>(Operands[5])->getReg() &&

diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index 74b0681a98366073631c0a5bff89edaeb814c46b..6c291db5c55d718bb337c475267e8e6b24d12671 100644 (file)
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -1228,12 +1228,16 @@ _func:
         mul r3, r4, r6
         it eq
         muleq r3, r4, r5
+        it le
+        mulle r4, r4, r8
 
 @ CHECK: muls  r3, r4, r3              @ encoding: [0x63,0x43]
 @ CHECK: mul   r3, r4, r3              @ encoding: [0x04,0xfb,0x03,0xf3]
 @ CHECK: mul   r3, r4, r6              @ encoding: [0x04,0xfb,0x06,0xf3]
 @ CHECK: it    eq                      @ encoding: [0x08,0xbf]
 @ CHECK: muleq r3, r4, r5              @ encoding: [0x04,0xfb,0x05,0xf3]
+@ CHECK: it    le                      @ encoding: [0xd8,0xbf]
+@ CHECK: mulle r4, r4, r8              @ encoding: [0x04,0xfb,0x08,0xf4]
 
 
 @------------------------------------------------------------------------------