staging: comedi: amplc_dio200_common: introduce DIO200_CLK_SEL() macro
authorH Hartley Sweeten <hsweeten@visionengravers.com>
Mon, 23 Feb 2015 21:57:54 +0000 (14:57 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 2 Mar 2015 02:51:52 +0000 (18:51 -0800)
Replace the DIO200_[XYZ]CLK_SEL defines with a macro that returns the
correct register offset.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/comedi/drivers/amplc_dio200_common.c

index 26aad705aad30d83539dc704d9deacff8ee78b68..ab87f2e677e687209cac6e1bcbd3a90790699f81 100644 (file)
@@ -32,9 +32,7 @@
 /* 200 series registers */
 #define DIO200_IO_SIZE         0x20
 #define DIO200_PCIE_IO_SIZE    0x4000
-#define DIO200_XCLK_SCE                0x18    /* Group X clock selection register */
-#define DIO200_YCLK_SCE                0x19    /* Group Y clock selection register */
-#define DIO200_ZCLK_SCE                0x1a    /* Group Z clock selection register */
+#define DIO200_CLK_SCE(x)      (0x18 + (x))    /* Group X/Y/Z clock sel reg */
 #define DIO200_XGAT_SCE                0x1b    /* Group X gate selection register */
 #define DIO200_YGAT_SCE                0x1c    /* Group Y gate selection register */
 #define DIO200_ZGAT_SCE                0x1d    /* Group Z gate selection register */
@@ -733,7 +731,7 @@ static int dio200_subdev_8254_init(struct comedi_device *dev,
        if (board->has_clk_gat_sce) {
                /* Derive CLK_SCE and GAT_SCE register offsets from
                 * 8254 offset. */
-               subpriv->clk_sce_ofs = DIO200_XCLK_SCE + (offset >> 3);
+               subpriv->clk_sce_ofs = DIO200_CLK_SCE(offset >> 3);
                subpriv->gat_sce_ofs = DIO200_XGAT_SCE + (offset >> 3);
                subpriv->which = (offset >> 2) & 1;
        }