ARM SWP instructions store, too, not just load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136096 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 2b685cfcaeb9a0b4292389cc4db5946295d8ee26..c3b11442d30d425b87de1ad57f82c7d216519a33 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -3660,11 +3660,9 @@ def CLREX : AXI<(outs), (ins), MiscFrm, NoItinerary, "clrex",
 }
 
 // SWP/SWPB are deprecated in V6/V7 and for disassembly only.
-let mayLoad = 1 in {
-def SWP  : AIswp<0, (outs GPR:$Rt), (ins GPR:$Rt2, GPR:$Rn), "swp",
-             [/* For disassembly only; pattern left blank */]>;
-def SWPB : AIswp<1, (outs GPR:$Rt), (ins GPR:$Rt2, GPR:$Rn), "swpb",
-             [/* For disassembly only; pattern left blank */]>;
+let mayLoad = 1, mayStore = 1 in {
+def SWP  : AIswp<0, (outs GPR:$Rt), (ins GPR:$Rt2, GPR:$Rn), "swp", []>;
+def SWPB : AIswp<1, (outs GPR:$Rt), (ins GPR:$Rt2, GPR:$Rn), "swpb", []>;
 }
 
 //===----------------------------------------------------------------------===//