clk: rockchip: rk3228: add more flags for dclk_vop
authorWeiYong Bi <bivvy.bi@rock-chips.com>
Tue, 6 Jun 2017 00:33:59 +0000 (08:33 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Tue, 6 Jun 2017 07:08:27 +0000 (15:08 +0800)
Change-Id: Ie5838b20f419d667831e7d99f4b95856731ef0ef
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
drivers/clk/rockchip/clk-rk3228.c

index 9a86f7ed0817f19a6d716248013f40f3ae7dc023..cd6efa761f14bdd53103fcf6ce5db9d5cf34e9ba 100644 (file)
@@ -418,7 +418,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
                        RK2928_CLKSEL_CON(29), 0, 3, DFLAGS),
        DIV(0, "sclk_vop_pre", "sclk_vop_src", 0,
                        RK2928_CLKSEL_CON(27), 8, 8, DFLAGS),
-       MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, 0,
+       MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
                        RK2928_CLKSEL_CON(27), 1, 1, MFLAGS),
 
        FACTOR(0, "xin12m", "xin24m", 0, 1, 2),