wireless-wlan {
compatible = "wlan-platdata";
- wifi_chip_type = "rtkwifi";
+ /* wifi_chip_type - wifi chip define
+ * ap6210, ap6330, ap6335
+ * rtl8188eu, rtl8723bs, rtl8723bu
+ * esp8089
+ */
+ wifi_chip_type = "rtl8188eu";
sdio_vref = <1800>; //1800mv or 3300mv
//power_ctrl_by_pmu;
wireless-wlan {
compatible = "wlan-platdata";
- wifi_chip_type = "rtkwifi";
+ /* wifi_chip_type - wifi chip define
+ * ap6210, ap6330, ap6335
+ * rtl8188eu, rtl8723bs, rtl8723bu
+ * esp8089
+ */
+ wifi_chip_type = "rtl8188eu";
sdio_vref = <1800>; //1800mv or 3300mv
// power_ctrl_by_pmu;
supports-highspeed;
supports-emmc;
+ //supports-sd;
bootpart-no-access;
- //supports-tSD;
//supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
//caps2-mmc-hs200;
wireless-wlan {
compatible = "wlan-platdata";
- /* wifi_chip_type - wifi chip define
- * bcmwifi ==> like ap6xxx, rk90x;
- * rtkwifi ==> like rtl8188xx, rtl8723xx;
- * esp8089 ==> esp8089;
- * other ==> for other wifi;
- */
- wifi_chip_type = "bcmwifi";
+ /* wifi_chip_type - wifi chip define
+ * ap6210, ap6330, ap6335
+ * rtl8188eu, rtl8723bs, rtl8723bu
+ * esp8089
+ */
+ wifi_chip_type = "ap6335";
sdio_vref = <1800>; //1800mv or 3300mv
supports-highspeed;
supports-emmc;
- bootpart-no-access;
+ //supports-sd;
+ bootpart-no-access;
- //supports-tSD;
//supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
//caps2-mmc-hs200;
#include <linux/version.h>
#include <linux/moduleparam.h>
#include <linux/of_gpio.h>
-/**********yzm***********/
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/kernel.h>
#include <linux/of_fdt.h>
#include <linux/module.h>
#include <linux/regulator/consumer.h>
-/**********yzm***********/
-//#define PMEM_CAM_NECESSARY 0x00000000 /*yzm*/
-static int camio_version = KERNEL_VERSION(0,1,9);/*yzm camio_version*/
+static int camio_version = KERNEL_VERSION(0,1,9);
module_param(camio_version, int, S_IRUGO);
-static int camera_debug = 0;/*yzm*/
+static int camera_debug = 0;
module_param(camera_debug, int, S_IRUGO|S_IWUSR);
#undef CAMMODULE_NAME
.name = RK29_CAM_DRV_NAME,
.id = RK_CAM_PLATFORM_DEV_ID_0, /* This is used to put cameras on this interface*/
.num_resources= 2,
- .resource = rk_camera_resource_host_0,/*yzm*/
+ .resource = rk_camera_resource_host_0,
.dev = {
.dma_mask = &rockchip_device_camera_dmamask,
.coherent_dma_mask = 0xffffffffUL,
.name = RK29_CAM_DRV_NAME,
.id = RK_CAM_PLATFORM_DEV_ID_1, /* This is used to put cameras on this interface */
.num_resources = ARRAY_SIZE(rk_camera_resource_host_1),
- .resource = rk_camera_resource_host_1,/*yzm*/
+ .resource = rk_camera_resource_host_1,
.dev = {
.dma_mask = &rockchip_device_camera_dmamask,
.coherent_dma_mask = 0xffffffffUL,
.remove = rk_dts_sensor_remove,
};
+unsigned long rk_cif_grf_base;
+unsigned long rk_cif_cru_base;
static int rk_dts_sensor_remove(struct platform_device *pdev)
{
strcpy(new_camera->dev.i2c_cam_info.type, name);
new_camera->dev.i2c_cam_info.addr = i2c_add>>1;
- new_camera->dev.desc_info.host_desc.bus_id = RK29_CAM_PLATFORM_DEV_ID+cif_chl;/*yzm*/
- new_camera->dev.desc_info.host_desc.i2c_adapter_id = i2c_chl;/*yzm*/
- new_camera->dev.desc_info.host_desc.module_name = name;/*const*/
+ new_camera->dev.desc_info.host_desc.bus_id = RK29_CAM_PLATFORM_DEV_ID+cif_chl;
+ new_camera->dev.desc_info.host_desc.i2c_adapter_id = i2c_chl;
+ new_camera->dev.desc_info.host_desc.module_name = name;
new_camera->dev.device_info.name = "soc-camera-pdrv";
if(is_front)
sprintf(new_camera->dev_name,"%s_%s",name,"front");
return 0;
}
-static int rk_dts_cif_probe(struct platform_device *pdev) /*yzm*/
+static int rk_dts_cif_probe(struct platform_device *pdev)
{
int irq,err;
struct device *dev = &pdev->dev;
const char *compatible = NULL;
struct device_node * vpu_node =NULL;
int vpu_iommu_enabled = 0;
+
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
rk_camera_platform_data.cif_dev = &pdev->dev;
of_node_put(vpu_node);
}else{
printk("get vpu_node failed,vpu_iommu_enabled == 0 !!!!!!\n");
-}
-
+ }
+
+ if(strstr(rk_camera_platform_data.rockchip_name,"3368")){
+ //get cru base
+ vpu_node = of_parse_phandle(dev->of_node, "rockchip,cru", 0);
+ rk_cif_cru_base = (unsigned long)of_iomap(vpu_node, 0);
+ debug_printk(">>>>>>>rk_cif_cru_base=0x%lx",rk_cif_cru_base);
+
+ //get grf base
+ vpu_node = of_parse_phandle(dev->of_node, "rockchip,grf", 0);
+ rk_cif_grf_base = (unsigned long)of_iomap(vpu_node, 0);
+ debug_printk(">>>>>>>rk_cif_grf_base=0x%lx",rk_cif_grf_base);
+ }
+
if (err < 0){
printk(KERN_EMERG "Get rockchip compatible failed!!!!!!");
return -ENODEV;
return 0;
}
-/************yzm**************end*/
-
static int sensor_power_default_cb (struct rk29camera_gpio_res *res, int on)
{
int camera_power = res->gpio_power;
bool io_requested_in_camera;
enum of_gpio_flags flags;
- struct rkcamera_platform_data *new_camera;/*yzm*/
+ struct rkcamera_platform_data *new_camera;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
if (camera_power != INVALID_GPIO) {
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$/ camera_power = %x\n", camera_power );
- camera_power = of_get_named_gpio_flags(of_node,"rockchip,power",0,&flags);/*yzm*/
- gpio_res->gpio_power = camera_power;/*yzm information back to the IO*/
+ camera_power = of_get_named_gpio_flags(of_node,"rockchip,power",0,&flags);
+ gpio_res->gpio_power = camera_power;/* information back to the IO*/
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$/ camera_power = %x\n", camera_power );
if (camera_reset != INVALID_GPIO) {
- camera_power = of_get_named_gpio_flags(of_node,"rockchip,reset",0,&flags);/*yzm*/
- gpio_res->gpio_reset = camera_reset;/*yzm information back to the IO*/
+ camera_power = of_get_named_gpio_flags(of_node,"rockchip,reset",0,&flags);
+ gpio_res->gpio_reset = camera_reset;/* information back to the IO*/
ret = gpio_request(camera_reset, "camera reset");
if (ret) {
io_requested_in_camera = false;
if (camera_powerdown != INVALID_GPIO) {
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$/ camera_powerdown = %x\n", camera_powerdown );
- camera_powerdown = of_get_named_gpio_flags(of_node,"rockchip,powerdown",0,&flags);/*yzm*/
- gpio_res->gpio_powerdown = camera_powerdown;/*yzm information back to the IO*/
+ camera_powerdown = of_get_named_gpio_flags(of_node,"rockchip,powerdown",0,&flags);
+ gpio_res->gpio_powerdown = camera_powerdown;/*information back to the IO*/
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$/ camera_powerdown = %x\n", camera_powerdown );
ret = gpio_request(camera_powerdown, "camera powerdown");
if (camera_flash != INVALID_GPIO) {
- camera_flash = of_get_named_gpio_flags(of_node,"rockchip,flash",0,&flags);/*yzm*/
- gpio_res->gpio_flash = camera_flash;/*yzm information back to the IO*/
+ camera_flash = of_get_named_gpio_flags(of_node,"rockchip,flash",0,&flags);
+ gpio_res->gpio_flash = camera_flash;/* information back to the IO*/
ret = gpio_request(camera_flash, "camera flash");
if (ret) {
io_requested_in_camera = false;
if (camera_af != INVALID_GPIO) {
- camera_af = of_get_named_gpio_flags(of_node,"rockchip,af",0,&flags);/*yzm*/
- gpio_res->gpio_af = camera_af;/*yzm information back to the IO*/
+ camera_af = of_get_named_gpio_flags(of_node,"rockchip,af",0,&flags);
+ gpio_res->gpio_af = camera_af;/* information back to the IO*/
ret = gpio_request(camera_af, "camera af");
if (ret) {
io_requested_in_camera = false;
if (sensor_ioctl_cb.sensor_af_cb == NULL)
sensor_ioctl_cb.sensor_af_cb = sensor_afpower_default_cb;
- /**********yzm*********/
new_camera = new_camera_head;
while(new_camera != NULL)
{
struct rkcamera_platform_data *new_cam_dev = NULL;
struct rk29camera_platform_data* plat_data = &rk_camera_platform_data;
int ret = RK29_CAM_IO_SUCCESS,i = 0;
- struct soc_camera_desc *dev_icl = NULL;/*yzm*/
+ struct soc_camera_desc *dev_icl = NULL;
struct rkcamera_platform_data *new_camera;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()/n", __FILE__, __LINE__,__FUNCTION__);
if (strcmp(new_camera->dev_name, dev_name(dev)) == 0) {
res = (struct rk29camera_gpio_res *)&new_camera->io;
new_cam_dev = &new_camera[i];
- dev_icl = &new_camera->dev.desc_info;/*yzm*/
+ dev_icl = &new_camera->dev.desc_info;
break;
}
new_camera = new_camera->next_camera;;
case Cam_Mclk:
{
if (plat_data->sensor_mclk && dev_icl) {
- plat_data->sensor_mclk(dev_icl->host_desc.bus_id,(on!=0)?1:0,on);/*yzm*/
+ plat_data->sensor_mclk(dev_icl->host_desc.bus_id,(on!=0)?1:0,on);
} else {
eprintk( "%s(%d): sensor_mclk(%p) or dev_icl(%p) is NULL",
__FUNCTION__,__LINE__,plat_data->sensor_mclk,dev_icl);
return ret;
}
-static int rk_sensor_power(struct device *dev, int on) /*icd->pdev*/
+static int rk_sensor_power(struct device *dev, int on)
{
int powerup_sequence,mclk_rate;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
- new_camera = plat_data->register_dev_new; /*new_camera[]*/
+ new_camera = plat_data->register_dev_new;
while (new_camera != NULL) {
((new_camera->io.gpio_flag&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
}
- debug_printk( "new_camera->dev_name= %s \n", new_camera->dev_name); /*yzm*/
- debug_printk( "dev_name(dev)= %s \n", dev_name(dev)); /*yzm*/
+ debug_printk( "new_camera->dev_name= %s \n", new_camera->dev_name);
+ debug_printk( "dev_name(dev)= %s \n", dev_name(dev));
if (strcmp(new_camera->dev_name,dev_name(dev))) {
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i\n", __FILE__, __LINE__);
} else {
new_device = new_camera;
dev_io = &new_camera->io;
- debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i\n", __FILE__, __LINE__);/*yzm*/
+ debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i\n", __FILE__, __LINE__);
if (!Sensor_Support_DirectResume(new_camera->pwdn_info))
real_pwroff = true;
else
};
static const struct apll_clk_set rk3036_apll_table[] = {
- _RK3036_APLL_SET_CLKS(1608, 1, 67, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1584, 1, 66, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1560, 1, 65, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1536, 1, 64, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1512, 1, 63, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1488, 1, 62, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1464, 1, 61, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1440, 1, 60, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1416, 1, 59, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1392, 1, 58, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1368, 1, 57, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1344, 1, 56, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1320, 1, 55, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1296, 1, 54, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1272, 1, 53, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1248, 1, 52, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1200, 1, 50, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1104, 1, 46, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1100, 12, 550, 1, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1008, 1, 84, 2, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(1000, 6, 500, 2, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(984, 1, 82, 2, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(960, 1, 80, 2, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(936, 1, 78, 2, 1, 1, 0, 81, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(912, 1, 76, 2, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(900, 4, 300, 2, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(888, 1, 74, 2, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(864, 1, 72, 2, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(840, 1, 70, 2, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(816, 1, 68, 2, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(800, 6, 400, 2, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(700, 6, 350, 2, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(696, 1, 58, 2, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(600, 1, 75, 3, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(504, 1, 63, 3, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(500, 6, 250, 2, 1, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(408, 1, 68, 2, 2, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(312, 1, 52, 2, 2, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(216, 1, 72, 4, 2, 1, 0, 41, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(96, 1, 64, 4, 4, 1, 0, 21, 41, 41, 21, 21),
- _RK3036_APLL_SET_CLKS(0, 1, 0, 1, 1, 1, 0, 21, 41, 41, 21, 21),
+ _RK3036_APLL_SET_CLKS(1608, 1, 67, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1584, 1, 66, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1560, 1, 65, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1536, 1, 64, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1512, 1, 63, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1488, 1, 62, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1464, 1, 61, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1440, 1, 60, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1416, 1, 59, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1392, 1, 58, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1368, 1, 57, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1344, 1, 56, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1320, 1, 55, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1296, 1, 54, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1272, 1, 53, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1248, 1, 52, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1200, 1, 50, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1104, 1, 46, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1100, 12, 550, 1, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1008, 1, 84, 2, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(1000, 6, 500, 2, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(984, 1, 82, 2, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(960, 1, 80, 2, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(936, 1, 78, 2, 1, 1, 0, 81),
+ _RK3036_APLL_SET_CLKS(912, 1, 76, 2, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(900, 4, 300, 2, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(888, 1, 74, 2, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(864, 1, 72, 2, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(840, 1, 70, 2, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(816, 1, 68, 2, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(800, 6, 400, 2, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(700, 6, 350, 2, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(696, 1, 58, 2, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(600, 1, 75, 3, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(504, 1, 63, 3, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(500, 6, 250, 2, 1, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(408, 1, 68, 2, 2, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(312, 1, 52, 2, 2, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(216, 1, 72, 4, 2, 1, 0, 41),
+ _RK3036_APLL_SET_CLKS(96, 1, 64, 4, 4, 1, 0, 21),
+ _RK3036_APLL_SET_CLKS(0, 1, 0, 1, 1, 1, 0, 21),
};
static const struct pll_clk_set rk3036plus_pll_com_table[] = {
#define RK3036_CLK_GATE_CLKID(i) (16 * (i))
#define _RK3036_APLL_SET_CLKS(_mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac, \
- _periph_div, _aclk_core_div, _axi_div, _apb_div, _ahb_div) \
+ _periph_div) \
{ \
.rate = (_mhz) * MHZ, \
.pllcon0 = RK3036_PLL_SET_POSTDIV1(_postdiv1) | RK3036_PLL_SET_FBDIV(_fbdiv), \
.pllcon1 = RK3036_PLL_SET_DSMPD(_dsmpd) | RK3036_PLL_SET_POSTDIV2(_postdiv2) | RK3036_PLL_SET_REFDIV(_refdiv), \
.pllcon2 = RK3036_PLL_SET_FRAC(_frac), \
- .clksel1 = RK3036_ACLK_CORE_DIV(RATIO_##_aclk_core_div) | RK3036_CLK_CORE_PERI_DIV(RATIO_##_periph_div), \
+ .clksel1 = RK3036_CLK_CORE_PERI_DIV(RATIO_##_periph_div), \
.lpj = (CLK_LOOPS_JIFFY_REF * _mhz) / CLK_LOOPS_RATE_REF, \
.rst_dly = 0,\
}
struct generic_sensor *sensor = to_generic_sensor(client);
i2c_speed = sensor->info_priv.gI2c_speed;
- //debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
- //debug_printk( "/~~~~~~~~~~~~/ %s:%i-------%s()client = %p\n", __FILE__, __LINE__,__FUNCTION__,client);
err = 0;
switch(sensor_reg->reg){
int generic_sensor_ioctrl(struct soc_camera_device *icd,enum rk29sensor_power_cmd cmd, int on)
{
- //struct soc_camera_link *icl = to_soc_camera_link(icd);
struct soc_camera_desc *desc = to_soc_camera_desc(icd);
- struct rk29camera_platform_data *pdata = desc->subdev_desc.drv_priv;/*yzm*/
+ struct rk29camera_platform_data *pdata = desc->subdev_desc.drv_priv;
struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
struct generic_sensor *sensor = to_generic_sensor(client);
int ret = 0;
case Sensor_Power:
{
//if (icl->power) {
- if(desc->subdev_desc.power) {/*yzm*/
- ret = desc->subdev_desc.power(icd->pdev, on);/*yzm*/
+ if(desc->subdev_desc.power) {
+ ret = desc->subdev_desc.power(icd->pdev, on);
} else {
SENSOR_TR("haven't power callback");
ret = -EINVAL;
case Sensor_PowerDown:
{
//if (icl->powerdown) {
- if(desc->subdev_desc.powerdown) {/*yzm*/
- ret = desc->subdev_desc.powerdown(icd->pdev, on);/*yzm*/
+ if(desc->subdev_desc.powerdown) {
+ ret = desc->subdev_desc.powerdown(icd->pdev, on);
} else {
SENSOR_TR("haven't power down callback");
ret = -EINVAL;
struct generic_sensor *sensor = to_generic_sensor(client);
int array_index = 0;
int num = sensor->info_priv.num_series;
- //struct soc_camera_link *icl = to_soc_camera_link(icd);
- struct soc_camera_desc *desc = to_soc_camera_desc(icd);/*yzm*/
- struct rk29camera_platform_data *pdata = desc->subdev_desc.drv_priv;/*yzm*/
+ struct soc_camera_desc *desc = to_soc_camera_desc(icd);
+ struct rk29camera_platform_data *pdata = desc->subdev_desc.drv_priv;
struct rkcamera_platform_data *sensor_device=NULL,*new_camera;
new_camera = pdata->register_dev_new;
- //while (strstr(new_camera->dev_name,"end")==NULL) {
while(new_camera != NULL){
if (strcmp(dev_name(icd->pdev), new_camera->dev_name) == 0) {
sensor_device = new_camera;
break;
}
- //new_camera++;
new_camera = new_camera->next_camera;
}
unsigned long generic_sensor_query_bus_param(struct soc_camera_device *icd)
{
- //struct soc_camera_link *icl = to_soc_camera_link(icd);
- struct soc_camera_desc *desc = to_soc_camera_desc(icd);/*yzm*/
+ struct soc_camera_desc *desc = to_soc_camera_desc(icd);
struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
struct generic_sensor *sensor = to_generic_sensor(client);
- /**************yzm************/
struct v4l2_mbus_config cfg;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
cfg.flags = sensor->info_priv.bus_parameter;
- return soc_camera_apply_board_flags(&(desc->subdev_desc), &cfg);/*yzm*/
- /**************yzm*************/
+ return soc_camera_apply_board_flags(&(desc->subdev_desc), &cfg);
}
int generic_sensor_g_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct soc_camera_subdev_desc *ssdd = client->dev.platform_data;
struct soc_camera_device *icd = ssdd->socdev;
- //struct generic_sensor *sensor = to_generic_sensor(client);
int i, error_cnt=0, error_idx=-1;
for (i=0; i<ext_ctrl->count; i++) {
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct soc_camera_subdev_desc *ssdd = client->dev.platform_data;
struct soc_camera_device *icd = ssdd->socdev;
- //struct generic_sensor*sensor = to_generic_sensor(client);
int i, error_cnt=0, error_idx=-1;
}
new_camera = sensor->sensor_io_request->register_dev_new;
- //while (strstr(new_camera->dev_name,"end")==NULL) {
while(new_camera != NULL){
if (strcmp(dev_name(icd->pdev), new_camera->dev_name) == 0) {
if (new_camera->flash){
}
break;
}
- //new_camera++;
new_camera = new_camera->next_camera;
}
static void sensor_af_workqueue(struct work_struct *work)
{
struct rk_sensor_focus_work *sensor_work = container_of(work, struct rk_sensor_focus_work, dwork.work);
- struct i2c_client *client = sensor_work->client;
+ struct i2c_client *client = sensor_work->client;
+ struct soc_camera_subdev_desc *ssdd = client->dev.platform_data;
+ struct soc_camera_device *icd = ssdd->socdev;
struct generic_sensor*sensor = to_generic_sensor(client);
- //struct rk_sensor_focus_cmd_info cmdinfo;
int zone_tm_pos[4];
int ret = 0;
SENSOR_TR("WqCmd_af_init is failed in sensor_af_workqueue!");
} else {
if(sensor->sensor_focus.focus_delay != WqCmd_af_invalid) {
- generic_sensor_af_workqueue_set(client->dev.platform_data,sensor->sensor_focus.focus_delay,0,false);
+ generic_sensor_af_workqueue_set(icd,sensor->sensor_focus.focus_delay,0,false);
sensor->sensor_focus.focus_delay = WqCmd_af_invalid;
}
sensor->sensor_focus.focus_state = FocusState_Inited;
#include <media/soc_camera.h>\r
#include <linux/vmalloc.h>\r
#include <linux/module.h>\r
-#include "../../../arch/arm/mach-rockchip/rk30_camera.h"/*yzm*/\r
+#include "../../../arch/arm/mach-rockchip/rk30_camera.h"\r
#include <linux/kernel.h>\r
/* Camera Sensor driver */\r
\r
#include <linux/rockchip/iomap.h>
#include "../../video/rockchip/rga/rga.h"
-#include "../../../arch/arm/mach-rockchip/rk30_camera.h"/*yzm*/
+#include "../../../arch/arm/mach-rockchip/rk30_camera.h"
#include <linux/rockchip/cru.h>
-/*******yzm*********
-
-#include <plat/efuse.h>
-#if (defined(CONFIG_ARCH_RK2928) || defined(CONFIG_ARCH_RK3026))
-#include <mach/rk2928_camera.h>
-#include <mach/cru.h>
-#include <mach/pmu.h>
-#define SOFT_RST_CIF1 (SOFT_RST_MAX+1)
-#endif
-*/
#include <asm/cacheflush.h>
#include <linux/of_address.h>
#define ENABLE_32BIT_BYPASS (0x01<<6)
#define DISABLE_32BIT_BYPASS (0x00<<6)
+extern unsigned long rk_cif_grf_base;
+extern unsigned long rk_cif_cru_base;
+
#define MIN(x,y) ((x<y) ? x: y)
#define MAX(x,y) ((x>y) ? x: y)
#define RK_SENSOR_24MHZ 24*1000*1000 /* MHz */
#define RK_SENSOR_48MHZ 48
-#define __raw_readl(p) (*(unsigned long *)(p))
-#define __raw_writel(v,p) (*(unsigned long *)(p) = (v))
+#define __raw_readl(p) (*(unsigned int *)(p))
+#define __raw_writel(v,p) (*(unsigned int *)(p) = (v))
#define write_cif_reg(base,addr, val) __raw_writel(val, addr+(base))
#define read_cif_reg(base,addr) __raw_readl(addr+(base))
#define mask_cif_reg(addr, msk, val) write_cif_reg(addr, (val)|((~(msk))&read_cif_reg(addr)))
-/*
-#if defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK3188)
-//CRU,PIXCLOCK
-#define CRU_PCLK_REG30 0xbc
-#define ENANABLE_INVERT_PCLK_CIF0 ((0x1<<24)|(0x1<<8))
-#define DISABLE_INVERT_PCLK_CIF0 ((0x1<<24)|(0x0<<8))
-#define ENANABLE_INVERT_PCLK_CIF1 ((0x1<<28)|(0x1<<12))
-#define DISABLE_INVERT_PCLK_CIF1 ((0x1<<28)|(0x0<<12))
-
-#define CRU_CIF_RST_REG30 0x128
-#define MASK_RST_CIF0 (0x01 << 30)
-#define MASK_RST_CIF1 (0x01 << 31)
-#define RQUEST_RST_CIF0 (0x01 << 14)
-#define RQUEST_RST_CIF1 (0x01 << 15)
-
-#define write_cru_reg(addr, val) __raw_writel(val, addr+RK30_CRU_BASE)
-#define read_cru_reg(addr) __raw_readl(addr+RK30_CRU_BASE)
-#define mask_cru_reg(addr, msk, val) write_cru_reg(addr,(val)|((~(msk))&read_cru_reg(addr)))
-#endif
-*/
-/*********yzm**********/
static u32 CRU_PCLK_REG30;
static u32 CRU_CLK_OUT;
#define write_cru_reg(addr, val) __raw_writel(val, addr+RK_CRU_VIRT)
#define read_cru_reg(addr) __raw_readl(addr+RK_CRU_VIRT)
#define mask_cru_reg(addr, msk, val) write_cru_reg(addr,(val)|((~(msk))&read_cru_reg(addr)))
-/*********yzm*********end*/
-/*
-#if defined(CONFIG_ARCH_RK2928)
-#define write_cru_reg(addr, val)
-#define read_cru_reg(addr) 0
-#define mask_cru_reg(addr, msk, val)
-#endif
-*/
-/*
-#if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188)
-//GRF_IO_CON3 0x100
-#define CIF_DRIVER_STRENGTH_2MA (0x00 << 12)
-#define CIF_DRIVER_STRENGTH_4MA (0x01 << 12)
-#define CIF_DRIVER_STRENGTH_8MA (0x02 << 12)
-#define CIF_DRIVER_STRENGTH_12MA (0x03 << 12)
-#define CIF_DRIVER_STRENGTH_MASK (0x03 << 28)
-
-//GRF_IO_CON4 0x104
-#define CIF_CLKOUT_AMP_3V3 (0x00 << 10)
-#define CIF_CLKOUT_AMP_1V8 (0x01 << 10)
-#define CIF_CLKOUT_AMP_MASK (0x01 << 26)
-
-#define write_grf_reg(addr, val) __raw_writel(val, addr+RK30_GRF_BASE)
-#define read_grf_reg(addr) __raw_readl(addr+RK30_GRF_BASE)
-#define mask_grf_reg(addr, msk, val) write_grf_reg(addr,(val)|((~(msk))&read_grf_reg(addr)))
-#else
-#define write_grf_reg(addr, val)
-#define read_grf_reg(addr) 0
-#define mask_grf_reg(addr, msk, val)
-#endif
-*/
+#define rk3368_write_cru_reg(addr, val) __raw_writel(val, addr+rk_cif_cru_base)
+#define rk3368_read_cru_reg(addr) __raw_readl(addr+rk_cif_cru_base)
+#define rk3368_mask_cru_reg(addr, msk, val) rk3368_write_cru_reg(addr,(val)|((~(msk))&rk3368_read_cru_reg(addr)))
+
#define CAM_WORKQUEUE_IS_EN() (true)
#define CAM_IPPWORK_IS_EN() (false)/*((pcdev->zoominfo.a.c.width != pcdev->icd->user_width) || (pcdev->zoominfo.a.c.height != pcdev->icd->user_height))*/
1. use of_find_node_by_name to get vpu node instead of of_find_compatible_node
*v0.1.e:
1. support focus mode.
+*v0.1.f:
+ 1. focus mode have some bug,fix it.
+*v0.2.0:
+ 1. support rk3368.
*/
-#define RK_CAM_VERSION_CODE KERNEL_VERSION(0, 1, 0xe)
+#define RK_CAM_VERSION_CODE KERNEL_VERSION(0, 2, 0)
static int version = RK_CAM_VERSION_CODE;
module_param(version, int, S_IRUGO);
#if CAMERA_VIDEOBUF_ARM_ACCESS
struct rk29_camera_vbinfo
{
- unsigned int phy_addr;
+ unsigned long phy_addr;
void __iomem *vir_addr;
unsigned int size;
};
unsigned long frame_interval;
unsigned int pixfmt;
/*for ipp */
- unsigned int vipmem_phybase;
+ unsigned long vipmem_phybase;
void __iomem *vipmem_virbase;
unsigned int vipmem_size;
unsigned int vipmem_bsize;
CRU_CLK_OUT = 0x16c;
CHIP_NAME = 3288;
}
+ else if(strstr(rockchip_name,"3368"))
+ {
+ CRU_PCLK_REG30 = 0x154;
+ ENANABLE_INVERT_PCLK_CIF0 = ((0x1<<29)|(0x1<<13));
+ DISABLE_INVERT_PCLK_CIF0 = ((0x1<<29)|(0x0<<13));
+ ENANABLE_INVERT_PCLK_CIF1 = ENANABLE_INVERT_PCLK_CIF0;
+ DISABLE_INVERT_PCLK_CIF1 = DISABLE_INVERT_PCLK_CIF0;
-
+ //CRU_CLK_OUT = 0x16c;
+ CHIP_NAME = 3368;
+ }
}
static inline void rk_cru_set_soft_reset(u32 idx, bool on , u32 RK_CRU_SOFTRST_CON)
{
- void __iomem *reg = RK_CRU_VIRT + RK_CRU_SOFTRST_CON;
u32 val = 0;
+ void __iomem *reg;
+
+ if(CHIP_NAME == 3368)
+ reg = (void*)(rk_cif_cru_base + RK_CRU_SOFTRST_CON);
+ else
+ reg = (void*)(RK_CRU_VIRT + RK_CRU_SOFTRST_CON);
+
if(CHIP_NAME == 3126){
val = on ? 0x10001U << 14 : 0x10000U << 14;
}else if(CHIP_NAME == 3288){
val = on ? 0x10001U << 8 : 0x10000U << 8;
+ }else if(CHIP_NAME == 3368){
+ val = on ? 0x10001U << 8 : 0x10000U << 8;
}
writel_relaxed(val, reg);
dsb(sy);
RK_CRU_SOFTRST_CON = RK312X_CRU_SOFTRSTS_CON(6);
}else if(CHIP_NAME == 3288){
RK_CRU_SOFTRST_CON = RK3288_CRU_SOFTRSTS_CON(6);
+ }else if(CHIP_NAME == 3368){
+ RK_CRU_SOFTRST_CON = RK3368_CRU_SOFTRSTS_CON(6);
}
if (only_rst == true) {
*/
videobuf_waiton(vq, &buf->vb, 0, 0);
videobuf_dma_contig_free(vq, &buf->vb);
- /*dev_dbg(&icd->dev, "%s freed\n", __func__);*/ /*yzm*/
buf->vb.state = VIDEOBUF_NEEDS_INIT;
return;
}
buf = container_of(vb, struct rk_camera_buffer, vb);
- /*dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %zd\n", __func__,*/ /*yzm*/
- /* vb, vb->baddr, vb->bsize);*/ /*yzm*/
-
/* Added list head initialization on alloc */
WARN_ON(!list_empty(&vb->queue));
static inline void rk_videobuf_capture(struct videobuf_buffer *vb,struct rk_camera_dev *rk_pcdev)
{
- unsigned int y_addr,uv_addr;
+ unsigned long y_addr,uv_addr;
struct rk_camera_dev *pcdev = rk_pcdev;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
- /*dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %zd\n", __func__,
- vb, vb->baddr, vb->bsize); */ /*yzm*/
-
vb->state = VIDEOBUF_QUEUED;
if (list_empty(&pcdev->capture)) {
list_add_tail(&vb->queue, &pcdev->capture);
struct rk_camera_work *camera_work = container_of(work, struct rk_camera_work, work);
struct videobuf_buffer *vb = camera_work->vb;
struct rk_camera_dev *pcdev = camera_work->pcdev;
- /*enum v4l2_mbus_pixelcode icd_code = pcdev->icd->current_fmt->code; */
unsigned long flags = 0;
int err = 0;
{
struct rk_camera_buffer *buf = container_of(vb, struct rk_camera_buffer, vb);
struct soc_camera_device *icd = vq->priv_data;
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
#if CAMERA_VIDEOBUF_ARM_ACCESS
struct rk29_camera_vbinfo *vb_info =NULL;
static void rk_camera_init_videobuf(struct videobuf_queue *q,
struct soc_camera_device *icd)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()/n", __FILE__, __LINE__,__FUNCTION__);
}
//spin_lock(&clk->lock);
- if (on && !clk->on) {
- clk_prepare_enable(clk->pd_cif); /*yzm*/
+ if (on && !clk->on) {
+ if(CHIP_NAME != 3368)
+ clk_prepare_enable(clk->pd_cif);
+
clk_prepare_enable(clk->aclk_cif);
clk_prepare_enable(clk->hclk_cif);
clk_prepare_enable(clk->cif_clk_in);
clk_set_rate(clk->cif_clk_out,clk_rate);
clk->on = true;
} else if (!on && clk->on) {
- clk_set_rate(clk->cif_clk_out,36000000);/*yzm :just for close clk which base on XIN24M */
+ clk_set_rate(clk->cif_clk_out,36000000);/*just for close clk which base on XIN24M */
clk_disable_unprepare(clk->aclk_cif);
clk_disable_unprepare(clk->hclk_cif);
clk_disable_unprepare(clk->cif_clk_in);
write_cru_reg(CRU_CLK_OUT, 0x00800080);
}
clk_disable_unprepare(clk->cif_clk_out);
- clk_disable_unprepare(clk->pd_cif);
+ if(CHIP_NAME != 3368)
+ clk_disable_unprepare(clk->pd_cif);
clk->on = false;
}
* there can be only one camera on RK28 quick capture interface */
static int rk_camera_add_device(struct soc_camera_device *icd)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv; /*Initialize in rk_camra_prob*/
struct device *control = to_soc_camera_control(icd);
struct v4l2_subdev *sd;
if (ret)
goto ebusy;
#endif
- /* call generic_sensor_ioctl*/
v4l2_subdev_call(sd, core, ioctl, RK29_CAM_SUBDEV_CB_REGISTER,(void*)(&pcdev->icd_cb));
- /* call generic_sensor_cropcap*/
if (v4l2_subdev_call(sd, video, cropcap, &cropcap) == 0) {
memcpy(&pcdev->cropinfo.bounds ,&cropcap.bounds,sizeof(struct v4l2_rect));
} else {
}
static void rk_camera_remove_device(struct soc_camera_device *icd)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
- /*struct v4l2_subdev *sd = soc_camera_to_subdev(icd);*/
#if CAMERA_VIDEOBUF_ARM_ACCESS
struct rk29_camera_vbinfo *vb_info;
unsigned int i;
rk_camera_s_stream(icd,0);
}
/* move DEACTIVATE into generic_sensor_s_power*/
- /* v4l2_subdev_call(sd, core, ioctl, RK29_CAM_SUBDEV_DEACTIVATE,NULL);*/ /*yzm*/
+ /* v4l2_subdev_call(sd, core, ioctl, RK29_CAM_SUBDEV_DEACTIVATE,NULL);*/
/* if stream off is not been executed,timer is running.*/
if(pcdev->fps_timer.istarted){
hrtimer_cancel(&pcdev->fps_timer.timer);
unsigned int cif_for = 0;
const struct soc_mbus_pixelfmt *fmt;
int ret = 0;
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent); /*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()/n", __FILE__, __LINE__,__FUNCTION__);
if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) {
if(IS_CIF0()) {
- write_cru_reg(CRU_PCLK_REG30, read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF0);
+ if(CHIP_NAME == 3368)
+ rk3368_write_cru_reg(CRU_PCLK_REG30, rk3368_read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF0);
+ else
+ write_cru_reg(CRU_PCLK_REG30, read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF0);
} else {
- write_cru_reg(CRU_PCLK_REG30, read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF1);
+ if(CHIP_NAME == 3368)
+ rk3368_write_cru_reg(CRU_PCLK_REG30, rk3368_read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF1);
+ else
+ write_cru_reg(CRU_PCLK_REG30, read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF1);
}
} else {
if(IS_CIF0()){
- write_cru_reg(CRU_PCLK_REG30, (read_cru_reg(CRU_PCLK_REG30) & 0xFFFFFF7F ) | DISABLE_INVERT_PCLK_CIF0);
+ if(CHIP_NAME == 3368)
+ rk3368_write_cru_reg(CRU_PCLK_REG30, (rk3368_read_cru_reg(CRU_PCLK_REG30) & 0xFFFFFF7F ) | DISABLE_INVERT_PCLK_CIF0);
+ else
+ write_cru_reg(CRU_PCLK_REG30, (read_cru_reg(CRU_PCLK_REG30) & 0xFFFFFF7F ) | DISABLE_INVERT_PCLK_CIF0);
} else {
- write_cru_reg(CRU_PCLK_REG30, (read_cru_reg(CRU_PCLK_REG30) & 0xFFFEFFF) | DISABLE_INVERT_PCLK_CIF1);
+ if(CHIP_NAME == 3368)
+ rk3368_write_cru_reg(CRU_PCLK_REG30, (rk3368_read_cru_reg(CRU_PCLK_REG30) & 0xFFFEFFF) | DISABLE_INVERT_PCLK_CIF1);
+ else
+ write_cru_reg(CRU_PCLK_REG30, (read_cru_reg(CRU_PCLK_REG30) & 0xFFFEFFF) | DISABLE_INVERT_PCLK_CIF1);
}
}
static void rk_camera_setup_format(struct soc_camera_device *icd, __u32 host_pixfmt, enum v4l2_mbus_pixelcode icd_code, struct v4l2_rect *rect)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
unsigned int cif_fs = 0,cif_crop = 0;
unsigned int cif_fmt_val = read_cif_reg(pcdev->base,CIF_CIF_FOR) | INPUT_MODE_YUV|YUV_INPUT_422|INPUT_420_ORDER_EVEN|OUTPUT_420_ORDER_EVEN;
pcdev->frame_inval = RK_CAM_FRAME_INVAL_INIT;
pcdev->pixfmt = host_pixfmt;
break;
- default: /* ddl@rock-chips.com : vip output format is hold when pixfmt is invalidate */
+ default: /* ddl@rock-chips.com : vip output format is hold when pixfmt is invalidate */
cif_fmt_val |= YUV_OUTPUT_422;
break;
}
struct soc_camera_format_xlate *xlate)
{
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
- struct device *dev = icd->parent;/*yzm*/
+ struct device *dev = icd->parent;
int formats = 0, ret;
enum v4l2_mbus_pixelcode code;
const struct soc_mbus_pixelfmt *fmt;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()/n", __FILE__, __LINE__,__FUNCTION__);
- ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); /*call generic_sensor_enum_fmt()*/
+ ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
if (ret < 0)
/* No more formats */
return 0;
}
static int rk_camera_get_crop(struct soc_camera_device *icd,struct v4l2_crop *crop)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()/n", __FILE__, __LINE__,__FUNCTION__);
static int rk_camera_set_crop(struct soc_camera_device *icd,
const struct v4l2_crop *crop)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()/n", __FILE__, __LINE__,__FUNCTION__);
static int rk_camera_set_fmt(struct soc_camera_device *icd,
struct v4l2_format *f)
{
- struct device *dev = icd->parent;/*yzm*/
+ struct device *dev = icd->parent;
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
const struct soc_camera_format_xlate *xlate = NULL;
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
struct v4l2_pix_format *pix = &f->fmt.pix;
struct v4l2_mbus_framefmt mf;
/* ddl@rock-chips.com: sensor init code transmit in here after open */
if (pcdev->icd_init == 0) {
- v4l2_subdev_call(sd,core, init, 0); /*call generic_sensor_init()*/
+ v4l2_subdev_call(sd,core, init, 0);
pcdev->icd_init = 1;
- return 0; /*directly return !!!!!!*/
+ return 0;
}
stream_on = read_cif_reg(pcdev->base,CIF_CIF_CTRL);
if (stream_on & ENABLE_CAPTURE)
mf.reserved[0] = pix->priv; /* ddl@rock-chips.com : v0.3.3 */
mf.reserved[1] = 0;
- ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf); /*generic_sensor_s_fmt*/
+ ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
if (mf.code != xlate->code)
return -EINVAL;
static int rk_camera_try_fmt(struct soc_camera_device *icd,
struct v4l2_format *f)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
const struct soc_camera_format_xlate *xlate;
xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
if (!xlate) {
/*dev_err(icd->dev.parent, "Format (%c%c%c%c) not found\n", pixfmt & 0xFF, (pixfmt >> 8) & 0xFF,*/
- dev_err(icd->parent, "Format (%c%c%c%c) not found\n", pixfmt & 0xFF, (pixfmt >> 8) & 0xFF,/*yzm*/
+ dev_err(icd->parent, "Format (%c%c%c%c) not found\n", pixfmt & 0xFF, (pixfmt >> 8) & 0xFF,
(pixfmt >> 16) & 0xFF, (pixfmt >> 24) & 0xFF);
ret = -EINVAL;
RKCAMERA_TR("%s(version:%c%c%c) support format:\n",rk_cam_driver_description,(RK_CAM_VERSION_CODE&0xff0000)>>16,
if ((usr_w == 10000) && (usr_h == 10000)) {
mf.reserved[6] = 0xfefe5a5a;
}
- /* call generic_sensor_try_fmt()*/
ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
if (ret < 0)
goto RK_CAMERA_TRY_FMT_END;
pix->width = usr_w;
pix->height = usr_h;
} else {
- /*RKCAMERA_TR("vipmem for IPP is overflow, This resolution(%dx%d -> %dx%d) is invalidate!\n",mf.width,mf.height,usr_w,usr_h);*/ /*yzm*/
+ /*RKCAMERA_TR("vipmem for IPP is overflow, This resolution(%dx%d -> %dx%d) is invalidate!\n",mf.width,mf.height,usr_w,usr_h);*/
pix->width = mf.width;
pix->height = mf.height;
}
}
static int rk_camera_suspend(struct soc_camera_device *icd, pm_message_t state)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
struct v4l2_subdev *sd;
int ret = 0;
static int rk_camera_resume(struct soc_camera_device *icd)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
struct v4l2_subdev *sd;
int ret = 0;
struct v4l2_subdev *sd;
struct rk_camera_work *camera_work = container_of(work, struct rk_camera_work, work);
struct rk_camera_dev *pcdev = camera_work->pcdev;
- /*struct soc_camera_link *tmp_soc_cam_link;*/
struct v4l2_mbus_framefmt mf;
int index = 0;
unsigned long flags = 0;
if(pcdev->icd == NULL)
return;
sd = soc_camera_to_subdev(pcdev->icd);
- /*tmp_soc_cam_desc = to_soc_camera_link(pcdev->icd);*/ /*yzm*/
/*dump regs*/
{
- RKCAMERA_TR("CIF_CIF_CTRL = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_CTRL));
- RKCAMERA_TR("CIF_CIF_INTEN = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_INTEN));
- RKCAMERA_TR("CIF_CIF_INTSTAT = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_INTSTAT));
- RKCAMERA_TR("CIF_CIF_FOR = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_FOR));
- RKCAMERA_TR("CIF_CIF_CROP = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_CROP));
- RKCAMERA_TR("CIF_CIF_SET_SIZE = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_SET_SIZE));
- RKCAMERA_TR("CIF_CIF_SCL_CTRL = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_SCL_CTRL));
- RKCAMERA_TR("CRU_PCLK_REG30 = 0X%lx\n",read_cru_reg(CRU_PCLK_REG30));
- RKCAMERA_TR("CIF_CIF_LAST_LINE = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_LAST_LINE));
+ RKCAMERA_TR("CIF_CIF_CTRL = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_CTRL));
+ RKCAMERA_TR("CIF_CIF_INTEN = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_INTEN));
+ RKCAMERA_TR("CIF_CIF_INTSTAT = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_INTSTAT));
+ RKCAMERA_TR("CIF_CIF_FOR = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_FOR));
+ RKCAMERA_TR("CIF_CIF_CROP = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_CROP));
+ RKCAMERA_TR("CIF_CIF_SET_SIZE = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_SET_SIZE));
+ RKCAMERA_TR("CIF_CIF_SCL_CTRL = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_SCL_CTRL));
+ if(CHIP_NAME == 3368)
+ RKCAMERA_TR("CRU_PCLK_REG30 = 0X%x\n",rk3368_read_cru_reg(CRU_PCLK_REG30));
+ else
+ RKCAMERA_TR("CRU_PCLK_REG30 = 0X%x\n",read_cru_reg(CRU_PCLK_REG30));
+ RKCAMERA_TR("CIF_CIF_LAST_LINE = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_LAST_LINE));
- RKCAMERA_TR("CIF_CIF_LAST_PIX = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_LAST_PIX));
- RKCAMERA_TR("CIF_CIF_VIR_LINE_WIDTH = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_VIR_LINE_WIDTH));
- RKCAMERA_TR("CIF_CIF_LINE_NUM_ADDR = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_LINE_NUM_ADDR));
- RKCAMERA_TR("CIF_CIF_FRM0_ADDR_Y = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_FRM0_ADDR_Y));
- RKCAMERA_TR("CIF_CIF_FRM0_ADDR_UV = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_FRM0_ADDR_UV));
- RKCAMERA_TR("CIF_CIF_FRAME_STATUS = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_FRAME_STATUS));
- RKCAMERA_TR("CIF_CIF_SCL_VALID_NUM = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_SCL_VALID_NUM));
- RKCAMERA_TR("CIF_CIF_CUR_DST = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_CUR_DST));
- RKCAMERA_TR("CIF_CIF_LINE_NUM_ADDR = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_LINE_NUM_ADDR));
+ RKCAMERA_TR("CIF_CIF_LAST_PIX = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_LAST_PIX));
+ RKCAMERA_TR("CIF_CIF_VIR_LINE_WIDTH = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_VIR_LINE_WIDTH));
+ RKCAMERA_TR("CIF_CIF_LINE_NUM_ADDR = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_LINE_NUM_ADDR));
+ RKCAMERA_TR("CIF_CIF_FRM0_ADDR_Y = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_FRM0_ADDR_Y));
+ RKCAMERA_TR("CIF_CIF_FRM0_ADDR_UV = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_FRM0_ADDR_UV));
+ RKCAMERA_TR("CIF_CIF_FRAME_STATUS = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_FRAME_STATUS));
+ RKCAMERA_TR("CIF_CIF_SCL_VALID_NUM = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_SCL_VALID_NUM));
+ RKCAMERA_TR("CIF_CIF_CUR_DST = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_CUR_DST));
+ RKCAMERA_TR("CIF_CIF_LINE_NUM_ADDR = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_LINE_NUM_ADDR));
}
ctrl = read_cif_reg(pcdev->base,CIF_CIF_CTRL); /*ddl@rock-chips.com v0.3.0x13*/
struct rk_camera_timer *fps_timer = container_of(timer, struct rk_camera_timer, timer);
struct rk_camera_dev *pcdev = fps_timer->pcdev;
int rec_flag,i;
- /*static unsigned int last_fps = 0;*/
- /*struct soc_camera_link *tmp_soc_cam_link;*/ /*yzm*/
- /*tmp_soc_cam_link = to_soc_camera_link(pcdev->icd);*/ /*yzm*/
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
fival_pre = fival_nxt;
while (fival_nxt != NULL) {
- RKCAMERA_DG1("%s %c%c%c%c %dx%d framerate : %d/%d\n", dev_name(pcdev->icd->control), /*yzm*/
+ RKCAMERA_DG1("%s %c%c%c%c %dx%d framerate : %d/%d\n", dev_name(pcdev->icd->control),
fival_nxt->fival.pixel_format & 0xFF, (fival_nxt->fival.pixel_format >> 8) & 0xFF,
(fival_nxt->fival.pixel_format >> 16) & 0xFF, (fival_nxt->fival.pixel_format >> 24),
fival_nxt->fival.width, fival_nxt->fival.height, fival_nxt->fival.discrete.denominator,
}
static int rk_camera_s_stream(struct soc_camera_device *icd, int enable)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
int cif_ctrl_val;
int ret;
cif_ctrl_val |= ENABLE_CAPTURE;
write_cif_reg(pcdev->base,CIF_CIF_CTRL, cif_ctrl_val);
spin_unlock_irqrestore(&pcdev->lock,flags);
- printk("%s:stream enable CIF_CIF_CTRL 0x%lx\n",__func__,read_cif_reg(pcdev->base,CIF_CIF_CTRL));
+ printk("%s:stream enable CIF_CIF_CTRL 0x%x\n",__func__,read_cif_reg(pcdev->base,CIF_CIF_CTRL));
hrtimer_start(&(pcdev->fps_timer.timer),ktime_set(3, 0),HRTIMER_MODE_REL);
pcdev->fps_timer.istarted = true;
} else {
pcdev->active = NULL;
INIT_LIST_HEAD(&pcdev->capture);
}
- RKCAMERA_DG1("s_stream: enable : 0x%x , CIF_CIF_CTRL = 0x%lx\n",enable,read_cif_reg(pcdev->base,CIF_CIF_CTRL));
+ RKCAMERA_DG1("s_stream: enable : 0x%x , CIF_CIF_CTRL = 0x%x\n",enable,read_cif_reg(pcdev->base,CIF_CIF_CTRL));
return 0;
}
int rk_camera_enum_frameintervals(struct soc_camera_device *icd, struct v4l2_frmivalenum *fival)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
struct rk_camera_frmivalenum *fival_list = NULL;
const struct v4l2_queryctrl *qctrl, int zoom_rate)
{
struct v4l2_crop a;
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
struct rk_camera_dev *pcdev = ici->priv;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()/n", __FILE__, __LINE__,__FUNCTION__);
static int rk_camera_set_ctrl(struct soc_camera_device *icd,
struct v4l2_control *sctrl)
{
- struct soc_camera_host *ici = to_soc_camera_host(icd->parent);/*yzm*/
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
const struct v4l2_queryctrl *qctrl;
struct rk_camera_dev *pcdev = ici->priv;
.num_controls = ARRAY_SIZE(rk_camera_controls)
};
-/**********yzm***********/
static int rk_camera_cif_iomux(struct device *dev)
{
if(CHIP_NAME == 3288){
__raw_writel(((1<<1)|(1<<(1+16))),RK_GRF_VIRT+0x0380);
+ }else if(CHIP_NAME == 3368){
+ //__raw_writel(((1<<1)|(1<<(1+16))),RK_GRF_VIRT+0x0900);
+ __raw_writel(((1<<1)|(1<<(1+16))),rk_cif_grf_base+0x0900);
}
/*mux CIF0_CLKOUT*/
return 0;
}
-/***********yzm***********/
static int rk_camera_probe(struct platform_device *pdev)
{
struct rk_camera_dev *pcdev;
int irq,i;
int err = 0;
struct rk_cif_clk *clk=NULL;
- struct device *dev_cif = ((struct rk29camera_platform_data*)pdev->dev.platform_data)->cif_dev;/*yzm*/
+ struct device *dev_cif = ((struct rk29camera_platform_data*)pdev->dev.platform_data)->cif_dev;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
BUG();
}
-/***********yzm**********/
rk_camera_diffchips(((struct rk29camera_platform_data*)pdev->dev.platform_data)->rockchip_name);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
pcdev->chip_id = -1;
#endif
- /***********yzm***********/
if (IS_CIF0()) {
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$/is_cif0\n");
clk = &cif_clk[0];
- cif_clk[0].pd_cif = devm_clk_get(dev_cif, "pd_cif0");
+ if(CHIP_NAME != 3368)
+ cif_clk[0].pd_cif = devm_clk_get(dev_cif, "pd_cif0");
+
cif_clk[0].aclk_cif = devm_clk_get(dev_cif, "aclk_cif0");
cif_clk[0].hclk_cif = devm_clk_get(dev_cif, "hclk_cif0");
cif_clk[0].cif_clk_in = devm_clk_get(dev_cif, "cif0_in");
cif_clk[0].cif_clk_out = devm_clk_get(dev_cif, "cif0_out");
//spin_lock_init(&cif_clk[0].lock);
cif_clk[0].on = false;
- rk_camera_cif_iomux(dev_cif);/*yzm*/
+ rk_camera_cif_iomux(dev_cif);
} else {
clk = &cif_clk[1];
- cif_clk[1].pd_cif = devm_clk_get(dev_cif, "pd_cif0");/*cif0 only yzm*/
+ if(CHIP_NAME != 3368)
+ cif_clk[1].pd_cif = devm_clk_get(dev_cif, "pd_cif0");/*cif0 only */
+
cif_clk[1].aclk_cif = devm_clk_get(dev_cif, "aclk_cif0");
cif_clk[1].hclk_cif = devm_clk_get(dev_cif, "hclk_cif0");
cif_clk[1].cif_clk_in = devm_clk_get(dev_cif, "cif0_in");
cif_clk[1].cif_clk_out = devm_clk_get(dev_cif, "cif0_out");
//spin_lock_init(&cif_clk[1].lock);
cif_clk[1].on = false;
- rk_camera_cif_iomux(dev_cif);/*yzm*/
+ rk_camera_cif_iomux(dev_cif);
}
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
- /***********yzm**********/
dev_set_drvdata(&pdev->dev, pcdev);
pcdev->res = res;
pcdev->pdata = pdev->dev.platform_data; /* ddl@rock-chips.com : Request IO in init function */
- /*= rk_camera_platform_data */
if (pcdev->pdata && pcdev->pdata->io_init) {
- pcdev->pdata->io_init();/* call rk_sensor_io_init()*/
+ pcdev->pdata->io_init();
if (pcdev->pdata->sensor_mclk == NULL)
pcdev->pdata->sensor_mclk = rk_camera_mclk_ctrl;
}
pcdev->soc_host.drv_name = RK29_CAM_DRV_NAME;
pcdev->soc_host.ops = &rk_soc_camera_host_ops;
- pcdev->soc_host.priv = pcdev; /*to itself,csll in rk_camera_add_device*/
+ pcdev->soc_host.priv = pcdev;
pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
pcdev->soc_host.nr = pdev->id;
debug_printk("/$$$$$$$$$$$$$$$$$$$$$$/next soc_camera_host_register\n");
release_mem_region(res->start, res->end - res->start + 1);
exit_reqmem_vip:
if (clk) {
- if (clk->pd_cif)
- clk_put(clk->pd_cif);
+ if(CHIP_NAME != 3368){
+ if (clk->pd_cif)
+ clk_put(clk->pd_cif);
+ }
if (clk->aclk_cif)
clk_put(clk->aclk_cif);
if (clk->hclk_cif)
#define CIF_F0_READY (0x01<<0)
#define CIF_F1_READY (0x01<<1)
+extern unsigned long rk_cif_grf_base;
+extern unsigned long rk_cif_cru_base;
+
#define MIN(x,y) ((x<y) ? x: y)
#define MAX(x,y) ((x>y) ? x: y)
#define RK_SENSOR_24MHZ 24*1000*1000 /* MHz */
#define RK_SENSOR_48MHZ 48
-#define __raw_readl(p) (*(unsigned long *)(p))
-#define __raw_writel(v,p) (*(unsigned long *)(p) = (v))
+#define __raw_readl(p) (*(unsigned int *)(p))
+#define __raw_writel(v,p) (*(unsigned int *)(p) = (v))
#define write_cif_reg(base,addr, val) __raw_writel(val, addr+(base))
#define read_cif_reg(base,addr) __raw_readl(addr+(base))
#define write_cru_reg(addr, val) __raw_writel(val, addr+RK_CRU_VIRT)
#define read_cru_reg(addr) __raw_readl(addr+RK_CRU_VIRT)
#define mask_cru_reg(addr, msk, val) write_cru_reg(addr,(val)|((~(msk))&read_cru_reg(addr)))
+
+#define rk3368_write_cru_reg(addr, val) __raw_writel(val, addr+rk_cif_cru_base)
+#define rk3368_read_cru_reg(addr) __raw_readl(addr+rk_cif_cru_base)
+#define rk3368_mask_cru_reg(addr, msk, val) rk3368_write_cru_reg(addr,(val)|((~(msk))&rk3368_read_cru_reg(addr)))
+
/*********yzm*********end*/
/*
#if defined(CONFIG_ARCH_RK2928)
1. Support pingpong mode.
2. Fix cif_clk_out cannot close which base on XIN24M and cannot turn to 0.
3. Move Camera Sensor Macro from rk_camera.h to rk_camera_sensor_info.h
+*v0.1.a:
+ 1. Support rk3368.
*/
-#define RK_CAM_VERSION_CODE KERNEL_VERSION(0, 1, 0x9)
+#define RK_CAM_VERSION_CODE KERNEL_VERSION(0, 1, 0xa)
static int version = RK_CAM_VERSION_CODE;
module_param(version, int, S_IRUGO);
#if CAMERA_VIDEOBUF_ARM_ACCESS
struct rk29_camera_vbinfo
{
- unsigned int phy_addr;
+ unsigned long phy_addr;
void __iomem *vir_addr;
unsigned int size;
};
unsigned long frame_interval;
unsigned int pixfmt;
/*for ipp */
- unsigned int vipmem_phybase;
+ unsigned long vipmem_phybase;
void __iomem *vipmem_virbase;
unsigned int vipmem_size;
unsigned int vipmem_bsize;
CRU_CLKSEL29_CON = 0xb8;
CHIP_NAME = 3126;
+ }else if(strstr(rockchip_name,"3368"))
+ {
+ CRU_PCLK_REG30 = 0x154;
+ ENANABLE_INVERT_PCLK_CIF0 = ((0x1<<29)|(0x1<<13));
+ DISABLE_INVERT_PCLK_CIF0 = ((0x1<<29)|(0x0<<13));
+ ENANABLE_INVERT_PCLK_CIF1 = ENANABLE_INVERT_PCLK_CIF0;
+ DISABLE_INVERT_PCLK_CIF1 = DISABLE_INVERT_PCLK_CIF0;
+
+ //CRU_CLK_OUT = 0x16c;
+ CHIP_NAME = 3368;
}
}
static inline void rk_cru_set_soft_reset(u32 idx, bool on , u32 RK_CRU_SOFTRST_CON)
{
- void __iomem *reg = RK_CRU_VIRT + RK_CRU_SOFTRST_CON;
- u32 val = on ? 0x10001U << 14 : 0x10000U << 14;
+ u32 val = 0;
+ void __iomem *reg;
+
+ if(CHIP_NAME == 3368)
+ reg = (void*)(rk_cif_cru_base + RK_CRU_SOFTRST_CON);
+ else
+ reg = (void*)(RK_CRU_VIRT + RK_CRU_SOFTRST_CON);
+
+ if(CHIP_NAME == 3126){
+ val = on ? 0x10001U << 14 : 0x10000U << 14;
+ }else if(CHIP_NAME == 3368){
+ val = on ? 0x10001U << 8 : 0x10000U << 8;
+ }
writel_relaxed(val, reg);
dsb();
}
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
if(strstr(pcdev->pdata->rockchip_name,"3128")||strstr(pcdev->pdata->rockchip_name,"3126"))
RK_CRU_SOFTRST_CON = RK312X_CRU_SOFTRSTS_CON(6);
+ else if(strstr(pcdev->pdata->rockchip_name,"3368"))
+ RK_CRU_SOFTRST_CON = RK3368_CRU_SOFTRSTS_CON(6);
if (only_rst == true) {
rk_cru_set_soft_reset(0, true ,RK_CRU_SOFTRST_CON);
static inline void rk_videobuf_capture(struct videobuf_buffer *vb,struct rk_camera_dev *rk_pcdev, int fmt_ready)
{
- unsigned int y_addr,uv_addr;
+ unsigned long y_addr,uv_addr;
struct rk_camera_dev *pcdev = rk_pcdev;
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
}
//spin_lock(&clk->lock);
- if (on && !clk->on) {
- clk_prepare_enable(clk->pd_cif); /*yzm*/
+ if (on && !clk->on) {
+ if(CHIP_NAME != 3368)
+ clk_prepare_enable(clk->pd_cif); /*yzm*/
clk_prepare_enable(clk->aclk_cif);
clk_prepare_enable(clk->hclk_cif);
clk_prepare_enable(clk->cif_clk_in);
write_cru_reg(CRU_CLK_OUT, 0x00800080);
}
clk_disable_unprepare(clk->cif_clk_out);
- clk_disable_unprepare(clk->pd_cif);
+ if(CHIP_NAME != 3368)
+ clk_disable_unprepare(clk->pd_cif);
clk->on = false;
}
//spin_unlock(&clk->lock);
if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) {
if(IS_CIF0()) {
- write_cru_reg(CRU_PCLK_REG30, read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF0);
+ if(CHIP_NAME == 3368)
+ rk3368_write_cru_reg(CRU_PCLK_REG30, rk3368_read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF0);
+ else
+ write_cru_reg(CRU_PCLK_REG30, read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF0);
} else {
- write_cru_reg(CRU_PCLK_REG30, read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF1);
+ if(CHIP_NAME == 3368)
+ rk3368_write_cru_reg(CRU_PCLK_REG30, rk3368_read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF1);
+ else
+ write_cru_reg(CRU_PCLK_REG30, read_cru_reg(CRU_PCLK_REG30) | ENANABLE_INVERT_PCLK_CIF1);
}
} else {
if(IS_CIF0()){
- write_cru_reg(CRU_PCLK_REG30, (read_cru_reg(CRU_PCLK_REG30) & 0xFFFFEFF ) | DISABLE_INVERT_PCLK_CIF0);
+ if(CHIP_NAME == 3368)
+ rk3368_write_cru_reg(CRU_PCLK_REG30, (rk3368_read_cru_reg(CRU_PCLK_REG30) & 0xFFFFEFF ) | DISABLE_INVERT_PCLK_CIF0);
+ else
+ write_cru_reg(CRU_PCLK_REG30, (read_cru_reg(CRU_PCLK_REG30) & 0xFFFFEFF ) | DISABLE_INVERT_PCLK_CIF0);
} else {
- write_cru_reg(CRU_PCLK_REG30, (read_cru_reg(CRU_PCLK_REG30) & 0xFFFEFFF) | DISABLE_INVERT_PCLK_CIF1);
+ if(CHIP_NAME == 3368)
+ rk3368_write_cru_reg(CRU_PCLK_REG30, (rk3368_read_cru_reg(CRU_PCLK_REG30) & 0xFFFEFFF) | DISABLE_INVERT_PCLK_CIF1);
+ else
+ write_cru_reg(CRU_PCLK_REG30, (read_cru_reg(CRU_PCLK_REG30) & 0xFFFEFFF) | DISABLE_INVERT_PCLK_CIF1);
}
}
/*tmp_soc_cam_desc = to_soc_camera_link(pcdev->icd);*/ /*yzm*/
/*dump regs*/
{
- RKCAMERA_TR("CIF_CIF_CTRL = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_CTRL));
- RKCAMERA_TR("CIF_CIF_INTEN = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_INTEN));
- RKCAMERA_TR("CIF_CIF_INTSTAT = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_INTSTAT));
- RKCAMERA_TR("CIF_CIF_FOR = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_FOR));
- RKCAMERA_TR("CIF_CIF_CROP = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_CROP));
- RKCAMERA_TR("CIF_CIF_SET_SIZE = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_SET_SIZE));
- RKCAMERA_TR("CIF_CIF_SCL_CTRL = 0x%lx\n",read_cif_reg(pcdev->base,CIF_CIF_SCL_CTRL));
- RKCAMERA_TR("CRU_PCLK_REG30 = 0X%lx\n",read_cru_reg(CRU_PCLK_REG30));
- RKCAMERA_TR("CIF_CIF_LAST_LINE = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_LAST_LINE));
+ RKCAMERA_TR("CIF_CIF_CTRL = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_CTRL));
+ RKCAMERA_TR("CIF_CIF_INTEN = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_INTEN));
+ RKCAMERA_TR("CIF_CIF_INTSTAT = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_INTSTAT));
+ RKCAMERA_TR("CIF_CIF_FOR = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_FOR));
+ RKCAMERA_TR("CIF_CIF_CROP = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_CROP));
+ RKCAMERA_TR("CIF_CIF_SET_SIZE = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_SET_SIZE));
+ RKCAMERA_TR("CIF_CIF_SCL_CTRL = 0x%x\n",read_cif_reg(pcdev->base,CIF_CIF_SCL_CTRL));
+ if(CHIP_NAME == 3368)
+ RKCAMERA_TR("CRU_PCLK_REG30 = 0X%x\n",rk3368_read_cru_reg(CRU_PCLK_REG30));
+ else
+ RKCAMERA_TR("CRU_PCLK_REG30 = 0X%x\n",read_cru_reg(CRU_PCLK_REG30));
+ RKCAMERA_TR("CIF_CIF_LAST_LINE = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_LAST_LINE));
- RKCAMERA_TR("CIF_CIF_LAST_PIX = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_LAST_PIX));
- RKCAMERA_TR("CIF_CIF_VIR_LINE_WIDTH = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_VIR_LINE_WIDTH));
- RKCAMERA_TR("CIF_CIF_LINE_NUM_ADDR = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_LINE_NUM_ADDR));
- RKCAMERA_TR("CIF_CIF_FRM0_ADDR_Y = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_FRM0_ADDR_Y));
- RKCAMERA_TR("CIF_CIF_FRM0_ADDR_UV = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_FRM0_ADDR_UV));
- RKCAMERA_TR("CIF_CIF_FRAME_STATUS = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_FRAME_STATUS));
- RKCAMERA_TR("CIF_CIF_SCL_VALID_NUM = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_SCL_VALID_NUM));
- RKCAMERA_TR("CIF_CIF_CUR_DST = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_CUR_DST));
- RKCAMERA_TR("CIF_CIF_LINE_NUM_ADDR = 0X%lx\n",read_cif_reg(pcdev->base,CIF_CIF_LINE_NUM_ADDR));
+ RKCAMERA_TR("CIF_CIF_LAST_PIX = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_LAST_PIX));
+ RKCAMERA_TR("CIF_CIF_VIR_LINE_WIDTH = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_VIR_LINE_WIDTH));
+ RKCAMERA_TR("CIF_CIF_LINE_NUM_ADDR = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_LINE_NUM_ADDR));
+ RKCAMERA_TR("CIF_CIF_FRM0_ADDR_Y = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_FRM0_ADDR_Y));
+ RKCAMERA_TR("CIF_CIF_FRM0_ADDR_UV = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_FRM0_ADDR_UV));
+ RKCAMERA_TR("CIF_CIF_FRAME_STATUS = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_FRAME_STATUS));
+ RKCAMERA_TR("CIF_CIF_SCL_VALID_NUM = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_SCL_VALID_NUM));
+ RKCAMERA_TR("CIF_CIF_CUR_DST = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_CUR_DST));
+ RKCAMERA_TR("CIF_CIF_LINE_NUM_ADDR = 0X%x\n",read_cif_reg(pcdev->base,CIF_CIF_LINE_NUM_ADDR));
}
ctrl = read_cif_reg(pcdev->base,CIF_CIF_CTRL); /*ddl@rock-chips.com v0.3.0x13*/
pcdev->active_buf = 0;
INIT_LIST_HEAD(&pcdev->capture);
}
- RKCAMERA_DG1("s_stream: enable : 0x%x , CIF_CIF_CTRL = 0x%lx\n",enable,read_cif_reg(pcdev->base,CIF_CIF_CTRL));
+ RKCAMERA_DG1("s_stream: enable : 0x%x , CIF_CIF_CTRL = 0x%x\n",enable,read_cif_reg(pcdev->base,CIF_CIF_CTRL));
return 0;
}
int rk_camera_enum_frameintervals(struct soc_camera_device *icd, struct v4l2_frmivalenum *fival)
char state_str[20] = {0};
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
- strcpy(state_str,"cif_pin_jpe");
+ if(CHIP_NAME == 3368)
+ strcpy(state_str,"cif_pin_all");
+ else
+ strcpy(state_str,"cif_pin_jpe");
/*__raw_writel(((1<<1)|(1<<(1+16))),RK_GRF_VIRT+0x0380);*/
if (IS_CIF0()) {
debug_printk( "/$$$$$$$$$$$$$$$$$$$$$$/is_cif0\n");
clk = &cif_clk[0];
- cif_clk[0].pd_cif = devm_clk_get(dev_cif, "pd_cif0");
+ if(CHIP_NAME != 3368)
+ cif_clk[0].pd_cif = devm_clk_get(dev_cif, "pd_cif0");
cif_clk[0].aclk_cif = devm_clk_get(dev_cif, "aclk_cif0");
cif_clk[0].hclk_cif = devm_clk_get(dev_cif, "hclk_cif0");
cif_clk[0].cif_clk_in = devm_clk_get(dev_cif, "cif0_in");
rk_camera_cif_iomux(dev_cif);/*yzm*/
} else {
clk = &cif_clk[1];
- cif_clk[1].pd_cif = devm_clk_get(dev_cif, "pd_cif0");/*cif0 only yzm*/
+ if(CHIP_NAME != 3368)
+ cif_clk[1].pd_cif = devm_clk_get(dev_cif, "pd_cif0");/*cif0 only yzm*/
cif_clk[1].aclk_cif = devm_clk_get(dev_cif, "aclk_cif0");
cif_clk[1].hclk_cif = devm_clk_get(dev_cif, "hclk_cif0");
cif_clk[1].cif_clk_in = devm_clk_get(dev_cif, "cif0_in");
release_mem_region(res->start, res->end - res->start + 1);
exit_reqmem_vip:
if (clk) {
- if (clk->pd_cif)
- clk_put(clk->pd_cif);
+ if(CHIP_NAME != 3368){
+ if (clk->pd_cif)
+ clk_put(clk->pd_cif);
+ }
if (clk->aclk_cif)
clk_put(clk->aclk_cif);
if (clk->hclk_cif)
# Makefile for rockchip camsys driver
#
obj-$(CONFIG_CAMSYS_DRV) += camsys_drv.o
-obj-$(CONFIG_CAMSYS_MRV) += camsys_marvin.o camsys_mipicsi_phy.o camsys_soc_priv.o
+obj-$(CONFIG_CAMSYS_MRV) += camsys_marvin.o camsys_mipicsi_phy.o camsys_soc_priv.o camsys_soc_rk3288.o camsys_soc_rk3368.o
obj-$(CONFIG_CAMSYS_CIF) += camsys_cif.o
obj-y += ext_flashled_drv/
* The ioctl() implementation
*/
+typedef struct camsys_querymem_s_32 {
+ camsys_mmap_type_t mem_type;
+ unsigned int mem_offset;
+
+ unsigned int mem_size;
+} camsys_querymem_32_t;
+
+#define CAMSYS_QUREYMEM_32 _IOR(CAMSYS_IOC_MAGIC, 11, camsys_querymem_32_t)
+
+static long camsys_ioctl_compat(struct file *filp,unsigned int cmd, unsigned long arg)
+{
+ long err = 0;
+ camsys_dev_t *camsys_dev = (camsys_dev_t*)filp->private_data;
+
+ if (_IOC_TYPE(cmd) != CAMSYS_IOC_MAGIC) {
+ camsys_err("ioctl type(%c!=%c) is invalidate\n",_IOC_TYPE(cmd),CAMSYS_IOC_MAGIC);
+ err = -ENOTTY;
+ goto end;
+ }
+ if (_IOC_NR(cmd) > CAMSYS_IOC_MAXNR) {
+ camsys_err("ioctl index(%d>%d) is invalidate\n",_IOC_NR(cmd),CAMSYS_IOC_MAXNR);
+ err = -ENOTTY;
+ goto end;
+ }
+
+ if (_IOC_DIR(cmd) & _IOC_READ)
+ err = !access_ok(VERIFY_WRITE, (void __user *)arg, _IOC_SIZE(cmd));
+ else if (_IOC_DIR(cmd) & _IOC_WRITE)
+ err = !access_ok(VERIFY_READ, (void __user *)arg, _IOC_SIZE(cmd));
+
+ if (err) {
+ camsys_err("ioctl(0x%x) operation not permitted for %s",cmd,dev_name(camsys_dev->miscdev.this_device));
+ err = -EFAULT;
+ goto end;
+ }
+
+ switch (cmd) {
+
+ case CAMSYS_VERCHK:
+ {
+ camsys_version_t camsys_ver;
+
+ camsys_ver.drv_ver = CAMSYS_DRIVER_VERSION;
+ camsys_ver.head_ver = CAMSYS_HEAD_VERSION;
+ if (copy_to_user((void __user *)arg,(void*)&camsys_ver, sizeof(camsys_version_t)))
+ return -EFAULT;
+ break;
+ }
+ case CAMSYS_QUREYIOMMU:
+ {
+ int iommu_enabled = 0;
+ #ifdef CONFIG_ROCKCHIP_IOMMU
+ struct device_node * vpu_node =NULL;
+ int vpu_iommu_enabled = 0;
+ vpu_node = of_find_node_by_name(NULL, "vpu_service");
+ if(vpu_node){
+ of_property_read_u32(vpu_node, "iommu_enabled", &vpu_iommu_enabled);
+ of_property_read_u32(camsys_dev->pdev->dev.of_node, "rockchip,isp,iommu_enable", &iommu_enabled);
+ of_node_put(vpu_node);
+ if(iommu_enabled != vpu_iommu_enabled){
+ camsys_err("iommu status not consistent,check the dts file ! isp:%d,vpu:%d",iommu_enabled,vpu_iommu_enabled);
+ return -EFAULT;
+ }
+ }
+ #endif
+ if (copy_to_user((void __user *)arg,(void*)&iommu_enabled, sizeof(iommu_enabled)))
+ return -EFAULT;
+ break;
+ }
+ case CAMSYS_I2CRD:
+ {
+ camsys_i2c_info_t i2cinfo;
+
+ if (copy_from_user((void*)&i2cinfo,(void __user *)arg, sizeof(camsys_i2c_info_t)))
+ return -EFAULT;
+
+ err = camsys_i2c_read(&i2cinfo,camsys_dev);
+ if (err==0) {
+ if (copy_to_user((void __user *)arg,(void*)&i2cinfo, sizeof(camsys_i2c_info_t)))
+ return -EFAULT;
+ }
+ break;
+ }
+
+ case CAMSYS_I2CWR:
+ {
+ camsys_i2c_info_t i2cinfo;
+
+ if (copy_from_user((void*)&i2cinfo,(void __user *)arg, sizeof(camsys_i2c_info_t)))
+ return -EFAULT;
+
+ err = camsys_i2c_write(&i2cinfo,camsys_dev);
+ break;
+ }
+
+ case CAMSYS_SYSCTRL:
+ {
+ camsys_sysctrl_t devctl;
+
+ if (copy_from_user((void*)&devctl,(void __user *)arg, sizeof(camsys_sysctrl_t)))
+ return -EFAULT;
+
+ err = camsys_sysctl(&devctl, camsys_dev);
+ if ((err==0) && (devctl.ops == CamSys_IOMMU)){
+ if (copy_to_user((void __user *)arg,(void*)&devctl, sizeof(camsys_sysctrl_t)))
+ return -EFAULT;
+ }
+ break;
+ }
+
+ case CAMSYS_REGRD:
+ {
+
+ break;
+ }
+
+ case CAMSYS_REGWR:
+ {
+
+ break;
+ }
+
+ case CAMSYS_REGISTER_DEVIO:
+ {
+ camsys_devio_name_t devio;
+
+ if (copy_from_user((void*)&devio,(void __user *)arg, sizeof(camsys_devio_name_t)))
+ return -EFAULT;
+
+ err = camsys_extdev_register(&devio,camsys_dev);
+ break;
+ }
+
+ case CAMSYS_DEREGISTER_DEVIO:
+ {
+ unsigned int dev_id;
+
+ if (copy_from_user((void*)&dev_id,(void __user *)arg, sizeof(unsigned int)))
+ return -EFAULT;
+
+ err = camsys_extdev_deregister(dev_id, camsys_dev, false);
+ break;
+ }
+
+ case CAMSYS_IRQCONNECT:
+ {
+ camsys_irqcnnt_t irqcnnt;
+
+ if (copy_from_user((void*)&irqcnnt,(void __user *)arg, sizeof(camsys_irqcnnt_t)))
+ return -EFAULT;
+
+ err = camsys_irq_connect(&irqcnnt, camsys_dev);
+
+ break;
+ }
+
+ case CAMSYS_IRQWAIT:
+ {
+ camsys_irqsta_t irqsta;
+
+ err = camsys_irq_wait(&irqsta, camsys_dev);
+ if (err==0) {
+ if (copy_to_user((void __user *)arg,(void*)&irqsta, sizeof(camsys_irqsta_t)))
+ return -EFAULT;
+ }
+ break;
+ }
+
+ case CAMSYS_IRQDISCONNECT:
+ {
+ camsys_irqcnnt_t irqcnnt;
+
+ if (copy_from_user((void*)&irqcnnt,(void __user *)arg, sizeof(camsys_irqcnnt_t)))
+ return -EFAULT;
+ err = camsys_irq_disconnect(&irqcnnt,camsys_dev,false);
+ break;
+ }
+
+ case CAMSYS_QUREYMEM_32:
+ {
+ camsys_querymem_t qmem;
+ camsys_querymem_32_t qmem32;
+
+ if (copy_from_user((void*)&qmem32,(void __user *)arg, sizeof(camsys_querymem_32_t)))
+ return -EFAULT;
+
+ qmem.mem_type = qmem32.mem_type;
+ err = camsys_querymem(camsys_dev,&qmem);
+ if (err == 0) {
+ qmem32.mem_offset = (unsigned int)qmem.mem_offset;
+ qmem32.mem_size = qmem.mem_size;
+ if (copy_to_user((void __user *)arg,(void*)&qmem32, sizeof(camsys_querymem_32_t)))
+ return -EFAULT;
+ }
+ break;
+ }
+ default :
+ break;
+ }
+
+end:
+ return err;
+
+}
+
static long camsys_ioctl(struct file *filp,unsigned int cmd, unsigned long arg)
{
long err = 0;
}
break;
}
-
+
default :
break;
}
return err;
}
+
+
/*
* VMA operations.
*/
.release = camsys_release,
.unlocked_ioctl = camsys_ioctl,
.mmap = camsys_mmap,
+ .compat_ioctl = camsys_ioctl_compat,
};
static int camsys_platform_probe(struct platform_device *pdev){
goto request_mem_fail;
}
- meminfo->vir_base = (unsigned int)devm_ioremap_resource(dev, ®ister_res);
+ meminfo->vir_base = (unsigned long)devm_ioremap_resource(dev, ®ister_res);
if (!meminfo->vir_base){
camsys_err("%s ioremap %s failed",dev_name(&pdev->dev), CAMSYS_REGISTER_MEM_NAME);
err = -ENXIO;
goto request_mem_fail;
}
-
+ rk_isp_base = meminfo->vir_base;
strlcpy(meminfo->name, CAMSYS_REGISTER_MEM_NAME,sizeof(meminfo->name));
meminfo->phy_base = register_res.start;
meminfo->size = register_res.end - register_res.start + 1;
list_for_each_entry(meminfo, &camsys_dev->devmems.memslist, list) {
if (strcmp(meminfo->name,CAMSYS_I2C_MEM_NAME) == 0) {
camsys_dev->devmems.i2cmem = meminfo;
- camsys_trace(1," I2c memory (phy: 0x%x vir: 0x%x size: 0x%x)",
+ camsys_trace(1," I2c memory (phy: 0x%lx vir: 0x%lx size: 0x%x)",
meminfo->phy_base,meminfo->vir_base,meminfo->size);
}
if (strcmp(meminfo->name,CAMSYS_REGISTER_MEM_NAME) == 0) {
camsys_dev->devmems.registermem = meminfo;
- camsys_trace(1," Register memory (phy: 0x%x vir: 0x%x size: 0x%x)",
+ camsys_trace(1," Register memory (phy: 0x%lx vir: 0x%lx size: 0x%x)",
meminfo->phy_base,meminfo->vir_base,meminfo->size);
}
}
#ifndef __RKCAMSYS_GPIO_H__
#define __RKCAMSYS_GPIO_H__
-#include <linux/gpio.h>
+//#include <asm/gpio.h>
#if defined(CONFIG_ARCH_ROCKCHIP)
#define RK30_PIN0_PA0 (0)
#define NUM_GROUP (32)
#include <linux/rockchip/cpu.h>
#include <linux/rockchip/iomap.h>
#include <linux/rockchip/grf.h>
-
+//#include <asm/gpio.h>
+//#include <asm/system.h>
#include <asm/uaccess.h>
#include <linux/of.h>
*v0.0x1a.0:
1) vpu_node changed from "vpu_service" to "rockchip,vpu_sub"
*v0.0x1b.0:
- 1) use of_find_node_by_name to get vpu node instead of of_find_compatible_node
+ 1) use of_find_node_by_name to get vpu node instead of of_find_compatible_node
+*v0.0x1c.0:
+ 1) support rk3368.
*/
-#define CAMSYS_DRIVER_VERSION KERNEL_VERSION(0,0x1b,0)
+#define CAMSYS_DRIVER_VERSION KERNEL_VERSION(0,0x1c,0)
#define CAMSYS_PLATFORM_DRV_NAME "RockChip-CamSys"
typedef struct camsys_meminfo_s {
unsigned char name[32];
- unsigned int phy_base;
- unsigned int vir_base;
+ unsigned long phy_base;
+ unsigned long vir_base;
unsigned int size;
unsigned int vmas;
void *soc;
+ camsys_meminfo_t *csiphy_reg;
+
int (*clkin_cb)(void *ptr, unsigned int on);
int (*clkout_cb)(void *ptr,unsigned int on,unsigned int clk);
int (*reset_cb)(void *ptr, unsigned int on);
clk_prepare_enable(clk->aclk_isp);
clk_prepare_enable(clk->hclk_isp);
clk_prepare_enable(clk->isp);
- clk_prepare_enable(clk->isp_jpe);
- clk_prepare_enable(clk->clk_mipi_24m);
+ clk_prepare_enable(clk->isp_jpe);
clk_prepare_enable(clk->pclkin_isp);
- clk_prepare_enable(clk->pd_isp);
-
+ if(CHIP_TYPE == 3368){
+ clk_prepare_enable(clk->cif_clk_out);
+ clk_prepare_enable(clk->pclk_dphyrx);
+ }else{
+ clk_prepare_enable(clk->pd_isp);
+ clk_prepare_enable(clk->clk_mipi_24m);
+ }
clk->in_on = true;
camsys_trace(1, "%s clock(f: %ld Hz) in turn on",dev_name(camsys_dev->miscdev.this_device),isp_clk);
clk_disable_unprepare(clk->hclk_isp);
clk_disable_unprepare(clk->isp);
clk_disable_unprepare(clk->isp_jpe);
- clk_disable_unprepare(clk->clk_mipi_24m);
clk_disable_unprepare(clk->pclkin_isp);
- clk_disable_unprepare(clk->pd_isp);
-
+ if(CHIP_TYPE == 3368){
+ clk_disable_unprepare(clk->cif_clk_out);
+ clk_disable_unprepare(clk->pclk_dphyrx);
+ }else{
+ clk_disable_unprepare(clk->clk_mipi_24m);
+ clk_disable_unprepare(clk->pd_isp);
+ }
rockchip_clear_system_status(SYS_STATUS_ISP);
clk->in_on = false;
camsys_trace(1, "%s clock in turn off",dev_name(camsys_dev->miscdev.this_device));
err = -EINVAL;
goto clk_failed;
}
-
- mrv_clk->pd_isp = devm_clk_get(&pdev->dev, "pd_isp");
- mrv_clk->aclk_isp = devm_clk_get(&pdev->dev, "aclk_isp");
- mrv_clk->hclk_isp = devm_clk_get(&pdev->dev, "hclk_isp");
- mrv_clk->isp = devm_clk_get(&pdev->dev, "clk_isp");
- mrv_clk->isp_jpe = devm_clk_get(&pdev->dev, "clk_isp_jpe");
- mrv_clk->pclkin_isp = devm_clk_get(&pdev->dev, "pclkin_isp");
- mrv_clk->cif_clk_out = devm_clk_get(&pdev->dev, "clk_cif_out");
- mrv_clk->cif_clk_pll = devm_clk_get(&pdev->dev, "clk_cif_pll");
- mrv_clk->clk_mipi_24m = devm_clk_get(&pdev->dev,"clk_mipi_24m");
-
- if (IS_ERR_OR_NULL(mrv_clk->pd_isp) || IS_ERR_OR_NULL(mrv_clk->aclk_isp) || IS_ERR_OR_NULL(mrv_clk->hclk_isp) ||
- IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) || IS_ERR_OR_NULL(mrv_clk->pclkin_isp) ||
- IS_ERR_OR_NULL(mrv_clk->cif_clk_out) || IS_ERR_OR_NULL(mrv_clk->clk_mipi_24m)) {
- camsys_err("Get %s clock resouce failed!\n",miscdev_name);
- err = -EINVAL;
- goto clk_failed;
- }
-
+ if(CHIP_TYPE == 3368){
+ mrv_clk->pd_isp = NULL;
+ mrv_clk->aclk_isp = devm_clk_get(&pdev->dev, "aclk_isp");
+ mrv_clk->hclk_isp = devm_clk_get(&pdev->dev, "hclk_isp");
+ mrv_clk->isp = devm_clk_get(&pdev->dev, "clk_isp");
+ mrv_clk->isp_jpe = devm_clk_get(&pdev->dev, "clk_isp_jpe");
+ mrv_clk->pclkin_isp = devm_clk_get(&pdev->dev, "pclkin_isp");
+ mrv_clk->cif_clk_out = devm_clk_get(&pdev->dev, "clk_cif_out");
+ mrv_clk->cif_clk_pll = devm_clk_get(&pdev->dev, "clk_cif_pll");
+ mrv_clk->pclk_dphyrx = devm_clk_get(&pdev->dev, "pclk_dphyrx");
+
+
+ if (IS_ERR_OR_NULL(mrv_clk->aclk_isp) || IS_ERR_OR_NULL(mrv_clk->hclk_isp) ||
+ IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) || IS_ERR_OR_NULL(mrv_clk->pclkin_isp) ||
+ IS_ERR_OR_NULL(mrv_clk->cif_clk_out) || IS_ERR_OR_NULL(mrv_clk->pclk_dphyrx)) {
+ camsys_err("Get %s clock resouce failed!\n",miscdev_name);
+ err = -EINVAL;
+ goto clk_failed;
+ }
+ }else{
+ mrv_clk->pd_isp = devm_clk_get(&pdev->dev, "pd_isp");
+ mrv_clk->aclk_isp = devm_clk_get(&pdev->dev, "aclk_isp");
+ mrv_clk->hclk_isp = devm_clk_get(&pdev->dev, "hclk_isp");
+ mrv_clk->isp = devm_clk_get(&pdev->dev, "clk_isp");
+ mrv_clk->isp_jpe = devm_clk_get(&pdev->dev, "clk_isp_jpe");
+ mrv_clk->pclkin_isp = devm_clk_get(&pdev->dev, "pclkin_isp");
+ mrv_clk->cif_clk_out = devm_clk_get(&pdev->dev, "clk_cif_out");
+ mrv_clk->cif_clk_pll = devm_clk_get(&pdev->dev, "clk_cif_pll");
+ mrv_clk->clk_mipi_24m = devm_clk_get(&pdev->dev,"clk_mipi_24m");
+
+ if (IS_ERR_OR_NULL(mrv_clk->pd_isp) || IS_ERR_OR_NULL(mrv_clk->aclk_isp) || IS_ERR_OR_NULL(mrv_clk->hclk_isp) ||
+ IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) || IS_ERR_OR_NULL(mrv_clk->pclkin_isp) ||
+ IS_ERR_OR_NULL(mrv_clk->cif_clk_out) || IS_ERR_OR_NULL(mrv_clk->clk_mipi_24m)) {
+ camsys_err("Get %s clock resouce failed!\n",miscdev_name);
+ err = -EINVAL;
+ goto clk_failed;
+ }
+ }
clk_set_rate(mrv_clk->isp,210000000);
clk_set_rate(mrv_clk->isp_jpe, 210000000);
if (!IS_ERR_OR_NULL(mrv_clk->cif_clk_out)) {
clk_put(mrv_clk->cif_clk_out);
}
+ if(CHIP_TYPE == 3368){
+ if (!IS_ERR_OR_NULL(mrv_clk->pclk_dphyrx)) {
+ clk_put(mrv_clk->pclk_dphyrx);
+ }
+ }
kfree(mrv_clk);
mrv_clk = NULL;
struct clk *cif_clk_out;
struct clk *cif_clk_pll;
+ struct clk *pclk_dphyrx;
+
unsigned int out_on;
struct mutex lock;
#include "camsys_soc_priv.h"
#include "camsys_mipicsi_phy.h"
+unsigned int CHIP_TYPE;
+unsigned long rk_grf_base;
+unsigned long rk_cru_base;
+unsigned long rk_isp_base;
+
static int camsys_mipiphy_clkin_cb(void *ptr, unsigned int on)
{
camsys_mipiphy_clk_t *clk;
}
}
}
+ if(CHIP_TYPE == 3368){
+ if(camsys_dev->csiphy_reg != NULL){
+ kfree(camsys_dev->csiphy_reg);
+ camsys_dev->csiphy_reg = NULL;
+ }
+ }
-
return 0;
}
int camsys_mipiphy_probe_cb(struct platform_device *pdev, camsys_dev_t *camsys_dev)
struct clk* clk;
camsys_mipiphy_clk_t *phyclk;
int err,i;
+ struct device_node *node;
+ const char *compatible = NULL;
+ err = of_property_read_string(dev->of_node->parent,"compatible",&compatible);
+ if (err < 0) {
+ camsys_err("get compatible failed!");
+ } else {
+ camsys_trace(1, "compatible is %s\n",compatible);
+ }
+ if(strstr(compatible, "rk3368"))
+ CHIP_TYPE = 3368;
+ else if(strstr(compatible, "rk3288"))
+ CHIP_TYPE = 3288;
+
err = of_property_read_u32(dev->of_node,"rockchip,isp,mipiphy",&mipiphy_cnt);
if (err < 0) {
camsys_err("get property(rockchip,isp,mipiphy) failed!");
if (meminfo == NULL) {
camsys_err("malloc camsys_meminfo_t for mipiphy%d failed!",i);
} else {
- meminfo->vir_base = (unsigned int)ioremap(phyreg[0],phyreg[1]);
+ meminfo->vir_base = (unsigned long)ioremap(phyreg[0],phyreg[1]);
if (!meminfo->vir_base){
camsys_err("%s ioremap %s failed",dev_name(&pdev->dev), str);
} else {
camsys_dev->mipiphy[i].remove = camsys_mipiphy_remove_cb;
if (meminfo != NULL) {
- camsys_trace(1,"%s mipi phy%d probe success(reg_phy: 0x%x reg_vir: 0x%x size: 0x%x)",
+ camsys_trace(1,"%s mipi phy%d probe success(reg_phy: 0x%lx reg_vir: 0x%lx size: 0x%x)",
dev_name(&pdev->dev), i,meminfo->phy_base,meminfo->vir_base, meminfo->size);
} else {
camsys_trace(1,"%s mipi phy%d probe success(reg_phy: 0x%x reg_vir: 0x%x size: 0x%x)",
}
}
-
+
+ if(CHIP_TYPE == 3368){
+ camsys_dev->csiphy_reg = kzalloc(sizeof(camsys_meminfo_t),GFP_KERNEL);
+ if (camsys_dev->csiphy_reg == NULL) {
+ camsys_err("malloc camsys_meminfo_t for csiphy_reg failed!");
+ }
+ if (of_property_read_u32_array(dev->of_node,"rockchip,isp,csiphy,reg",phyreg,2) == 0) {
+ camsys_dev->csiphy_reg->vir_base = (unsigned long)ioremap(phyreg[0],phyreg[1]);
+ if (!camsys_dev->csiphy_reg->vir_base){
+ camsys_err("%s ioremap %s failed",dev_name(&pdev->dev), "rockchip,isp,csiphy,reg");
+ } else {
+ camsys_trace(1,"csiphy vir addr=0x%lx",camsys_dev->csiphy_reg->vir_base);
+ strlcpy(camsys_dev->csiphy_reg->name, "Csi-DPHY",sizeof(camsys_dev->csiphy_reg->name));
+ camsys_dev->csiphy_reg->phy_base = phyreg[0];
+ camsys_dev->csiphy_reg->size = phyreg[1];
+ }
+ }
+ //get cru base
+ node = of_parse_phandle(dev->of_node, "rockchip,cru", 0);
+ rk_cru_base = (unsigned long)of_iomap(node, 0);
+ camsys_trace(1,"rk_cru_base=0x%lx",rk_cru_base);
+ //get grf base
+ node = of_parse_phandle(dev->of_node, "rockchip,grf", 0);
+ rk_grf_base = (unsigned long)of_iomap(node, 0);
+ camsys_trace(1,"rk_grf_base=0x%lx",rk_grf_base);
+ }
+
return 0;
fail:
} camsys_mipiphy_clk_t;
int camsys_mipiphy_probe_cb(struct platform_device *pdev, camsys_dev_t *camsys_dev);
-
#endif
#include "camsys_soc_priv.h"
-
static camsys_soc_priv_t* camsys_soc_p;
-#ifdef CONFIG_ARM
-#include "camsys_soc_rk3288.c"
-
-static int camsys_rk3288_cfg (camsys_soc_cfg_t cfg_cmd, void* cfg_para)
-{
- unsigned int *para_int;
-
- switch (cfg_cmd)
- {
- case Clk_DriverStrength_Cfg:
- {
- para_int = (unsigned int*)cfg_para;
- __raw_writel((((*para_int)&0x03)<<3)|(0x03<<3), RK_GRF_VIRT+0x01d4);
- break;
- }
-
- case Cif_IoDomain_Cfg:
- {
- para_int = (unsigned int*)cfg_para;
- if (*para_int < 28000000) {
- __raw_writel(((1<<1)|(1<<(1+16))),RK_GRF_VIRT+0x0380); // 1.8v IO
- } else {
- __raw_writel(((0<<1)|(1<<(1+16))),RK_GRF_VIRT+0x0380); // 3.3v IO
- }
- break;
- }
-
- case Mipi_Phy_Cfg:
- {
- camsys_rk3288_mipihpy_cfg((camsys_mipiphy_soc_para_t*)cfg_para);
- break;
- }
-
- case Isp_SoftRst: /* ddl@rock-chips.com: v0.d.0 */
- {
- unsigned int reset;
- reset = (unsigned int)cfg_para;
-
- if (reset == 1)
- cru_writel(0x40004000,0x1d0);
- else
- cru_writel(0x40000000,0x1d0);
- camsys_trace(1, "Isp_SoftRst: %d",reset);
- break;
- }
-
- default:
- {
- camsys_warn("cfg_cmd: 0x%x isn't support for %s",cfg_cmd,camsys_soc_p->name);
- break;
- }
-
- }
-
- return 0;
-
-
-}
-#endif
+extern int camsys_rk3288_cfg (camsys_soc_cfg_t cfg_cmd, void* cfg_para);
+extern int camsys_rk3368_cfg (camsys_soc_cfg_t cfg_cmd, void* cfg_para);
camsys_soc_priv_t* camsys_soc_get(void)
{
goto fail;
}
- if (soc_is_rk3288()) {
-#ifdef CONFIG_ARM
- strlcpy(camsys_soc_p->name,"camsys_rk3288",31);
- camsys_soc_p->soc_cfg = camsys_rk3288_cfg;
+#ifdef CONFIG_ARM64
+ strlcpy(camsys_soc_p->name,"camsys_rk3368",31);
+ camsys_soc_p->soc_cfg = camsys_rk3368_cfg;
+ camsys_err("camsys_soc_init exit!");
+#else
+ if (soc_is_rk3288()) {
+ strlcpy(camsys_soc_p->name,"camsys_rk3288",31);
+ camsys_soc_p->soc_cfg = camsys_rk3288_cfg;
+ } else {
+ camsys_err("camsys isn't support soc: 0x%lx!",rockchip_soc_id);
+ goto fail;
+ }
#endif
- } else {
- camsys_err("camsys isn't support soc: 0x%lx!",rockchip_soc_id);
- goto fail;
- }
-
+
return 0;
fail:
if (camsys_soc_p != NULL) {
extern camsys_soc_priv_t* camsys_soc_get(void);
extern int camsys_soc_init(void);
extern int camsys_soc_deinit(void);
+
+extern unsigned long rk_grf_base;
+extern unsigned long rk_cru_base;
+extern unsigned long rk_isp_base;
+extern unsigned int CHIP_TYPE;
+
#endif
return -1;
}
+int camsys_rk3288_cfg (camsys_soc_cfg_t cfg_cmd, void* cfg_para)
+{
+ unsigned int *para_int;
+
+ switch (cfg_cmd)
+ {
+ case Clk_DriverStrength_Cfg:
+ {
+ para_int = (unsigned int*)cfg_para;
+ __raw_writel((((*para_int)&0x03)<<3)|(0x03<<3), RK_GRF_VIRT+0x01d4);
+ break;
+ }
+
+ case Cif_IoDomain_Cfg:
+ {
+ para_int = (unsigned int*)cfg_para;
+ if (*para_int < 28000000) {
+ __raw_writel(((1<<1)|(1<<(1+16))),RK_GRF_VIRT+0x0380); // 1.8v IO
+ } else {
+ __raw_writel(((0<<1)|(1<<(1+16))),RK_GRF_VIRT+0x0380); // 3.3v IO
+ }
+ break;
+ }
+
+ case Mipi_Phy_Cfg:
+ {
+ camsys_rk3288_mipihpy_cfg((camsys_mipiphy_soc_para_t*)cfg_para);
+ break;
+ }
+
+ case Isp_SoftRst: /* ddl@rock-chips.com: v0.d.0 */
+ {
+ unsigned int reset;
+ reset = (unsigned int)cfg_para;
+
+ if (reset == 1)
+ cru_writel(0x40004000,0x1d0);
+ else
+ cru_writel(0x40000000,0x1d0);
+ camsys_trace(1, "Isp_SoftRst: %d",reset);
+ break;
+ }
+
+ default:
+ {
+ camsys_warn("cfg_cmd: 0x%x isn't support",cfg_cmd);
+ break;
+ }
+
+ }
+
+ return 0;
+
+
+}
#define write_grf_reg(addr, val) __raw_writel(val, addr+RK_GRF_VIRT)
#define read_grf_reg(addr) __raw_readl(addr+RK_GRF_VIRT)
#define mask_grf_reg(addr, msk, val) write_grf_reg(addr,(val)|((~(msk))&read_grf_reg(addr)))
+#ifdef CONFIG_ARM64
+#define cru_writel(v, o) do {writel(v, RK_CRU_VIRT + (o));} \
+ while (0)
+#define write_csihost_reg(addr, val) __raw_writel(val, addr+(void __force __iomem *)(phy_virt))
+#define read_csihost_reg(addr) __raw_readl(addr+(void __force __iomem *)(phy_virt))
+#else
#define cru_writel(v, o) do {writel(v, RK_CRU_VIRT + (o)); dsb();} \
while (0)
#define write_csihost_reg(addr, val) __raw_writel(val, addr+IOMEM(phy_virt))
#define read_csihost_reg(addr) __raw_readl(addr+IOMEM(phy_virt))
-
+#endif
#endif
--- /dev/null
+#include "camsys_soc_priv.h"
+#include "camsys_soc_rk3368.h"
+
+
+struct mipiphy_hsfreqrange_s {
+ unsigned int range_l;
+ unsigned int range_h;
+ unsigned char cfg_bit;
+};
+
+static struct mipiphy_hsfreqrange_s mipiphy_hsfreqrange[] = {
+ {80,110,0x00},
+ {110,150,0x01},
+ {150,200,0x02},
+ {200,250,0x03},
+ {250,300,0x04},
+ {300,400,0x05},
+ {400,500,0x06},
+ {500,600,0x07},
+ {600,700,0x08},
+ {700,800,0x09},
+ {800,1000,0x10},
+ {1000,1200,0x11},
+ {1200,1400,0x12},
+ {1400,1600,0x13},
+ {1600,1800,0x14}
+
+};
+
+#if 0
+static int camsys_rk3368_mipiphy_wr_reg(unsigned long phy_virt, unsigned char addr, unsigned char data)
+{
+ /*TESTEN =1,TESTDIN=addr */
+ write_csihost_reg(CSIHOST_PHY_TEST_CTRL1, (0x00010000 | addr));
+ /*TESTCLK=0 */
+ write_csihost_reg(CSIHOST_PHY_TEST_CTRL0, 0x00000000);
+ udelay(10);
+ /*TESTEN =0,TESTDIN=data */
+ write_csihost_reg(CSIHOST_PHY_TEST_CTRL1, (0x00000000 | data));
+ /*TESTCLK=1 */
+ write_csihost_reg(CSIHOST_PHY_TEST_CTRL0, 0x00000002);
+ udelay(10);
+
+ return 0;
+}
+
+static int camsys_rk3368_mipiphy_rd_reg(unsigned long phy_virt,unsigned char addr)
+{
+ return (read_csihost_reg(((CSIHOST_PHY_TEST_CTRL1)&0xff00))>>8);
+}
+
+static int camsys_rk3368_csiphy_wr_reg(unsigned long csiphy_virt, unsigned char addr, unsigned char data)
+{
+ write_csiphy_reg(addr,data);
+ return 0;
+}
+
+static int camsys_rk3368_csiphy_rd_reg(unsigned long csiphy_virt,unsigned char addr)
+{
+ return read_csiphy_reg(addr);
+}
+#endif
+static int camsys_rk3368_mipihpy_cfg (camsys_mipiphy_soc_para_t *para)
+{
+ unsigned char hsfreqrange=0xff,i;
+ struct mipiphy_hsfreqrange_s *hsfreqrange_p;
+ unsigned long phy_virt, phy_index;
+ unsigned long base;
+ unsigned long csiphy_virt;
+
+ phy_index = para->phy->phy_index;
+ if (para->camsys_dev->mipiphy[phy_index].reg!=NULL) {
+ phy_virt = para->camsys_dev->mipiphy[phy_index].reg->vir_base;
+ } else {
+ phy_virt = 0x00;
+ }
+ if(para->camsys_dev->csiphy_reg!=NULL){
+ csiphy_virt = (unsigned long)para->camsys_dev->csiphy_reg->vir_base;
+ }else {
+ csiphy_virt = 0x00;
+ }
+ if ((para->phy->bit_rate == 0) || (para->phy->data_en_bit == 0)) {
+ if (para->phy->phy_index == 0) {
+ camsys_trace(1, ">>>>>>>>>>>>>>>>para->phy->phy_index==0");
+ base = (unsigned long)para->camsys_dev->devmems.registermem->vir_base;
+ *((unsigned int*)(base + (MRV_MIPI_BASE+MRV_MIPI_CTRL))) &= ~(0x0f<<8);
+ camsys_trace(1, "mipi phy 0 standby!");
+ } else if (para->phy->phy_index == 1) {
+ /*TODO*/
+ }
+
+ return 0;
+ }
+
+ hsfreqrange_p = mipiphy_hsfreqrange;
+ for (i=0; i<(sizeof(mipiphy_hsfreqrange)/sizeof(struct mipiphy_hsfreqrange_s)); i++) {
+
+ if ((para->phy->bit_rate > hsfreqrange_p->range_l) && (para->phy->bit_rate <= hsfreqrange_p->range_h)) {
+ hsfreqrange = hsfreqrange_p->cfg_bit;
+ break;
+ }
+ hsfreqrange_p++;
+ }
+
+ if (hsfreqrange == 0xff) {
+ camsys_err("mipi phy config bitrate %d Mbps isn't supported!",para->phy->bit_rate);
+ hsfreqrange = 0x00;
+ }
+ /* hsfreqrange <<= 1; */
+
+ if (para->phy->phy_index == 0) {
+
+ /*isp select */
+ write_grf_reg(GRF_SOC_CON6_OFFSET, ISP_MIPI_CSI_HOST_SEL_OFFSET_MASK | (1<<ISP_MIPI_CSI_HOST_SEL_OFFSET_BIT));
+
+ /*phy start */
+ {
+ /*set clock lane */
+ /*write_csiphy_reg(0x34,0x00); */
+
+ write_csiphy_reg((MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x100),hsfreqrange|(read_csiphy_reg(MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x100)&(~0xf)));
+
+ if(para->phy->data_en_bit > 0x00){
+ write_csiphy_reg((MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x180),hsfreqrange|(read_csiphy_reg(MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x180)&(~0xf)));//lane0
+ }
+ if(para->phy->data_en_bit > 0x02){
+ write_csiphy_reg(MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x200,hsfreqrange|(read_csiphy_reg(MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x200)&(~0xf)));//lane1
+ }
+ if(para->phy->data_en_bit > 0x04){
+ write_csiphy_reg(MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x280,hsfreqrange|(read_csiphy_reg(MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x280)&(~0xf)));//lane2
+ write_csiphy_reg(MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x300,hsfreqrange|(read_csiphy_reg(MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x300)&(~0xf))); //lane3
+ }
+
+ /*set data lane num and enable clock lane */
+ write_csiphy_reg( 0x00, ((para->phy->data_en_bit << 2)|(0x1<<6)|0x1));
+ //base = (unsigned long)para->camsys_dev->devmems.registermem->vir_base;
+ //*((unsigned int*)(base + (MRV_MIPI_BASE+MRV_MIPI_CTRL))) =( 0x1|((/*para->phy->data_en_bit*/0x0)<<12)|0x1<<18);
+
+ }
+ camsys_trace(1,"vir_base=0x%lx",(unsigned long)para->camsys_dev->devmems.registermem->vir_base);
+
+ base = (unsigned long)para->camsys_dev->devmems.registermem->vir_base;
+ *((unsigned int*)(base + (MRV_MIPI_BASE+MRV_MIPI_CTRL))) &= ~(0x0f<<8);
+ camsys_trace(1,"val:0x%x",*((unsigned int*)(base + (MRV_MIPI_BASE+MRV_MIPI_CTRL))));
+ }
+#if 0
+ else if (para->phy->phy_index == 1){
+
+ //csihost select
+ write_grf_reg(GRF_SOC_CON6_OFFSET, ISP_MIPI_CSI_HOST_SEL_OFFSET_MASK | (0<<ISP_MIPI_CSI_HOST_SEL_OFFSET_BIT));
+
+ write_csihost_reg(CSIHOST_PHY_TEST_CTRL0,0x00000002); //TESTCLK=1
+ write_csihost_reg(CSIHOST_PHY_TEST_CTRL0,0x00000003); //TESTCLR=1 TESTCLK=1
+ udelay(100);
+ write_csihost_reg(CSIHOST_PHY_TEST_CTRL0,0x00000002); //TESTCLR=0 TESTCLK=1
+ udelay(100);
+
+ //set lane num, csi phy
+ camsys_rk3368_mipiphy_wr_reg(phy_virt, MIPI_CSI_DPHY_CTRL_LANE_ENABLE_OFFSET<<2, para->phy->data_en_bit << MIPI_CSI_DPHY_CTRL_LANE_ENABLE_OFFSET_BIT);
+
+ //set clock lane
+ camsys_rk3368_mipiphy_wr_reg(phy_virt, (MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x100)<<2,0x00);
+ //MSB enable
+ //camsys_rk3368_mipiphy_wr_reg(phy_virt, (MIPI_CSI_DPHY_LANEX_MSB_EN_OFFSET+0x100)<<2,0x40);
+ if(para->phy->data_en_bit > 0x00){
+ camsys_rk3368_mipiphy_wr_reg(phy_virt, (MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x180)<<2,hsfreqrange);//lane0
+ //MSB enable
+ //camsys_rk3368_mipiphy_wr_reg(phy_virt, (MIPI_CSI_DPHY_LANEX_MSB_EN_OFFSET+0x180)<<2,0x40);
+ }
+ if(para->phy->data_en_bit > 0x02){
+ camsys_rk3368_mipiphy_wr_reg(phy_virt, (MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x200)<<2,hsfreqrange);//lane1
+ //MSB enable
+ //camsys_rk3368_mipiphy_wr_reg(phy_virt, (MIPI_CSI_DPHY_LANEX_MSB_EN_OFFSET+0x200)<<2,0x40);
+ }
+ if(para->phy->data_en_bit > 0x04){
+ camsys_rk3368_mipiphy_wr_reg(phy_virt, (MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x280)<<2,hsfreqrange);//lane2
+ //MSB enable
+ //camsys_rk3368_mipiphy_wr_reg(phy_virt, (MIPI_CSI_DPHY_LANEX_MSB_EN_OFFSET+0x280)<<2,0x40);
+ camsys_rk3368_mipiphy_wr_reg(phy_virt, (MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET+0x300)<<2,hsfreqrange); //lane3
+ //MSB enable
+ //camsys_rk3368_mipiphy_wr_reg(phy_virt, (MIPI_CSI_DPHY_LANEX_MSB_EN_OFFSET+0x300)<<2,0x40);
+ }
+
+
+ //set active lane num, csi host
+ if(para->phy->data_en_bit > 0x00){
+ write_csihost_reg(CSIHOST_N_LANES_OFFSET, 0x00);//one lane active
+ }else if(para->phy->data_en_bit > 0x01){
+ write_csihost_reg(CSIHOST_N_LANES_OFFSET, 0x01);//two lane active
+ }else if(para->phy->data_en_bit > 0x04){
+ write_csihost_reg(CSIHOST_N_LANES_OFFSET, 0x02);// three lane active
+ }else if(para->phy->data_en_bit > 0x08){
+ write_csihost_reg(CSIHOST_N_LANES_OFFSET, 0x03);//foure lane active
+ }
+ camsys_rk3368_mipiphy_rd_reg(phy_virt,0x0);
+ write_csihost_reg(CSIHOST_PHY_TEST_CTRL0,0x00000002); //TESTCLK=1
+ write_csihost_reg(CSIHOST_PHY_TEST_CTRL1,0x00000000); //TESTCLR=0
+ write_csihost_reg(CSIHOST_PHY_SHUTDOWNZ,0x00000001); //SHUTDOWNZ=1
+ write_csihost_reg(CSIHOST_DPHY_RSTZ,0x00000001); //RSTZ=1
+ write_csihost_reg(CSIHOST_CSI2_RESETN,0x00000001); //RESETN=1
+ }
+#endif
+ else {
+ camsys_err("mipi phy index %d is invalidate!",para->phy->phy_index);
+ goto fail;
+ }
+
+ camsys_trace(1, "mipi phy(%d) turn on(lane: 0x%x bit_rate: %dMbps)",para->phy->phy_index,para->phy->data_en_bit, para->phy->bit_rate);
+
+ return 0;
+
+fail:
+ return -1;
+}
+
+#define MRV_AFM_BASE 0x0000
+#define VI_IRCL 0x0014
+int camsys_rk3368_cfg (camsys_soc_cfg_t cfg_cmd, void* cfg_para)
+{
+ unsigned int *para_int;
+
+ switch (cfg_cmd)
+ {
+ case Clk_DriverStrength_Cfg:
+ {
+ para_int = (unsigned int*)cfg_para;
+ __raw_writel((((*para_int)&0x03)<<3)|(0x03<<3), (void*)(rk_grf_base+0x204));
+ //__raw_writel(0xffffffff, rk_grf_base+0x204);
+ break;
+ }
+
+ case Cif_IoDomain_Cfg:
+ {
+ para_int = (unsigned int*)cfg_para;
+ if (*para_int < 28000000) {
+ __raw_writel(((1<<1)|(1<<(1+16))),(void*)(rk_grf_base+0x0900)); // 1.8v IO
+ } else {
+ __raw_writel(((0<<1)|(1<<(1+16))),(void*)(rk_grf_base+0x0900)); // 3.3v IO
+ }
+ break;
+ }
+
+ case Mipi_Phy_Cfg:
+ {
+ camsys_rk3368_mipihpy_cfg((camsys_mipiphy_soc_para_t*)cfg_para);
+ break;
+ }
+
+ case Isp_SoftRst: /* ddl@rock-chips.com: v0.d.0 */
+ {
+ unsigned int reset;
+ reset = (unsigned int)cfg_para;
+ #if 0
+ if (reset == 1)
+ write_cru_reg(0x318,0x40004000);
+ else
+ write_cru_reg(0x318,0x40000000);
+ camsys_trace(1, "Isp_SoftRst: %d",reset);
+ #endif
+ if (reset == 1)
+ __raw_writel(0x80,
+ (void*)(rk_isp_base + MRV_AFM_BASE +
+ VI_IRCL));
+ else
+ __raw_writel(0x00,
+ (void*)(rk_isp_base + MRV_AFM_BASE +
+ VI_IRCL));
+ camsys_trace(1, "Isp self soft rst: %d", reset);
+ break;
+ }
+
+ default:
+ {
+ camsys_warn("cfg_cmd: 0x%x isn't support",cfg_cmd);
+ break;
+ }
+
+ }
+
+ return 0;
+}
+
+
--- /dev/null
+#ifndef __RKCAMSYS_SOC_RK3368_H__
+#define __RKCAMSYS_SOC_RK3368_H__
+
+#include "camsys_internal.h"
+
+/*MARVIN REGISTER*/
+#define MRV_MIPI_BASE 0x1C00
+#define MRV_MIPI_CTRL 0x00
+
+/*
+#define CSIHOST_PHY_TEST_CTRL0_OFFSET 0x0030
+#define DPHY_TX1RX1_TESTCLR (1<<0)
+#define DPHY_TX1RX1_TESTCLK (1<<1)
+
+#define CSIHOST_PHY_TEST_CTRL1_OFFSET 0x0034
+#define DPHY_TX1RX1_TESTDIN_OFFSET_BITS (0)
+#define DPHY_TX1RX1_TESTDOUT_OFFSET_BITS (8)
+#define DPHY_TX1RX1_TESTEN (16)
+*/
+
+#define GRF_SOC_STATUS21 (0x2D4)
+
+#define CSIHOST_PHY_TEST_CTRL0 (0x30)
+#define CSIHOST_PHY_TEST_CTRL1 (0x34)
+#define CSIHOST_N_LANES (0x04)
+#define CSIHOST_PHY_SHUTDOWNZ (0x08)
+#define CSIHOST_CSI2_RESETN (0x10)
+#define CSIHOST_DPHY_RSTZ (0x0c)
+#define CSIHOST_PHY_STATE (0x14)
+#define CSIHOST_DATA_IDS1 (0x18)
+#define CSIHOST_DATA_IDS2 (0x1C)
+#define CSIHOST_ERR1 (0x20)
+#define CSIHOST_ERR2 (0x24)
+
+/*
+*GRF_SOC_CON6
+*dphy_rx_forcerxmode 11:8
+*isp_mipi_csi_host_sel:1
+*disable_isp:0
+*bit 0 grf_con_disable_isp
+*bit 1 isp_mipi_csi_host_sel 1'b0: mipi csi host
+*/
+#define GRF_SOC_CON6_OFFSET (0x0418)
+/*bit 0*/
+#define MIPI_PHY_DISABLE_ISP_MASK (0x1<<16)
+#define MIPI_PHY_DISABLE_ISP (0x0<<0)
+/*bit 1*/
+#define ISP_MIPI_CSI_HOST_SEL_OFFSET_MASK (0x1<<17)
+#define ISP_MIPI_CSI_HOST_SEL_OFFSET_BIT (0x1)
+/*bit 6*/
+#define DPHY_RX_CLK_INV_SEL_MASK (0x1<<22)
+#define DPHY_RX_CLK_INV_SEL (0x1<<6)
+/*bit 11:8*/
+#define DPHY_RX_FORCERXMODE_OFFSET_MASK (0xF<<24)
+#define DPHY_RX_FORCERXMODE_OFFSET_BITS (8)
+
+/*GRF_SOC_CON7*/
+/*dphy_tx0_forcerxmode*/
+#define GRF_SOC_CON7_OFFSET (0x041c)
+/*bit 10:7*/
+#define FORCETXSTOPMODE_OFFSET_BITS (7)
+#define FORCETXSTOPMODE_MASK (0xF<<23)
+
+#define DPHY_TX0_FORCERXMODE (6)
+#define DPHY_TX0_FORCERXMODE_MASK (0x01<<22)
+/*bit 5*/
+#define LANE0_TURNDISABLE_BITS (5)
+#define LANE0_TURNDISABLE_MASK (0x01<<21)
+
+#define GRF_SOC_STATUS13 (0x04b4)
+/*dphy_rx_rxclkactivehs*/
+/*dphy_rx_direction*/
+/*dphy_rx_ulpsactivenot_0...3*/
+
+/*LOW POWER MODE SET*/
+/*base*/
+#define MIPI_CSI_DPHY_CTRL_LANE_ENABLE_OFFSET (0x00)
+#define MIPI_CSI_DPHY_CTRL_LANE_ENABLE_OFFSET_BIT (2)
+
+#define MIPI_CSI_DPHY_CTRL_PWRCTL_OFFSET (0x04)
+#define MIPI_CSI_DPHY_CTRL_DIG_RST_OFFSET (0x80)
+#define MIPI_CSI_DPHY_CTRL_SIG_INV_OFFSET (0x84)
+
+/*Configure the count time of the THS-SETTLE by protocol.*/
+#define MIPI_CSI_DPHY_LANEX_THS_SETTLE_OFFSET (0x00)
+/*MSB enable for pin_rxdatahs_
+*1: enable
+*0: disable
+*/
+#define MIPI_CSI_DPHY_LANEX_MSB_EN_OFFSET (0x38)
+
+#define CSIHOST_N_LANES_OFFSET 0x04
+#define CSIHOST_N_LANES_OFFSET_BIT (0)
+
+#define write_grf_reg(addr, val) __raw_writel(val, (void*)(addr+rk_grf_base)) //__raw_writel(val, addr+RK_GRF_VIRT)
+#define read_grf_reg(addr) __raw_readl((void*)(addr+rk_grf_base)) //__raw_readl(addr+RK_GRF_VIRT)
+#define mask_grf_reg(addr, msk, val) write_grf_reg(addr,(val)|((~(msk))&read_grf_reg(addr)))
+
+#define write_cru_reg(addr, val) __raw_writel(val, (void*)(addr+rk_cru_base))
+
+/*#define cru_writel(v, o) do {writel(v, RK_CRU_VIRT + (o)); dsb();} \
+ while (0)
+*/
+
+#define write_csihost_reg(addr, val) __raw_writel(val, (void*)(addr+phy_virt))//__raw_writel(val, addr+IOMEM(phy_virt))
+#define read_csihost_reg(addr) __raw_readl((void*)(addr+phy_virt))//__raw_readl(addr+IOMEM(phy_virt))
+/*csi phy*/
+#define write_csiphy_reg(addr, val) __raw_writel(val, (void*)(addr+csiphy_virt))//__raw_writel(val, addr+IOMEM(csiphy_virt))
+#define read_csiphy_reg(addr) __raw_readl((void*)(addr+csiphy_virt))//__raw_readl(addr+IOMEM(csiphy_virt))
+
+#endif
mmc_send_if_cond(host, host->ocr_avail);
/* Order's important: probe SDIO, then SD, then MMC */
- if ((host->restrict_caps & RESTRICT_CARD_TYPE_SDIO) && !mmc_attach_sdio(host))
+ if ((host->restrict_caps & RESTRICT_CARD_TYPE_SDIO) &&
+ !mmc_attach_sdio(host))
return 0;
- if ((host->restrict_caps & (RESTRICT_CARD_TYPE_SD | RESTRICT_CARD_TYPE_TSD)) && !mmc_attach_sd(host))
+ if ((host->restrict_caps & RESTRICT_CARD_TYPE_SD) &&
+ !mmc_attach_sd(host))
+ return 0;
+ if ((host->restrict_caps & RESTRICT_CARD_TYPE_EMMC) &&
+ !mmc_attach_mmc(host))
return 0;
- if ((host->restrict_caps & RESTRICT_CARD_TYPE_EMMC) && !mmc_attach_mmc(host))
- return 0;
#endif
-
-
-
mmc_power_off(host);
return -EIO;
}
mmc->restrict_caps |= RESTRICT_CARD_TYPE_SDIO;
if (of_find_property(host->dev->of_node, "supports-emmc", NULL))
mmc->restrict_caps |= RESTRICT_CARD_TYPE_EMMC;
- /* Fixup for tSD */
- if (of_find_property(host->dev->of_node, "supports-tSD", NULL))
- mmc->restrict_caps |= RESTRICT_CARD_TYPE_TSD;
if (mmc->restrict_caps & RESTRICT_CARD_TYPE_SD) {
mmc->pm_notify.notifier_call = dw_mci_pm_notify;
CONFIG_PNO_SET_DEBUG = n
CONFIG_AP_WOWLAN = n
######### Notify SDIO Host Keep Power During Syspend ##########
-CONFIG_RTW_SDIO_PM_KEEP_POWER = n
+CONFIG_RTW_SDIO_PM_KEEP_POWER = y
###################### Platform Related #######################
CONFIG_PLATFORM_I386_PC = n
CONFIG_PLATFORM_ANDROID_X86 = n
CONFIG_PLATFORM_ARM_TCC8900 = n
CONFIG_PLATFORM_ARM_TCC8920 = n
CONFIG_PLATFORM_ARM_TCC8920_JB42 = n
-CONFIG_PLATFORM_ARM_RK2818 = y
+CONFIG_PLATFORM_ARM_RK2818 = n
CONFIG_PLATFORM_ARM_RK3066 = n
-CONFIG_PLATFORM_ARM_RK3188 = n
+CONFIG_PLATFORM_ARM_RK3188 = y
CONFIG_PLATFORM_ARM_URBETTER = n
CONFIG_PLATFORM_ARM_TI_PANDA = n
CONFIG_PLATFORM_MIPS_JZ4760 = n
CONFIG_PLATFORM_ARM_SUN7I = n
CONFIG_PLATFORM_ARM_SUN8I = n
CONFIG_PLATFORM_ACTIONS_ATM702X = n
+CONFIG_PLATFORM_ACTIONS_ATM705X = n
CONFIG_PLATFORM_ACTIONS_ATV5201 = n
CONFIG_PLATFORM_ARM_RTD299X = n
CONFIG_PLATFORM_ARM_SPREADTRUM_6820 = n
CONFIG_PLATFORM_ARM_SPREADTRUM_8810 = n
CONFIG_PLATFORM_ARM_WMT = n
CONFIG_PLATFORM_TI_DM365 = n
+CONFIG_PLATFORM_AML = n
CONFIG_PLATFORM_MOZART = n
CONFIG_PLATFORM_RTK119X = n
###############################################################
MODULE_NAME :=wlan
endif
+ifeq ($(CONFIG_PLATFORM_ACTIONS_ATM705X), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+# default setting for Android 4.1, 4.2, 4.3, 4.4
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ACTIONS_ATM705X
+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
+EXTRA_CFLAGS += -DCONFIG_P2P_IPS
+
+# Enable this for Android 5.0
+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
+
+ifeq ($(CONFIG_SDIO_HCI), y)
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
+_PLATFORM_FILES += platform/platform_arm_act_sdio.o
+endif
+
+ARCH := arm
+CROSS_COMPILE := /opt/arm-2011.09/bin/arm-none-linux-gnueabi-
+KSRC := /home/android_sdk/Action-semi/705a_android_L/android/kernel
+endif
+
ifeq ($(CONFIG_PLATFORM_TI_AM3517), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_SHUTTLE
CROSS_COMPILE := arm-eabi-
KVER := 2.6.18
endif
+ifeq ($(CONFIG_PLATFORM_AML), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -fno-pic
+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DCONFIG_CONCURRENT_MODE
+EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DRTW_USE_CFG80211_STA_EVENT
+EXTRA_CFLAGS += -DCONFIG_LPS_SLOW_TRANSITION
+ARCH := arm
+KVER :=
+CROSS_COMPILE := arm-none-linux-gnueabi-
+KSRC := ../../../../
+endif
+
ifeq ($(CONFIG_PLATFORM_MOZART), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MOZART
ARCH := arm
EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN
# default setting for Special function
EXTRA_CFLAGS += -DCONFIG_P2P_IPS
+ifeq ($(CONFIG_SDIO_HCI), y)
+EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE
+endif
ARCH := arm
CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3188/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
KSRC := /home/android_sdk/Rockchip/Rk3188/kernel
--- /dev/null
+#!/bin/bash
+rmmod 8192cu
+rmmod 8192ce
+rmmod 8192du
+rmmod 8192de
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);\r
struct sta_priv *pstapriv = &padapter->stapriv;\r
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;\r
+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);\r
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;\r
\r
pmlmepriv->update_bcn = _FALSE;\r
#ifdef CONFIG_80211N_HT\r
pmlmepriv->num_sta_no_ht = 0;\r
#endif //CONFIG_80211N_HT\r
+\r
+ pmlmeinfo->HT_info_enable =0;\r
+ pmlmeinfo->HT_caps_enable=0;\r
+ pmlmeinfo->HT_enable=0;\r
+\r
pmlmepriv->num_sta_ht_20mhz = 0;\r
\r
pmlmepriv->olbc = _FALSE;\r
struct rtw_ieee80211_channel *ch, int ch_num)
{
u8 res = _FAIL;
+#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE
+ u8 wireless_mode = 0;
+ u32 mlmext_info_state = 0;
+#endif
struct cmd_obj *ph2c;
struct sitesurvey_parm *psurveyPara;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
if(res == _SUCCESS) {
pmlmepriv->scan_start_time = rtw_get_current_time();
-
#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE
- if((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE)
- _set_timer(&pmlmepriv->scan_to_timer, SURVEY_TO *
- ( padapter->mlmeextpriv.max_chan_nums + ( padapter->mlmeextpriv.max_chan_nums / RTW_SCAN_NUM_OF_CH ) * RTW_STAY_AP_CH_MILLISECOND ) + 1000 );
- else
+ mlmext_info_state =
+ padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state;
+ wireless_mode = padapter->registrypriv.wireless_mode;
+
+ if((mlmext_info_state & 0x03) == WIFI_FW_AP_STATE) {
+ if(IsSupported5G(wireless_mode) && IsSupported24G(wireless_mode))
+ _set_timer(&pmlmepriv->scan_to_timer,
+ CONC_SCANNING_TIMEOUT_DUAL_BAND);
+ else
+ _set_timer(&pmlmepriv->scan_to_timer,
+ CONC_SCANNING_TIMEOUT_SINGLE_BAND);
+ } else
#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE
_set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT);
u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen)
{
uint cnt;
- u8 *wpsie_ptr=NULL;
- u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04};
+ u8 *wpsie_ptr = NULL;
+ u8 eid, wps_oui[4] = {0x00, 0x50, 0xf2, 0x04};
- if(wps_ielen)
+ if (wps_ielen)
*wps_ielen = 0;
- if(!in_ie || in_len<=0)
+ if (!in_ie) {
+ rtw_warn_on(1);
+ return wpsie_ptr;
+ }
+
+ if (in_len <= 0)
return wpsie_ptr;
cnt = 0;
- while(cnt<in_len)
- {
+ while (cnt + 1 + 4 < in_len) {
eid = in_ie[cnt];
- if((eid==_WPA_IE_ID_)&&(_rtw_memcmp(&in_ie[cnt+2], wps_oui, 4)==_TRUE))
- {
- wpsie_ptr = &in_ie[cnt];
+ if (cnt + 1 + 4 >= MAX_IE_SZ) {
+ rtw_warn_on(1);
+ return NULL;
+ }
- if(wps_ie)
- _rtw_memcpy(wps_ie, &in_ie[cnt], in_ie[cnt+1]+2);
-
- if(wps_ielen)
- *wps_ielen = in_ie[cnt+1]+2;
-
- cnt+=in_ie[cnt+1]+2;
+ if (eid == WLAN_EID_VENDOR_SPECIFIC && _rtw_memcmp(&in_ie[cnt + 2], wps_oui, 4) == _TRUE) {
+ wpsie_ptr = in_ie + cnt;
+
+ if (wps_ie)
+ _rtw_memcpy(wps_ie, &in_ie[cnt], in_ie[cnt + 1] + 2);
+
+ if (wps_ielen)
+ *wps_ielen = in_ie[cnt + 1] + 2;
break;
+ } else {
+ cnt += in_ie[cnt + 1] + 2;
}
- else
- {
- cnt+=in_ie[cnt+1]+2; //goto next
- }
- }
+ }
return wpsie_ptr;
}
static int __init rtw_mem_init(void)\r
{\r
int i;\r
+ u32 max_recvbuf_sz = 0;\r
SIZE_PTR tmpaddr=0;\r
SIZE_PTR alignment=0;\r
struct sk_buff *pskb=NULL;\r
\r
skb_queue_head_init(&rtk_skb_mem_q);\r
\r
+ if (max_recvbuf_sz == 0)\r
+ max_recvbuf_sz = MAX_RECVBUF_SZ;\r
+\r
+ DBG_871X("%s: max_recvbuf_sz: %d\n", __func__, max_recvbuf_sz);\r
+\r
for(i=0; i<NR_PREALLOC_RECV_SKB; i++)\r
{\r
- pskb = __dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);\r
+ pskb = __dev_alloc_skb(max_recvbuf_sz + RECVBUFF_ALIGN_SZ, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);\r
if(pskb)\r
{ \r
tmpaddr = (SIZE_PTR)pskb->data;\r
void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf)
{
_irqL irqL;
- u8 timer_cancelled = _FALSE;
+ u8 timer_cancelled;
struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
#ifdef CONFIG_MLME_EXT
-
mlmeext_surveydone_event_callback(adapter);
-
#endif
-_func_enter_;
+_func_enter_;
_enter_critical_bh(&pmlmepriv->lock, &irqL);
- if(pmlmepriv->wps_probe_req_ie)
- {
+ if(pmlmepriv->wps_probe_req_ie) {
u32 free_len = pmlmepriv->wps_probe_req_ie_len;
pmlmepriv->wps_probe_req_ie_len = 0;
rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len);
- pmlmepriv->wps_probe_req_ie = NULL;
+ pmlmepriv->wps_probe_req_ie = NULL;
}
-
+
RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_surveydone_event_callback: fw_state:%x\n\n", get_fwstate(pmlmepriv)));
-
- if (check_fwstate(pmlmepriv,_FW_UNDER_SURVEY))
- {
- //u8 timer_cancelled;
- timer_cancelled = _TRUE;
- //_cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled);
-
- _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
+ if (check_fwstate(pmlmepriv,_FW_UNDER_SURVEY) == _FALSE) {
+ DBG_871X(FUNC_ADPT_FMT" fw_state:0x%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv));
+ //rtw_warn_on(1);
}
- else {
-
- RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("nic status =%x, survey done event comes too late!\n", get_fwstate(pmlmepriv)));
- }
- _exit_critical_bh(&pmlmepriv->lock, &irqL);
- if(timer_cancelled)
- _cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled);
+ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
+
+ _exit_critical_bh(&pmlmepriv->lock, &irqL);
+ _cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled);
_enter_critical_bh(&pmlmepriv->lock, &irqL);
if(rtw_select_and_join_from_scanned_queue(pmlmepriv)==_SUCCESS)
{
- _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT );
+ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT );
}
else
{
#endif //CONFIG_80211AC_VHT
u8 cap_content[8] = {0};
u8 *pframe;
+ u8 null_content[8] = {0};
if (phtpriv->bss_coexist) {
}
#endif //CONFIG_80211AC_VHT
- pframe = rtw_set_ie(out_ie+*pout_len, EID_EXTCapability, 8, cap_content , pout_len);
+ /*
+ * From 802.11 specification,if a STA does not support any of
+ * capabilities defined in the Extended Capabilities element,
+ * then the STA is not required to transmit the
+ * Extended Capabilities element.
+ */
+ if (_FALSE == _rtw_memcmp(cap_content, null_content, 8)) {
+ pframe = rtw_set_ie(out_ie + *pout_len,
+ EID_EXTCapability, 8, cap_content , pout_len);
+ }
}
#endif
}
#endif //CONFIG_CONCURRENT_MODE
+
+static const char *miracast_mode_str[] = {
+ "DISABLED",
+ "SOURCE",
+ "SINK",
+ "INVALID",
+};
+
+const char *get_miracast_mode_str(int mode)
+{
+ if (mode < MIRACAST_DISABLED || mode >= MIRACAST_INVALID)
+ mode = MIRACAST_INVALID;
+
+ return miracast_mode_str[mode];
+}
reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN));
- DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason);
-
rtw_lock_rx_suspend_timeout(8000);
#ifdef CONFIG_AP_MODE
//rtw_free_stainfo(padapter, psta);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
- DBG_871X_LEVEL(_drv_always_, "ap recv deauth reason code(%d) sta:%pM\n",
- reason, GetAddr2Ptr(pframe));
+ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" reason=%u, ta=%pM\n"
+ , FUNC_ADPT_ARG(padapter), reason, GetAddr2Ptr(pframe));
psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe));
if(psta)
}
}
- DBG_871X_LEVEL(_drv_always_, "sta recv deauth reason code(%d) sta:%pM, ignore = %d\n",
- reason, GetAddr3Ptr(pframe), ignore_received_deauth);
-
+ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" reason=%u, ta=%pM, ignore=%d\n"
+ , FUNC_ADPT_ARG(padapter), reason, GetAddr2Ptr(pframe), ignore_received_deauth);
+
if ( 0 == ignore_received_deauth )
{
- receive_disconnect(padapter, GetAddr3Ptr(pframe) ,reason);
+ receive_disconnect(padapter, GetAddr2Ptr(pframe), reason);
}
}
pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE;
reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN));
- DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason);
-
rtw_lock_rx_suspend_timeout(8000);
#ifdef CONFIG_AP_MODE
//rtw_free_stainfo(padapter, psta);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
- DBG_871X_LEVEL(_drv_always_, "ap recv disassoc reason code(%d) sta:%pM\n",
- reason, GetAddr2Ptr(pframe));
+ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" reason=%u, ta=%pM\n"
+ , FUNC_ADPT_ARG(padapter), reason, GetAddr2Ptr(pframe));
psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe));
if(psta)
else
#endif
{
- DBG_871X_LEVEL(_drv_always_, "sta recv disassoc reason code(%d) sta:%pM\n",
- reason, GetAddr3Ptr(pframe));
-
- receive_disconnect(padapter, GetAddr3Ptr(pframe), reason);
+ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" reason=%u, ta=%pM\n"
+ , FUNC_ADPT_ARG(padapter), reason, GetAddr2Ptr(pframe));
+
+ receive_disconnect(padapter, GetAddr2Ptr(pframe), reason);
}
pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE;
return _SUCCESS;
//val8 |= 0x0f;
//rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8));
#if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH)
- if((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE)
- {
- if( pmlmeinfo->scan_cnt == RTW_SCAN_NUM_OF_CH )
- {
- pmlmeinfo->scan_cnt = 0;
- survey_channel = pbuddy_mlmeext->cur_channel;
- stay_buddy_ch = 1;
- }
- else
- {
- if( pmlmeinfo->scan_cnt == 0 )
+ if ((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE) {
+ if (pmlmeinfo->scan_cnt == RTW_SCAN_NUM_OF_CH) {
+ if (pmlmeinfo->backop_cnt == 0)
+ stay_buddy_ch = 1;
+ else if (pmlmeinfo->backop_cnt == RTW_STAY_AP_CH_MILLISECOND)
stay_buddy_ch = 2;
+
+ if (stay_buddy_ch == 2) {
+ pmlmeinfo->scan_cnt = 1;
+ pmlmeinfo->backop_cnt = 0;
+ } else if (stay_buddy_ch == 1) {
+ pmlmeinfo->backop_cnt++;
+ survey_channel = pbuddy_mlmeext->cur_channel;
+ } else {
+ pmlmeinfo->backop_cnt++;
+ set_survey_timer(pmlmeext, pmlmeext->chan_scan_time);
+ return;
+ }
+ } else {
pmlmeinfo->scan_cnt++;
}
}
// assume home channel is 6, channel switch sequence will be
// 1,2-6-3,4-6-5,6-6-7,8-6-9,10-6-11,12-6-13,14
//if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)==_TRUE)
-
- if( stay_buddy_ch == 1 ){
- channel_scan_time_ms = pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND;
- }
- else {
- if( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
- channel_scan_time_ms = 20;
- else
- channel_scan_time_ms = 40
- }
-#elif defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE)
- if( stay_buddy_ch == 1 )
- channel_scan_time_ms = pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND ;
- else
- channel_scan_time_ms = pmlmeext->chan_scan_time;
+ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+ set_survey_timer(pmlmeext, 20);
+ else
+ set_survey_timer(pmlmeext, 40);
#else
- channel_scan_time_ms = pmlmeext->chan_scan_time;
+ set_survey_timer(pmlmeext, pmlmeext->chan_scan_time);
#endif
- set_survey_timer(pmlmeext, channel_scan_time_ms);
#if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR)
{
struct noise_info info;
#if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH)
pmlmeinfo->scan_cnt = 0;
+ pmlmeinfo->backop_cnt = 0;
#endif
#ifdef CONFIG_ANTENNA_DIVERSITY
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
- //check A3
if (!(_rtw_memcmp(MacAddr, get_my_bssid(&pmlmeinfo->network), ETH_ALEN)))
return _SUCCESS;
if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
{
#if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH)
- if( padapter->mlmeextpriv.mlmext_info.scan_cnt != RTW_SCAN_NUM_OF_CH )
+ if (padapter->mlmeextpriv.mlmext_info.scan_cnt != RTW_SCAN_NUM_OF_CH
+ || padapter->mlmeextpriv.mlmext_info.backop_cnt == RTW_STAY_AP_CH_MILLISECOND)
#endif
pmlmeext->sitesurvey_res.channel_idx++;
}
return H2C_SUCCESS;
}
+u8 rtw_scan_sparse(_adapter *adapter, struct rtw_ieee80211_channel *ch, u8 ch_num)
+{
+/* interval larger than this is treated as backgroud scan */
+#ifndef RTW_SCAN_SPARSE_BG_INTERVAL_MS
+#define RTW_SCAN_SPARSE_BG_INTERVAL_MS 12000
+#endif
+
+#ifndef RTW_SCAN_SPARSE_CH_NUM_MIRACAST
+#define RTW_SCAN_SPARSE_CH_NUM_MIRACAST 1
+#endif
+#ifndef RTW_SCAN_SPARSE_CH_NUM_BG
+#define RTW_SCAN_SPARSE_CH_NUM_BG 4
+#endif
+
+#define SCAN_SPARSE_CH_NUM_INVALID 255
+
+ static u8 token = 255;
+ u32 interval;
+ bool busy_traffic = _FALSE;
+ bool miracast_enabled = _FALSE;
+ bool bg_scan = _FALSE;
+ u8 max_allow_ch = SCAN_SPARSE_CH_NUM_INVALID;
+ u8 scan_division_num;
+ u8 ret_num = ch_num;
+ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter));
+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+
+ if (regsty->wifi_spec)
+ goto exit;
+
+ /* assume ch_num > 6 is normal scan */
+ if (ch_num <= 6)
+ goto exit;
+
+ if (mlmeext->last_scan_time == 0)
+ mlmeext->last_scan_time = rtw_get_current_time();
+
+ interval = rtw_get_passing_time_ms(mlmeext->last_scan_time);
+
+ if (adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE
+ #ifdef CONFIG_CONCURRENT_MODE
+ || (adapter->pbuddy_adapter && adapter->pbuddy_adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE)
+ #endif
+ )
+ busy_traffic = _TRUE;
+
+ #ifdef CONFIG_WFD
+ if (is_miracast_enabled(adapter->wfd_info.stack_wfd_mode)
+ #ifdef CONFIG_CONCURRENT_MODE
+ || (adapter->pbuddy_adapter && is_miracast_enabled(adapter->pbuddy_adapter->wfd_info.stack_wfd_mode))
+ #endif
+ )
+ miracast_enabled = _TRUE;
+ #endif
+
+ if (interval > RTW_SCAN_SPARSE_BG_INTERVAL_MS)
+ bg_scan = _TRUE;
+
+ /* max_allow_ch by conditions*/
+
+ #if RTW_SCAN_SPARSE_MIRACAST
+ if (miracast_enabled == _TRUE && busy_traffic == _TRUE)
+ max_allow_ch = rtw_min(max_allow_ch, RTW_SCAN_SPARSE_CH_NUM_MIRACAST);
+ #endif
+
+ #if RTW_SCAN_SPARSE_BG
+ if (bg_scan == _TRUE)
+ max_allow_ch = rtw_min(max_allow_ch, RTW_SCAN_SPARSE_CH_NUM_BG);
+ #endif
+
+
+ if (max_allow_ch != SCAN_SPARSE_CH_NUM_INVALID) {
+ int i;
+ int k = 0;
+
+ scan_division_num = (ch_num / max_allow_ch) + ((ch_num % max_allow_ch)?1:0);
+ token = (token + 1) % scan_division_num;
+
+ if (0)
+ DBG_871X("scan_division_num:%u, token:%u\n", scan_division_num, token);
+
+ for (i = 0; i < ch_num; i++) {
+ if (ch[i].hw_value && (i % scan_division_num) == token
+ ) {
+ if (i != k)
+ _rtw_memcpy(&ch[k], &ch[i], sizeof(struct rtw_ieee80211_channel));
+ k++;
+ }
+ }
+
+ _rtw_memset(&ch[k], 0, sizeof(struct rtw_ieee80211_channel));
+
+ ret_num = k;
+ mlmeext->last_scan_time = rtw_get_current_time();
+ }
+
+exit:
+ return ret_num;
+}
+
int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel *out,
u32 out_num, struct rtw_ieee80211_channel *in, u32 in_num)
{
}
}
-#ifdef CONFIG_SCAN_SPARSE //partial scan, ASUS RK3188 use the feature
- /* assume j>6 is normal scan */
- if ((j > 6) && (padapter->registrypriv.wifi_spec != 1))
- {
- static u8 token = 0;
- u32 interval;
-
- if (pmlmeext->last_scan_time == 0)
- pmlmeext->last_scan_time = rtw_get_current_time();
-
- interval = rtw_get_passing_time_ms(pmlmeext->last_scan_time);
- if ((interval > ALLOW_SCAN_INTERVAL)
-#if 0 // Miracast can't do AP scan
- || (padapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE)
-#ifdef CONFIG_CONCURRENT_MODE
- || (padapter->pbuddy_adapter
- && (padapter->pbuddy_adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE))
-#endif // CONFIG_CONCURRENT_MODE
-#endif
- )
- {
- // modify scan plan
- int k = 0;
- _rtw_memset(in, 0, sizeof(struct rtw_ieee80211_channel)*in_num);
- _rtw_memcpy(in, out, sizeof(struct rtw_ieee80211_channel)*j);
- _rtw_memset(out, 0, sizeof(struct rtw_ieee80211_channel)*j);
-
- for (i=0;i<j;i++) {
- if (in[i].hw_value && (i%SCAN_DIVISION_NUM) == token) {
- _rtw_memcpy(&out[k], &in[i], sizeof(struct rtw_ieee80211_channel));
- k++;
- }
- if(k>=out_num)
- break;
- }
-
- j = k;
- token = (token+1)%SCAN_DIVISION_NUM;
- }
-
- pmlmeext->last_scan_time = rtw_get_current_time();
- }
-#endif //CONFIG_SCAN_SPARSE
+ /* scan_sparse */
+ j = rtw_scan_sparse(padapter, out, j);
return j;
}
struct mlme_ext_priv *pbuddy_mlmeext;
struct mlme_ext_info *pbuddy_pmlmeinfo;
struct mlme_priv *pbuddy_mlmepriv;
+#endif
+
+ if (!ch || !bw || !offset) {
+ connect_allow = _FALSE;
+ rtw_warn_on(1);
+ goto exit;
+ }
+
+ if (cur_ch == 0) {
+ connect_allow = _FALSE;
+ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" cur_ch:%u\n"
+ , FUNC_ADPT_ARG(padapter), cur_ch);
+ rtw_warn_on(1);
+ goto exit;
+ }
+#ifdef CONFIG_CONCURRENT_MODE
if (!rtw_buddy_adapter_up(padapter)) {
goto exit;
}
rtw_free_assoc_resources(pbuddy_adapter, 1);
}
}
-
-exit:
#endif /* CONFIG_CONCURRENT_MODE */
-
- if (!ch || !bw || !offset) {
- rtw_warn_on(1);
- connect_allow = _FALSE;
- }
-
+exit:
if (connect_allow == _TRUE) {
DBG_871X("start_join_set_ch_bw: ch=%d, bwmode=%d, ch_offset=%d\n", cur_ch, cur_bw, cur_ch_offset);
*ch = cur_ch;
set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode);
- issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500);
+ if (check_buddy_fwstate(padapter, WIFI_FW_STATION_STATE))
+ issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500);
}
else if( pwdinfo->driver_interface == DRIVER_WEXT )
{
pcfg80211_wdinfo->is_ro_ch = _FALSE;
pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time();
- if (pcfg80211_wdinfo->not_indic_ro_ch_exp == _TRUE)
- return;
-
- DBG_871X("cfg80211_remain_on_channel_expired, ch=%d, bw=%d, offset=%d\n",
- rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter));
+ DBG_871X("cfg80211_remain_on_channel_expired cookie:0x%llx, ch=%d, bw=%d, offset=%d\n"
+ , pcfg80211_wdinfo->remain_on_ch_cookie
+ , rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter));
rtw_cfg80211_remain_on_channel_expired(padapter,
pcfg80211_wdinfo->remain_on_ch_cookie,
u4Byte Weighting=0;\r
PSTA_INFO_T pEntry;\r
\r
- if(pPktinfo->StationID == 0xFF)\r
+ if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM)\r
return;\r
\r
#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1)\r
tx_index_offset = 0x0010;
break;
}
- for (index = 0 ; index < 12 ; index++) {
+ for (index = 0 ; index < 11 ; index++) {
if (pContent[tx_index_offset + index] == 0xFF) {
return _FALSE;
} else {
do{
valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num);
- if(0 == valid ){
+ if (0 == valid)
read_down = _TRUE;
- }
-#ifdef CONFIG_WOWLAN
else
rtw_msleep_os(1);
-#endif
}while( (!read_down) && (retry_cnts--));
return read_down;
#endif /* CONFIG_FIND_BEST_CHANNEL */
+ if( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+#ifdef CONFIG_CONCURRENT_MODE
+ || (check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE)
+#endif
+ ) {
+ rcr_clear_bit = RCR_CBSSID_BCN;
+ }
+#ifdef CONFIG_TDLS
+ // TDLS will clear RCR_CBSSID_DATA bit for connection.
+ else if (Adapter->tdlsinfo.link_established == _TRUE) {
+ rcr_clear_bit = RCR_CBSSID_BCN;
+ }
+#endif // CONFIG_TDLS
+
value_rcr = rtw_read32(Adapter, REG_RCR);
if(*((u8 *)val))//under sitesurvey
{
value_rxfltmap2 = 0;
#endif /* CONFIG_FIND_BEST_CHANNEL */
-
+ if (check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _TRUE) {
+ rcr_clear_bit = RCR_CBSSID_BCN;
+ }
+ #ifdef CONFIG_TDLS
+ // TDLS will clear RCR_CBSSID_DATA bit for connection.
+ else if (adapter->tdlsinfo.link_established == _TRUE) {
+ rcr_clear_bit = RCR_CBSSID_BCN;
+ }
+ #endif // CONFIG_TDLS
value_rcr = rtw_read32(adapter, REG_RCR);
if(*((u8 *)val))//under sitesurvey
{
*(( u32*)pValue) = DRVINFO_SZ;
break;
case HAL_DEF_MAX_RECVBUF_SZ:
- *(( u32*)pValue) = MAX_RECVBUF_SZ;
+ *(( u32*)pValue) = MAX_RX_DMA_BUFFER_SIZE_88E(Adapter);
break;
case HAL_DEF_RX_PACKET_OFFSET:
*(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ;
}\r
\r
// 2010.07.13 AMPDU aggregation number B\r
+#ifdef CONFIG_MINIMAL_MEMORY_USAGE\r
+ val |= 1;\r
+ val = val << 8;\r
+ val |= 1;\r
+#else\r
val |= MAX_AGGR_NUM;\r
val = val << 8;\r
val |= MAX_AGGR_NUM;\r
+#endif\r
rtw_write16(Adapter, REG_MAX_AGGR_NUM, val);\r
//rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0B); \r
\r
ODM_PACKET_INFO_T pkt_info;
u8 *sa = NULL;
struct sta_priv *pstapriv;
- struct sta_info *psta;
+ struct sta_info *psta = NULL;
//_irqL irqL;
pkt_info.bPacketMatchBSSID =_FALSE;
}
*/
sa = get_ta(wlanhdr);
-
- pstapriv = &padapter->stapriv;
pkt_info.StationID = 0xFF;
- psta = rtw_get_stainfo(pstapriv, sa);
- if (psta)
- {
- pkt_info.StationID = psta->mac_id;
- //DBG_8192C("%s ==> StationID(%d)\n",__FUNCTION__,pkt_info.StationID);
- }
+
+ if (_rtw_memcmp(myid(&padapter->eeprompriv), sa, ETH_ALEN) == _TRUE) {
+ static u32 start_time = 0;
+
+ if ((start_time == 0) || (rtw_get_passing_time_ms(start_time) > 5000)) {
+ DBG_871X_LEVEL(_drv_always_, "Warning!!! %s: Confilc mac addr!!\n", __func__);
+ start_time = rtw_get_current_time();
+ }
+ } else {
+ pstapriv = &padapter->stapriv;
+ psta = rtw_get_stainfo(pstapriv, sa);
+ if (psta)
+ pkt_info.StationID = psta->mac_id;
+ }
+
pkt_info.DataRate = pattrib->data_rate;
//rtl8188e_query_rx_phy_status(precvframe, pphy_status);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;\r
unsigned int diff_time;\r
u32 txdma_status;\r
+ u16 timeout = 0;\r
\r
if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){\r
DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); \r
rtw_hal_sreset_reset(padapter);\r
}\r
-#ifdef CONFIG_USB_HCI\r
+\r
//total xmit irp = 4\r
- //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);\r
+ //DBG_8192C("==>%s free_xmitbuf_cnt(%d), free_xmit_extbuf_cnt(%d)\n",\r
+ // __func__, pxmitpriv->free_xmitbuf_cnt,\r
+ // pxmitpriv->free_xmit_extbuf_cnt);\r
//if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1)\r
current_time = rtw_get_current_time();\r
\r
if(0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {\r
\r
+ if (padapter->interface_type == RTW_SDIO &&\r
+ pxmitpriv->free_xmitbuf_cnt == 0)\r
+ return;\r
+\r
diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);\r
\r
if (diff_time > 2000) {\r
}\r
}\r
}\r
-#endif //CONFIG_USB_HCI\r
\r
if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {\r
psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;\r
{
s32 res;
u32 i, n;
+ u32 max_recvbuf_sz = 0;
struct recv_priv *precvpriv;
struct recv_buf *precvbuf;
SIZE_PTR tmpaddr=0;
SIZE_PTR alignment=0;
- precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+ rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
+ if (max_recvbuf_sz == 0)
+ max_recvbuf_sz = MAX_RECVBUF_SZ;
+
+ precvbuf->pskb = rtw_skb_alloc(max_recvbuf_sz + RECVBUFF_ALIGN_SZ);
if(precvbuf->pskb)
{
_rtw_up_sema(&pxmitpriv->SdioXmitTerminateSema);
RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("-%s\n", __FUNCTION__));
- DBG_871X("exit %s\n", __FUNCTION__);
thread_exit();
}
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct registry_priv *pregistrypriv = &padapter->registrypriv;
u32 outEPNum = (u32)pHalData->OutEpNumber;
- u32 numHQ = NORMAL_PAGE_NUM_HPQ_88E;
- u32 numLQ = NORMAL_PAGE_NUM_LPQ_88E;
- u32 numNQ = NORMAL_PAGE_NUM_NPQ_88E;
+ u32 numHQ = 0;
+ u32 numLQ = 0;
+ u32 numNQ = 0;
u32 numPubQ = 0x00;
u32 value32;
u8 value8;
BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec;
- if(bWiFiConfig)
- {
+ if(bWiFiConfig){
if (pHalData->OutEpQueueSel & TX_SELE_HQ)
- {
numHQ = WMM_NORMAL_PAGE_NUM_HPQ_88E;
- }
if (pHalData->OutEpQueueSel & TX_SELE_LQ)
- {
numLQ = WMM_NORMAL_PAGE_NUM_LPQ_88E;
- }
// NOTE: This step shall be proceed before writting REG_RQPN.
- if (pHalData->OutEpQueueSel & TX_SELE_NQ) {
+ if (pHalData->OutEpQueueSel & TX_SELE_NQ)
numNQ = WMM_NORMAL_PAGE_NUM_NPQ_88E;
- }
+ } else {
+ if(pHalData->OutEpQueueSel & TX_SELE_HQ)
+ numHQ = NORMAL_PAGE_NUM_HPQ_88E;
+
+ if(pHalData->OutEpQueueSel & TX_SELE_LQ)
+ numLQ = NORMAL_PAGE_NUM_LPQ_88E;
+
+ // NOTE: This step shall be proceed before writting REG_RQPN.
+ if(pHalData->OutEpQueueSel & TX_SELE_NQ)
+ numNQ = NORMAL_PAGE_NUM_NPQ_88E;
}
value8 = (u8)_NPQ(numNQ);
struct registry_priv *pregistrypriv;
u8 valueDMATimeout;
u8 valueDMAPageCount;
+ u32 pagesize = 0;
pregistrypriv = &padapter->registrypriv;
}
else
{
+#ifdef CONFIG_MINIMAL_MEMORY_USAGE
+ valueDMATimeout = 0x06;
+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&pagesize);
+ if (pagesize != 0 && MAX_RECVBUF_SZ < 8192)
+ valueDMAPageCount = (MAX_RECVBUF_SZ / pagesize) + 1;
+ else
+ valueDMAPageCount = 0x24;
+ DBG_871X("%s DMAPageCount: 0x%02x\n", __func__, valueDMAPageCount);
+#else
valueDMATimeout = 0x06;
valueDMAPageCount = 0x24;
+#endif
}
rtw_write8(padapter, REG_RXDMA_AGG_PG_TH+1, valueDMATimeout);
s32 ret;
u8 txpktbuf_bndy;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+ PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
struct registry_priv *pregistrypriv = &padapter->registrypriv;
u8 is92C = IS_92C_SERIAL(pHalData->VersionID);
rtw_write32(padapter, REG_FWHW_TXQ_CTRL, rtw_read32(padapter, REG_FWHW_TXQ_CTRL)|BIT(12));
#endif //CONFIG_XMIT_ACK
+ if (padapter->registrypriv.wifi_spec==1) {
+ ODM_SetBBReg(pDM_Odm,
+ rOFDM0_ECCAThreshold, bMaskDWord, 0x00fe0301);
+ }
+
//RT_TRACE(COMP_INIT, DBG_LOUD, ("<---Initializepadapter8192CSdio()\n"));
DBG_8192C("-rtl8188es_hal_init\n");
SDIO_HIMR_BCNERLY_INT_MSK |
#endif //CONFIG_EXT_CLK
// SDIO_HIMR_C2HCMD_MSK |
-#ifdef CONFIG_LPS_LCLK
+#if defined(CONFIG_LPS_LCLK) && !defined(CONFIG_DETECT_CPWM_BY_POLLING)
SDIO_HIMR_CPWM1_MSK |
SDIO_HIMR_CPWM2_MSK |
#endif
static struct recv_buf* sd_recv_rxfifo(PADAPTER padapter, u32 size)
{
u32 readsize, ret;
+ u32 max_recvbuf_sz = 0;
u8 *preadbuf;
struct recv_priv *precvpriv;
struct recv_buf *precvbuf;
DBG_871X("%s: alloc_skb for rx buffer\n", __FUNCTION__);
- precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+ rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
+ if (max_recvbuf_sz == 0)
+ max_recvbuf_sz = MAX_RECVBUF_SZ;
+
+ precvbuf->pskb = rtw_skb_alloc(max_recvbuf_sz + RECVBUFF_ALIGN_SZ);
if(precvbuf->pskb)
{
--- /dev/null
+#DHCP client\r
+DEVICE=wlan0\r
+BOOTPROTO=dhcp\r
+ONBOOT=yes
\ No newline at end of file
#ifdef CONFIG_EFUSE_CONFIG_FILE
#ifndef EFUSE_MAP_PATH
-#define EFUSE_MAP_PATH "/system/etc/firmware/wifi_efuse_8189e.map"
+#define EFUSE_MAP_PATH "/system/etc/wifi/wifi_efuse_8189e.map"
#endif //EFUSE_MAP_PATH
#endif
#define CONFIG_SDIO_HCI
#define PLATFORM_LINUX
-#define CONFIG_IOCTL_CFG80211
+//#define CONFIG_IOCTL_CFG80211
#ifdef CONFIG_IOCTL_CFG80211
- #define RTW_USE_CFG80211_STA_EVENT /* Indecate new sta asoc through cfg80211_new_sta */
+ //#define RTW_USE_CFG80211_STA_EVENT /* Indecate new sta asoc through cfg80211_new_sta */
#define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER
//#define CONFIG_DEBUG_CFG80211
#define CONFIG_SET_SCAN_DENY_TIMER
#define CONFIG_80211N_HT
#define CONFIG_RECV_REORDERING_CTRL
-#define CONFIG_CONCURRENT_MODE
+//#define CONFIG_CONCURRENT_MODE
#ifdef CONFIG_CONCURRENT_MODE
#define CONFIG_TSF_RESET_OFFLOAD // For 2 PORT TSF SYNC.
//#define CONFIG_HWPORT_SWAP //Port0->Sec , Port1 -> Pri
#define CONFIG_AP_MODE
#ifdef CONFIG_AP_MODE
- #define CONFIG_INTERRUPT_BASED_TXBCN // Tx Beacon when driver early interrupt occurs
+ #define CONFIG_INTERRUPT_BASED_TXBCN
#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_INTERRUPT_BASED_TXBCN)
#undef CONFIG_INTERRUPT_BASED_TXBCN
#endif
//#define CONFIG_DBG_P2P
#define CONFIG_P2P_PS
- #define CONFIG_P2P_IPS
+ //#define CONFIG_P2P_IPS
#define CONFIG_P2P_OP_CHK_SOCIAL_CH
#define CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT //replace CONFIG_P2P_CHK_INVITE_CH_LIST flag
#define CONFIG_P2P_INVITE_IOT
/*
* Debug Related Config
*/
-#define DBG 0
+#define DBG 1
//#define CONFIG_DEBUG /* DBG_871X, etc... */
//#define CONFIG_DEBUG_RTL871X /* RT_TRACE, RT_PRINT_DATA, _func_enter_, _func_exit_ */
#define DYNAMIC_CAMID_ALLOC
+#define RTW_SCAN_SPARSE_MIRACAST 1
+#define RTW_SCAN_SPARSE_BG 0
+
#ifndef CONFIG_RTW_HIQ_FILTER
#define CONFIG_RTW_HIQ_FILTER 1
#endif
#define dvobj_to_pwrctl(dvobj) (&(dvobj->pwrctl_priv))
#define pwrctl_to_dvobj(pwrctl) container_of(pwrctl, struct dvobj_priv, pwrctl_priv)
+#define dvobj_to_regsty(dvobj) (&(dvobj->if1->registrypriv))
#define dvobj_to_macidctl(dvobj) (&(dvobj->macid_ctl))
#ifdef PLATFORM_LINUX
\r
\r
//#define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 //9k for 88E nornal chip , //MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24))\r
-#define MAX_RX_DMA_BUFFER_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2400:0x3C00)\r
+#define MAX_RX_DMA_BUFFER_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2600:0x3E00)\r
\r
\r
-#define MAX_TX_REPORT_BUFFER_SIZE 0x0400 // 1k \r
+#define MAX_TX_REPORT_BUFFER_SIZE 0x0200 // 1k \r
\r
\r
// Note: We will divide number of page equally for each queue other than public queue!\r
#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
-
-#define MAX_RECVBUF_SZ (10240)
-
+ #ifdef CONFIG_MINIMAL_MEMORY_USAGE
+ #define MAX_RECVBUF_SZ (4000)
+ #else
+ #define MAX_RECVBUF_SZ (10240)
+ #endif
#endif
ANDROID_WIFI_CMD_MACADDR,
+ ANDROID_WIFI_CMD_BLOCK_SCAN,
ANDROID_WIFI_CMD_BLOCK,
ANDROID_WIFI_CMD_WFD_ENABLE,
#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC)
int rtw_android_wifictrl_func_add(void);
void rtw_android_wifictrl_func_del(void);
-void* wl_android_prealloc(int section, unsigned long size);
+void* rtw_wl_android_prealloc(int section, unsigned long size);
int wifi_get_irq_number(unsigned long *irq_flags_ptr);
int wifi_set_power(int on, unsigned long msec);
// Increase the scanning timeout because of increasing the SURVEY_TO value.
#define SCANNING_TIMEOUT 8000
+#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE
+#define CONC_SCANNING_TIMEOUT_SINGLE_BAND 10000
+#define CONC_SCANNING_TIMEOUT_DUAL_BAND 15000
+#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE
#ifdef PALTFORM_OS_WINCE
#define SCANQUEUE_LIFETIME 12000000 // unit:us
u8 token; // Used to record the dialog token of p2p invitation request frame.
};
+#define MIRACAST_DISABLED 0
+#define MIRACAST_SOURCE 1
+#define MIRACAST_SINK 2
+#define MIRACAST_INVALID 3
+
+#define is_miracast_enabled(mode) \
+ (mode == MIRACAST_SOURCE || mode == MIRACAST_SINK)
+
+const char *get_miracast_mode_str(int mode);
+
#ifdef CONFIG_WFD
struct wifi_display_info{
// 0 -> WFD Source Device
// 1 -> WFD Primary Sink Device
enum SCAN_RESULT_TYPE scan_result_type; // Used when P2P is enable. This parameter will impact the scan result.
-
+ u8 stack_wfd_mode;
};
#endif //CONFIG_WFD
u8 restore_channel;
struct ieee80211_channel remain_on_ch_channel;
enum nl80211_channel_type remain_on_ch_type;
- u64 remain_on_ch_cookie;
+ ATOMIC_T ro_ch_cookie_gen;
+ u64 remain_on_ch_cookie;
bool not_indic_ro_ch_exp;
bool is_ro_ch;
u32 last_ro_ch_time; /* this will be updated at the beginning and end of ro_ch */
#if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH)
u8 scan_cnt;
+ u8 backop_cnt;
#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE
};
-#define DRIVERVERSION "v4.3.10_12447.20141008"
+#define DRIVERVERSION "v4.3.10.1_13373.20150129"
struct cfg80211_ssid *ssids = request->ssids;\r
int social_channel = 0, j = 0;\r
bool need_indicate_scan_done = _FALSE;\r
+ bool ps_denied = _FALSE;\r
\r
_adapter *padapter;\r
struct rtw_wdev_priv *pwdev_priv;\r
pwdev_priv->scan_request = request;\r
_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL);\r
\r
+ if (adapter_wdev_data(padapter)->block_scan == _TRUE) {\r
+ DBG_871X(FUNC_ADPT_FMT" wdev_priv.block_scan is set\n", FUNC_ADPT_ARG(padapter));\r
+ need_indicate_scan_done = _TRUE;\r
+ goto check_need_indicate_scan_done;\r
+ }\r
+\r
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)\r
{\r
#ifdef CONFIG_DEBUG_CFG80211\r
}\r
\r
rtw_ps_deny(padapter, PS_DENY_SCAN);\r
+ ps_denied = _TRUE;\r
if(_FAIL == rtw_pwr_wakeup(padapter)) {\r
need_indicate_scan_done = _TRUE;\r
goto check_need_indicate_scan_done;\r
}\r
\r
cancel_ps_deny:\r
- rtw_ps_deny_cancel(padapter, PS_DENY_SCAN);\r
+ if (ps_denied == _TRUE)\r
+ rtw_ps_deny_cancel(padapter, PS_DENY_SCAN);\r
\r
exit:\r
return ret;\r
pstapriv->asoc_list_cnt--;\r
\r
//_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);\r
- updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING);\r
+ if (check_fwstate(pmlmepriv, (WIFI_AP_STATE)) == _TRUE)\r
+ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_PREV_AUTH_NOT_VALID);\r
+ else\r
+ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING);\r
//_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);\r
\r
psta = NULL;\r
struct mlme_ext_priv *pmlmeext;\r
struct wifidirect_info *pwdinfo;\r
struct cfg80211_wifidirect_info *pcfg80211_wdinfo;\r
- u8 is_p2p_find = _FALSE;\r
- \r
+\r
+#ifndef CONFIG_RADIO_WORK\r
+ #define RTW_ROCH_DURATION_ENLARGE\r
+ #define RTW_ROCH_BACK_OP\r
+#endif\r
+\r
if (ndev == NULL) {\r
return -EINVAL;\r
}\r
pmlmeext = &padapter->mlmeextpriv;\r
pwdinfo = &padapter->wdinfo;\r
pcfg80211_wdinfo = &padapter->cfg80211_wdinfo;\r
- #ifdef CONFIG_CONCURRENT_MODE\r
- is_p2p_find=(duration < (pwdinfo->ext_listen_interval))? _TRUE : _FALSE;\r
- #endif\r
- DBG_871X(FUNC_ADPT_FMT" ch:%u duration:%d\n", FUNC_ADPT_ARG(padapter), remain_ch, duration);\r
+\r
+ *cookie = ATOMIC_INC_RETURN(&pcfg80211_wdinfo->ro_ch_cookie_gen);\r
+\r
+ DBG_871X(FUNC_ADPT_FMT" ch:%u duration:%d, cookie:0x%llx\n",\r
+ FUNC_ADPT_ARG(padapter), remain_ch, duration, *cookie);\r
\r
if(pcfg80211_wdinfo->is_ro_ch == _TRUE)\r
{\r
- pcfg80211_wdinfo->not_indic_ro_ch_exp = _TRUE;\r
DBG_8192C("%s, cancel ro ch timer\n", __func__);\r
_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer);\r
#ifdef CONFIG_CONCURRENT_MODE\r
ATOMIC_SET(&pwdev_priv->ro_ch_to, 1);\r
#endif //CONFIG_CONCURRENT_MODE\r
p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK);\r
- pcfg80211_wdinfo->not_indic_ro_ch_exp = _FALSE;\r
}\r
\r
pcfg80211_wdinfo->is_ro_ch = _TRUE;\r
\r
rtw_scan_abort(padapter);\r
#ifdef CONFIG_CONCURRENT_MODE \r
- if ((rtw_buddy_adapter_up(padapter)) && is_p2p_find) //don't scan_abort during p2p_listen.\r
- rtw_scan_abort(padapter->pbuddy_adapter); \r
+ if (rtw_buddy_adapter_up(padapter))\r
+ rtw_scan_abort(padapter->pbuddy_adapter);\r
#endif //CONFIG_CONCURRENT_MODE\r
\r
if (check_fwstate(&padapter->mlmepriv, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE)\r
\r
rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN);\r
\r
- \r
- if(duration < 400)\r
- duration = duration*3;//extend from exper.\r
-\r
+ #ifdef RTW_ROCH_DURATION_ENLARGE\r
+ if (duration < 400)\r
+ duration = duration * 3; /* extend from exper */\r
+ #endif\r
\r
+#ifdef RTW_ROCH_BACK_OP\r
#ifdef CONFIG_CONCURRENT_MODE\r
- if (check_buddy_fwstate(padapter, _FW_LINKED))\r
- {\r
- if (is_p2p_find) // p2p_find , duration<1000\r
- duration = duration + pwdinfo->ext_listen_interval;\r
- else // p2p_listen, duration=5000\r
- duration = pwdinfo->ext_listen_interval \r
- + (pwdinfo->ext_listen_interval/4);\r
+ if(check_buddy_fwstate(padapter, _FW_LINKED) &&\r
+ (duration<pwdinfo->ext_listen_interval)) {\r
+ duration = duration + pwdinfo->ext_listen_interval;\r
}\r
#endif\r
+#endif /* RTW_ROCH_BACK_OP */\r
\r
pcfg80211_wdinfo->restore_channel = rtw_get_oper_ch(padapter);\r
\r
if(ATOMIC_READ(&pwdev_priv->switch_ch_to)==1 ||\r
(remain_ch != pmlmeext->cur_channel))\r
{\r
- DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); \r
- issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500);\r
- \r
+ if (check_buddy_fwstate(padapter, WIFI_FW_STATION_STATE)) {\r
+ DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__);\r
+ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500);\r
+ }\r
+ \r
ATOMIC_SET(&pwdev_priv->switch_ch_to, 0);\r
\r
+ #ifdef RTW_ROCH_BACK_OP\r
DBG_8192C("%s, set switch ch timer, duration=%d\n", __func__, duration-pwdinfo->ext_listen_interval);\r
- _set_timer(&pwdinfo->ap_p2p_switch_timer, duration-pwdinfo->ext_listen_interval); \r
- } \r
+ _set_timer(&pwdinfo->ap_p2p_switch_timer, duration-pwdinfo->ext_listen_interval);\r
+ #endif\r
+ }\r
}\r
\r
ready_on_channel = _TRUE;\r
pwdinfo = &padapter->wdinfo;\r
pcfg80211_wdinfo = &padapter->cfg80211_wdinfo;\r
\r
- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));\r
+ DBG_871X(FUNC_ADPT_FMT" cookie:0x%llx\n",\r
+ FUNC_ADPT_ARG(padapter), cookie);\r
\r
if (pcfg80211_wdinfo->is_ro_ch == _TRUE) {\r
- pcfg80211_wdinfo->not_indic_ro_ch_exp = _TRUE;\r
DBG_8192C("%s, cancel ro ch timer\n", __func__);\r
_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer);\r
#ifdef CONFIG_CONCURRENT_MODE\r
ATOMIC_SET(&pwdev_priv->ro_ch_to, 1);\r
#endif\r
p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK);\r
- pcfg80211_wdinfo->not_indic_ro_ch_exp = _FALSE;\r
}\r
\r
#if 0\r
\r
DBG_8192C("%s:rf_type=%d\n", __func__, rf_type);\r
\r
- /* if (padapter->registrypriv.wireless_mode & WIRELESS_11G) */\r
+ if (padapter->registrypriv.wireless_mode & WIRELESS_11G)\r
{\r
bands = wiphy->bands[IEEE80211_BAND_2GHZ];\r
if(bands)\r
rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_2GHZ, rf_type);\r
}\r
\r
- /* if (padapter->registrypriv.wireless_mode & WIRELESS_11A) */\r
+ if (padapter->registrypriv.wireless_mode & WIRELESS_11A)\r
{\r
bands = wiphy->bands[IEEE80211_BAND_5GHZ];\r
if(bands)\r
| BIT(NL80211_IFTYPE_ADHOC)\r
#ifdef CONFIG_AP_MODE\r
| BIT(NL80211_IFTYPE_AP)\r
+ #ifndef CONFIG_RADIO_WORK\r
| BIT(NL80211_IFTYPE_MONITOR)\r
+ #endif\r
#endif\r
#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE))\r
| BIT(NL80211_IFTYPE_P2P_CLIENT)\r
#endif \r
\r
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0))\r
+ #ifndef CONFIG_RADIO_WORK\r
wiphy->software_iftypes |= BIT(NL80211_IFTYPE_MONITOR);\r
+ #endif\r
#endif\r
\r
/*\r
wiphy->cipher_suites = rtw_cipher_suites;\r
wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites);\r
\r
- /* if (padapter->registrypriv.wireless_mode & WIRELESS_11G) */\r
+ if (padapter->registrypriv.wireless_mode & WIRELESS_11G)\r
wiphy->bands[IEEE80211_BAND_2GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_2GHZ);\r
- /* if (padapter->registrypriv.wireless_mode & WIRELESS_11A) */\r
+ if (padapter->registrypriv.wireless_mode & WIRELESS_11A)\r
wiphy->bands[IEEE80211_BAND_5GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_5GHZ);\r
\r
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38) && LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0))\r
\r
u8 bandroid_scan;\r
bool block;\r
+ bool block_scan;\r
bool power_mgmt;\r
\r
#ifdef CONFIG_CONCURRENT_MODE\r
int rtw_network_mode = Ndis802_11IBSS;//Ndis802_11Infrastructure;//infra, ad-hoc, auto
//NDIS_802_11_SSID ssid;
int rtw_channel = 1;//ad-hoc support requirement
-int rtw_wireless_mode = WIRELESS_MODE_MAX;
+int rtw_wireless_mode = WIRELESS_11BG_24N;
int rtw_vrtl_carrier_sense = AUTO_VCS;
int rtw_vcs_type = RTS_CTS;//*
int rtw_rts_thresh = 2347;//*
int rtw_soft_ap = 0;
//int smart_ps = 1;
#ifdef CONFIG_POWER_SAVING
-#ifdef CONFIG_PLATFORM_INTEL_BYT
int rtw_power_mgnt = PS_MODE_MAX;
-#else
-int rtw_power_mgnt = PS_MODE_MIN;
-#endif
#ifdef CONFIG_IPS_LEVEL_2
int rtw_ips_mode = IPS_LEVEL_2;
#else
}
#ifdef CONFIG_LPS
else
- rtw_set_ps_mode(padapter, PS_MODE_DTIM, 0, 0, "WOWLAN");
+ rtw_set_ps_mode(padapter, PS_MODE_MAX, 0, 0, "WOWLAN");
#endif //#ifdef CONFIG_LPS
}
if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) {
if (pwrpriv->wowlan_wake_reason == FWDecisionDisconnect ||
+ pwrpriv->wowlan_wake_reason == Rx_Pairwisekey ||
pwrpriv->wowlan_wake_reason == Rx_DisAssoc ||
pwrpriv->wowlan_wake_reason == Rx_DeAuth) {
}
if (pwrpriv->wowlan_wake_reason == Rx_GTK ||
+ pwrpriv->wowlan_wake_reason == Rx_Pairwisekey ||
pwrpriv->wowlan_wake_reason == Rx_DisAssoc ||
pwrpriv->wowlan_wake_reason == Rx_DeAuth) {
rtw_lock_ext_suspend_timeout(8000);
"MACADDR",
+ "BLOCK_SCAN",
"BLOCK",
"WFD-ENABLE",
"WFD-DISABLE",
return bytes_written;
}
+int rtw_android_set_block_scan(struct net_device *net, char *command, int total_len)
+{
+ _adapter *adapter = (_adapter *)rtw_netdev_priv(net);
+ char *block_value = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_BLOCK_SCAN]) + 1;
+
+ #ifdef CONFIG_IOCTL_CFG80211
+ adapter_wdev_data(adapter)->block_scan = (*block_value == '0')?_FALSE:_TRUE;
+ #endif
+
+ return 0;
+}
+
int rtw_android_set_block(struct net_device *net, char *command, int total_len)
{
_adapter *adapter = (_adapter *)rtw_netdev_priv(net);
return bytes_written;
}
-enum {
- MIRACAST_DISABLED = 0,
- MIRACAST_SOURCE,
- MIRACAST_SINK,
- MIRACAST_INVALID,
-};
-
-static const char *miracast_mode_str[] = {
- "DISABLED",
- "SOURCE",
- "SINK",
- "INVALID",
-};
-
-static const char *get_miracast_mode_str(int mode)
-{
- if (mode < MIRACAST_DISABLED || mode >= MIRACAST_INVALID)
- mode = MIRACAST_INVALID;
-
- return miracast_mode_str[mode];
-}
-
int rtw_android_set_miracast_mode(struct net_device *net, char *command, int total_len)
{
_adapter *adapter = (_adapter *)rtw_netdev_priv(net);
case ANDROID_WIFI_CMD_MACADDR:
bytes_written = rtw_android_get_macaddr(net, command, priv_cmd.total_len);
break;
-
+
+ case ANDROID_WIFI_CMD_BLOCK_SCAN:
+ bytes_written = rtw_android_set_block_scan(net, command, priv_cmd.total_len);
+ break;
+
case ANDROID_WIFI_CMD_BLOCK:
bytes_written = rtw_android_set_block(net, command, priv_cmd.total_len);
break;
static int wifi_add_dev(void);
static void wifi_del_dev(void);
+extern int rockchip_wifi_get_oob_irq(void);
int rtw_android_wifictrl_func_add(void)
{
int ret = 0;
+#if 1
+ oob_irq = rockchip_wifi_get_oob_irq();
+ printk("%s: rockchip_wifi_get_oob_irq :%d\n", __func__, oob_irq);
+#else
sema_init(&wifi_control_sem, 0);
ret = wifi_add_dev();
ret = -EINVAL;
DBG_871X("%s: platform_driver_register timeout\n", __FUNCTION__);
}
-
+#endif
return ret;
}
void rtw_android_wifictrl_func_del(void)
{
+#if 0
if (g_wifidev_registered)
{
wifi_del_dev();
g_wifidev_registered = 0;
}
+#endif
}
-void *wl_android_prealloc(int section, unsigned long size)
+void *rtw_wl_android_prealloc(int section, unsigned long size)
{
void *alloc_ptr = NULL;
if (wifi_control_data && wifi_control_data->mem_prealloc) {
PSDIO_DATA psdio_data;
struct sdio_func *func;
int err;
+ int i = 0;
_func_enter_;
//3 1. init SDIO bus
sdio_claim_host(func);
- err = sdio_enable_func(func);
- if (err) {
+ //try several times if fail
+ for(i=0; i<10; i++)
+ {
+ err = sdio_enable_func(func);
+ if(err)
+ {
+ printk("%s:err=%d,i=%d\n",__func__, err, i);
+ mdelay(2);
+ continue;
+ }
+ else
+ {
+ break;
+ }
+ }
+
+ if (i>=10 && err) {
dvobj->drv_dbg.dbg_sdio_init_error_cnt++;
DBG_8192C(KERN_CRIT "%s: sdio_enable_func FAIL(%d)!\n", __func__, err);
goto release;
/*
* Broadcom BCM4319 driver version.
*/
-#define RTL8192_DRV_VERSION "4.00"
+#define RTL8192_DRV_VERSION "4.20"
#endif /* WIFI_VERSION_H */
--- /dev/null
+#!/bin/bash
+
+if [ "`which iwconfig`" = "" ] ; then
+ echo "WARNING:Wireless tool not exist!"
+ echo " Please install it!"
+ exit
+else
+ if [ `uname -r | cut -d. -f2` -eq 4 ]; then
+ wpa_supplicant -D ipw -c wpa1.conf -i wlan0
+ else
+ if [ `iwconfig -v |awk '{print $4}' | head -n 1` -lt 18 ] ; then
+ wpa_supplicant -D ipw -c wpa1.conf -i wlan0
+ else
+ wpa_supplicant -D wext -c wpa1.conf -i wlan0
+ fi
+
+ fi
+fi
+
+
--- /dev/null
+#!/bin/bash
+
+var0=`ps aux|awk '/dhclient wlan0/'|awk '$11!="awk"{print $2}'`
+
+kill $var0
+cp ifcfg-wlan0 /etc/sysconfig/network-scripts/
+
+dhclient wlan0
+
+var1=`ifconfig wlan0 |awk '/inet/{print $2}'|awk -F: '{print $2}'`
+
+
+rm -f /etc/sysconfig/network-scripts/ifcfg-wlan0
+
+echo "get ip: $var1"
+
#define RK3368_CRU_CLKSELS_CON(i) (RK3368_CRU_CLKSEL_CON + ((i) * 4))
#define RK3368_CRU_CLKGATES_CON(i) (RK3368_CRU_CLKGATE_CON + ((i) * 4))
+#define RK3368_CRU_SOFTRSTS_CON_CNT (15)
+#define RK3368_CRU_SOFTRST_CON 0x300
+#define RK3368_CRU_SOFTRSTS_CON(i) (RK3368_CRU_SOFTRST_CON + ((i) * 4))
+
#endif
.pm = &rockchip_i2s_pm_ops,
},
};
-module_platform_driver(rockchip_i2s_driver);
+
+static int __init rockchip_i2s_init(void)
+{
+ return platform_driver_register(&rockchip_i2s_driver);
+}
+subsys_initcall_sync(rockchip_i2s_init);
+
+static void __exit rockchip_i2s_exit(void)
+{
+ platform_driver_unregister(&rockchip_i2s_driver);
+}
+module_exit(rockchip_i2s_exit);
/* Module information */
MODULE_AUTHOR("rockchip");
projects / firefly-linux-kernel-4.4.55.git / commitdiff