* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
+ * date: 2017-05-26
*/
.arch armv7-a
.fpu softvfp
.file "rk_ftl_arm_v7.S"
.text
.align 2
- .type rknand_sys_storage_release, %function
-rknand_sys_storage_release:
+ .type rknand_sys_storage_open, %function
+rknand_sys_storage_open:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r0, [r1, #124]
- stmfd sp!, {r3, lr}
- .save {r3, lr}
- cmp r0, #0
- beq .L2
- mov r3, #0
- str r3, [r1, #124]
- bl kfree
-.L2:
+ @ link register save eliminated.
mov r0, #0
- ldmfd sp!, {r3, pc}
+ bx lr
.fnend
- .size rknand_sys_storage_release, .-rknand_sys_storage_release
+ .size rknand_sys_storage_open, .-rknand_sys_storage_open
.align 2
- .type rknand_sys_storage_open, %function
-rknand_sys_storage_open:
+ .type rknand_sys_storage_release, %function
+rknand_sys_storage_release:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L6
- mov r2, #4096
- stmfd sp!, {r4, lr}
- .save {r4, lr}
- mov r4, r1
- ldr r0, [r3, #48]
- mov r1, #208
- bl kmem_cache_alloc_trace
- mov r3, #0
- str r3, [r4, #124]
- cmp r0, #0
- bne .L4
- ldr r0, .L6+4
- bl printk
- mvn r0, #11
- ldmfd sp!, {r4, pc}
-.L4:
- str r0, [r4, #124]
- mov r0, r3
- ldmfd sp!, {r4, pc}
-.L7:
- .align 2
-.L6:
- .word kmalloc_caches
- .word .LC1
+ @ link register save eliminated.
+ mov r0, #0
+ bx lr
.fnend
- .size rknand_sys_storage_open, .-rknand_sys_storage_open
+ .size rknand_sys_storage_release, .-rknand_sys_storage_release
.align 2
.global FlashMemCmp8
.type FlashMemCmp8, %function
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L18
+ ldr r3, .L13
stmfd sp!, {r4, lr}
.save {r4, lr}
ldrb r3, [r3, #0] @ zero_extendqisi2
cmp r3, #0
- beq .L16
+ beq .L11
ldrb r3, [r1, #1] @ zero_extendqisi2
ldrb ip, [r0, #1] @ zero_extendqisi2
cmp ip, r3
movne r3, #0
- bne .L16
- b .L17
-.L13:
+ bne .L11
+ b .L12
+.L8:
ldrb r4, [r0, r3] @ zero_extendqisi2
ldrb ip, [r1, r3] @ zero_extendqisi2
add r3, r3, #1
cmp r4, ip
- beq .L16
+ beq .L11
mov r0, r3
ldmfd sp!, {r4, pc}
-.L16:
+.L11:
cmp r3, r2
- bne .L13
+ bne .L8
mov r0, #0
ldmfd sp!, {r4, pc}
-.L17:
+.L12:
mov r0, #0
ldmfd sp!, {r4, pc}
-.L19:
+.L14:
.align 2
-.L18:
+.L13:
.word .LANCHOR0
.fnend
.size FlashMemCmp8, .-FlashMemCmp8
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L21
+ ldr r3, .L16
ldrb r2, [r3, #1] @ zero_extendqisi2
ldr r3, [r3, #4]
mul r3, r3, r2
movne r2, #0
eor r0, r2, #1
bx lr
-.L22:
+.L17:
.align 2
-.L21:
+.L16:
.word .LANCHOR0
.fnend
.size FlashRsvdBlkChk, .-FlashRsvdBlkChk
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
and r3, r1, #127
- ldr r2, .L25
+ ldr r2, .L20
stmfd sp!, {r4, lr}
.save {r4, lr}
mov r3, r3, asl #1
ldrh r4, [r2, r3]
- ldr r3, .L25+4
+ ldr r3, .L20+4
ldrb r3, [r3, #8] @ zero_extendqisi2
cmp r3, #0
- beq .L24
+ beq .L19
bl FlashRsvdBlkChk
cmp r0, #0
orrne r4, r4, #-1073741824
-.L24:
+.L19:
mov r0, r4
ldmfd sp!, {r4, pc}
-.L26:
+.L21:
.align 2
-.L25:
+.L20:
.word .LANCHOR1
.word .LANCHOR0
.fnend
stmfd sp!, {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
mov r6, r0
- ldr r3, .L33
+ ldr r3, .L28
mov r5, r1
ldr r2, [r3, #12]
mov r7, r3
cmp r2, #5
- bls .L28
+ bls .L23
and r5, r1, #127
- ldr r3, .L33+4
+ ldr r3, .L28+4
mov r5, r5, asl #1
ldrh r4, [r3, r5]
ldrb r3, [r7, #8] @ zero_extendqisi2
cmp r3, #0
- beq .L29
+ beq .L24
bl FlashRsvdBlkChk
cmp r0, #0
orrne r4, r4, #-1073741824
-.L29:
+.L24:
add r6, r7, r6, asl #3
- b .L32
-.L28:
+ b .L27
+.L23:
cmp r2, #4
ldmnefd sp!, {r3, r4, r5, r6, r7, pc}
and r2, r1, #127
- ldr ip, .L33+4
+ ldr ip, .L28+4
ldrb r3, [r3, #8] @ zero_extendqisi2
mov r2, r2, asl #1
cmp r3, #0
ldrh r4, [ip, r2]
mov r4, r4, asl #8
- beq .L31
+ beq .L26
bl FlashRsvdBlkChk
cmp r0, #0
movne r5, r5, asl #1
uxtbne r5, r5
orrne r5, r5, #1
orrne r4, r4, r5
-.L31:
- ldr r3, .L33
+.L26:
+ ldr r3, .L28
add r6, r3, r6, asl #3
-.L32:
+.L27:
ldr r3, [r6, #16]
str r4, [r3, #336]
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L34:
+.L29:
.align 2
-.L33:
+.L28:
.word .LANCHOR0
.word .LANCHOR1
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr ip, .L36
+ ldr ip, .L31
mov r2, r1, lsr #16
stmfd sp!, {r4, lr}
.save {r4, lr}
str r2, [r3, #8]
ldmfd sp!, {r4, lr}
b FlashSetRandomizer
-.L37:
+.L32:
.align 2
-.L36:
+.L31:
.word .LANCHOR0
.fnend
.size FlashReadCmd, .-FlashReadCmd
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L42
+ ldr r2, .L37
stmfd sp!, {r4, lr}
.save {r4, lr}
add ip, r2, r0, asl #3
add r3, r3, #8
mov r2, #0
add r3, r4, r3, asl #8
- bne .L39
+ bne .L34
mov ip, #6
str ip, [r3, #8]
str r2, [r3, #4]
mov r2, r1, lsr #8
str r2, [r3, #4]
mov r2, r1, lsr #16
- b .L41
-.L39:
+ b .L36
+.L34:
str r2, [r3, #8]
uxtb ip, r1
str r2, [r3, #4]
mov ip, #5
str ip, [r3, #8]
str r2, [r3, #4]
-.L41:
+.L36:
str r2, [r3, #4]
mov r2, #224
str r2, [r3, #8]
ldmfd sp!, {r4, lr}
b FlashSetRandomizer
-.L43:
+.L38:
.align 2
-.L42:
+.L37:
.word .LANCHOR0
.fnend
.size FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L46
+ ldr r3, .L41
ldrb r2, [r3, #80] @ zero_extendqisi2
cmp r2, #0
bxeq lr
mov r2, #218
str r2, [r3, #8]
bx lr
-.L47:
+.L42:
.align 2
-.L46:
+.L41:
.word .LANCHOR0
.fnend
.size flash_enter_slc_mode, .-flash_enter_slc_mode
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L50
+ ldr r3, .L45
ldrb r2, [r3, #80] @ zero_extendqisi2
cmp r2, #0
bxeq lr
mov r2, #223
str r2, [r3, #8]
bx lr
-.L51:
+.L46:
.align 2
-.L50:
+.L45:
.word .LANCHOR0
.fnend
.size flash_exit_slc_mode, .-flash_exit_slc_mode
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr ip, .L53
+ ldr ip, .L48
mov r2, r1, lsr #16
stmfd sp!, {r4, lr}
.save {r4, lr}
str r2, [r3, #4]
ldmfd sp!, {r4, lr}
b FlashSetRandomizer
-.L54:
+.L49:
.align 2
-.L53:
+.L48:
.word .LANCHOR0
.fnend
.size FlashProgFirstCmd, .-FlashProgFirstCmd
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L57
+ ldr r3, .L52
cmp r2, #0
add r0, r3, r0, asl #3
ldr ip, [r0, #16]
ldrb r0, [r0, #20] @ zero_extendqisi2
add r0, r0, #8
add r0, ip, r0, asl #8
- beq .L56
+ beq .L51
ldr r3, [r3, #4]
mov r2, #96
str r2, [r0, #8]
mov r2, r1, lsr #16
add r1, r1, r3
str r2, [r0, #4]
-.L56:
+.L51:
mov r3, #96
str r3, [r0, #8]
uxtb r3, r1
str r1, [r0, #4]
str r3, [r0, #8]
bx lr
-.L58:
+.L53:
.align 2
-.L57:
+.L52:
.word .LANCHOR0
.fnend
.size FlashEraseCmd, .-FlashEraseCmd
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr ip, .L60
+ ldr ip, .L55
mov r2, r1, lsr #16
stmfd sp!, {r4, r5, lr}
.save {r4, r5, lr}
str r2, [r3, #4]
ldmfd sp!, {r4, r5, lr}
b FlashSetRandomizer
-.L61:
+.L56:
.align 2
-.L60:
+.L55:
.word .LANCHOR0
.fnend
.size FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L63
+ ldr r3, .L58
add r3, r3, r0, asl #3
ldr r2, [r3, #16]
ldrb r3, [r3, #20] @ zero_extendqisi2
mov r2, #16
str r2, [r3, #8]
bx lr
-.L64:
+.L59:
.align 2
-.L63:
+.L58:
.word .LANCHOR0
.fnend
.size FlashProgSecondCmd, .-FlashProgSecondCmd
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L66
+ ldr r3, .L61
add r0, r3, r0, asl #3
ldrb r3, [r3, #58] @ zero_extendqisi2
ldrb r2, [r0, #20] @ zero_extendqisi2
add r2, r1, r2, asl #8
str r3, [r2, #8]
bx lr
-.L67:
+.L62:
.align 2
-.L66:
+.L61:
.word .LANCHOR0
.fnend
.size FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
mov r2, #0
stmfd sp!, {r4, lr}
.save {r4, lr}
- ldr r0, .L71
- b .L69
-.L70:
+ ldr r0, .L66
+ b .L64
+.L65:
mov ip, r0, asl #5
ldrb r4, [r3, r2] @ zero_extendqisi2
add ip, ip, r0, lsr #2
add r2, r2, #1
add ip, ip, r4
eor r0, r0, ip
-.L69:
+.L64:
cmp r2, r1
- bne .L70
+ bne .L65
ldmfd sp!, {r4, pc}
-.L72:
+.L67:
.align 2
-.L71:
+.L66:
.word 1204201446
.fnend
.size JSHash, .-JSHash
stmfd sp!, {r3, lr}
.save {r3, lr}
mov r2, #2048
- ldr r1, .L76
+ ldr r1, .L71
bl memcpy
mov r0, #0
ldmfd sp!, {r3, pc}
-.L77:
+.L72:
.align 2
-.L76:
+.L71:
.word .LANCHOR0+84
.fnend
.size FlashReadIdbData, .-FlashReadIdbData
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
mov r4, #0
- ldr r6, .L90
-.L82:
+ ldr r6, .L85
+.L77:
add r5, r6, r4, asl #5
- ldr r1, .L90+4
+ ldr r1, .L85+4
add r0, r5, #1
ldrb r2, [r6, r4, asl #5] @ zero_extendqisi2
bl FlashMemCmp8
subs r1, r0, #0
- bne .L79
+ bne .L74
cmp r5, #0
ldrneb r2, [r5, #22] @ zero_extendqisi2
- ldrne r3, .L90+8
- bne .L84
- b .L89
-.L79:
+ ldrne r3, .L85+8
+ bne .L79
+ b .L84
+.L74:
add r4, r4, #1
cmp r4, #72
- bne .L82
+ bne .L77
mvn r0, #0
ldmfd sp!, {r4, r5, r6, pc}
-.L84:
+.L79:
ldrb r0, [r3, r1, asl #5] @ zero_extendqisi2
cmp r0, r2
- beq .L83
+ beq .L78
add r1, r1, #1
cmp r1, #4
- bne .L84
-.L83:
- ldr r3, .L90+8
+ bne .L79
+.L78:
+ ldr r3, .L85+8
mov r2, #32
- ldr r0, .L90+12
+ ldr r0, .L85+12
add r1, r3, r1, asl #5
bl memcpy
- ldr r0, .L90+16
+ ldr r0, .L85+16
mov r1, r5
mov r2, #32
bl memcpy
mov r0, #0
ldmfd sp!, {r4, r5, r6, pc}
-.L89:
+.L84:
mvn r0, #0
ldmfd sp!, {r4, r5, r6, pc}
-.L91:
+.L86:
.align 2
-.L90:
+.L85:
.word .LANCHOR1+256
.word .LANCHOR0+2132
.word .LANCHOR1+2560
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L93
+ ldr r3, .L88
mov r0, #0
ldr r2, [r3, #2164]
ldr r1, [r2, #0]
str r1, [r3, #2192]
str r2, [r3, #2196]
bx lr
-.L94:
+.L89:
.align 2
-.L93:
+.L88:
.word .LANCHOR0
.fnend
.size FlashSuspend, .-FlashSuspend
stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov fp, r3
- ldr r3, .L100
+ ldr r3, .L95
mov r5, r1
mov r6, r2
movw r1, #2214
mov r1, sl
bl __aeabi_uidiv
cmp r5, #1
- ldr r3, .L100
+ ldr r3, .L95
uxth r0, r0
mls sl, sl, r0, r9
uxth sl, sl
- bne .L97
+ bne .L92
ldrb r2, [r3, #80] @ zero_extendqisi2
cmp r2, #0
addeq r8, r3, r8, asl #1
movweq r2, #2228
ldreqh r8, [r8, r2]
-.L97:
+.L92:
add r3, r3, r0, asl #2
ldr r3, [r3, #2740]
mla r7, r7, sl, r3
add r8, r7, r8
str r8, [r6, #0]
str r0, [fp, #0]
- bls .L99
+ bls .L94
ldr r0, [r4, #4]
ldr r3, [r4, #40]
add r0, r0, #1024
rsbs r0, r3, #0
adc r0, r0, r3
ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L99:
+.L94:
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L101:
+.L96:
.align 2
-.L100:
+.L95:
.word .LANCHOR0
.fnend
.size LogAddr2PhyAddr, .-LogAddr2PhyAddr
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L103
+ ldr r3, .L98
ldr r2, [r3, #2772]
str r0, [r3, #2772]
mov r0, r2
bx lr
-.L104:
+.L99:
.align 2
-.L103:
+.L98:
.word .LANCHOR0
.fnend
.size FlashScheduleEnSet, .-FlashScheduleEnSet
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L106
+ ldr r3, .L101
ldr r3, [r3, #2776]
ldrb r0, [r3, #9] @ zero_extendqisi2
bx lr
-.L107:
+.L102:
.align 2
-.L106:
+.L101:
.word .LANCHOR0
.fnend
.size FlashGetPageSize, .-FlashGetPageSize
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L110
+ ldr r3, .L105
add r3, r3, r0, asl #3
ldrb r0, [r3, #20] @ zero_extendqisi2
ldr r2, [r3, #16]
add r0, r0, #8
add r0, r2, r0, asl #8
bx lr
-.L111:
+.L106:
.align 2
-.L110:
+.L105:
.word .LANCHOR0
.fnend
.size NandcGetChipIf, .-NandcGetChipIf
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L113
+ ldr r3, .L108
mov r2, r0, asl #8
orr r2, r2, r0, asl #16
orr r2, r2, #1
ldr r3, [r3, #2164]
str r2, [r3, #304]
bx lr
-.L114:
+.L109:
.align 2
-.L113:
+.L108:
.word .LANCHOR0
.fnend
.size NandcSetDdrPara, .-NandcSetDdrPara
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L116
+ ldr r3, .L111
orr r0, r0, #16640
ldr r3, [r3, #2164]
str r0, [r3, #344]
bx lr
-.L117:
+.L112:
.align 2
-.L116:
+.L111:
.word .LANCHOR0
.fnend
.size NandcSetDdrDiv, .-NandcSetDdrDiv
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L120
+ ldr r3, .L115
cmp r0, #0
ldr r2, [r3, #2164]
ldr r3, [r2, #0]
orrne r3, r3, #253952
str r3, [r2, #0]
bx lr
-.L121:
+.L116:
.align 2
-.L120:
+.L115:
.word .LANCHOR0
.fnend
.size NandcSetDdrMode, .-NandcSetDdrMode
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L126
+ ldr r3, .L121
stmfd sp!, {r4, lr}
.save {r4, lr}
ldr r3, [r3, #2164]
ldr r4, [r3, #0]
ands r3, r0, #6
bfieq r4, r3, #13, #1
- beq .L125
+ beq .L120
orr r4, r4, #24576
tst r0, #4
bfc r4, #15, #1
orr r4, r4, #196608
orrne r4, r4, #32768
bl rknand_get_clk_rate
- ldr r3, .L126
- movw r2, #8322
+ ldr r3, .L121
+ movw r2, #16641
ldr r3, [r3, #2164]
str r2, [r3, #344]
- ldr r2, .L126+4
+ ldr r2, .L121+4
str r2, [r3, #304]
mov r2, #38
str r2, [r3, #308]
mov r2, #39
str r2, [r3, #308]
-.L125:
- ldr r3, .L126
+.L120:
+ ldr r3, .L121
mov r0, #0
ldr r3, [r3, #2164]
str r4, [r3, #0]
ldmfd sp!, {r4, pc}
-.L127:
+.L122:
.align 2
-.L126:
+.L121:
.word .LANCHOR0
- .word 1052675
+ .word 1710595
.fnend
.size NandcSetMode, .-NandcSetMode
.align 2
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L129
+ ldr r3, .L124
ldr r3, [r3, #16]
ldr r2, [r3, #0]
bfi r2, r0, #0, #8
str r2, [r3, #0]
bx lr
-.L130:
+.L125:
.align 2
-.L129:
+.L124:
.word .LANCHOR0
.fnend
.size NandcFlashCsDebug, .-NandcFlashCsDebug
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L132
+ ldr r3, .L127
add r3, r3, r0, asl #3
mov r0, #1
ldr r2, [r3, #16]
bfi r3, r1, #0, #8
str r3, [r2, #0]
bx lr
-.L133:
+.L128:
.align 2
-.L132:
+.L127:
.word .LANCHOR0
.fnend
.size NandcFlashCs, .-NandcFlashCs
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L135
+ ldr r3, .L130
add r3, r3, r0, asl #3
ldr r2, [r3, #16]
ldr r3, [r2, #0]
bfc r3, #17, #1
str r3, [r2, #0]
bx lr
-.L136:
+.L131:
.align 2
-.L135:
+.L130:
.word .LANCHOR0
.fnend
.size NandcFlashDeCs, .-NandcFlashDeCs
sub sp, sp, #8
mov r0, r0, lsr #4
str r0, [sp, #4]
-.L138:
+.L133:
ldr r0, [sp, #4]
cmp r0, #0
sub r3, r0, #1
str r3, [sp, #4]
- bne .L138
+ bne .L133
add sp, sp, #8
bx lr
.fnend
@ frame_needed = 0, uses_anonymous_args = 0
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
- ldr r3, .L149
+ ldr r3, .L144
add r0, r3, r0, asl #3
ldr ip, [r3, #2776]
ldrb r5, [r0, #20] @ zero_extendqisi2
add r0, r4, r5, asl #8
movne r3, #112
strne r3, [r0, #8]
- bne .L145
+ bne .L140
cmp r2, #0
ldreqb r2, [r3, #61] @ zero_extendqisi2
ldrneb r2, [r3, #62] @ zero_extendqisi2
ldrb r3, [r3, #63] @ zero_extendqisi2
cmp r3, #0
movne r3, #0
- ldrne r2, .L149
- bne .L144
- b .L145
-.L146:
+ ldrne r2, .L144
+ bne .L139
+ b .L140
+.L141:
mov ip, r3, asl #3
add r3, r3, #1
mov ip, r1, lsr ip
uxtb ip, ip
str ip, [r0, #4]
-.L144:
+.L139:
ldrb ip, [r2, #63] @ zero_extendqisi2
cmp r3, ip
- bcc .L146
-.L145:
+ bcc .L141
+.L140:
mov r0, #80
bl NandcDelayns
ldr r0, [r4, r5, asl #8]
uxtb r0, r0
ldmfd sp!, {r3, r4, r5, pc}
-.L150:
+.L145:
.align 2
-.L149:
+.L144:
.word .LANCHOR0
.fnend
.size FlashReadStatusEN, .-FlashReadStatusEN
mov r6, r0
mov r5, r1
mov r4, r2
-.L155:
+.L150:
mov r0, r6
mov r1, r5
mov r2, r4
bl FlashReadStatusEN
cmp r0, #255
- beq .L155
+ beq .L150
tst r0, #64
- beq .L155
+ beq .L150
ldmfd sp!, {r4, r5, r6, pc}
.fnend
.size FlashWaitReadyEN, .-FlashWaitReadyEN
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L159
+ ldr r3, .L154
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
add r4, r3, r0, asl #4
mov r6, r0
ldr r3, [r4, #8]
cmp r3, #0
- beq .L157
+ beq .L152
mov r0, r5
bl NandcFlashCs
- ldr r3, .L159+4
+ ldr r3, .L154+4
ldr r1, [r4, #4]
mov r0, r5
add r6, r3, r6, asl #2
cmp r2, r3
strne r6, [r2, #0]
strne r3, [r4, #12]
-.L157:
+.L152:
mov r0, #0
ldmfd sp!, {r4, r5, r6, pc}
-.L160:
+.L155:
.align 2
-.L159:
+.L154:
.word .LANCHOR0+2780
.word .LANCHOR0
.fnend
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
.save {r4, r5, r6, r7, r8, r9, sl, lr}
mov sl, r3
- ldr r3, .L166
+ ldr r3, .L161
mov r6, r2
mov r4, r0
mov r5, r1
bl NandcFlashCs
mov r3, #54
str r3, [r8, #8]
- b .L164
-.L165:
+ b .L159
+.L160:
ldrb r3, [r6, r7] @ zero_extendqisi2
mov r0, #200
str r3, [r8, #4]
ldrb r3, [r9, r7] @ zero_extendqisi2
add r7, r7, #1
str r3, [r8, #0]
-.L164:
+.L159:
uxtb r3, r7
cmp r3, r5
- bcc .L165
+ bcc .L160
mov r3, #22
mov r0, r4
str r3, [r8, #8]
bl NandcFlashDeCs
- ldr r3, .L166
+ ldr r3, .L161
add r4, r3, r4
strb sl, [r4, #3760]
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L167:
+.L162:
.align 2
-.L166:
+.L161:
.word .LANCHOR0
.fnend
.size HynixSetRRPara, .-HynixSetRRPara
@ frame_needed = 0, uses_anonymous_args = 0
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
- ldr r6, .L173
+ ldr r6, .L168
ldr r3, [r6, #2776]
ldrb r3, [r3, #19] @ zero_extendqisi2
sub r3, r3, #1
uxtb r3, r3
cmp r3, #5
ldmhifd sp!, {r4, r5, r6, pc}
- ldr r5, .L173+4
+ ldr r5, .L168+4
mov r4, #0
-.L171:
+.L166:
ldrb r3, [r5, r4, asl #3] @ zero_extendqisi2
uxtb r0, r4
cmp r3, #173
- bne .L170
+ bne .L165
ldrb r1, [r6, #2909] @ zero_extendqisi2
mov r3, #0
- ldr r2, .L173+8
+ ldr r2, .L168+8
bl HynixSetRRPara
-.L170:
+.L165:
add r4, r4, #1
cmp r4, #4
- bne .L171
+ bne .L166
ldmfd sp!, {r4, r5, r6, pc}
-.L174:
+.L169:
.align 2
-.L173:
+.L168:
.word .LANCHOR0
.word .LANCHOR0+2132
.word .LANCHOR0+2912
stmfd sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
.save {r3, r4, r5, r6, r7, r8, sl, lr}
mov r4, r0
- ldr r3, .L178
+ ldr r3, .L173
mov r5, #0
- ldr sl, .L178+4
+ ldr sl, .L173+4
mov r8, #161
add r1, r3, r1, asl #2
add r6, r1, #3
mov r7, r3
- b .L176
-.L177:
+ b .L171
+.L172:
str r8, [r4, #8]
mov r3, #0
str r3, [r4, #0]
ldrsb r3, [r6, #1]!
str r3, [r4, #0]
bl NandcDelayns
-.L176:
+.L171:
ldrb r3, [sl, #3764] @ zero_extendqisi2
cmp r5, r3
- bcc .L177
+ bcc .L172
ldmfd sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L179:
+.L174:
.align 2
-.L178:
+.L173:
.word .LANCHOR1+2720
.word .LANCHOR0
.fnend
stmfd sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
.save {r3, r4, r5, r6, r7, r8, sl, lr}
add r6, r1, #1
- ldr r3, .L187
+ ldr r3, .L182
mov r4, r0
add r6, r6, r6, asl #2
mov r5, #0
add r2, r3, #45
sub sl, r3, #2784
add r7, r3, r6
- ldr r8, .L187+4
+ ldr r8, .L182+4
add r6, r2, r6
add sl, sl, r1
- b .L181
-.L185:
+ b .L176
+.L180:
mov r3, #85
str r3, [r4, #8]
- ldr r3, .L187
+ ldr r3, .L182
mov r0, #200
ldrsb r3, [r5, r3]
str r3, [r4, #4]
ldrb r3, [r8, #3765] @ zero_extendqisi2
cmp r3, #34
ldreqsb r3, [r7, #0]
- beq .L186
+ beq .L181
cmp r3, #35
addne r3, sl, #2912
addne r3, r3, #12
ldreqsb r3, [r6, #0]
ldrnesb r3, [r3, #0]
-.L186:
+.L181:
add r5, r5, #1
add r7, r7, #1
add r6, r6, #1
str r3, [r4, #0]
-.L181:
+.L176:
ldrb r3, [r8, #3764] @ zero_extendqisi2
cmp r5, r3
- bcc .L185
+ bcc .L180
ldmfd sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L188:
+.L183:
.align 2
-.L187:
+.L182:
.word .LANCHOR1+2784
.word .LANCHOR0
.fnend
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r2, #112
- ldr r3, .L190
+ ldr r3, .L185
add r3, r3, r0, asl #3
mov r0, #80
ldrb r5, [r3, #20] @ zero_extendqisi2
bl NandcDelayns
ldr r0, [r4, r5, asl #8]
ldmfd sp!, {r3, r4, r5, pc}
-.L191:
+.L186:
.align 2
-.L190:
+.L185:
.word .LANCHOR0
.fnend
.size FlashReadStatus, .-FlashReadStatus
.fnstart
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L197
+ ldr r3, .L192
stmfd sp!, {r0, r1, r2, r4, r5, lr}
.save {r0, r1, r2, r4, r5, lr}
add r3, r3, r0, asl #3
- ldr r4, .L197+4
+ ldr r4, .L192+4
ldr r5, [r3, #16]
-.L194:
+.L189:
mov r0, #100
bl NandcDelayns
ldr r3, [r5, #0]
str r3, [sp, #4]
ldr r3, [sp, #4]
tst r3, #512
- bne .L195
+ bne .L190
subs r4, r4, #1
- bne .L194
+ bne .L189
mvn r0, #0
- b .L193
-.L195:
+ b .L188
+.L190:
mov r0, #0
-.L193:
+.L188:
ldmfd sp!, {r1, r2, r3, r4, r5, pc}
-.L198:
+.L193:
.align 2
-.L197:
+.L192:
.word .LANCHOR0
.word 100000
.fnend
mov r8, r1
mov r4, r0
mov r7, r6
- ldr r5, .L207
- b .L200
-.L206:
+ ldr r5, .L202
+ b .L195
+.L201:
add r3, r6, r8
add r2, sp, #8
mov r0, r4
cmp r3, r2
mvncs r3, #0
strcs r3, [r4, #0]
- bcs .L202
+ bcs .L197
add r2, r5, r3
add r3, r5, r3, asl #4
ldrb sl, [r2, #3768] @ zero_extendqisi2
strne r3, [r4, #0]
ldr r3, [r4, #0]
cmn r3, #1
- bne .L205
- ldr r0, .L207+4
+ bne .L200
+ ldr r0, .L202+4
ldr r1, [sp, #8]
bl printk
-.L205:
+.L200:
mov r0, sl
bl NandcFlashDeCs
-.L202:
+.L197:
sub r6, r6, #1
add r7, r7, #1
add r4, r4, #36
uxtb r6, r6
-.L200:
+.L195:
cmp r7, r8
- bne .L206
+ bne .L201
mov r0, #0
add sp, sp, #20
ldmfd sp!, {r4, r5, r6, r7, r8, sl, pc}
-.L208:
+.L203:
.align 2
-.L207:
+.L202:
.word .LANCHOR0
- .word .LC2
+ .word .LC1
.fnend
.size FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
.align 2
mov r0, #200
mov r5, r1
bl NandcDelayns
- ldr r1, .L215
+ ldr r1, .L210
add r3, r5, r5, asl #2
mvn r6, #4
add r0, r1, r3
add r1, r1, #45
add r1, r1, r3
mov r2, #0
- ldr ip, .L215+4
+ ldr ip, .L210+4
mul r5, r6, r5
- b .L210
-.L213:
+ b .L205
+.L208:
ldrb r6, [ip, #3765] @ zero_extendqisi2
add r2, r2, #1
cmp r6, #67
add r1, r1, #1
ldrsb r6, [r6, #5]
str r6, [r4, #0]
-.L210:
+.L205:
ldrb r6, [ip, #3764] @ zero_extendqisi2
cmp r2, r6
- bcc .L213
+ bcc .L208
mov r0, #0
ldmfd sp!, {r4, r5, r6, lr}
b NandcWaitFlashReady
-.L216:
+.L211:
.align 2
-.L215:
+.L210:
.word .LANCHOR1+2784
.word .LANCHOR0
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L218
+ ldr r3, .L213
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
add r3, r3, r0, asl #3
ldr r0, [r5, r6, asl #8]
and r0, r0, #1
ldmfd sp!, {r4, r5, r6, pc}
-.L219:
+.L214:
.align 2
-.L218:
+.L213:
.word .LANCHOR0
.fnend
.size SandiskProgTestBadBlock, .-SandiskProgTestBadBlock
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L221
+ ldr r3, .L216
mov ip, #0
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
mov r6, r2
ldrb r2, [r3, #2697] @ zero_extendqisi2
- ldr r3, .L221+4
+ ldr r3, .L216+4
add r3, r3, r0, asl #3
mov r2, r2, asl #9
ldrb r5, [r3, #20] @ zero_extendqisi2
ldr r3, [r4, r5, asl #8]
strb r3, [r6, #0]
ldmfd sp!, {r4, r5, r6, pc}
-.L222:
+.L217:
.align 2
-.L221:
+.L216:
.word .LANCHOR1
.word .LANCHOR0
.fnend
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r4, r0
- ldr r3, .L225
+ ldr r3, .L220
add r3, r3, r0, asl #3
ldrb r5, [r3, #20] @ zero_extendqisi2
ldr r2, [r3, #16]
mov r0, r4
ldmfd sp!, {r3, r4, r5, lr}
b NandcFlashDeCs
-.L226:
+.L221:
.align 2
-.L225:
+.L220:
.word .LANCHOR0
.fnend
.size FlashReset, .-FlashReset
mov r5, r1
mov r4, r0
bl FlashReset
- ldr r3, .L229
+ ldr r3, .L224
mov r0, r4
add r3, r3, r4, asl #3
ldrb r7, [r3, #20] @ zero_extendqisi2
sub r3, r2, #1
uxtb r3, r3
cmp r3, #253
- bhi .L227
+ bhi .L222
ldrb r1, [r5, #2] @ zero_extendqisi2
ldrb r3, [r5, #1] @ zero_extendqisi2
- ldr r0, .L229+4
+ ldr r0, .L224+4
str r1, [sp, #0]
ldrb r1, [r5, #3] @ zero_extendqisi2
str r1, [sp, #4]
str r1, [sp, #12]
add r1, r4, #1
bl printk
-.L227:
+.L222:
ldmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, pc}
-.L230:
+.L225:
.align 2
-.L229:
+.L224:
.word .LANCHOR0
- .word .LC3
+ .word .LC2
.fnend
.size FlashReadIDRaw, .-FlashReadIDRaw
.align 2
stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r4, #0
- ldr r9, .L245
+ ldr r9, .L240
mov r7, #239
- ldr sl, .L245+4
+ ldr sl, .L240+4
mov r1, r4
sub r8, r9, #16
mov r6, #128
mov r5, #1
-.L241:
+.L236:
mov r2, r9
ldrb lr, [r4, sl] @ zero_extendqisi2
ldr r3, [r2, r4]!
ldrb r2, [r2, #4] @ zero_extendqisi2
add r2, r2, #8
add ip, r3, r2, asl #8
- beq .L232
+ beq .L227
cmp lr, #173
cmpne lr, #44
- bne .L233
-.L232:
+ bne .L228
+.L227:
cmp r0, #1
ldrb fp, [r8, #3776] @ zero_extendqisi2
- bne .L234
+ bne .L229
tst fp, #1
- beq .L233
+ beq .L228
cmp lr, #173
str r7, [ip, #8]
streq r0, [ip, #4]
- beq .L244
+ beq .L239
cmp lr, #44
streq r0, [ip, #4]
strne r6, [ip, #4]
moveq ip, #5
strne r0, [r3, r2, asl #8]
- bne .L239
- b .L243
-.L234:
+ bne .L234
+ b .L238
+.L229:
tst fp, #4
- beq .L233
+ beq .L228
cmp lr, #173
str r7, [ip, #8]
streq r5, [ip, #4]
moveq ip, #32
- beq .L243
+ beq .L238
cmp lr, #44
strne r6, [ip, #4]
- bne .L244
+ bne .L239
str r5, [ip, #4]
mov ip, #35
-.L243:
+.L238:
str ip, [r3, r2, asl #8]
- b .L239
-.L244:
- str r1, [r3, r2, asl #8]
+ b .L234
.L239:
str r1, [r3, r2, asl #8]
+.L234:
+ str r1, [r3, r2, asl #8]
str r1, [r3, r2, asl #8]
str r1, [r3, r2, asl #8]
-.L233:
+.L228:
add r4, r4, #8
cmp r4, #32
- bne .L241
+ bne .L236
mov r0, #0
bl NandcWaitFlashReady
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L246:
+.L241:
.align 2
-.L245:
+.L240:
.word .LANCHOR0+16
.word .LANCHOR0+2132
.fnend
stmfd sp!, {r4, lr}
.save {r4, lr}
mov r0, #0
- ldr r4, .L249
+ ldr r4, .L244
bl NandcWaitFlashReady
bl FlashSetReadRetryDefault
ldrb r3, [r4, #3777] @ zero_extendqisi2
cmp r3, #0
- beq .L248
+ beq .L243
ldrb r3, [r4, #3776] @ zero_extendqisi2
tst r3, #1
- beq .L248
+ beq .L243
mov r0, #1
bl FlashSetInterfaceMode
mov r0, #1
bl NandcSetMode
mov r3, #0
strb r3, [r4, #3777]
-.L248:
+.L243:
ldr r3, [r4, #16]
mov r0, #0
str r0, [r3, #336]
ldmfd sp!, {r4, pc}
-.L250:
+.L245:
.align 2
-.L249:
+.L244:
.word .LANCHOR0
.fnend
.size FlashDeInit, .-FlashDeInit
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L255
+ ldr r3, .L250
stmfd sp!, {r4, r5, r6, r7, r8, lr}
.save {r4, r5, r6, r7, r8, lr}
mov r7, r2
ldrb r2, [r3, #56] @ zero_extendqisi2
add r6, r1, r6, asl #8
str r2, [r6, #8]
- bne .L252
+ bne .L247
mov r8, #0
uxtb r2, r5
str r8, [r6, #4]
str r8, [r6, #8]
str r8, [r6, #4]
str r8, [r6, #4]
- b .L254
-.L252:
+ b .L249
+.L247:
uxtb r2, r5
str r2, [r6, #4]
mov r2, r5, lsr #8
str r2, [r6, #4]
ldrb r3, [r3, #57] @ zero_extendqisi2
str r3, [r6, #8]
-.L254:
+.L249:
uxtb r3, r7
mov r0, r4
str r3, [r6, #4]
str r3, [r6, #8]
ldmfd sp!, {r4, r5, r6, r7, r8, lr}
b FlashSetRandomizer
-.L256:
+.L251:
.align 2
-.L255:
+.L250:
.word .LANCHOR0
.fnend
.size FlashReadDpCmd, .-FlashReadDpCmd
.fnstart
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L316
+ ldr r3, .L311
mvn r2, #83
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
strb r0, [r3, #2913]
strb r1, [r3, #2914]
strb r2, [r3, #2915]
- bne .L258
+ bne .L253
mvn r2, #88
strb r2, [r3, #2912]
- ldr r3, .L316+4
+ ldr r3, .L311+4
mvn r2, #8
strb r2, [r3, #2949]
- b .L297
-.L258:
+ b .L292
+.L253:
cmp r4, #3
- bne .L260
+ bne .L255
mvn r2, #79
strb r2, [r3, #2912]
mvn r2, #78
mvn r2, #73
strb r2, [r3, #2918]
mvn r2, #72
- b .L312
-.L260:
+ b .L307
+.L255:
cmp r4, #4
- bne .L261
+ bne .L256
mvn ip, #51
strb r0, [r3, #2917]
strb ip, [r3, #2912]
strb ip, [r3, #2915]
mvn ip, #50
strb ip, [r3, #2916]
-.L312:
+.L307:
mov r6, #8
strb r2, [r3, #2919]
mov r5, r6
- b .L259
-.L261:
+ b .L254
+.L256:
cmp r4, #5
- bne .L262
+ bne .L257
mov r2, #56
mov r6, #8
strb r2, [r3, #2912]
strb r2, [r3, #2914]
mov r2, #59
strb r2, [r3, #2915]
- b .L311
-.L262:
+ b .L306
+.L257:
cmp r4, #6
- bne .L297
+ bne .L292
mov r2, #14
mov r6, #12
strb r2, [r3, #2912]
strb r2, [r3, #2914]
mov r2, #17
strb r2, [r3, #2915]
- b .L311
-.L297:
+ b .L306
+.L292:
mov r6, #7
-.L311:
+.L306:
mov r5, #4
-.L259:
+.L254:
sub r3, r4, #1
cmp r3, #1
- bhi .L310
- b .L315
-.L269:
+ bhi .L305
+ b .L310
+.L264:
add r1, r2, r8
add r4, r2, #2928
- ldr fp, .L316+8
+ ldr fp, .L311+8
mov r7, #0
ldrb r1, [r1, #3768] @ zero_extendqisi2
mov r5, #55
ldr r1, [r2, #16]
add sl, sl, #8
add sl, r1, sl, asl #8
-.L265:
+.L260:
add r2, fp, r7
str r5, [sl, #8]
mov r0, #80
ldr r3, [sp, #8]
uxtb r2, r7
cmp r2, r6
- bcc .L265
+ bcc .L260
mov r2, #0
- b .L266
-.L267:
+ b .L261
+.L262:
ldrb r7, [r0, r1, asl #2] @ zero_extendqisi2
ldrb r5, [r4, r2] @ zero_extendqisi2
add r5, r7, r5
strb r5, [ip, r1, asl #3]
add r1, r1, #1
cmp r1, #7
- bne .L267
+ bne .L262
add r2, r2, #1
cmp r2, #4
- beq .L268
-.L266:
+ beq .L263
+.L261:
mov r1, #1
add ip, r4, r2
add r0, r2, r9
- b .L267
-.L268:
+ b .L262
+.L263:
add r8, r8, #1
mov r2, #0
strb r2, [r4, #16]
strb r2, [r4, #48]
strb r2, [r4, #41]
strb r2, [r4, #49]
- b .L263
-.L315:
- ldr r9, .L316+12
+ b .L258
+.L310:
+ ldr r9, .L311+12
mov r3, r6
mov r8, #0
mov r6, r5
-.L263:
- ldr r2, .L316
+.L258:
+ ldr r2, .L311
ldrb r1, [r2, #3766] @ zero_extendqisi2
cmp r1, r8
- bhi .L269
+ bhi .L264
mov r5, r6
mov r6, r3
- b .L270
-.L310:
+ b .L265
+.L305:
sub r3, r4, #3
cmp r3, #3
- bhi .L270
+ bhi .L265
mul r3, r6, r5
- ldr r8, .L316
+ ldr r8, .L311
str r6, [sp, #44]
mov r2, r3, asr #2
mov r3, r3, asl #4
str r2, [sp, #24]
mov r7, r3
str r3, [sp, #12]
- b .L271
-.L296:
+ b .L266
+.L291:
ldr ip, [sp, #12]
- ldr r1, .L316+16
+ ldr r1, .L311+16
add r3, r8, ip
ldrb r6, [r3, #3768] @ zero_extendqisi2
add r3, r8, r6, asl #3
moveq r3, #64
streq r3, [r9, fp, asl #8]
moveq r3, #204
- beq .L313
-.L272:
+ beq .L308
+.L267:
sub r3, r4, #5
cmp r3, #1
- ldrls r2, .L316+8
+ ldrls r2, .L311+8
ldrlsb r3, [r2, #4] @ zero_extendqisi2
strls r3, [sl, #4]
movls r3, #82
- bls .L314
-.L274:
+ bls .L309
+.L269:
mov r3, #174
str r3, [sl, #4]
mov r3, #176
str r7, [r9, fp, asl #8]
-.L313:
+.L308:
str r3, [sl, #4]
mov r3, #77
-.L314:
+.L309:
cmp r4, #6
str r3, [r9, fp, asl #8]
mov r0, r6
mov r3, #0
movls r2, #16
movhi r2, #2
-.L278:
+.L273:
add r3, r3, #1
ldr r1, [sl, #0]
uxtb r3, r3
cmp r3, r2
- bcc .L278
+ bcc .L273
ldr ip, [r8, #3780]
mov r3, #0
str ip, [sp, #32]
-.L279:
+.L274:
ldr r2, [sl, #0]
ldr lr, [sp, #32]
strb r2, [lr, r3]
add r3, r3, #1
ldr r2, [sp, #52]
cmp r3, r2
- blt .L279
+ blt .L274
ldr r3, [sp, #24]
mov ip, r3, asl #2
mov lr, r3, asl #3
- ldr r3, .L316
+ ldr r3, .L311
str ip, [sp, #40]
ldr r1, [r3, #3780]
mov r3, #8
add r1, r1, ip
-.L281:
+.L276:
mov r2, #0
mov r0, r2
-.L280:
+.L275:
ldr ip, [r1, r2]
add r0, r0, #1
mvn ip, ip
ldr ip, [sp, #24]
add r2, r2, #4
cmp r0, ip
- blt .L280
+ blt .L275
subs r3, r3, #1
add r1, r1, lr
- bne .L281
+ bne .L276
str r3, [sp, #20]
str r5, [sp, #60]
- b .L282
-.L286:
+ b .L277
+.L281:
mov lr, #1
mov r0, #0
mov ip, lr, asl r2
mov r5, #16
str r3, [sp, #0]
str r5, [sp, #16]
-.L284:
+.L279:
ldr r3, [sp, #56]
ldr r3, [r3, r0]
and r5, ip, r3
subs r3, r3, #1
add r0, r0, r5
str r3, [sp, #16]
- bne .L284
+ bne .L279
cmp lr, #8
add r2, r2, #1
orrhi r1, r1, ip
cmp r2, #32
ldr r3, [sp, #0]
- bne .L286
+ bne .L281
ldr ip, [sp, #20]
ldr r2, [sp, #24]
add ip, ip, #1
str ip, [sp, #20]
str r1, [r5, r3]
add r3, r3, #4
- bge .L287
-.L282:
+ bge .L282
+.L277:
ldr r5, [r8, #3780]
mov r1, #0
mov r2, r1
add ip, r5, r3
str ip, [sp, #56]
str r5, [sp, #36]
- b .L286
-.L287:
+ b .L281
+.L282:
cmp r4, #6
ldr r5, [sp, #60]
ldr r1, [sp, #48]
ldr r0, [sp, #32]
addne r3, r3, #1
strne r3, [sp, #16]
- b .L291
-.L292:
+ b .L286
+.L287:
ldrb lr, [ip], #1 @ zero_extendqisi2
strb lr, [r1, r3]
add r3, r3, #1
uxtb lr, r3
cmp lr, r5
- bcc .L292
+ bcc .L287
ldr r3, [sp, #16]
add r2, r2, #1
ldr ip, [sp, #20]
ldr r3, [sp, #44]
add r1, r1, ip
cmp r2, r3
- bge .L293
-.L291:
+ bge .L288
+.L286:
mov ip, r0
mov r3, #0
- b .L292
-.L293:
+ b .L287
+.L288:
mov r3, #255
mov r0, r6
str r3, [sl, #8]
cmp ip, #1
movhi r3, #56
strhi r3, [sl, #8]
- bhi .L295
- ldr lr, .L316+8
+ bhi .L290
+ ldr lr, .L311+8
mov r3, #54
str r3, [sl, #8]
mvn r1, #0
str r7, [r9, fp, asl #8]
str r3, [sl, #8]
bl FlashReadCmd
-.L295:
+.L290:
mov r0, r6
bl NandcWaitFlashReady
ldr r2, [sp, #12]
add r3, r2, #1
uxtb r3, r3
str r3, [sp, #12]
-.L271:
+.L266:
ldrb r3, [r8, #3766] @ zero_extendqisi2
ldr ip, [sp, #12]
cmp r3, ip
- bhi .L296
+ bhi .L291
ldr r6, [sp, #44]
-.L270:
- ldr r3, .L316
+.L265:
+ ldr r3, .L311
strb r5, [r3, #2909]
strb r6, [r3, #2910]
add sp, sp, #68
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L317:
+.L312:
.align 2
-.L316:
+.L311:
.word .LANCHOR0
.word .LANCHOR1
.word .LANCHOR0+2908
ldmeqfd sp!, {r3, pc}
sub r2, r3, #1
cmp r2, #5
- bhi .L320
+ bhi .L315
ldmfd sp!, {r3, lr}
b HynixGetReadRetryDefault
-.L320:
+.L315:
cmp r3, #49
- bne .L321
- ldr r0, .L327
+ bne .L316
+ ldr r0, .L322
mov r2, #64
- ldr r1, .L327+4
+ ldr r1, .L322+4
strb r3, [r0, #2908]
mov r3, #4
strb r3, [r0, #2909]
mov r3, #15
strb r3, [r0, #2910]
add r0, r0, #2912
- b .L325
-.L321:
+ b .L320
+.L316:
cmp r3, #33
cmpne r3, #65
- beq .L322
+ beq .L317
cmp r3, #66
- bne .L323
-.L322:
- ldr r0, .L327
+ bne .L318
+.L317:
+ ldr r0, .L322
strb r3, [r0, #2908]
mov r3, #4
- b .L326
-.L323:
+ b .L321
+.L318:
cmp r3, #34
cmpne r3, #67
- bne .L324
- ldr r0, .L327
+ bne .L319
+ ldr r0, .L322
strb r3, [r0, #2908]
mov r3, #5
-.L326:
+.L321:
strb r3, [r0, #2909]
mov r2, #45
mov r3, #7
- ldr r1, .L327+8
+ ldr r1, .L322+8
strb r3, [r0, #2910]
add r0, r0, #2912
- b .L325
-.L324:
+ b .L320
+.L319:
cmp r3, #35
cmpne r3, #68
ldmnefd sp!, {r3, pc}
- ldr r0, .L327
+ ldr r0, .L322
mov r2, #95
- ldr r1, .L327+12
+ ldr r1, .L322+12
strb r3, [r0, #2908]
mov r3, #5
strb r3, [r0, #2909]
mov r3, #17
strb r3, [r0, #2910]
add r0, r0, #2912
-.L325:
+.L320:
bl memcpy
ldmfd sp!, {r3, pc}
-.L328:
+.L323:
.align 2
-.L327:
+.L322:
.word .LANCHOR0
.word .LANCHOR1+2720
.word .LANCHOR1+2784
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L330
+ ldr r3, .L325
add r3, r3, r0, asl #3
ldr r3, [r3, #16]
str r1, [r3, #336]
bx lr
-.L331:
+.L326:
.align 2
-.L330:
+.L325:
.word .LANCHOR0
.fnend
.size NandcRandmzSel, .-NandcRandmzSel
mov r4, r0
mov r0, #0
bl rknand_get_clk_rate
- ldr r1, .L342
+ ldr r1, .L337
bl __aeabi_idiv
- ldr r3, .L342+4
+ ldr r3, .L337+4
ldr r3, [r3, #2164]
cmp r0, #250
movwgt r2, #8354
- bgt .L340
+ bgt .L335
cmp r0, #220
- bgt .L341
-.L335:
+ bgt .L336
+.L330:
cmp r0, #185
movwgt r2, #4226
- bgt .L340
+ bgt .L335
cmp r0, #160
movwgt r2, #4194
- bgt .L340
+ bgt .L335
cmp r4, #35
movwls r2, #4193
- bls .L340
+ bls .L335
cmp r4, #99
movwls r2, #4225
- bls .L340
-.L341:
+ bls .L335
+.L336:
movw r2, #8322
-.L340:
+.L335:
str r2, [r3, #4]
ldmfd sp!, {r4, pc}
-.L343:
+.L338:
.align 2
-.L342:
+.L337:
.word 1000000
.word .LANCHOR0
.fnend
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r5, #0
- ldr r4, .L345
+ ldr r4, .L340
mov r3, #1
str r0, [r4, #2164]
str r0, [r4, #16]
movw r2, #8322
mov r0, #36864
str r2, [r3, #344]
- ldr r2, .L345+4
+ ldr r2, .L340+4
str r2, [r3, #304]
bl ftl_malloc
str r5, [r4, #3820]
add r0, r0, #32768
str r0, [r4, #3800]
ldmfd sp!, {r3, r4, r5, pc}
-.L346:
+.L341:
.align 2
-.L345:
+.L340:
.word .LANCHOR0
- .word 1579009
+ .word 1710593
.fnend
.size NandcInit, .-NandcInit
.align 2
sub r3, r3, #33
cmp r0, r2
cmpne r3, #1
- bls .L348
+ bls .L343
movw r3, #4226
movw r2, #8322
cmp r0, r3
cmpne r0, r2
- bne .L349
-.L348:
- ldr r3, .L350
+ bne .L344
+.L343:
+ ldr r3, .L345
ldr r3, [r3, #2164]
str r0, [r3, #4]
-.L349:
- ldr r3, .L350+4
+.L344:
+ ldr r3, .L345+4
ldrb r0, [r3, #2709] @ zero_extendqisi2
b NandcTimeCfg
-.L351:
+.L346:
.align 2
-.L350:
+.L345:
.word .LANCHOR0
.word .LANCHOR1
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr ip, .L353
+ ldr ip, .L348
stmfd sp!, {r4, lr}
.save {r4, lr}
ldr r4, [ip, #2164]
orr r2, r2, r1, asl #16
str r2, [r3, #0]
ldmfd sp!, {r4, pc}
-.L354:
+.L349:
.align 2
-.L353:
+.L348:
.word .LANCHOR0
.fnend
.size NandcGetTimeCfg, .-NandcGetTimeCfg
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L360
+ ldr r3, .L355
mov r1, #1
ldr r2, [r3, #2164]
str r0, [r3, #3832]
cmp r0, r1
bfi r3, r1, #8, #8
bfc r3, #18, #1
- beq .L359
-.L356:
+ beq .L354
+.L351:
cmp r0, #24
orreq r3, r3, #16
- beq .L357
+ beq .L352
cmp r0, #40
orr r3, r3, #262144
orr r3, r3, #16
- bne .L357
-.L359:
+ bne .L352
+.L354:
bfc r3, #4, #1
-.L357:
+.L352:
orr r3, r3, #1
str r3, [r2, #12]
bx lr
-.L361:
+.L356:
.align 2
-.L360:
+.L355:
.word .LANCHOR0
.fnend
.size NandcBchSel, .-NandcBchSel
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L363
+ ldr r3, .L358
strb r0, [r3, #3836]
b NandcBchSel
-.L364:
+.L359:
.align 2
-.L363:
+.L358:
.word .LANCHOR0
.fnend
.size FlashBchSel, .-FlashBchSel
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r4, #0
- ldr r3, .L370
- ldr r5, .L370+4
+ ldr r3, .L365
+ ldr r5, .L365+4
ldr r2, [r3, #2164]
ldr r1, [r3, #2168]
str r1, [r2, #0]
ldr r3, [r3, #2196]
str r1, [r2, #336]
str r3, [r2, #344]
-.L367:
+.L362:
ldrb r3, [r5, r4, asl #3] @ zero_extendqisi2
sub r3, r3, #1
uxtb r3, r3
cmp r3, #253
- bhi .L366
+ bhi .L361
uxtb r0, r4
bl FlashReset
-.L366:
+.L361:
add r4, r4, #1
cmp r4, #4
- bne .L367
- ldr r4, .L370
+ bne .L362
+ ldr r4, .L365
ldrb r3, [r4, #3777] @ zero_extendqisi2
cmp r3, #0
- beq .L368
+ beq .L363
mov r0, #1
bl NandcSetMode
ldrb r0, [r4, #3776] @ zero_extendqisi2
bl NandcSetMode
ldrb r0, [r4, #2185] @ zero_extendqisi2
bl NandcSetDdrPara
-.L368:
- ldr r3, .L370
+.L363:
+ ldr r3, .L365
ldr r3, [r3, #2776]
ldrb r0, [r3, #20] @ zero_extendqisi2
bl FlashBchSel
mov r0, #0
ldmfd sp!, {r3, r4, r5, pc}
-.L371:
+.L366:
.align 2
-.L370:
+.L365:
.word .LANCHOR0
.word .LANCHOR0+2132
.fnend
and r3, r3, #2
uxtb r3, r3
cmp r3, #0
- bne .L377
+ bne .L372
ldmfd sp!, {r4, lr}
b wait_for_nand_flash_ready
-.L377:
+.L372:
mov r1, #1
ldmfd sp!, {r4, lr}
b NandCIrqDisable
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.pad #28
sub sp, sp, #28
- ldr r5, .L393
+ ldr r5, .L388
mov r6, r0
str r1, [sp, #12]
mov r7, r2
ldrb r4, [r5, #0] @ zero_extendqisi2
cmp r4, #0
moveq r9, r5
- beq .L379
+ beq .L374
mov r1, r2
bl FlashEraseSLc2KBlocks
- b .L380
-.L387:
+ b .L375
+.L382:
mov r8, #36
rsb r3, r4, r7
mul r8, r8, r4
cmp r0, r3
mvncs r3, #0
strcs r3, [r6, r8]
- bcs .L382
+ bcs .L377
ldrb r3, [r5, #3837] @ zero_extendqisi2
cmp r3, #0
add r3, r9, r0, asl #4
ldr r3, [r3, #2788]
moveq sl, #0
cmp r3, #0
- beq .L384
+ beq .L379
uxtb r0, r0
bl FlashWaitCmdDone
-.L384:
+.L379:
ldr r2, [sp, #20]
mov r1, #0
cmp sl, #0
bl NandcFlashCs
ldr r3, [sp, #12]
cmp r3, #1
- bne .L386
+ bne .L381
ldrb r3, [r5, #80] @ zero_extendqisi2
cmp r3, #0
- beq .L386
+ beq .L381
mov r0, r8
bl flash_enter_slc_mode
-.L386:
+.L381:
ldr r3, [sp, #20]
mov r0, r8
ldr r1, [sp, #16]
bl FlashEraseCmd
mov r0, r8
bl NandcFlashDeCs
-.L382:
+.L377:
add r4, r4, #1
-.L379:
+.L374:
cmp r4, r7
- bcc .L387
- ldr r5, .L393
+ bcc .L382
+ ldr r5, .L388
mov r4, #0
- ldr r6, .L393+4
+ ldr r6, .L388+4
ldr r0, [r5, #2164]
bl NandcIqrWaitFlashReady
- b .L388
-.L390:
+ b .L383
+.L385:
uxtb r0, r4
bl FlashWaitCmdDone
ldr r3, [sp, #12]
cmp r3, #1
- bne .L389
+ bne .L384
ldrb r3, [r5, #80] @ zero_extendqisi2
cmp r3, #0
- beq .L389
+ beq .L384
ldrb r0, [r6, r4, asl #4] @ zero_extendqisi2
bl flash_exit_slc_mode
-.L389:
+.L384:
add r4, r4, #1
-.L388:
+.L383:
ldrb r3, [r5, #3766] @ zero_extendqisi2
cmp r4, r3
- bcc .L390
+ bcc .L385
mov r0, #0
-.L380:
+.L375:
add sp, sp, #28
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L394:
+.L389:
.align 2
-.L393:
+.L388:
.word .LANCHOR0
.word .LANCHOR0+2780
.fnend
ldr r2, [r0, #16]
.pad #8
sub sp, sp, #8
- ldr r3, .L397
+ ldr r3, .L392
str r2, [sp, #4]
ldr r2, [sp, #4]
bfc r2, #2, #1
str r3, [r0, #8]
add sp, sp, #8
bx lr
-.L398:
+.L393:
.align 2
-.L397:
+.L392:
.word 538969130
.fnend
.size NandcSendDumpDataStart, .-NandcSendDumpDataStart
@ link register save eliminated.
.pad #8
sub sp, sp, #8
-.L400:
+.L395:
ldr r3, [r0, #8]
str r3, [sp, #4]
ldr r3, [sp, #4]
tst r3, #1048576
- beq .L400
+ beq .L395
add sp, sp, #8
bx lr
.fnend
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r8, r2
- ldr r2, .L415
+ ldr r2, .L410
mov ip, #16
mov r6, r1
mov r4, #0
bfi r4, r3, #4, #1
ldr r3, [r2, #12]
cmp r3, #3
- bls .L403
+ bls .L398
ldr r3, [r5, #16]
cmp r9, #0
cmpeq r1, #0
ldr r3, [sp, #12]
bfc r3, #2, #1
str r3, [sp, #12]
- beq .L404
+ beq .L399
cmp r6, #0
- beq .L405
+ beq .L400
ldr r3, [r2, #3832]
mov ip, r1
cmp r3, #24
str r3, [sp, #4]
mov r3, #0
mov r0, r3
- b .L407
-.L410:
+ b .L402
+.L405:
cmp r1, #0
mov lr, r3, lsr #2
add r0, r0, #1
strne sl, [fp, lr, asl #2]
ldr lr, [sp, #0]
add r3, r3, lr
-.L407:
+.L402:
ldr sl, [sp, #4]
cmp r0, sl
- bcc .L410
-.L405:
+ bcc .L405
+.L400:
mov r0, r5
add r8, r8, #1
bl rk_nandc_xfer_irq_flag_init
mov r8, r8, asr #1
bl NandCIrqEnable
bfi r4, r8, #22, #6
- ldr r8, .L415
+ ldr r8, .L410
cmp r9, #0
ubfx sl, r4, #22, #5
mov r2, r6
ldr r3, [sp, #12]
orr r3, r3, #1
str r3, [sp, #12]
-.L404:
+.L399:
ldr r3, [sp, #12]
str r3, [r5, #16]
-.L403:
+.L398:
str r7, [r5, #12]
str r4, [r5, #8]
orr r4, r4, #4
str r4, [r5, #8]
add sp, sp, #20
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L416:
+.L411:
.align 2
-.L415:
+.L410:
.word .LANCHOR0
.fnend
.size NandcXferStart, .-NandcXferStart
mov r4, r0
ldr r6, [sp, #16]
add r2, r2, r5, asl #9
- bne .L418
+ bne .L413
cmp r3, #0
- beq .L419
+ beq .L414
mov r0, r2
mov r1, r3
mov r2, #1024
bl memcpy
-.L419:
+.L414:
cmp r6, #0
ldmeqfd sp!, {r4, r5, r6, pc}
ldrb r3, [r6, #2] @ zero_extendqisi2
add r5, r5, #128
str r3, [r4, r5, asl #2]
ldmfd sp!, {r4, r5, r6, pc}
-.L418:
+.L413:
cmp r3, #0
- beq .L421
+ beq .L416
mov r1, r2
mov r0, r3
mov r2, #1024
bl memcpy
-.L421:
+.L416:
cmp r6, #0
ldmeqfd sp!, {r4, r5, r6, pc}
mov r5, r5, lsr #1
@ link register save eliminated.
mov r2, #1
mov r3, #0
- b .L423
-.L424:
+ b .L418
+.L419:
add r3, r3, #1
mov r2, r2, asl #1
uxth r3, r3
-.L423:
+.L418:
cmp r2, r0
- bls .L424
+ bls .L419
sub r3, r3, #1
uxth r0, r3
bx lr
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L429
+ ldr r3, .L424
movw r2, #3844
cmp r0, #23
movw r1, #3854
rsb r2, r2, r1
str r2, [r3, #3856]
bx lr
-.L430:
+.L425:
.align 2
-.L429:
+.L424:
.word .LANCHOR0
.fnend
.size FtlSysBlkNumInit, .-FtlSysBlkNumInit
.type FtlConstantsInit, %function
FtlConstantsInit:
.fnstart
- @ args = 0, pretend = 0, frame = 8
+ @ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- .save {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ .save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
movw r2, #3864
- ldr r3, .L444
+ ldr r3, .L440
mov r4, r0
ldrh lr, [r0, #8]
+ .pad #20
+ sub sp, sp, #20
ldrh r1, [r0, #10]
ldrh r0, [r0, #12]
strh lr, [r3, r2] @ movhi
movw r2, #3854
strh r6, [r3, r2] @ movhi
mov r3, #0
- ldr r2, .L444+4
-.L432:
+ ldr r2, .L440+4
+.L427:
strb r3, [r3, r2]
add r3, r3, #1
cmp r3, #32
- bne .L432
+ bne .L427
ldrh r2, [r4, #14]
ldrh r3, [r4, #20]
cmp r3, r2, lsr #8
- bcs .L433
- ldr r2, .L444+4
+ bcs .L428
+ ldr r2, .L440+4
sub ip, r1, #1
uxtb r7, r0
mov r3, #0
rsb sl, r0, r2
- str sl, [sp, #0]
+ str sl, [sp, #8]
mla ip, r0, ip, r2
mov r8, r7, asl #1
uxtb r8, r8
- str ip, [sp, #4]
- b .L434
-.L435:
+ str ip, [sp, #12]
+ b .L429
+.L430:
strb ip, [r9, r2]
add fp, ip, r7
add ip, ip, r8
add r5, r5, #1
strb fp, [sl, r2]
uxtb ip, ip
-.L437:
+.L432:
cmp r5, r1
add r2, r2, r0
- bcc .L435
+ bcc .L430
add r3, r3, #1
-.L434:
+.L429:
cmp r3, r0
- bcs .L436
- ldr fp, [sp, #0]
+ bcs .L431
+ ldr fp, [sp, #8]
mov r2, #0
uxtb ip, r3
mov r5, r2
add r9, fp, r3
- ldr fp, [sp, #4]
+ ldr fp, [sp, #12]
add sl, fp, r3
- b .L437
-.L436:
- ldr r3, .L444
+ b .L432
+.L431:
+ ldr r3, .L440
movw r2, #3866
mov r1, r1, asl #1
mov r6, r6, lsr #1
strh r1, [r3, r2] @ movhi
movw r2, #3854
strh r6, [r3, r2] @ movhi
-.L433:
- ldr r3, .L444
+.L428:
+ ldr r3, .L440
movw r2, #3902
cmp lr, #1
mov r1, #5
mov ip, #0
- ldr r8, .L444
+ ldr sl, .L440
+ ldrb r8, [r3, #0] @ zero_extendqisi2
strh r1, [r3, r2] @ movhi
mov r1, #3904
streqh lr, [r3, r2] @ movhi
+ cmp r8, #0
movw r2, #3906
strh ip, [r3, r1] @ movhi
mov r1, #4352
strh r1, [r3, r2] @ movhi
- ldrb r3, [r3, #0] @ zero_extendqisi2
- cmp r3, #0
- ldrne r3, .L444
+ ldrne r3, .L440
movne r1, #384
strneh r1, [r3, r2] @ movhi
movw r3, #3866
- ldrh r5, [r8, r3]
+ ldrh r5, [sl, r3]
movw r3, #3844
mul r5, r5, r0
uxth r5, r5
- strh r5, [r8, r3] @ movhi
+ strh r5, [sl, r3] @ movhi
add r3, r3, #10
- ldrh r6, [r8, r3]
+ ldrh r6, [sl, r3]
add r3, r3, #54
mul r0, r0, r6
uxth r0, r0
- strh r0, [r8, r3] @ movhi
+ strh r0, [sl, r3] @ movhi
bl Ftl_log2
- ldrh r9, [r4, #16]
movw r3, #3910
ldrh fp, [r4, #18]
- ldrh sl, [r4, #20]
- mul r2, r9, r5
- strh r0, [r8, r3] @ movhi
- add r3, r3, #2
- mov r0, sl
- strh r9, [r8, r3] @ movhi
- add r3, r3, #2
- strh fp, [r8, r3] @ movhi
- add r3, r3, #2
- strh r2, [r8, r3] @ movhi
- add r3, r3, #2
- strh sl, [r8, r3] @ movhi
+ movw r2, #3912
+ ldrh r9, [r4, #20]
+ strh r0, [sl, r3] @ movhi
+ mov r0, r9
+ ldrh r3, [r4, #16]
+ mul r1, r3, r5
+ strh r3, [sl, r2] @ movhi
+ add r2, r2, #2
+ strh fp, [sl, r2] @ movhi
+ add r2, r2, #2
+ strh r1, [sl, r2] @ movhi
+ add r2, r2, #2
+ strh r9, [sl, r2] @ movhi
+ str r3, [sp, #4]
bl Ftl_log2
- mov r3, #3920
- movw r2, #3922
+ mov r2, #3920
+ movw r1, #3922
cmp r6, #1024
- mul r1, fp, sl
- strh r0, [r8, r3] @ movhi
- mov r3, sl, asl #9
+ strh r0, [sl, r2] @ movhi
+ mov r2, r9, asl #9
mov r7, r0
- uxth r3, r3
- strh r3, [r8, r2] @ movhi
- add r2, r2, #2
- mov r3, r3, lsr #8
- strh r3, [r8, r2] @ movhi
- movw r3, #3926
- ldrh r2, [r4, #26]
- mov r4, r8
- strh r2, [r8, r3] @ movhi
- uxtbhi r2, r6
- mul r3, r6, r5
- str r3, [r8, #3860]
- movhi r3, #3904
- strhih r2, [r8, r3] @ movhi
- mov r3, #3904
- ldrh r3, [r8, r3]
- rsb r3, r3, r6
+ uxth r2, r2
+ strh r2, [sl, r1] @ movhi
+ add r1, r1, #2
+ mov r2, r2, lsr #8
+ strh r2, [sl, r1] @ movhi
+ movw r2, #3926
+ ldrh r1, [r4, #26]
+ mov r4, sl
+ strh r1, [sl, r2] @ movhi
+ uxtbhi r1, r6
+ mul r2, r6, r5
+ str r2, [sl, #3860]
+ movhi r2, #3904
+ ldr r3, [sp, #4]
+ strhih r1, [sl, r2] @ movhi
+ mov r2, #3904
+ ldrh r2, [sl, r2]
+ mul r1, fp, r9
+ rsb r2, r2, r6
mov r6, r6, asl #6
- mul r3, r3, r5
- mul r3, sl, r3
- mul r9, r9, r3
- movw r3, #3906
- mov r9, r9, asr #11
- str r9, [r8, #3928]
- ldrh r8, [r8, r3]
- mov r0, r8, asl #3
- mov r8, r8, asr r7
+ mul r2, r2, r5
+ mul r2, r9, r2
+ mul r3, r3, r2
+ mov r3, r3, asr #11
+ str r3, [sl, #3928]
+ movw sl, #3906
+ ldrh r0, [r4, sl]
+ mov r0, r0, asl #3
bl __aeabi_idiv
- add r7, r7, #9
movw r3, #3932
- mov r6, r6, asr r7
- add r8, r8, #2
- uxth r6, r6
uxth r0, r0
strh r0, [r4, r3] @ movhi
cmp r0, #4
- ldr r4, .L444
- ldrls r2, .L444
+ ldr r4, .L440
+ ldrls r2, .L440
movls r1, #4
strlsh r1, [r2, r3] @ movhi
+ cmp r8, #0
+ mov r1, r5
+ movne r3, #640
+ strneh r3, [r4, sl] @ movhi
+ ldrh r2, [r4, sl]
movw r3, #3934
- strh r8, [r4, r3] @ movhi
+ mov r2, r2, asr r7
+ add r7, r7, #9
+ mov r6, r6, asr r7
+ add r2, r2, #2
+ strh r2, [r4, r3] @ movhi
mov r3, #3936
+ uxth r6, r6
strh r6, [r4, r3] @ movhi
- mov r1, r5
mul r3, r5, r6
add r6, r6, #8
str r3, [r4, #3940]
ldrh r0, [r4, r3]
bl __aeabi_uidiv
cmp r5, #1
+ ldreq r3, .L440
uxtah r6, r6, r0
str r6, [r4, #3840]
+ ldr r4, .L440
addeq r6, r6, #4
- streq r6, [r4, #3840]
+ streq r6, [r3, #3840]
ldr r0, [r4, #3840]
uxth r0, r0
bl FtlSysBlkNumInit
strh r0, [r4, r3] @ movhi
mov r0, #0
str r0, [r4, #3952]
- ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L445:
+ add sp, sp, #20
+ ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+.L441:
.align 2
-.L444:
+.L440:
.word .LANCHOR0
.word .LANCHOR0+3870
.fnend
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L453
+ ldr r3, .L449
movw r2, #3956
ldrh r2, [r3, r2]
cmp r2, #0
- beq .L451
+ beq .L447
movw r2, #3932
ldrh r1, [r3, r2]
ldr r2, [r3, #3960]
mov r3, #0
- b .L448
-.L450:
+ b .L444
+.L446:
ldrh ip, [r2], #2
cmp ip, r0
- beq .L452
+ beq .L448
add r3, r3, #1
uxth r3, r3
-.L448:
+.L444:
cmp r3, r1
- bne .L450
+ bne .L446
mov r0, #0
bx lr
-.L452:
+.L448:
mov r0, #1
bx lr
-.L451:
+.L447:
mov r0, r2
bx lr
-.L454:
+.L450:
.align 2
-.L453:
+.L449:
.word .LANCHOR0
.fnend
.size IsBlkInVendorPart, .-IsBlkInVendorPart
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L463
+ ldr r2, .L459
stmfd sp!, {r4, lr}
.save {r4, lr}
ldr r3, [r2, #3964]
cmp r3, #0
- beq .L460
+ beq .L456
ldr ip, [r2, #3968]
mov r2, #0
-.L459:
+.L455:
ldr r4, [ip, #16]
cmp r4, r0
- bcc .L457
+ bcc .L453
cmp r4, r1
- bls .L461
-.L457:
+ bls .L457
+.L453:
add r2, r2, #1
add ip, ip, #36
cmp r2, r3
- bne .L459
+ bne .L455
mov r0, #0
ldmfd sp!, {r4, pc}
-.L461:
+.L457:
mov r0, #1
ldmfd sp!, {r4, pc}
-.L460:
+.L456:
mov r0, r3
ldmfd sp!, {r4, pc}
-.L464:
+.L460:
.align 2
-.L463:
+.L459:
.word .LANCHOR0
.fnend
.size FtlCacheMetchLpa, .-FtlCacheMetchLpa
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L466
+ ldr r3, .L462
ldr r0, [r3, #3952]
bx lr
-.L467:
+.L463:
.align 2
-.L466:
+.L462:
.word .LANCHOR0
.fnend
.size FtlGetCap, .-FtlGetCap
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L469
+ ldr r3, .L465
ldr r0, [r3, #3952]
bx lr
-.L470:
+.L466:
.align 2
-.L469:
+.L465:
.word .LANCHOR0
.fnend
.size FtlGetCapacity, .-FtlGetCapacity
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L472
+ ldr r3, .L468
ldr r0, [r3, #3972]
bx lr
-.L473:
+.L469:
.align 2
-.L472:
+.L468:
.word .LANCHOR0
.fnend
.size FtlGetLpn, .-FtlGetLpn
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L475
+ ldr r3, .L471
movw r2, #3844
ldrh r2, [r3, r2]
ldr r0, [r3, #3976]
mul r0, r0, r2
bx lr
-.L476:
+.L472:
.align 2
-.L475:
+.L471:
.word .LANCHOR0
.fnend
.size FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L478
+ ldr r3, .L474
movw r1, #3844
movw r2, #3854
ldrh r2, [r3, r2]
ldrh r0, [r3, r1]
mul r0, r0, r2
bx lr
-.L479:
+.L475:
.align 2
-.L478:
+.L474:
.word .LANCHOR0
.fnend
.size FtlGetAllBlockNum, .-FtlGetAllBlockNum
stmfd sp!, {r0, r1, r4, r5, r6, lr}
.save {r0, r1, r4, r5, r6, lr}
movw r3, #3908
- ldr r4, .L481
+ ldr r4, .L477
mov r5, r0
ldrh r6, [r4, r3]
mov r1, r6
str r1, [r0, ip, asl #2]
str r1, [sp, #0]
mov r1, r5
- ldr r0, .L481+4
+ ldr r0, .L477+4
bl printk
movw r3, #3986
ldrh r2, [r4, r3]
add r2, r2, r6
strh r2, [r4, r3] @ movhi
ldmfd sp!, {r2, r3, r4, r5, r6, pc}
-.L482:
+.L478:
.align 2
-.L481:
+.L477:
.word .LANCHOR0
- .word .LC4
+ .word .LC3
.fnend
.size FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
.global __aeabi_uidivmod
stmfd sp!, {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
movw r3, #3908
- ldr r5, .L484
+ ldr r5, .L480
mov r7, r0
ldrh r6, [r5, r3]
mov r1, r6
mov r0, r0, lsr r4
and r0, r0, #1
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L485:
+.L481:
.align 2
-.L484:
+.L480:
.word .LANCHOR0
.fnend
.size FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
.save {r4, r5, r6, r7, r8, lr}
mov r4, #0
mov r5, r4
- ldr r6, .L491
+ ldr r6, .L487
movw r8, #3908
movw r7, #3866
- b .L488
-.L490:
+ b .L484
+.L486:
mov r0, r5
add r5, r5, #1
bl FtlBbmIsBadBlock
cmp r0, #0
addne r4, r4, #1
uxthne r4, r4
-.L488:
+.L484:
ldrh r3, [r6, r8]
ldrh r2, [r6, r7]
mul r3, r2, r3
cmp r5, r3
- blt .L490
+ blt .L486
mov r0, r4
ldmfd sp!, {r4, r5, r6, r7, r8, pc}
-.L492:
+.L488:
.align 2
-.L491:
+.L487:
.word .LANCHOR0
.fnend
.size FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
stmfd sp!, {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
movw r3, #3868
- ldr r5, .L494
+ ldr r5, .L490
mov r7, r1
mov r6, r0
ldrh r4, [r5, r3]
add r1, r5, r1
uxth r0, r1
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L495:
+.L491:
.align 2
-.L494:
+.L490:
.word .LANCHOR0
.fnend
.size V2P_block, .-V2P_block
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L497
+ ldr r3, .L493
movw r2, #3868
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
add r1, r5, r1
uxth r0, r1
ldmfd sp!, {r4, r5, r6, pc}
-.L498:
+.L494:
.align 2
-.L497:
+.L493:
.word .LANCHOR0
.fnend
.size P2V_plane, .-P2V_plane
stmfd sp!, {r4, lr}
.save {r4, lr}
movw r3, #3908
- ldr r4, .L500
+ ldr r4, .L496
ldrh r1, [r4, r3]
bl __aeabi_uidivmod
movw r3, #3868
bl __aeabi_uidiv
uxth r0, r0
ldmfd sp!, {r4, pc}
-.L501:
+.L497:
.align 2
-.L500:
+.L496:
.word .LANCHOR0
.fnend
.size P2V_block_in_plane, .-P2V_block_in_plane
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, r1
- bls .L503
+ bls .L499
rsb r0, r1, r0
cmp r0, #-2147483648
movhi r0, #0
movls r0, #1
bx lr
-.L503:
+.L499:
rsb r0, r0, r1
cmp r0, #-2147483648
movls r0, #0
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r2, .L506
+ ldr r2, .L502
movw r3, #4046
ldrh r0, [r2, r3]
rsbs r0, r0, #1
movcc r0, #0
bx lr
-.L507:
+.L503:
.align 2
-.L506:
+.L502:
.word .LANCHOR0
.fnend
.size FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r2, .L509
+ ldr r2, .L505
movw r3, #4046
ldrh r0, [r2, r3]
sub r2, r0, #1024
rsbs r0, r2, #0
adc r0, r0, r2
bx lr
-.L510:
+.L506:
.align 2
-.L509:
+.L505:
.word .LANCHOR0
.fnend
.size FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L514
+ ldr r2, .L510
movw r3, #4046
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
cmp r3, #1024
ldmeqfd sp!, {r4, r5, r6, pc}
cmp r1, #0
- beq .L513
+ beq .L509
bl P2V_block_in_plane
- ldr r4, .L514+4
+ ldr r4, .L510+4
mov r1, #1
mov r3, r5, asl #10
mov r2, r1
ldr r3, [r4, #-2080]
add r3, r3, #1
str r3, [r4, #-2080]
-.L513:
- ldr r3, .L514
+.L509:
+ ldr r3, .L510
movw r2, #4046
movw r0, #4040
ldrh r1, [r3, r2]
strh r5, [ip, r0] @ movhi
strh r1, [r3, r2] @ movhi
ldmfd sp!, {r4, r5, r6, pc}
-.L515:
+.L511:
.align 2
-.L514:
+.L510:
.word .LANCHOR0
.word .LANCHOR2
.fnend
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
.save {r4, r5, r6, r7, r8, r9, sl, lr}
mov r4, #0
- ldr r5, .L526
+ ldr r5, .L522
movw r8, #4046
movw r7, #4042
- ldr r6, .L526+4
- b .L517
-.L518:
+ ldr r6, .L522+4
+ b .L513
+.L514:
ldrh r3, [r5, r7]
add r3, r4, r3
add r3, r5, r3, asl #1
str r2, [r3, r4, asl #2]
add r4, r4, #1
uxth r4, r4
-.L517:
+.L513:
ldrh r3, [r5, r8]
cmp r3, r4
- bhi .L518
+ bhi .L514
mov r3, #0
- ldr ip, .L526
+ ldr ip, .L522
movw r8, #4046
- ldr r4, .L526+4
+ ldr r4, .L522+4
movw r7, #4042
- b .L519
-.L524:
+ b .L515
+.L520:
add r6, r3, #1
ldr r1, [r4, #-2076]
mov r2, r3
uxth r6, r6
mov r0, r6
- b .L520
-.L522:
+ b .L516
+.L518:
ldr r9, [r1, r2, asl #2]
ldr sl, [r1, r0, asl #2]
cmp r9, sl
movhi r2, r0
add r0, r0, #1
uxth r0, r0
-.L520:
+.L516:
cmp r0, r5
- bcc .L522
+ bcc .L518
cmp r3, r2
- beq .L523
+ beq .L519
ldr r5, [r1, r3, asl #2]
ldr r0, [r1, r2, asl #2]
str r5, [r1, r2, asl #2]
ldrh r1, [r3, #0]
strh r1, [r2, #0] @ movhi
strh r0, [r3, #0] @ movhi
-.L523:
- mov r3, r6
.L519:
+ mov r3, r6
+.L515:
ldrh r5, [ip, r8]
sub r2, r5, #1
cmp r3, r2
- blt .L524
+ blt .L520
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L527:
+.L523:
.align 2
-.L526:
+.L522:
.word .LANCHOR0
.word .LANCHOR2
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L534
+ ldr r2, .L530
movw r3, #4046
stmfd sp!, {r4, lr}
.save {r4, lr}
ldrh r1, [r2, r3]
cmp r1, #1024
- beq .L532
+ beq .L528
movw r3, #4042
ldrh ip, [r2, r3]
mov r3, #0
- b .L530
-.L531:
+ b .L526
+.L527:
add r4, r3, ip
mov r4, r4, asl #22
add r4, r2, r4, lsr #21
add r4, r4, #4048
ldrh r4, [r4, #0]
cmp r4, r0
- beq .L533
+ beq .L529
add r3, r3, #1
-.L530:
+.L526:
cmp r3, r1
- bcc .L531
-.L532:
+ bcc .L527
+.L528:
mov r0, #0
ldmfd sp!, {r4, pc}
-.L533:
+.L529:
mov r0, #1
ldmfd sp!, {r4, pc}
-.L535:
+.L531:
.align 2
-.L534:
+.L530:
.word .LANCHOR0
.fnend
.size IsInFreeQueue, .-IsInFreeQueue
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L539
+ ldr r3, .L535
stmfd sp!, {r4, r5, lr}
.save {r4, r5, lr}
movw r4, #4046
ldrh r2, [r3, r4]
cmp r2, #0
- beq .L538
+ beq .L534
movw r1, #4042
movw r0, #4040
ldrh ip, [r3, r1]
strh r2, [r3, r4] @ movhi
strh ip, [r3, r1] @ movhi
ldmfd sp!, {r4, r5, pc}
-.L538:
+.L534:
mov r0, r2
ldmfd sp!, {r4, r5, pc}
-.L540:
+.L536:
.align 2
-.L539:
+.L535:
.word .LANCHOR0
.fnend
.size FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
cmp r0, r3
stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- beq .L542
- ldr r1, .L556
+ beq .L538
+ ldr r1, .L552
mov ip, #6
mul ip, ip, r0
mvn r6, #0
strh r6, [r4, ip] @ movhi
ldr r3, [r1, #-2068]
cmp r3, #0
- beq .L555
-.L543:
+ beq .L551
+.L539:
ldr r7, [r1, #-2064]
mov sl, r0, asl #1
ldrh r1, [r2, #4]
- ldr r9, .L556+4
+ ldr r9, .L552+4
ldrh r5, [r7, sl]
cmp r1, #0
ldr fp, [r8, #-2084]
mov r1, r1, asr #1
mul r1, r9, r1
uxth r1, r1
-.L550:
+.L546:
mov r9, r1, asl #1
ldrh r8, [r3, #4]
ldrh sl, [r7, r9]
mvneq r8, #0
mulne r8, r8, sl
cmp r8, r6
- bne .L546
+ bne .L542
ldrh sl, [fp, r9]
ldr r9, [sp, #4]
ldrh r8, [r9, #0]
cmp sl, r8
- bcc .L548
- b .L547
-.L546:
- bhi .L547
-.L548:
+ bcc .L544
+ b .L543
+.L542:
+ bhi .L543
+.L544:
ldrh r8, [r3, #0]
movw sl, #65535
cmp r8, sl
streqh r1, [r2, #2] @ movhi
streqh r0, [r3, #0] @ movhi
- ldreq r3, .L556
+ ldreq r3, .L552
streq r2, [r3, #-2060]
- beq .L542
-.L549:
+ beq .L538
+.L545:
mov r1, #6
mla r3, r1, r8, r5
mov r1, r8
- b .L550
-.L547:
+ b .L546
+.L543:
strh r1, [r4, ip] @ movhi
ldrh r1, [r3, #2]
strh r1, [r2, #2] @ movhi
- ldr r1, .L556
+ ldr r1, .L552
ldr ip, [r1, #-2068]
cmp r3, ip
- bne .L551
+ bne .L547
strh r0, [r3, #2] @ movhi
-.L555:
- str r2, [r1, #-2068]
- b .L542
.L551:
+ str r2, [r1, #-2068]
+ b .L538
+.L547:
ldrh r2, [r3, #2]
mov ip, #6
ldr r1, [r1, #-2072]
mul r2, ip, r2
strh r0, [r1, r2] @ movhi
strh r0, [r3, #2] @ movhi
-.L542:
+.L538:
mov r0, #0
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L557:
+.L553:
.align 2
-.L556:
+.L552:
.word .LANCHOR2
.word -1431655765
.fnend
stmfd sp!, {r3, lr}
.save {r3, lr}
bl insert_data_list
- ldr r2, .L559
- ldr r3, .L559+4
+ ldr r2, .L555
+ ldr r3, .L555+4
ldrh r1, [r2, r3]
add r1, r1, #1
strh r1, [r2, r3] @ movhi
ldmfd sp!, {r3, pc}
-.L560:
+.L556:
.align 2
-.L559:
+.L555:
.word .LANCHOR2
.word -2056
.fnend
.save {r4, r5, r6, r7, r8, r9, sl, lr}
movw r6, #65535
cmp r0, r6
- beq .L562
- ldr r1, .L569
+ beq .L558
+ ldr r1, .L565
mov r5, #6
mul ip, r5, r0
mvn r3, #0
strh r3, [r4, ip] @ movhi
ldr r3, [r1, #-2052]
cmp r3, #0
- beq .L568
-.L563:
+ beq .L564
+.L559:
ldr sl, [r1, #-2072]
mov r8, r0, asl #1
ldr r7, [r1, #-2084]
rsb r1, sl, r3
- ldr r9, .L569+4
+ ldr r9, .L565+4
mov r1, r1, asr #1
ldrh r8, [r7, r8]
mul r1, r9, r1
mov r9, r5
uxth r1, r1
-.L566:
+.L562:
mov r5, r1, asl #1
ldrh r5, [r7, r5]
cmp r5, r8
- bcs .L564
+ bcs .L560
ldrh r5, [r3, #0]
cmp r5, r6
streqh r1, [r2, #2] @ movhi
streqh r0, [r3, #0] @ movhi
- beq .L562
-.L565:
+ beq .L558
+.L561:
mla r3, r9, r5, sl
mov r1, r5
- b .L566
-.L564:
+ b .L562
+.L560:
ldrh r5, [r3, #2]
strh r5, [r2, #2] @ movhi
strh r1, [r4, ip] @ movhi
- ldr r1, .L569
+ ldr r1, .L565
ldr ip, [r1, #-2052]
cmp r3, ip
- bne .L567
+ bne .L563
strh r0, [r3, #2] @ movhi
-.L568:
+.L564:
str r2, [r1, #-2052]
- b .L562
-.L567:
+ b .L558
+.L563:
ldrh r2, [r3, #2]
mov ip, #6
ldr r1, [r1, #-2072]
mul r2, ip, r2
strh r0, [r1, r2] @ movhi
strh r0, [r3, #2] @ movhi
-.L562:
+.L558:
mov r0, #0
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L570:
+.L566:
.align 2
-.L569:
+.L565:
.word .LANCHOR2
.word -1431655765
.fnend
stmfd sp!, {r3, lr}
.save {r3, lr}
bl insert_free_list
- ldr r2, .L572
- ldr r3, .L572+4
+ ldr r2, .L568
+ ldr r3, .L568+4
ldrh r1, [r2, r3]
add r1, r1, #1
strh r1, [r2, r3] @ movhi
ldmfd sp!, {r3, pc}
-.L573:
+.L569:
.align 2
-.L572:
+.L568:
.word .LANCHOR2
.word -2048
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr ip, .L579
+ ldr ip, .L575
mov r2, #6
mul r1, r2, r1
ldr r3, [ip, #-2072]
movw r6, #65535
cmp r4, r5
ldrh r5, [r3, r1]
- bne .L575
+ bne .L571
cmp r5, r6
mlane r2, r2, r5, r3
moveq r2, #0
strne r2, [r0, #0]
mvnne r0, #0
strneh r0, [r2, #2] @ movhi
- b .L577
-.L575:
+ b .L573
+.L571:
cmp r5, r6
ldrh r0, [r4, #2]
mlane r5, r2, r5, r3
mulne r2, r2, r6
streqh r0, [r3, r2] @ movhi
strneh r5, [r0, r2] @ movhi
-.L577:
+.L573:
mvn r2, #0
mov r0, #0
strh r2, [r3, r1] @ movhi
strh r2, [r4, #2] @ movhi
ldmfd sp!, {r4, r5, r6, pc}
-.L580:
+.L576:
.align 2
-.L579:
+.L575:
.word .LANCHOR2
.fnend
.size List_remove_node, .-List_remove_node
.save {r4, lr}
ldr r3, [r0, #0]
cmp r3, #0
- beq .L586
- ldr r2, .L587
+ beq .L582
+ ldr r2, .L583
movw lr, #65535
mov ip, #6
ldr r4, [r2, #-2072]
- b .L583
-.L585:
+ b .L579
+.L581:
mla r3, ip, r2, r4
sub r1, r1, #1
uxth r1, r1
-.L583:
+.L579:
cmp r1, #0
- beq .L584
+ beq .L580
ldrh r2, [r3, #0]
cmp r2, lr
- bne .L585
-.L584:
+ bne .L581
+.L580:
rsb r4, r4, r3
- ldr r3, .L587+4
+ ldr r3, .L583+4
mov r4, r4, asr #1
mul r4, r3, r4
uxth r4, r4
bl List_remove_node
mov r0, r4
ldmfd sp!, {r4, pc}
-.L586:
+.L582:
movw r0, #65535
ldmfd sp!, {r4, pc}
-.L588:
+.L584:
.align 2
-.L587:
+.L583:
.word .LANCHOR2
.word -1431655765
.fnend
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r2, .L596
+ ldr r2, .L592
ldr r3, [r2, #-2068]
cmp r3, #0
- beq .L595
+ beq .L591
ldr r2, [r2, #-2072]
movw r1, #65535
mov ip, #6
- b .L592
-.L594:
+ b .L588
+.L590:
mla r3, ip, r3, r2
sub r0, r0, #1
uxth r0, r0
-.L592:
+.L588:
cmp r0, #0
- beq .L593
+ beq .L589
ldrh r3, [r3, #0]
cmp r3, r1
- bne .L594
+ bne .L590
mov r0, r1
bx lr
-.L593:
+.L589:
rsb r3, r2, r3
- ldr r0, .L596+4
+ ldr r0, .L592+4
mov r3, r3, asr #1
mul r0, r0, r3
uxth r0, r0
bx lr
-.L595:
+.L591:
movw r0, #65535
bx lr
-.L597:
+.L593:
.align 2
-.L596:
+.L592:
.word .LANCHOR2
.word -1431655765
.fnend
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
mov r5, r0
- ldr r4, .L604
- ldr r3, .L604+4
+ ldr r4, .L600
+ ldr r3, .L600+4
ldrh r3, [r4, r3]
cmp r3, r0
- beq .L599
- ldr r3, .L604+8
+ beq .L595
+ ldr r3, .L600+8
ldrh r3, [r4, r3]
cmp r3, r0
- beq .L599
- ldr r3, .L604+12
+ beq .L595
+ ldr r3, .L600+12
ldrh r3, [r4, r3]
cmp r3, r0
- beq .L599
+ beq .L595
ldr r3, [r4, #-2072]
mov ip, #6
ldr r2, [r4, #-2068]
mla r1, ip, r0, r3
cmp r1, r2
- beq .L599
+ beq .L595
ldrh r6, [r1, #4]
mov r2, r5, asl #1
ldrh r1, [r1, #2]
ldr r0, [r4, #-2064]
mla r1, ip, r1, r3
- ldr ip, .L604+16
+ ldr ip, .L600+16
ldrh r2, [r0, r2]
muls r2, r6, r2
mvneq r2, #0
muls r3, r1, r3
mvneq r3, #0
cmp r2, r3
- bcs .L599
- ldr r0, .L604+20
+ bcs .L595
+ ldr r0, .L600+20
mov r1, r5
bl List_remove_node
- ldr r3, .L604+24
+ ldr r3, .L600+24
mov r0, r5
ldrh r2, [r4, r3]
sub r2, r2, #1
strh r2, [r4, r3] @ movhi
bl INSERT_DATA_LIST
-.L599:
+.L595:
mov r0, #0
ldmfd sp!, {r4, r5, r6, pc}
-.L605:
+.L601:
.align 2
-.L604:
+.L600:
.word .LANCHOR2
.word -2044
.word -1996
ldrh r2, [r0, #10]
mov r5, #0
ldr r3, [r0, #12]
- b .L607
-.L610:
+ b .L603
+.L606:
mov r7, r3
add r3, r3, #2
ldrh r6, [r7, #0]
cmp r6, #0
- bne .L608
+ bne .L604
bl FtlFreeSysBlkQueueOut
cmp r0, #0
strh r0, [r7, #0] @ movhi
- beq .L609
+ beq .L605
ldr r3, [r4, #28]
strh r6, [r4, #2] @ movhi
add r3, r3, #1
strh r5, [r4, #0] @ movhi
add r3, r3, #1
strh r3, [r4, #8] @ movhi
- b .L609
-.L608:
+ b .L605
+.L604:
add r5, r5, #1
uxth r5, r5
-.L607:
+.L603:
cmp r5, r2
- bne .L610
-.L609:
+ bne .L606
+.L605:
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L623
+ ldr r2, .L619
movw r3, #3950
stmfd sp!, {r4, r5, r6, r7, lr}
.save {r4, r5, r6, r7, lr}
movw r1, #65535
ldrh r3, [r2, r3]
- ldr r2, .L623+4
+ ldr r2, .L619+4
ldr ip, [r2, #-1900]
mov r2, #0
mov r0, r2
- b .L612
-.L614:
+ b .L608
+.L610:
add r2, r2, #12
add r4, ip, r2
ldrh r4, [r4, #-12]
ldmeqfd sp!, {r4, r5, r6, r7, pc}
add r0, r0, #1
uxth r0, r0
-.L612:
+.L608:
cmp r0, r3
- bne .L614
+ bne .L610
mov r1, #0
mov r0, r3
mov r5, #-2147483648
mov r2, r1
- b .L615
-.L617:
+ b .L611
+.L613:
add r4, ip, r1
ldr r4, [r4, #4]
cmp r4, #0
- blt .L616
+ blt .L612
cmp r4, r5
movcc r5, r4
movcc r0, r2
-.L616:
+.L612:
add r2, r2, #1
add r1, r1, #12
uxth r2, r2
-.L615:
+.L611:
cmp r2, r3
- bne .L617
+ bne .L613
cmp r0, r3
ldmccfd sp!, {r4, r5, r6, r7, pc}
- ldr r2, .L623+8
+ ldr r2, .L619+8
mov r0, r3
- ldr r1, .L623+4
+ ldr r1, .L619+4
mvn r4, #0
ldrh r6, [r1, r2]
mov r2, #0
mov r1, r2
- b .L618
-.L620:
+ b .L614
+.L616:
add r5, ip, r2
ldr r5, [r5, #4]
cmp r5, r4
- bcs .L619
+ bcs .L615
ldrh r7, [ip, r2]
cmp r7, r6
movne r4, r5
movne r0, r1
-.L619:
+.L615:
add r1, r1, #1
add r2, r2, #12
uxth r1, r1
-.L618:
+.L614:
cmp r1, r3
- bne .L620
+ bne .L616
ldmfd sp!, {r4, r5, r6, r7, pc}
-.L624:
+.L620:
.align 2
-.L623:
+.L619:
.word .LANCHOR0
.word .LANCHOR2
.word -1896
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L631
- ldr r2, .L631+4
+ ldr r3, .L627
+ ldr r2, .L627+4
stmfd sp!, {r4, r5, lr}
.save {r4, r5, lr}
ldrh r1, [r2, r3]
add ip, r1, #1
mov r1, r3
strh ip, [r2, r3] @ movhi
- bhi .L626
+ bhi .L622
cmp r0, #0
ldmeqfd sp!, {r4, r5, pc}
-.L626:
- ldr r0, .L631+8
+.L622:
+ ldr r0, .L627+8
mov r3, #0
strh r3, [r2, r1] @ movhi
movw r1, #3852
movw ip, #65535
ldrh r4, [r0, r1]
ldr r1, [r2, #-2064]
- ldr r2, .L631+4
- b .L628
-.L630:
+ ldr r2, .L627+4
+ b .L624
+.L626:
ldrh r0, [r1], #2
add r3, r3, #1
cmp r0, ip
ldrne r5, [r2, #-1892]
addne r0, r0, r5
strne r0, [r2, #-1892]
-.L628:
+.L624:
cmp r3, r4
- bne .L630
+ bne .L626
ldmfd sp!, {r4, r5, pc}
-.L632:
+.L628:
.align 2
-.L631:
+.L627:
.word -1894
.word .LANCHOR2
.word .LANCHOR0
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L637
+ ldr r3, .L633
mov r2, r0, lsr #5
cmp r1, #0
and r0, r0, #31
biceq r0, r1, ip, asl r0
str r0, [r3, r2, asl #2]
bx lr
-.L638:
+.L634:
.align 2
-.L637:
+.L633:
.word .LANCHOR2
.fnend
.size ftl_set_blk_mode, .-ftl_set_blk_mode
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L640
+ ldr r3, .L636
mov r2, r0, lsr #5
and r0, r0, #31
ldr r3, [r3, #-1888]
mov r0, r3, lsr r0
and r0, r0, #1
bx lr
-.L641:
+.L637:
.align 2
-.L640:
+.L636:
.word .LANCHOR2
.fnend
.size ftl_get_blk_mode, .-ftl_get_blk_mode
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr ip, .L649
+ ldr ip, .L645
mov r3, #0
strh r3, [r0, #4] @ movhi
movw r3, #3844
.save {r4, r5, r6, lr}
ldrh r3, [ip, r3]
movw ip, #65535
- b .L643
-.L645:
+ b .L639
+.L641:
add r4, r0, r2, asl #1
add r2, r2, #1
ldrh r4, [r4, #16]
ldrneh r4, [r0, #4]
addne r4, r4, #1
strneh r4, [r0, #4] @ movhi
-.L643:
+.L639:
cmp r2, r3
- bcc .L645
- ldr ip, .L649
+ bcc .L641
+ ldr ip, .L645
movw r2, #3912
movw r4, #65535
mvn r1, r1
ldrh r5, [ip, r2]
mov ip, r0
mov r2, #0
- b .L646
-.L648:
+ b .L642
+.L644:
ldrh r6, [ip, #16]
add r2, r2, #1
add ip, ip, #2
addne r6, r5, r6
addne r6, r6, r1
strneh r6, [r0, #4] @ movhi
-.L646:
+.L642:
cmp r2, r3
- bne .L648
+ bne .L644
ldmfd sp!, {r4, r5, r6, pc}
-.L650:
+.L646:
.align 2
-.L649:
+.L645:
.word .LANCHOR0
.fnend
.size ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
.save {r4, r5, r6, r7, r8, r9, sl, lr}
mov r4, r0
mov r5, #0
- ldr r6, .L656
+ ldr r6, .L652
strh r5, [r0, #4] @ movhi
movw r8, #3844
strb r5, [r4, #7]
mvn r7, #0
- b .L652
-.L654:
+ b .L648
+.L650:
add r3, r6, r5
ldrh r1, [r4, #0]
add sl, r5, #8
ldreqb r3, [r4, #7] @ zero_extendqisi2
addeq r3, r3, #1
streqb r3, [r4, #7]
-.L652:
+.L648:
ldrh r3, [r6, r8]
cmp r3, r5
- bhi .L654
- ldr r1, .L656
+ bhi .L650
+ ldr r1, .L652
movw r2, #3912
ldrb r3, [r4, #7] @ zero_extendqisi2
ldrh r2, [r1, r2]
strh r3, [r4, #4] @ movhi
mov r3, #0
strb r3, [r4, #9]
- ldr r3, .L656+4
+ ldr r3, .L652+4
ldr r2, [r3, #-1884]
cmp r2, #0
- beq .L655
+ beq .L651
ldrh r1, [r4, #0]
ldr r2, [r3, #-2084]
mov r3, r1, asl #1
cmp r3, #59
movls r3, #1
strlsb r3, [r4, #9]
-.L655:
+.L651:
mov r0, #0
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L657:
+.L653:
.align 2
-.L656:
+.L652:
.word .LANCHOR0
.word .LANCHOR2
.fnend
mov r4, #0
mov r7, r0
mov r5, r4
- ldr r6, .L663
+ ldr r6, .L659
movw sl, #3844
movw r8, #3912
- b .L659
-.L661:
+ b .L655
+.L657:
add r3, r6, r5
mov r1, r7
add r5, r5, #1
ldreqh r3, [r6, r8]
addeq r4, r4, r3
uxtheq r4, r4
-.L659:
+.L655:
ldrh r3, [r6, sl]
cmp r3, r5
- bhi .L661
+ bhi .L657
cmp r4, #0
- beq .L662
+ beq .L658
mov r1, r4
mov r0, #32768
bl __aeabi_idiv
uxth r4, r0
-.L662:
- ldr r3, .L663+4
+.L658:
+ ldr r3, .L659+4
mov r2, #6
mov r0, #0
ldr r3, [r3, #-2072]
mla r7, r2, r7, r3
strh r4, [r7, #4] @ movhi
ldmfd sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L664:
+.L660:
.align 2
-.L663:
+.L659:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L668
+ ldr r3, .L664
ldr r0, [r3, #-2052]
cmp r0, #0
bxeq lr
ldr r2, [r3, #-2072]
rsb r0, r2, r0
- ldr r2, .L668+4
+ ldr r2, .L664+4
mov r0, r0, asr #1
mul r0, r2, r0
ldr r2, [r3, #-2084]
mov r3, r0, asl #1
ldrh r0, [r2, r3]
bx lr
-.L669:
+.L665:
.align 2
-.L668:
+.L664:
.word .LANCHOR2
.word -1431655765
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L677
+ ldr r2, .L673
stmfd sp!, {r4, r5, lr}
.save {r4, r5, lr}
ldr r3, [r2, #-2052]
cmp r3, #0
- beq .L676
- ldr r1, .L677+4
+ beq .L672
+ ldr r1, .L673+4
mov ip, #7
mov r5, #6
movw r4, #65535
cmp r0, r1
uxthgt r0, r1
ldr r1, [r2, #-2072]
- ldr r2, .L677+8
+ ldr r2, .L673+8
rsb r3, r1, r3
mov r3, r3, asr #1
mul r3, r2, r3
mov r2, #0
uxth r3, r3
- b .L673
-.L675:
+ b .L669
+.L671:
mul ip, r5, r3
ldrh ip, [r1, ip]
cmp ip, r4
- beq .L674
+ beq .L670
add r2, r2, #1
mov r3, ip
uxth r2, r2
-.L673:
+.L669:
cmp r2, r0
- bne .L675
-.L674:
- ldr r2, .L677
+ bne .L671
+.L670:
+ ldr r2, .L673
mov r3, r3, asl #1
ldr r2, [r2, #-2084]
ldrh r0, [r2, r3]
ldmfd sp!, {r4, r5, pc}
-.L676:
+.L672:
mov r0, r3
ldmfd sp!, {r4, r5, pc}
-.L678:
+.L674:
.align 2
-.L677:
+.L673:
.word .LANCHOR2
.word -2048
.word -1431655765
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
.save {r4, r5, r6, r7, r8, r9, sl, lr}
mov r8, r0
- ldr r6, .L689
+ ldr r6, .L685
add r5, r8, #12
.pad #32
sub sp, sp, #32
- ldr r1, .L689+4
+ ldr r1, .L685+4
bl strcpy
mov r0, r5
- ldr r1, .L689+8
+ ldr r1, .L685+8
ldr r2, [r6, #2200]
bl sprintf
- ldr r1, .L689+12
+ ldr r1, .L685+12
ldr r2, [r6, #3928]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+16
+ ldr r3, .L685+16
ldr r3, [r3, #2960]
cmp r3, #1
add r5, r5, r0
- bne .L685
-.L680:
+ bne .L681
+.L676:
add r0, sp, #16
add r1, sp, #20
add r2, sp, #24
ldr r3, [sp, #24]
ldr r2, [sp, #16]
mov r0, r5
- ldr r1, .L689+20
+ ldr r1, .L685+20
str r3, [sp, #0]
ldr r3, [sp, #28]
- ldr r4, .L689+24
- ldr r7, .L689+28
+ ldr r4, .L685+24
+ ldr r7, .L685+28
str r3, [sp, #4]
ldr r3, [sp, #20]
bl sprintf
- ldr r1, .L689+32
+ ldr r1, .L685+32
add r5, r5, r0
mov r0, r5
add r5, r5, #10
bl strcpy
ldr r2, [r6, #3972]
mov r0, r5
- ldr r1, .L689+36
+ ldr r1, .L685+36
bl sprintf
- ldr r1, .L689+40
+ ldr r1, .L685+40
ldr r2, [r4, #-1892]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+44
+ ldr r1, .L685+44
ldr r2, [r4, #-1880]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+48
+ ldr r1, .L685+48
ldr r2, [r4, #-1876]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+52
+ ldr r1, .L685+52
ldr r2, [r4, #-1872]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+56
+ ldr r1, .L685+56
ldr r2, [r4, #-1868]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+60
+ ldr r1, .L685+60
ldr r2, [r4, #-1864]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+64
+ ldr r1, .L685+64
ldr r2, [r4, #-1860]
add r5, r5, r0
mov r0, r5
bl sprintf
ldr r2, [r4, #-1856]
- ldr r1, .L689+68
+ ldr r1, .L685+68
mov r2, r2, lsr #11
add r5, r5, r0
mov r0, r5
bl sprintf
ldr r2, [r4, #-1852]
- ldr r1, .L689+72
+ ldr r1, .L685+72
mov r2, r2, lsr #11
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+76
+ ldr r1, .L685+76
ldr r2, [r4, #-1848]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+80
+ ldr r1, .L685+80
ldr r2, [r4, #-1844]
add r5, r5, r0
mov r0, r5
add r5, r5, r0
bl FtlBbtCalcTotleCnt
movw r2, #3986
- ldr r1, .L689+84
+ ldr r1, .L685+84
ldrh r2, [r6, r2]
mov r3, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+88
+ ldr r1, .L685+88
ldrh r2, [r4, r7]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+92
+ ldr r1, .L685+92
ldr r2, [r4, #-1840]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+96
+ ldr r1, .L685+96
ldr r2, [r4, #-1836]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+100
+ ldr r1, .L685+100
ldr r2, [r4, #-1832]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+104
+ ldr r1, .L685+104
ldr r2, [r4, #-2080]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+108
+ ldr r1, .L685+108
ldr r2, [r4, #-1828]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+112
+ ldr r1, .L685+112
ldr r2, [r4, #-1824]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+116
- ldr r1, .L689+120
+ ldr r3, .L685+116
+ ldr r1, .L685+120
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+124
- ldr r1, .L689+128
+ ldr r3, .L685+124
+ ldr r1, .L685+128
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
ldr r2, [r6, #3952]
- ldr r1, .L689+132
+ ldr r1, .L685+132
add r5, r5, r0
mov r0, r5
bl sprintf
ldr r2, [r6, #3944]
- ldr r1, .L689+136
+ ldr r1, .L685+136
add r5, r5, r0
mov r0, r5
bl sprintf
ldr r2, [r6, #3840]
- ldr r1, .L689+140
+ ldr r1, .L685+140
add r5, r5, r0
mov r0, r5
bl sprintf
movw r3, #4046
ldrh r2, [r6, r3]
- ldr r1, .L689+144
+ ldr r1, .L685+144
add r5, r5, r0
mov r0, r5
bl sprintf
movw r3, #3852
ldrh r2, [r6, r3]
- ldr r1, .L689+148
+ ldr r1, .L685+148
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+152
- ldr r1, .L689+156
+ ldr r3, .L685+152
+ ldr r1, .L685+156
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
ldr r2, [r6, #3856]
- ldr r1, .L689+160
+ ldr r1, .L685+160
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+164
- ldr r1, .L689+168
+ ldr r3, .L685+164
+ ldr r1, .L685+168
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
movw r3, #3980
ldrh r2, [r6, r3]
- ldr r1, .L689+172
- ldr r6, .L689+176
+ ldr r1, .L685+172
+ ldr r6, .L685+176
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+180
- ldr r1, .L689+184
+ ldr r3, .L685+180
+ ldr r1, .L685+184
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+188
+ ldr r1, .L685+188
ldrb r2, [r4, #-2038] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
ldrh r2, [r4, r6]
- ldr r1, .L689+192
+ ldr r1, .L685+192
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+196
+ ldr r1, .L685+196
ldrb r2, [r4, #-2036] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+200
- ldr r1, .L689+204
+ ldr r3, .L685+200
+ ldr r1, .L685+204
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
ldrh r3, [r4, r6]
ldr r2, [r4, #-2064]
add r6, r6, #48
- ldr r1, .L689+208
+ ldr r1, .L685+208
mov r3, r3, asl #1
ldrh r2, [r2, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+212
- ldr r1, .L689+216
+ ldr r3, .L685+212
+ ldr r1, .L685+216
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+220
+ ldr r1, .L685+220
ldrb r2, [r4, #-1990] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
ldrh r2, [r4, r6]
- ldr r1, .L689+224
+ ldr r1, .L685+224
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+228
+ ldr r1, .L685+228
ldrb r2, [r4, #-1988] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+232
- ldr r1, .L689+236
+ ldr r3, .L685+232
+ ldr r1, .L685+236
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
ldrh r3, [r4, r6]
ldr r2, [r4, #-2064]
add r6, r6, #240
- ldr r1, .L689+240
+ ldr r1, .L685+240
mov r3, r3, asl #1
ldrh r2, [r2, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+244
- ldr r1, .L689+248
+ ldr r3, .L685+244
+ ldr r1, .L685+248
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+252
+ ldr r1, .L685+252
ldrb r2, [r4, #-1942] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+256
- ldr r1, .L689+260
+ ldr r3, .L685+256
+ ldr r1, .L685+260
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+264
+ ldr r1, .L685+264
ldrb r2, [r4, #-1940] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+268
- ldr r1, .L689+272
+ ldr r3, .L685+268
+ ldr r1, .L685+272
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+276
- ldr r1, .L689+280
+ ldr r3, .L685+276
+ ldr r1, .L685+280
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+284
+ ldr r1, .L685+284
ldrb r2, [r4, #-1750] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+288
+ ldr r1, .L685+288
ldrh r2, [r4, r6]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+292
+ ldr r1, .L685+292
ldrb r2, [r4, #-1748] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+296
- ldr r1, .L689+300
+ ldr r3, .L685+296
+ ldr r1, .L685+300
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
ldr r1, [r4, #-1628]
orr r2, r3, r2, asl #8
str r1, [sp, #4]
- ldr r1, .L689+304
+ ldr r1, .L685+304
ldr r3, [r4, #-1624]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+308
+ ldr r1, .L685+308
ldr r2, [r4, #-1632]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+312
+ ldr r1, .L685+312
ldr r2, [r4, #-1608]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+316
- ldr r1, .L689+320
+ ldr r3, .L685+316
+ ldr r1, .L685+320
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+324
- ldr r1, .L689+328
+ ldr r3, .L685+324
+ ldr r1, .L685+328
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L689+332
+ ldr r1, .L685+332
ldr r2, [r4, #-1188]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, .L689+336
- ldr r1, .L689+340
+ ldr r3, .L685+336
+ ldr r1, .L685+340
ldrh r2, [r4, r3]
add r5, r5, r0
mov r0, r5
bl sprintf
add r5, r5, r0
bl GetFreeBlockMinEraseCount
- ldr r1, .L689+344
+ ldr r1, .L685+344
mov r2, r0
mov r0, r5
bl sprintf
add r5, r5, r0
ldrh r0, [r4, r7]
bl GetFreeBlockMaxEraseCount
- ldr r1, .L689+348
+ ldr r1, .L685+348
mov r2, r0
mov r0, r5
bl sprintf
movw r2, #65535
cmp r3, r2
add r5, r5, r0
- beq .L682
+ beq .L678
ldr r2, [r4, #-2064]
mov r3, r3, asl #1
mov r0, r5
- ldr r1, .L689+352
+ ldr r1, .L685+352
ldrh r2, [r2, r3]
bl sprintf
add r5, r5, r0
-.L682:
+.L678:
mov r0, #0
- ldr r4, .L689+24
+ ldr r4, .L685+24
bl List_get_gc_head_node
mov r6, #0
movw sl, #65535
mov r9, #6
uxth r3, r0
-.L684:
+.L680:
cmp r3, sl
- beq .L683
+ beq .L679
ldr r1, [r4, #-2064]
mov r2, r3, asl #1
mul r7, r9, r3
str r1, [sp, #4]
ldr r1, [r4, #-2084]
ldrh r2, [r1, r2]
- ldr r1, .L689+356
+ ldr r1, .L685+356
str r2, [sp, #8]
mov r2, r6
bl sprintf
cmp r6, #16
ldrh r3, [r3, r7]
add r5, r5, r0
- bne .L684
-.L683:
- ldr r6, .L689+24
+ bne .L680
+.L679:
+ ldr r6, .L685+24
mov r4, #0
movw sl, #65535
mov r9, #6
ldr r2, [r6, #-2052]
ldr r3, [r6, #-2072]
rsb r3, r3, r2
- ldr r2, .L689+360
+ ldr r2, .L685+360
mov r3, r3, asr #1
mul r3, r2, r3
uxth r3, r3
-.L686:
+.L682:
cmp r3, sl
- beq .L685
+ beq .L681
mul r7, r9, r3
ldr r2, [r6, #-2072]
mov r0, r5
mov r2, r3, asl #1
ldr r1, [r6, #-2084]
ldrh r2, [r1, r2]
- ldr r1, .L689+364
+ ldr r1, .L685+364
str r2, [sp, #4]
mov r2, r4
bl sprintf
cmp r4, #4
ldrh r3, [r3, r7]
add r5, r5, r0
- bne .L686
-.L685:
+ bne .L682
+.L681:
rsb r0, r8, r5
add sp, sp, #32
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L690:
+.L686:
.align 2
-.L689:
+.L685:
.word .LANCHOR0
+ .word .LC4
.word .LC5
.word .LC6
- .word .LC7
.word .LANCHOR1
- .word .LC8
+ .word .LC7
.word .LANCHOR2
.word -2048
+ .word .LC8
.word .LC9
.word .LC10
.word .LC11
.word .LC26
.word .LC27
.word .LC28
- .word .LC29
.word -1790
- .word .LC30
+ .word .LC29
.word -1792
+ .word .LC30
.word .LC31
.word .LC32
.word .LC33
.word .LC34
.word .LC35
- .word .LC36
.word -1772
+ .word .LC36
.word .LC37
- .word .LC38
.word -1768
+ .word .LC38
.word .LC39
- .word .LC40
.word -2044
.word -2042
+ .word .LC40
.word .LC41
.word .LC42
.word .LC43
- .word .LC44
.word -2040
+ .word .LC44
.word .LC45
- .word .LC46
.word -1994
+ .word .LC46
.word .LC47
.word .LC48
.word .LC49
- .word .LC50
.word -1992
+ .word .LC50
.word .LC51
- .word .LC52
.word -1946
+ .word .LC52
.word .LC53
- .word .LC54
.word -1948
+ .word .LC54
.word .LC55
- .word .LC56
.word -1944
- .word .LC57
+ .word .LC56
.word -1754
+ .word .LC57
.word .LC58
.word .LC59
.word .LC60
- .word .LC61
.word -1752
+ .word .LC61
.word .LC62
.word .LC63
.word .LC64
- .word .LC65
.word -1192
- .word .LC66
+ .word .LC65
.word -1190
+ .word .LC66
.word .LC67
- .word .LC68
.word -1184
+ .word .LC68
.word .LC69
.word .LC70
.word .LC71
.word .LC72
- .word .LC73
.word -1431655765
- .word .LC74
+ .word .LC73
.fnend
.size FtlPrintInfo2buf, .-FtlPrintInfo2buf
.align 2
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r4, r0
- ldr r1, .L692
- ldr r2, .L692+4
+ ldr r1, .L688
+ ldr r2, .L688+4
bl sprintf
add r5, r4, r0
mov r0, r5
add r0, r5, r0
rsb r0, r4, r0
ldmfd sp!, {r3, r4, r5, pc}
-.L693:
+.L689:
.align 2
-.L692:
+.L688:
+ .word .LC74
.word .LC75
- .word .LC76
.fnend
.size rknand_proc_ftlread, .-rknand_proc_ftlread
.align 2
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L721
+ ldr r3, .L717
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.pad #20
ldr r1, [r3, #-1832]
ldr r2, [r3, #-1824]
cmp r1, r2
- bcs .L695
- ldr r0, .L721+4
+ bcs .L691
+ ldr r0, .L717+4
movw r1, #3852
mov r2, #0
str r2, [r3, #-1840]
ldrh r1, [r0, r1]
ldr r0, [r3, #-2084]
- b .L696
-.L697:
+ b .L692
+.L693:
ldrh lr, [r0], #2
add r2, r2, #1
ldr ip, [r3, #-1840]
add ip, lr, ip
str ip, [r3, #-1840]
-.L696:
+.L692:
cmp r2, r1
- ldr r4, .L721
- bcc .L697
+ ldr r4, .L717
+ bcc .L693
ldr r5, [r4, #-1840]
mov r0, r5
bl __aeabi_uidiv
- ldr r2, .L721+4
+ ldr r2, .L717+4
movw r3, #3902
ldrh r1, [r2, r3]
str r0, [r4, #-1832]
rsb r0, r0, r5
bl __aeabi_uidiv
str r0, [r4, #-1840]
- b .L698
-.L695:
+ b .L694
+.L691:
ldr r2, [r3, #-1828]
cmp r1, r2
- bls .L698
+ bls .L694
add r2, r2, #1
- ldr r4, .L721+4
+ ldr r4, .L717+4
str r2, [r3, #-1828]
movw ip, #3852
mov r2, #0
- b .L699
-.L700:
+ b .L695
+.L696:
ldr r0, [r3, #-2084]
mov r1, r2, asl #1
add r2, r2, #1
ldrh r5, [r0, r1]
add r5, r5, #1
strh r5, [r0, r1] @ movhi
-.L699:
+.L695:
ldrh r1, [r4, ip]
cmp r2, r1
- bcc .L700
-.L698:
- ldr r3, .L721
+ bcc .L696
+.L694:
+ ldr r3, .L717
ldr r6, [r3, #-1824]
ldr r5, [r3, #-1832]
add r2, r6, #256
cmp r2, r5
mov r2, r3
- bls .L701
+ bls .L697
ldr r1, [r3, #-1828]
add r0, r6, #768
cmp r0, r1
- bls .L701
+ bls .L697
ldr r3, [r3, #-1884]
cmp r3, #0
- beq .L719
+ beq .L715
cmp r6, #30
- bhi .L719
-.L701:
- ldr r3, .L721+8
+ bhi .L715
+.L697:
+ ldr r3, .L717+8
ldrh r0, [r2, r3]
add r0, r0, r0, asl #1
ubfx r0, r0, #2, #16
add r3, r6, #64
cmp r0, r3
mov r8, r0
- bcs .L703
+ bcs .L699
cmp r6, #30
- bhi .L719
-.L703:
- ldr r2, .L721
+ bhi .L715
+.L699:
+ ldr r2, .L717
ldr r3, [r2, #-2068]
cmp r3, #0
- beq .L719
+ beq .L715
movw r7, #65535
ldr r1, [r2, #-2072]
mov r4, r7
ldr r2, [r2, #-2084]
mov sl, r7
- ldr ip, .L721+12
+ ldr ip, .L717+12
mov fp, #6
- b .L704
-.L707:
+ b .L700
+.L703:
ldrh r9, [r3, #4]
cmp r9, #0
- beq .L705
+ beq .L701
rsb r3, r1, r3
mov r3, r3, asr #1
mul r3, ip, r3
mov r9, r3, asl #1
ldrh r9, [r2, r9]
cmp r9, r6
- bls .L716
+ bls .L712
cmp r9, r7
movcc r7, r9
movcc r4, r3
-.L705:
+.L701:
mla r3, fp, r0, r1
-.L704:
+.L700:
ldrh r0, [r3, #0]
cmp r0, sl
- bne .L707
- b .L706
-.L716:
+ bne .L703
+ b .L702
+.L712:
mov r4, r3
-.L706:
+.L702:
movw r3, #65535
cmp r4, r3
- beq .L702
+ beq .L698
mov sl, r4, asl #1
- ldr fp, .L721
+ ldr fp, .L717
ldrh r9, [r2, sl]
cmp r9, r6
- bls .L708
+ bls .L704
bl GetFreeBlockMinEraseCount
cmp r0, r6
strhi r7, [fp, #-1824]
-.L708:
+.L704:
cmp r9, #29
ldr r2, [fp, #-1884]
movhi r3, #0
cmp r2, #0
moveq r3, #0
cmp r3, #0
- beq .L709
+ beq .L705
add r3, r9, #10
cmp r3, r5
- bls .L710
- ldr r2, .L721+4
+ bls .L706
+ ldr r2, .L717+4
movw r3, #3902
ldrh r3, [r2, r3]
cmp r3, r9
- bls .L709
-.L710:
- ldr r6, .L721
- ldr r3, .L721+16
+ bls .L705
+.L706:
+ ldr r6, .L717
+ ldr r3, .L717+16
ldrh r3, [r6, r3]
cmp r3, #64
- bls .L709
+ bls .L705
ldr r3, [r6, #-2084]
mov r1, r4
- ldr r0, .L721+20
+ ldr r0, .L717+20
ldrh r2, [r3, sl]
bl printk
- b .L720
-.L709:
+ b .L716
+.L705:
cmp r9, r5
- bcs .L719
+ bcs .L715
add r3, r9, #128
cmp r8, r3
- ble .L719
+ ble .L715
add r3, r9, #256
- ldr r6, .L721
+ ldr r6, .L717
cmp r3, r5
- bcc .L711
+ bcc .L707
ldr r3, [r6, #-1828]
add r9, r9, #768
cmp r9, r3
- bcs .L719
-.L711:
+ bcs .L715
+.L707:
ldr r3, [r6, #-2064]
mov r1, r4
- ldr r0, .L721+24
+ ldr r0, .L717+24
mov r2, r5
ldrh r3, [r3, sl]
str r3, [sp, #0]
stmib sp, {r3, r8}
ldr r3, [r6, #-1828]
bl printk
-.L720:
+.L716:
mov r3, #1
str r3, [r6, #-1180]
- b .L702
-.L719:
+ b .L698
+.L715:
movw r4, #65535
-.L702:
+.L698:
mov r0, r4
add sp, sp, #20
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L722:
+.L718:
.align 2
-.L721:
+.L717:
.word .LANCHOR2
.word .LANCHOR0
.word -2048
.word -1431655765
.word -2056
+ .word .LC76
.word .LC77
- .word .LC78
.fnend
.size GetSwlReplaceBlock, .-GetSwlReplaceBlock
.align 2
cmp r0, r2
stmfd sp!, {r3, lr}
.save {r3, lr}
- beq .L724
- ldr r2, .L725
+ beq .L720
+ ldr r2, .L721
mov r3, r0, asl #1
mov r1, #0
ldr r2, [r2, #-2064]
strh r1, [r2, r3] @ movhi
bl INSERT_FREE_LIST
-.L724:
+.L720:
mov r0, #0
ldmfd sp!, {r3, pc}
-.L726:
+.L722:
.align 2
-.L725:
+.L721:
.word .LANCHOR2
.fnend
.size free_data_superblock, .-free_data_superblock
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L735
+ ldr r2, .L731
mov r3, #0
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
movw sl, #3844
str r3, [r2, #-1176]
mov r8, #12
- ldr r0, .L735+4
+ ldr r0, .L731+4
mov r7, #1
movw r6, #3922
movw fp, #3924
- b .L728
-.L729:
+ b .L724
+.L725:
mul r1, r8, r3
ldr r4, [r2, #-1172]
add ip, r4, r1
str r1, [ip, #8]
ldr r1, [r4, #4]
str r1, [ip, #12]
-.L728:
+.L724:
ldrh r1, [r0, sl]
cmp r3, r1
- bcc .L729
- b .L734
-.L731:
+ bcc .L725
+ b .L730
+.L727:
mul r2, r8, r1
ldr r4, [r3, #-1172]
add r0, r4, r2
bic r2, r2, #3
add r2, r4, r2
str r2, [r0, #4]
- b .L733
-.L734:
- ldr r3, .L735
+ b .L729
+.L730:
+ ldr r3, .L731
mov r8, #12
- ldr ip, .L735+4
+ ldr ip, .L731+4
mov r7, #0
movw r6, #3922
movw r5, #3924
-.L733:
+.L729:
ldr r2, [r3, #-1156]
cmp r1, r2
- bcc .L731
+ bcc .L727
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L736:
+.L732:
.align 2
-.L735:
+.L731:
.word .LANCHOR2
.word .LANCHOR0
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L744
+ ldr r3, .L740
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r5, #36
ldr ip, [r3, #-1172]
mov r3, #0
mov r4, r3
- b .L738
-.L741:
+ b .L734
+.L737:
mul sl, fp, r2
add r8, ip, sl
ldr r9, [ip, sl]
ldr sl, [r7, #8]
cmp r9, sl
streq r4, [r8, #8]
- beq .L740
-.L739:
+ beq .L736
+.L735:
add r2, r2, #1
uxth r2, r2
-.L743:
+.L739:
cmp r2, r6
- bcc .L741
-.L740:
+ bcc .L737
+.L736:
add r3, r3, #1
uxth r3, r3
-.L738:
+.L734:
cmp r3, r1
ldmcsfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
mla r7, r5, r3, r0
mov r2, #0
- b .L743
-.L745:
+ b .L739
+.L741:
.align 2
-.L744:
+.L740:
.word .LANCHOR2
.fnend
.size FtlGcBufFree, .-FtlGcBufFree
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L753
+ ldr r3, .L749
stmfd sp!, {r4, r5, r6, r7, r8, sl, lr}
.save {r4, r5, r6, r7, r8, sl, lr}
mov r6, #12
ldr r7, [r3, #-1172]
mov r4, #36
mov r3, #0
- b .L747
-.L750:
+ b .L743
+.L746:
mla ip, r6, r2, r7
ldr sl, [ip, #8]
cmp sl, #0
- bne .L748
+ bne .L744
mla r2, r4, r3, r0
ldr sl, [ip, #0]
str r5, [ip, #8]
str sl, [r2, #8]
ldr ip, [ip, #4]
str ip, [r2, #12]
- b .L749
-.L748:
+ b .L745
+.L744:
add r2, r2, #1
uxth r2, r2
- b .L751
-.L752:
+ b .L747
+.L748:
mov r2, #0
-.L751:
+.L747:
cmp r2, r8
- bcc .L750
-.L749:
+ bcc .L746
+.L745:
add r3, r3, #1
uxth r3, r3
-.L747:
+.L743:
cmp r3, r1
- bcc .L752
+ bcc .L748
ldmfd sp!, {r4, r5, r6, r7, r8, sl, pc}
-.L754:
+.L750:
.align 2
-.L753:
+.L749:
.word .LANCHOR2
.fnend
.size FtlGcBufAlloc, .-FtlGcBufAlloc
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L760
- ldr r2, .L760+4
+ ldr r3, .L756
+ ldr r2, .L756+4
ldrh r1, [r3, r2]
ldr r2, [r3, #-1148]
mov r3, #0
- b .L756
-.L758:
+ b .L752
+.L754:
ldrh ip, [r2], #2
cmp ip, r0
- beq .L759
+ beq .L755
add r3, r3, #1
uxth r3, r3
-.L756:
+.L752:
cmp r3, r1
- bne .L758
+ bne .L754
mov r0, #0
bx lr
-.L759:
+.L755:
mov r0, #1
bx lr
-.L761:
+.L757:
.align 2
-.L760:
+.L756:
.word .LANCHOR2
.word -1152
.fnend
mov r5, r1
mov r6, r2
bl P2V_block_in_plane
- ldr r3, .L766
- ldr r2, .L766+4
+ ldr r3, .L762
+ ldr r2, .L762+4
ldrh ip, [r3, r2]
ldr r2, [r3, #-1148]
mov r3, #0
mov r1, r2
- b .L763
-.L765:
+ b .L759
+.L761:
ldrh r7, [r1], #2
cmp r7, r0
- beq .L764
+ beq .L760
add r3, r3, #1
uxth r3, r3
-.L763:
+.L759:
cmp r3, ip
- bne .L765
+ bne .L761
mov r3, r3, asl #1
strh r0, [r2, r3] @ movhi
- ldr r2, .L766
- ldr r3, .L766+4
+ ldr r2, .L762
+ ldr r3, .L762+4
ldrh r1, [r2, r3]
add r1, r1, #1
strh r1, [r2, r3] @ movhi
-.L764:
- ldr r3, .L766
+.L760:
+ ldr r3, .L762
mov r0, #12
- ldr r2, .L766+8
+ ldr r2, .L762+8
ldrh r1, [r3, r2]
mul r1, r0, r1
ldr r0, [r3, #-1144]
add r1, r1, #1
strh r1, [r3, r2] @ movhi
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L767:
+.L763:
.align 2
-.L766:
+.L762:
.word .LANCHOR2
.word -1152
.word -1140
.save {r4, lr}
mov r4, r0
mov r1, r4
- ldr r0, .L772
+ ldr r0, .L768
bl printk
- ldr r3, .L772+4
- ldr r2, .L772+8
+ ldr r3, .L768+4
+ ldr r2, .L768+8
movw r1, #65535
ldrh r0, [r3, r2]
cmp r0, r1
- beq .L771
-.L769:
- ldr r2, .L772+12
+ beq .L767
+.L765:
+ ldr r2, .L768+12
ldrh r0, [r3, r2]
cmp r0, r1
- bne .L770
-.L771:
+ bne .L766
+.L767:
strh r4, [r3, r2] @ movhi
-.L770:
+.L766:
mov r0, #0
ldmfd sp!, {r4, pc}
-.L773:
+.L769:
.align 2
-.L772:
- .word .LC79
+.L768:
+ .word .LC78
.word .LANCHOR2
.word -1138
.word -1136
.save {r3, r4, r5, r6, r7, lr}
mov r4, r0
bl P2V_block_in_plane
- ldr r5, .L779
+ ldr r5, .L775
mov r2, r4
- ldr r7, .L779+4
+ ldr r7, .L775+4
ldrh r1, [r5, r7]
mov r6, r0
- ldr r0, .L779+8
+ ldr r0, .L775+8
bl printk
mov r0, r6
bl FtlGcRefreshBlock
ldr r3, [r5, #-1884]
cmp r3, #0
- beq .L775
+ beq .L771
ldr r3, [r5, #-2084]
mov r6, r6, asl #1
ldrh r2, [r3, r6]
cmp r2, #29
subhi r2, r2, #30
strhih r2, [r3, r6] @ movhi
-.L775:
+.L771:
ldrh r1, [r5, r7]
mov r3, #0
- ldr r2, .L779+12
- b .L776
-.L778:
+ ldr r2, .L775+12
+ b .L772
+.L774:
ldrh r0, [r2, #2]!
cmp r0, r4
- beq .L777
+ beq .L773
add r3, r3, #1
uxth r3, r3
-.L776:
+.L772:
cmp r3, r1
- bne .L778
+ bne .L774
cmp r3, #15
- bhi .L777
- ldr r2, .L779
- ldr r1, .L779+16
+ bhi .L773
+ ldr r2, .L775
+ ldr r1, .L775+16
add r0, r2, r3, asl #1
add r3, r3, #1
strh r4, [r0, r1] @ movhi
sub r1, r1, #2
strh r3, [r2, r1] @ movhi
-.L777:
+.L773:
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L780:
+.L776:
.align 2
-.L779:
+.L775:
.word .LANCHOR2
.word -1134
- .word .LC80
+ .word .LC79
.word .LANCHOR2-1134
.word -1132
.fnend
@ frame_needed = 0, uses_anonymous_args = 0
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
- ldr r2, .L784
- ldr r3, .L784+4
+ ldr r2, .L780
+ ldr r3, .L780+4
ldrh r2, [r3, r2]
cmp r2, #0
- beq .L782
- ldr r1, .L784+8
+ beq .L778
+ ldr r1, .L780+8
ldrh r0, [r3, r1]
movw r1, #65535
cmp r0, r1
- bne .L782
- ldr r4, .L784+12
- ldr r5, .L784+4
+ bne .L778
+ ldr r4, .L780+12
+ ldr r5, .L780+4
ldrh r1, [r3, r4]
cmp r1, r2
movcs r2, #0
strcsh r2, [r3, r4] @ movhi
ldrh r2, [r5, r4]
- ldr r3, .L784+16
+ ldr r3, .L780+16
add r2, r5, r2, asl #1
ldrh r0, [r2, r3]
bl P2V_block_in_plane
ldrh r3, [r5, r4]
add r3, r3, #1
strh r3, [r5, r4] @ movhi
-.L782:
+.L778:
mov r0, #0
ldmfd sp!, {r3, r4, r5, pc}
-.L785:
+.L781:
.align 2
-.L784:
+.L780:
.word -1134
.word .LANCHOR2
.word -1138
stmfd sp!, {r4, lr}
.save {r4, lr}
mov r4, r0
- beq .L787
+ beq .L783
bl memset
-.L787:
+.L783:
mov r0, r4
ldmfd sp!, {r4, pc}
.fnend
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
mov r3, #0
- ldr r4, .L789
+ ldr r4, .L785
movw r5, #3916
- ldr r2, .L789+4
+ ldr r2, .L785+4
mov r1, #255
- ldr r6, .L789+8
+ ldr r6, .L785+8
ldr r0, [r4, #-1148]
strh r3, [r4, r2] @ movhi
add r2, r2, #12
bl ftl_memset
ldmfd sp!, {r4, r5, r6, lr}
b FtlGcBufInit
-.L790:
+.L786:
.align 2
-.L789:
+.L785:
.word .LANCHOR2
.word -1152
.word .LANCHOR0
stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
movw r3, #3854
- ldr r7, .L800
+ ldr r7, .L796
mov r2, #6
- ldr r4, .L800+4
+ ldr r4, .L796+4
mov r1, #0
mov r6, #0
ldrh r3, [r7, r3]
ldr r0, [r4, #-2072]
mul r2, r2, r3
bl ftl_memset
- ldr r3, .L800+8
+ ldr r3, .L796+8
str r6, [r4, #-2052]
str r6, [r4, #-2068]
strh r6, [r4, r3] @ movhi
str r6, [r4, #-2060]
strh r6, [r4, r3] @ movhi
mov r4, r6
- b .L792
-.L794:
+ b .L788
+.L790:
add r3, r7, r8
mov r1, r4
add r8, r8, #1
ldreqh r3, [r7, r9]
addeq r5, r5, r3
uxtheq r5, r5
- b .L798
-.L799:
+ b .L794
+.L795:
mov r5, #0
movw fp, #3844
mov r8, r5
movw r9, #3912
-.L798:
+.L794:
ldrh r3, [r7, fp]
cmp r3, r8
- bhi .L794
+ bhi .L790
cmp r5, #0
- beq .L795
+ beq .L791
mov r1, r5
mov r0, #32768
bl __aeabi_idiv
uxth r5, r0
-.L795:
- ldr r3, .L800+4
+.L791:
+ ldr r3, .L796+4
mov r1, #6
ldr r2, [r3, #-2072]
mla r2, r1, r4, r2
strh r5, [r2, #4] @ movhi
- ldr r2, .L800+12
+ ldr r2, .L796+12
ldrh r2, [r3, r2]
cmp r2, r4
- beq .L796
- ldr r2, .L800+16
+ beq .L792
+ ldr r2, .L796+16
ldrh r2, [r3, r2]
cmp r2, r4
- beq .L796
- ldr r2, .L800+20
+ beq .L792
+ ldr r2, .L796+20
ldrh r2, [r3, r2]
cmp r2, r4
- beq .L796
+ beq .L792
ldr r2, [r3, #-2064]
mov r3, r4, asl #1
ldrh r3, [r2, r3]
cmp r3, #0
- bne .L797
+ bne .L793
add r6, r6, #1
mov r0, r4
uxth r6, r6
bl INSERT_FREE_LIST
- b .L796
-.L797:
+ b .L792
+.L793:
add sl, sl, #1
mov r0, r4
uxth sl, sl
bl INSERT_DATA_LIST
-.L796:
+.L792:
add r4, r4, #1
uxth r4, r4
-.L792:
+.L788:
movw r2, #3852
ldrh r3, [r7, r2]
cmp r3, r4
- bhi .L799
- ldr r3, .L800+4
+ bhi .L795
+ ldr r3, .L796+4
mov r0, #0
- ldr r2, .L800+8
+ ldr r2, .L796+8
strh sl, [r3, r2] @ movhi
add r2, r2, #8
strh r6, [r3, r2] @ movhi
ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L801:
+.L797:
.align 2
-.L800:
+.L796:
.word .LANCHOR0
.word .LANCHOR2
.word -2056
stmfd sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
.save {r3, r4, r5, r6, r7, r8, sl, lr}
mov r1, #0
- ldr r4, .L805
+ ldr r4, .L801
movw r6, #3922
- ldr r5, .L805+4
+ ldr r5, .L801+4
movw r7, #3950
mov r8, #12
ldr r2, [r4, #3940]
mov r2, #0
mov ip, r2
mvn r0, #0
- b .L803
-.L804:
+ b .L799
+.L800:
mul r3, r8, r2
ldr r1, [r5, #-1900]
add sl, r1, r3
bic r1, r1, #3
add r1, sl, r1
str r1, [r3, #8]
-.L803:
+.L799:
ldrh r3, [r4, r7]
- ldr r1, .L805
+ ldr r1, .L801
cmp r3, r2
- ldr r3, .L805+4
- bhi .L804
- ldr r0, .L805+8
+ ldr r3, .L801+4
+ bhi .L800
+ ldr r0, .L801+8
mvn r2, #0
strh r2, [r3, r0] @ movhi
- ldr r0, .L805+12
+ ldr r0, .L801+12
strh r2, [r3, r0] @ movhi
ldr r0, [r1, #3940]
- ldr r2, .L805+16
+ ldr r2, .L801+16
strh r0, [r3, r2] @ movhi
sub r2, r2, #6
- ldr r0, .L805+20
+ ldr r0, .L801+20
strh r0, [r3, r2] @ movhi
add r2, r2, #36
ldrh r0, [r3, r2]
strh r0, [r3, r2] @ movhi
movw r2, #3948
ldrh r1, [r1, r2]
- ldr r2, .L805+24
+ ldr r2, .L801+24
strh r1, [r3, r2] @ movhi
ldr r2, [r3, #-1044]
str r2, [r3, #-1076]
ldr r2, [r3, #-1036]
str r2, [r3, #-1064]
ldmfd sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L806:
+.L802:
.align 2
-.L805:
+.L801:
.word .LANCHOR0
.word .LANCHOR2
.word -1086
mov r0, r5
bl ftl_memset
mov r3, #0
- b .L808
-.L812:
+ b .L804
+.L808:
ldr r0, [r7, r3, asl #2]
mov r2, #0
ubfx r0, r0, #10, #16
- b .L809
-.L811:
+ b .L805
+.L807:
mov r1, r2, asl #1
add r2, r2, #1
ldrh ip, [r6, r1]
ldreqh ip, [r5, r1]
addeq ip, ip, #1
streqh ip, [r5, r1] @ movhi
-.L809:
+.L805:
ldrh r1, [r4, #10]
cmp r1, r2
- bhi .L811
+ bhi .L807
add r3, r3, #1
uxth r3, r3
-.L808:
+.L804:
ldrh r2, [r4, #6]
cmp r2, r3
- bhi .L812
+ bhi .L808
mov sl, #0
ldrh fp, [r5, #0]
mov r7, sl
- ldr r3, .L818
+ ldr r3, .L814
movw r2, #3914
- b .L813
-.L817:
+ b .L809
+.L813:
ldrh r1, [r4, #0]
cmp r1, r7
- bne .L814
+ bne .L810
ldrh r0, [r4, #2]
ldrh r1, [r3, r2]
cmp r0, r1
movcc r0, r7, asl #1
strcch r1, [r5, r0] @ movhi
-.L814:
+.L810:
mov r9, r7, asl #1
ldrh r8, [r5, r9]
cmp fp, r8
movhi sl, r7
movhi fp, r8
cmp r8, #0
- bne .L816
+ bne .L812
ldrh r0, [r6, r9]
cmp r0, #0
- beq .L816
+ beq .L812
mov r1, #1
stmia sp, {r2, r3}
bl FtlFreeSysBlkQueueIn
ldrh r1, [r4, #8]
sub r1, r1, #1
strh r1, [r4, #8] @ movhi
-.L816:
+.L812:
add r7, r7, #1
uxth r7, r7
-.L813:
+.L809:
ldrh r1, [r4, #10]
cmp r1, r7
- bhi .L817
+ bhi .L813
mov r0, sl
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L819:
+.L815:
.align 2
-.L818:
+.L814:
.word .LANCHOR0
.fnend
.size ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L821
+ ldr r3, .L817
movw r2, #4042
stmfd sp!, {r4, lr}
.save {r4, lr}
bl ftl_memset
mov r0, r4
ldmfd sp!, {r4, pc}
-.L822:
+.L818:
.align 2
-.L821:
+.L817:
.word .LANCHOR0
.fnend
.size FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L824
+ ldr r3, .L820
movw r2, #3980
mvn r1, #0
- ldr r0, .L824+4
+ ldr r0, .L820+4
strh r1, [r3, r2] @ movhi
add r2, r2, #6
mov r1, #0
mov r1, #255
mov r2, #16
b ftl_memset
-.L825:
+.L821:
.align 2
-.L824:
+.L820:
.word .LANCHOR0
.word .LANCHOR0+3992
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L830
- ldr r2, .L830+4
+ ldr r3, .L826
+ ldr r2, .L826+4
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
mov r5, r0
mov r3, #0
movw ip, #65535
mov r0, #1
-.L828:
+.L824:
ldrh r2, [r5, r3]
cmp r2, ip
ldmeqfd sp!, {r4, r5, r6, pc}
ldr r6, [r4, r1, asl #2]
orr r2, r6, r0, asl r2
str r2, [r4, r1, asl #2]
- bne .L828
+ bne .L824
ldmfd sp!, {r4, r5, r6, pc}
-.L831:
+.L827:
.align 2
-.L830:
+.L826:
.word -1032
.word .LANCHOR2
.fnend
stmfd sp!, {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
mvn r3, #0
- ldr r5, .L833
+ ldr r5, .L829
mov r4, #0
- ldr r2, .L833+4
+ ldr r2, .L829+4
mov r1, r4
- ldr r6, .L833+8
+ ldr r6, .L829+8
movw r7, #3854
str r3, [r5, #-1012]
strh r3, [r5, r2] @ movhi
bl ftl_memset
mov r1, r4
mov r2, #48
- ldr r0, .L833+12
+ ldr r0, .L829+12
bl ftl_memset
mov r1, r4
mov r2, #512
- ldr r0, .L833+16
+ ldr r0, .L829+16
bl ftl_memset
bl FtlGcBufInit
bl FtlL2PDataInit
mov r0, r4
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L834:
+.L830:
.align 2
-.L833:
+.L829:
.word .LANCHOR2
.word -1024
.word .LANCHOR0
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
.save {r4, r5, r6, r7, r8, r9, sl, lr}
movw r3, #65535
- ldr r4, .L866
+ ldr r4, .L862
mov r6, #0
- ldr r2, .L866+4
+ ldr r2, .L862+4
mov r0, #1024
- ldr r5, .L866+8
+ ldr r5, .L862+8
mov r7, #12
str r3, [r4, #-996]
mvn r3, #0
movw sl, #3844
strh r3, [r4, r2] @ movhi
mov r2, #32
- ldr r3, .L866+12
+ ldr r3, .L862+12
mov r8, #36
str r6, [r4, #-1708]
str r6, [r4, #-1848]
str r0, [r4, #-988]
ldrh r0, [r5, r6]
strhi r3, [r4, #-988]
- ldr r4, .L866
+ ldr r4, .L862
mov r0, r0, asl #1
bl ftl_malloc
str r0, [r4, #-1148]
mov r0, sl, asl #3
bl ftl_malloc
ldrh r3, [r5, r6]
- ldr sl, .L866+16
+ ldr sl, .L862+16
str r0, [r4, #-948]
ldr r0, [r4, #-1156]
mul r0, r0, r3
mul r0, r0, r3
bl ftl_malloc
ldrh r3, [r5, r6]
- ldr r6, .L866+20
+ ldr r6, .L862+20
str r0, [r4, #-1092]
mov r0, #6
mul r0, r0, r3
bl ftl_malloc
ldrh r1, [r4, r6]
mov r3, #1
- ldr ip, .L866+8
+ ldr ip, .L862+8
mov r1, r1, asl #2
mov r2, r1
str r0, [r5, #4008]
ldrh r5, [r5, r7]
- ldr r0, .L866+24
- b .L837
-.L838:
+ ldr r0, .L862+24
+ b .L833
+.L834:
ldr r4, [ip, #4008]
add r3, r3, #1
add r4, r4, r2
add r2, r2, r1
str r4, [r0, #4]!
-.L837:
+.L833:
cmp r3, r5
- bcc .L838
- ldr r0, .L866+28
+ bcc .L834
+ ldr r0, .L862+28
mov r2, #0
mov r1, r2
add r0, r0, r3, asl #2
- b .L839
-.L840:
+ b .L835
+.L836:
add ip, r0, r2
add r3, r3, #1
add r2, r2, #4
str r1, [ip, #28]
-.L839:
+.L835:
cmp r3, #7
- bls .L840
- ldr r3, .L866
+ bls .L836
+ ldr r3, .L862
ldr r2, [r3, #-1044]
cmp r2, #0
- beq .L865
-.L841:
+ beq .L861
+.L837:
ldr r2, [r3, #-1096]
cmp r2, #0
- beq .L865
-.L843:
+ beq .L861
+.L839:
ldr r2, [r3, #-1036]
cmp r2, #0
- beq .L865
-.L844:
+ beq .L861
+.L840:
ldr r2, [r3, #-1040]
cmp r2, #0
- beq .L865
-.L845:
+ beq .L861
+.L841:
ldr r2, [r3, #-1900]
cmp r2, #0
- beq .L865
-.L846:
+ beq .L861
+.L842:
ldr r2, [r3, #-1092]
cmp r2, #0
- beq .L865
-.L847:
+ beq .L861
+.L843:
ldr r2, [r3, #-2072]
cmp r2, #0
- beq .L865
-.L848:
- ldr r2, .L866+8
+ beq .L861
+.L844:
+ ldr r2, .L862+8
ldr r2, [r2, #4008]
cmp r2, #0
- beq .L865
-.L849:
+ beq .L861
+.L845:
ldr r3, [r3, #-2064]
cmp r3, #0
- beq .L865
-.L850:
- ldr r3, .L866
+ beq .L861
+.L846:
+ ldr r3, .L862
ldr r2, [r3, #-1148]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-1144]
cmp r2, #0
- beq .L865
-.L852:
+ beq .L861
+.L848:
ldr r2, [r3, #-984]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-976]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-2088]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-1160]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-980]
cmp r2, #0
- beq .L865
-.L854:
+ beq .L861
+.L850:
ldr r2, [r3, #-2076]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-972]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r3, [r3, #-968]
cmp r3, #0
- beq .L865
- ldr r3, .L866
+ beq .L861
+ ldr r3, .L862
ldr r2, [r3, #-1168]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-960]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-956]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-1172]
cmp r2, #0
- beq .L865
-.L856:
+ beq .L861
+.L852:
ldr r2, [r3, #-952]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-948]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r2, [r3, #-1164]
cmp r2, #0
- beq .L865
-.L858:
+ beq .L861
+.L854:
ldr r2, [r3, #-2084]
cmp r2, #0
- beq .L865
+ beq .L861
ldr r3, [r3, #-1008]
cmp r3, #0
- beq .L865
-.L860:
- ldr r3, .L866+8
+ beq .L861
+.L856:
+ ldr r3, .L862+8
ldr r3, [r3, #3960]
cmp r3, #0
- beq .L865
-.L861:
- ldr r3, .L866
+ beq .L861
+.L857:
+ ldr r3, .L862
ldr r2, [r3, #-928]
cmp r2, #0
- beq .L865
-.L862:
+ beq .L861
+.L858:
ldr r2, [r3, #-924]
cmp r2, #0
- beq .L865
-.L863:
+ beq .L861
+.L859:
ldr r3, [r3, #-920]
cmp r3, #0
- bne .L864
-.L865:
- ldr r0, .L866+32
- ldr r1, .L866+36
+ bne .L860
+.L861:
+ ldr r0, .L862+32
+ ldr r1, .L862+36
bl printk
mvn r0, #0
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L864:
+.L860:
mov r0, #0
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L867:
+.L863:
.align 2
-.L866:
+.L862:
.word .LANCHOR2
.word -1138
.word .LANCHOR0
.word -1032
.word .LANCHOR0+4008
.word .LANCHOR0+3980
- .word .LC81
+ .word .LC80
.word .LANCHOR3
.fnend
.size FtlMemInit, .-FtlMemInit
mov r2, #11
mov r4, r0
bl ftl_memset
- ldr r3, .L871
+ ldr r3, .L867
ldr r1, [r3, #2776]
ldr r0, [r3, #4]
ldrb r2, [r1, #9] @ zero_extendqisi2
mov r1, #32
strb r1, [r4, #8]
ldrb r2, [r2, #7] @ zero_extendqisi2
- ldr r1, .L871+4
+ ldr r1, .L867+4
strb r0, [r4, #10]
strb r2, [r4, #9]
mov r2, #1
- b .L869
-.L870:
+ b .L865
+.L866:
ldrb r5, [r3, r1] @ zero_extendqisi2
add r3, r3, #1
ldrb r0, [r4, #10] @ zero_extendqisi2
orr r0, r0, r2, asl r5
strb r0, [r4, #10]
-.L869:
+.L865:
uxtb r0, r3
cmp r0, ip
- bcc .L870
+ bcc .L866
ldmfd sp!, {r3, r4, r5, pc}
-.L872:
+.L868:
.align 2
-.L871:
+.L867:
.word .LANCHOR0
.word .LANCHOR0+3768
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r1, .L885
+ ldr r1, .L881
mov r2, #0
stmfd sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
.save {r3, r4, r5, r6, r7, r8, sl, lr}
- ldr r3, .L885+4
+ ldr r3, .L881+4
strb r2, [r1, #-916]
- ldr r1, .L885+8
+ ldr r1, .L881+8
strb r2, [r3, #3766]
movw r2, #2698
ldrh r2, [r1, r2]
cmp r2, #256
str r2, [r3, #4]
movhi r2, #512
- bhi .L884
+ bhi .L880
cmp r2, #128
- bls .L875
+ bls .L871
mov r2, #256
-.L884:
+.L880:
str r2, [r3, #4]
-.L875:
+.L871:
mov r1, #0
mov r2, #8
- ldr r0, .L885+12
+ ldr r0, .L881+12
mov r6, #0
bl ftl_memset
mov r1, #0
mov r2, #32
- ldr r0, .L885+16
+ ldr r0, .L881+16
bl ftl_memset
- ldr r0, .L885+20
+ ldr r0, .L881+20
mov r1, #0
mov r2, #128
bl ftl_memset
- ldr r7, .L885+24
- ldr r5, .L885+4
+ ldr r7, .L881+24
+ ldr r5, .L881+4
mov r8, r7
-.L877:
+.L873:
ldr r4, [r5, #2776]
mov r1, r8
add r0, r4, #1
ldrb r2, [r4, #0] @ zero_extendqisi2
bl FlashMemCmp8
cmp r0, #0
- bne .L876
+ bne .L872
ldrb r3, [r5, #3766] @ zero_extendqisi2
add r2, r5, r3, asl #2
str r0, [r2, #2740]
add r3, r3, #1
strb r3, [r5, #3766]
strb r6, [r2, #3768]
-.L876:
+.L872:
add r6, r6, #1
add r8, r8, #8
cmp r6, #4
- bne .L877
- ldr r5, .L885+4
- ldr r3, .L885
+ bne .L873
+ ldr r5, .L881+4
+ ldr r3, .L881
ldrb r2, [r5, #3766] @ zero_extendqisi2
strb r2, [r3, #-916]
ldrb r3, [r4, #8] @ zero_extendqisi2
cmp r3, #2
- bne .L878
+ bne .L874
add sl, r4, #1
mov r6, #0
mov r8, r5
-.L881:
+.L877:
mov r0, sl
mov r1, r7
ldrb r2, [r4, #0] @ zero_extendqisi2
bl FlashMemCmp8
cmp r0, #0
- bne .L879
+ bne .L875
ldrb r1, [r4, #13] @ zero_extendqisi2
ldr r0, [r5, #4]
ldrb r3, [r5, #3766] @ zero_extendqisi2
add r3, r3, #1
strb r3, [r8, #3766]
strb r6, [r2, #3768]
-.L879:
+.L875:
add r6, r6, #1
add r7, r7, #8
cmp r6, #4
- bne .L881
-.L878:
- ldr r3, .L885+4
+ bne .L877
+.L874:
+ ldr r3, .L881+4
ldrb r1, [r4, #13] @ zero_extendqisi2
- ldr r2, .L885
+ ldr r2, .L881
ldrb r3, [r3, #3766] @ zero_extendqisi2
mul r1, r1, r3
ldrh r3, [r4, #14]
mul r1, r3, r1
- ldr r3, .L885+28
+ ldr r3, .L881+28
strh r1, [r2, r3] @ movhi
ldmfd sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L886:
+.L882:
.align 2
-.L885:
+.L881:
.word .LANCHOR2
.word .LANCHOR0
.word .LANCHOR1
stmfd sp!, {r4, lr}
.save {r4, lr}
mov r4, r1
- bne .L888
- ldr r3, .L927
-.L889:
+ bne .L884
+ ldr r3, .L923
+.L885:
strh r0, [r3, #2]! @ movhi
add r0, r0, #1
uxth r0, r0
cmp r0, #256
- bne .L889
- b .L890
-.L888:
+ bne .L885
+ b .L886
+.L884:
cmp r0, #1
- bne .L891
- ldr r0, .L927+4
+ bne .L887
+ ldr r0, .L923+4
mov r2, #0
mov r3, r2
-.L894:
+.L890:
uxth r1, r3
cmp r1, #3
- bls .L892
+ bls .L888
tst r3, #1
moveq r1, #2
movne r1, #3
rsb r1, r1, r2
uxth r1, r1
-.L892:
+.L888:
add r3, r3, #1
strh r1, [r2, r0] @ movhi
cmp r3, #256
add r2, r2, #2
- bne .L894
- b .L890
-.L891:
+ bne .L890
+ b .L886
+.L887:
cmp r0, #2
- bne .L895
+ bne .L891
mov r3, #0
- ldr r0, .L927
+ ldr r0, .L923
movw r2, #65535
mov r1, r3
- b .L926
-.L898:
+ b .L922
+.L894:
cmp r3, #1
movls r1, r3
movhi r1, r2
-.L926:
+.L922:
add r3, r3, #1
add r2, r2, #2
strh r1, [r0, #2]! @ movhi
uxth r3, r3
uxth r2, r2
cmp r3, #256
- bne .L898
- b .L890
-.L895:
+ bne .L894
+ b .L886
+.L891:
cmp r0, #3
- bne .L899
- ldr r0, .L927+4
+ bne .L895
+ ldr r0, .L923+4
mov r2, #0
mov r3, r2
-.L902:
+.L898:
uxth r1, r3
cmp r1, #5
- bls .L900
+ bls .L896
tst r3, #1
moveq r1, #4
movne r1, #5
rsb r1, r1, r2
uxth r1, r1
-.L900:
+.L896:
add r3, r3, #1
strh r1, [r2, r0] @ movhi
cmp r3, #256
add r2, r2, #2
- bne .L902
- b .L890
-.L899:
+ bne .L898
+ b .L886
+.L895:
cmp r0, #4
mov r2, #0
- bne .L903
- ldr r3, .L927+8
+ bne .L899
+ ldr r3, .L923+8
movw r1, #2228
strh r2, [r3, r1] @ movhi
movw r2, #2230
mov r1, #5
strh r0, [r3, r2] @ movhi
add r2, r2, #2
- ldr r0, .L927+12
+ ldr r0, .L923+12
strh r1, [r3, r2] @ movhi
mov r2, #2240
mov r1, #7
strh r1, [r3, r2] @ movhi
mov r2, #16
mov r3, r1
-.L905:
+.L901:
tst r3, #1
add r3, r3, #1
moveq r1, #6
add r2, r2, #2
strh r1, [r0, #2]! @ movhi
uxth r2, r2
- bne .L905
- b .L890
-.L903:
+ bne .L901
+ b .L886
+.L899:
cmp r0, #5
- bne .L906
- ldr r1, .L927
+ bne .L902
+ ldr r1, .L923
mov r3, r2
-.L907:
+.L903:
strh r3, [r1, #2]! @ movhi
add r3, r3, #1
uxth r3, r3
cmp r3, #16
- bne .L907
- ldr r2, .L927+16
-.L908:
+ bne .L903
+ ldr r2, .L923+16
+.L904:
strh r3, [r2, #2]! @ movhi
add r3, r3, #2
uxth r3, r3
cmp r3, #496
- bne .L908
- b .L890
-.L906:
+ bne .L904
+ b .L886
+.L902:
cmp r0, #6
- bne .L890
- ldr r0, .L927
+ bne .L886
+ ldr r0, .L923
mov r3, r2
-.L911:
+.L907:
uxth r1, r3
cmp r1, #5
- bls .L909
+ bls .L905
tst r3, #1
moveq r1, #10
movne r1, #12
rsb r1, r1, r2
uxth r1, r1
-.L909:
+.L905:
add r3, r3, #1
add r2, r2, #3
cmp r3, #256
strh r1, [r0, #2]! @ movhi
uxth r2, r2
- bne .L911
-.L890:
+ bne .L907
+.L886:
mov r2, #1024
- ldr r0, .L927+20
+ ldr r0, .L923+20
mov r1, #255
uxth r4, r4
bl ftl_memset
- ldr r2, .L927
+ ldr r2, .L923
mov r3, #0
- ldr r0, .L927+24
- b .L912
-.L913:
+ ldr r0, .L923+24
+ b .L908
+.L909:
ldrh r1, [r2, #2]!
add r3, r3, #1
uxth r3, r3
add ip, r0, r1, asl #1
sub ip, ip, #912
strh r1, [ip, #0] @ movhi
-.L912:
+.L908:
cmp r3, r4
- bcc .L913
+ bcc .L909
ldmfd sp!, {r4, pc}
-.L928:
+.L924:
.align 2
-.L927:
+.L923:
.word .LANCHOR0+2226
.word .LANCHOR0+2228
.word .LANCHOR0
stmfd sp!, {r4, lr}
.save {r4, lr}
cmp r2, #0
- ldr r4, .L934
+ ldr r4, .L930
mov ip, r0
mov r2, r3
ldr r4, [r4, #112]
movne r1, ip
ldmfd sp!, {r4, lr}
b memcpy
-.L935:
+.L931:
.align 2
-.L934:
+.L930:
.word .LANCHOR2
.fnend
.size FlashSramLoadStore, .-FlashSramLoadStore
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L941
+ ldr r3, .L937
ldr r0, [r3, #3952]
bx lr
-.L942:
+.L938:
.align 2
-.L941:
+.L937:
.word .LANCHOR0
.fnend
.size rk_ftl_get_capacity, .-rk_ftl_get_capacity
mov r5, r2
mov sl, r3
mov r7, r8
- b .L944
-.L950:
+ b .L940
+.L946:
cmp r8, #0
- bne .L945
- ldr r0, .L952
+ bne .L941
+ ldr r0, .L948
mov r1, r6
mov r2, r7
bl printk
-.L945:
+.L941:
cmp r5, #4
- ldreq r0, .L952+4
+ ldreq r0, .L948+4
ldreq r1, [r4, r7, asl #2]
- beq .L951
+ beq .L947
cmp r5, #2
moveq r3, r7, asl #1
- ldreq r0, .L952+4
+ ldreq r0, .L948+4
ldreqsh r1, [r4, r3]
- ldrne r0, .L952+4
+ ldrne r0, .L948+4
ldrneb r1, [r4, r7] @ zero_extendqisi2
-.L951:
+.L947:
add r8, r8, #1
bl printk
cmp r8, #15
- bls .L949
- ldr r0, .L952+8
+ bls .L945
+ ldr r0, .L948+8
mov r8, #0
- ldr r1, .L952+12
+ ldr r1, .L948+12
bl printk
-.L949:
+.L945:
add r7, r7, #1
-.L944:
+.L940:
cmp r7, sl
- bne .L950
- ldr r0, .L952+8
- ldr r1, .L952+12
+ bne .L946
+ ldr r0, .L948+8
+ ldr r1, .L948+12
ldmfd sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
b printk
-.L953:
+.L949:
.align 2
-.L952:
+.L948:
+ .word .LC81
.word .LC82
+ .word .LC74
.word .LC83
- .word .LC75
- .word .LC84
.fnend
.size rknand_print_hex, .-rknand_print_hex
.align 2
@ frame_needed = 0, uses_anonymous_args = 0
stmfd sp!, {r0, r1, r4, r5, r6, lr}
.save {r0, r1, r4, r5, r6, lr}
- ldr r6, .L977
+ ldr r6, .L973
add r0, r6, r0, asl #3
ldr r3, [r6, #12]
ldr r4, [r0, #16]
cmp r3, #3
- bls .L971
+ bls .L967
ldr r3, [r4, #16]
tst r3, #4
- beq .L971
+ beq .L967
mov r0, r4
bl wait_for_nandc_xfer_completed
ldr r5, [r4, #16]
ands r5, r5, #2
str r3, [sp, #0]
movne r5, #0
- bne .L975
- b .L976
-.L961:
+ bne .L971
+ b .L972
+.L957:
ldr r3, [r6, #12]
cmp r3, #5
- bls .L958
+ bls .L954
ldr r3, [r4, #0]
str r3, [sp, #4]
ldr r3, [sp, #4]
tst r3, #8192
- beq .L958
+ beq .L954
ldr r3, [sp, #4]
tst r3, #131072
- bne .L959
-.L958:
+ bne .L955
+.L954:
add r5, r5, #1
bic r3, r5, #-16777216
cmp r3, #0
- bne .L975
+ bne .L971
ldr r2, [r4, #28]
mov r1, r5
ldr r3, [sp, #0]
ubfx r2, r2, #16, #5
- ldr r0, .L977+4
+ ldr r0, .L973+4
ubfx r3, r3, #22, #6
bl printk
- ldr r0, .L977+8
+ ldr r0, .L973+8
mov r1, r4
mov r2, #4
mov r3, #512
bl rknand_print_hex
-.L975:
+.L971:
ldr r2, [r4, #28]
ldr r3, [sp, #0]
ubfx r2, r2, #16, #5
ubfx r3, r3, #22, #6
cmp r2, r3
- blt .L961
-.L959:
- ldr r4, .L977
+ blt .L957
+.L955:
+ ldr r4, .L973
ldr r3, [r4, #3820]
cmp r3, #0
- beq .L962
+ beq .L958
ldr r1, [sp, #0]
mov r2, #0
ldr r0, [r4, #3812]
ubfx r1, r1, #22, #5
mov r1, r1, asl #7
bl rknand_dma_unmap_single
- b .L962
-.L965:
+ b .L958
+.L961:
ldr r3, [r4, #8]
add r5, r5, #1
str r3, [sp, #0]
bic r3, r5, #-16777216
cmp r3, #0
- bne .L976
+ bne .L972
ldr r2, [sp, #0]
mov r1, r5
ldr r3, [r4, #28]
- ldr r0, .L977+12
+ ldr r0, .L973+12
ubfx r3, r3, #16, #5
bl printk
- ldr r0, .L977+8
+ ldr r0, .L973+8
mov r1, r4
mov r2, #4
mov r3, #512
bl rknand_print_hex
-.L976:
+.L972:
ldr r3, [sp, #0]
tst r3, #1048576
- beq .L965
- ldr r6, .L977
+ beq .L961
+ ldr r6, .L973
ldr r3, [r6, #3828]
cmp r3, #0
- beq .L966
+ beq .L962
mov r0, r4
bl NandcSendDumpDataStart
-.L966:
+.L962:
ldr r3, [r6, #3820]
- ldr r5, .L977
+ ldr r5, .L973
cmp r3, #0
- beq .L967
+ beq .L963
ldr r1, [sp, #0]
mov r2, #1
ldr r0, [r5, #3812]
ubfx r1, r1, #22, #5
mov r1, r1, asl #7
bl rknand_dma_unmap_single
-.L967:
- ldr r3, .L977
+.L963:
+ ldr r3, .L973
ldr r3, [r3, #3828]
cmp r3, #0
- beq .L962
+ beq .L958
mov r0, r4
bl NandcSendDumpDataDone
-.L962:
- ldr r3, .L977
+.L958:
+ ldr r3, .L973
mov r2, #0
str r2, [r3, #3820]
- b .L954
-.L971:
+ b .L950
+.L967:
ldr r3, [r4, #8]
str r3, [sp, #0]
ldr r3, [sp, #0]
tst r3, #1048576
- beq .L971
-.L954:
+ beq .L967
+.L950:
ldmfd sp!, {r2, r3, r4, r5, r6, pc}
-.L978:
+.L974:
.align 2
-.L977:
+.L973:
.word .LANCHOR0
+ .word .LC84
.word .LC85
.word .LC86
- .word .LC87
.fnend
.size NandcXferComp, .-NandcXferComp
.align 2
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r4, r3
mov r9, r3
- ldr r3, .L1017
+ ldr r3, .L1013
.pad #92
sub sp, sp, #92
tst r4, #63
mov sl, r2
ldr r5, [sp, #128]
ldr r6, [r3, #16]
- bne .L980
+ bne .L976
cmp r5, #0
- bne .L981
+ bne .L977
add r0, sp, #24
mov r1, #255
mov r2, #64
add r5, sp, #24
bl ftl_memset
-.L981:
+.L977:
mov r0, r7
mov r1, fp
mov r2, sl
bl NandcXferComp
cmp fp, #0
movne r4, #0
- bne .L982
- ldr r1, .L1017
+ bne .L978
+ ldr r1, .L1013
mov r0, sl, lsr #1
mov r3, fp
mov r2, fp
cmp ip, #24
movhi ip, #128
movls ip, #64
- b .L984
-.L985:
+ b .L980
+.L981:
ldr r1, [r4, #3800]
mov r3, r3, lsr #2
add r2, r2, #1
strb r3, [r5, #3]
add r5, r5, #4
mov r3, r7
-.L984:
+.L980:
cmp r2, r0
add r7, r3, ip
- ldr r1, .L1017
- bcc .L985
+ ldr r1, .L1013
+ bcc .L981
mov r3, #0
ldr r0, [r1, #3832]
mov sl, sl, lsr #2
ldr r1, [r1, #12]
mov r4, r3
- b .L986
-.L992:
+ b .L982
+.L988:
add r2, r3, #8
ldr r2, [r6, r2, asl #2]
str r2, [sp, #20]
ldr r2, [sp, #20]
tst r2, #4
- bne .L1007
+ bne .L1003
ldr r2, [sp, #20]
ands r2, r2, #32768
- bne .L1007
+ bne .L1003
cmp r1, #5
- bls .L988
+ bls .L984
ldr r7, [sp, #20]
ldr ip, [sp, #20]
ldr r5, [sp, #20]
ubfxls ip, ip, #16, #5
ubfxhi r2, r2, #27, #1
ubfxls r2, r2, #29, #1
- b .L1015
-.L988:
+ b .L1011
+.L984:
cmp r1, #3
- bls .L990
+ bls .L986
ldr r7, [sp, #20]
ldr ip, [sp, #20]
ldr r5, [sp, #20]
ubfxls ip, ip, #16, #5
ubfxhi r2, r2, #28, #1
ubfxls r2, r2, #30, #1
-.L1015:
+.L1011:
orr r2, ip, r2, asl #5
-.L990:
+.L986:
cmp r4, r2
movcc r4, r2
- b .L987
-.L1007:
+ b .L983
+.L1003:
mvn r4, #0
-.L987:
+.L983:
add r3, r3, #1
-.L986:
+.L982:
cmp r3, sl
- bcs .L982
+ bcs .L978
cmp r0, #0
- bne .L992
-.L982:
+ bne .L988
+.L978:
mov r3, #0
str r3, [r6, #16]
- b .L993
-.L980:
+ b .L989
+.L976:
cmp r1, #1
mov r8, #0
- bne .L1013
- b .L994
-.L997:
+ bne .L1009
+ b .L990
+.L993:
cmp r5, #0
and r4, r8, #3
mov r0, r6
mov r0, r7
bl NandcXferComp
add r9, r9, #1024
-.L994:
+.L990:
cmp r8, sl
- bcc .L997
+ bcc .L993
mov r4, #0
- b .L993
-.L1013:
+ b .L989
+.L1009:
mov r1, r8
mov r2, #2
mov r3, r8
mov ip, r8
mov fp, r6
mov r6, r5
- b .L1016
-.L1002:
+ b .L1012
+.L998:
mov r0, r7
bl NandcXferComp
ldr r3, [fp, #32]
add ip, r5, #2
cmp ip, sl
str r3, [sp, #20]
- bcs .L999
+ bcs .L995
mov r3, #0
mov r0, r7
str r3, [sp, #0]
str ip, [sp, #8]
bl NandcXferStart
ldr ip, [sp, #8]
-.L999:
+.L995:
ldr r3, [sp, #20]
tst r3, #4
mvnne r4, #0
- bne .L1000
+ bne .L996
ldr r2, [sp, #20]
ldr r3, [sp, #20]
ubfx r2, r2, #3, #5
orr r3, r2, r3, asl #5
cmp r4, r3
movcc r4, r3
-.L1000:
+.L996:
cmp r6, #0
and r2, r8, #3
mov r0, fp
str r5, [sp, #0]
bl NandcCopy1KB
ldr ip, [sp, #8]
-.L1016:
+.L1012:
cmp ip, sl
mov r5, ip
- bcc .L1002
+ bcc .L998
mov r6, fp
ldr fp, [sp, #12]
-.L993:
- ldr r3, .L1017
+.L989:
+ ldr r3, .L1013
rsbs fp, fp, #1
movcc fp, #0
ldr r3, [r3, #12]
cmp r3, #5
movls fp, #0
cmp fp, #0
- beq .L1003
+ beq .L999
ldr r3, [r6, #0]
and r2, r3, #139264
cmp r2, #139264
orreq r3, r3, #131072
streq r3, [r6, #0]
mvneq r4, #0
-.L1003:
+.L999:
mov r0, r4
add sp, sp, #92
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1018:
+.L1014:
.align 2
-.L1017:
+.L1013:
.word .LANCHOR0
.fnend
.size NandcXferData, .-NandcXferData
stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
.save {r0, r1, r4, r5, r6, r7, r8, lr}
mov r8, r3
- ldr r3, .L1022
+ ldr r3, .L1018
subs r4, r0, #0
mov r5, r1
mov r6, r2
ldrb r7, [r3, #2697] @ zero_extendqisi2
- bne .L1020
- ldr r3, .L1022+4
+ bne .L1016
+ ldr r3, .L1018+4
ldrb r2, [r3, #1] @ zero_extendqisi2
ldr r1, [r3, #4]
mul r2, r1, r2
cmp r5, r2
- bcs .L1020
+ bcs .L1016
ldrb r3, [r3, #0] @ zero_extendqisi2
cmp r3, #0
subeq r7, r7, #2
movne r7, #4
-.L1020:
+.L1016:
mov r0, r4
bl NandcWaitFlashReady
mov r0, r4
bl NandcFlashDeCs
and r0, r5, #1
ldmfd sp!, {r2, r3, r4, r5, r6, r7, r8, pc}
-.L1023:
+.L1019:
.align 2
-.L1022:
+.L1018:
.word .LANCHOR1
.word .LANCHOR0
.fnend
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r8, r2
- ldr r2, .L1035
+ ldr r2, .L1031
.pad #28
sub sp, sp, #28
mov r6, r0
ldr r3, [r2, #2776]
cmp r1, #0
ldrb r3, [r3, #19] @ zero_extendqisi2
- beq .L1025
+ beq .L1021
ldr r1, [r2, #3788]
- ldr r2, .L1035+4
+ ldr r2, .L1031+4
cmp r1, r2
- beq .L1024
-.L1025:
+ beq .L1020
+.L1021:
sub r2, r3, #5
uxtb r2, r2
cmp r3, #68
cmpne r2, #1
- bls .L1028
+ bls .L1024
cmp r3, #35
cmpne r3, #17
- beq .L1028
+ beq .L1024
cmp r3, #18
cmpne r3, #19
- beq .L1028
- b .L1024
-.L1033:
+ beq .L1024
+ b .L1020
+.L1029:
add r3, sl, r8, asl #1
sub r3, r3, #912
ldrh r2, [r3, #0]
movw r3, #65535
cmp r2, r3
- bne .L1024
+ bne .L1020
mov r1, #255
ldr r0, [sl, #116]
mov r2, #32768
bl ftl_memset
ldr r1, [sp, #20]
cmp r1, #1
- bhi .L1029
- ldr r3, .L1035+8
+ bhi .L1025
+ ldr r3, .L1031+8
ldr r2, [r3, #2964]
cmp r2, #0
- beq .L1030
+ beq .L1026
ldr r1, [sp, #16]
mov r0, r6
mov fp, #0
bl NandcFlashDeCs
ldr r2, [sp, #8]
cmp r2, #1
- bne .L1031
+ bne .L1027
mov r0, r6
bl NandcFlashCs
mov r2, #238
tst r2, #255
moveq r2, #2
streq r2, [r3, #2964]
-.L1032:
+.L1028:
strne fp, [r3, #2964]
- bne .L1024
-.L1031:
+ bne .L1020
+.L1027:
ldr r3, [sp, #12]
mov r0, r6
ldr r2, [sl, #116]
str r3, [r5, r4, asl #8]
str r3, [r5, r4, asl #8]
bl NandcFlashDeCs
- b .L1030
-.L1029:
+ b .L1026
+.L1025:
ldr r2, [sp, #12]
mov r0, r6
mov r3, #0
add r1, r8, r2
ldr r2, [sl, #116]
bl FlashProgPage
-.L1030:
+.L1026:
add r8, r8, #1
uxth r8, r8
- b .L1034
-.L1028:
- ldr sl, .L1035+12
+ b .L1030
+.L1024:
+ ldr sl, .L1031+12
sub r3, r3, #17
- ldr r9, .L1035
+ ldr r9, .L1031
uxtb r3, r3
str r3, [sp, #20]
add r3, r9, r6, asl #3
str r3, [sp, #16]
-.L1034:
+.L1030:
ldr r3, [r9, #2776]
ldrh r3, [r3, #10]
cmp r3, r8
- bhi .L1033
-.L1024:
+ bhi .L1029
+.L1020:
add sp, sp, #28
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1036:
+.L1032:
.align 2
-.L1035:
+.L1031:
.word .LANCHOR0
.word 1446522928
.word .LANCHOR1
stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
.save {r0, r1, r4, r5, r6, r7, r8, lr}
mov r8, r3
- ldr r3, .L1040
+ ldr r3, .L1036
subs r4, r0, #0
mov r6, r1
mov r5, r2
ldrb r7, [r3, #2697] @ zero_extendqisi2
- bne .L1038
- ldr r3, .L1040+4
+ bne .L1034
+ ldr r3, .L1036+4
ldrb r2, [r3, #1] @ zero_extendqisi2
ldr r3, [r3, #4]
mul r3, r3, r2
cmp r1, r3
movcc r7, #4
-.L1038:
+.L1034:
mov r0, r4
bl NandcWaitFlashReady
mov r0, r4
bl NandcFlashDeCs
mov r0, r5
ldmfd sp!, {r2, r3, r4, r5, r6, r7, r8, pc}
-.L1041:
+.L1037:
.align 2
-.L1040:
+.L1036:
.word .LANCHOR1
.word .LANCHOR0
.fnend
stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r7, r3
- ldr fp, .L1053
+ ldr fp, .L1049
mov r6, r0
str r1, [sp, #4]
mov sl, r2
ldrb r5, [r3, #2920] @ zero_extendqisi2
bl NandcWaitFlashReady
mov ip, fp
- b .L1043
-.L1048:
+ b .L1039
+.L1044:
add r5, r5, #1
ldrb r1, [fp, #2909] @ zero_extendqisi2
mov r0, r6
- ldr r2, .L1053+4
+ ldr r2, .L1049+4
uxtb r5, r5
str ip, [sp, #0]
cmp r5, r9
bl FlashReadRawPage
ldr ip, [sp, #0]
cmn r0, #1
- beq .L1045
+ beq .L1041
ldrb r3, [ip, #3836] @ zero_extendqisi2
cmn r4, #1
moveq r4, r0
add r3, r3, r3, asl #1
cmp r0, r3, lsr #2
- bcc .L1052
+ bcc .L1048
mov r7, #0
mov sl, r7
-.L1045:
+.L1041:
add r8, r8, #1
-.L1043:
+.L1039:
cmp r8, r9
- bcc .L1048
- b .L1047
-.L1052:
+ bcc .L1044
+ b .L1043
+.L1048:
mov r4, r0
-.L1047:
- ldr r3, .L1053
+.L1043:
+ ldr r3, .L1049
adds r0, r4, #1
add r6, r3, r6
movne r0, #1
moveq r0, r4
movne r0, #256
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1054:
+.L1050:
.align 2
-.L1053:
+.L1049:
.word .LANCHOR0
.word .LANCHOR0+2912
.fnend
bl NandcWaitFlashReady
ldr r1, [sp, #8]
mvn r5, #0
- ldr r3, .L1067
- ldr ip, .L1067+4
+ ldr r3, .L1063
+ ldr ip, .L1063+4
add r2, r3, r1, asl #3
ldrb r7, [r2, #20] @ zero_extendqisi2
ldr r6, [r2, #16]
add r7, r7, #8
mov r8, r6
add r4, r6, r7, asl #8
- b .L1066
-.L1060:
+ b .L1062
+.L1056:
mov r2, #239
mov r3, #137
str r2, [r4, #8]
bl FlashReadRawPage
ldr ip, [sp, #4]
cmn r0, #1
- beq .L1066
- ldr r1, .L1067
+ beq .L1062
+ ldr r1, .L1063
cmn r5, #1
moveq r5, r0
ldrb r3, [r1, #3836] @ zero_extendqisi2
add r3, r3, r3, asl #1
cmp r0, r3, lsr #2
- bcc .L1063
+ bcc .L1059
mov r9, r6
mov fp, r6
-.L1066:
+.L1062:
ldrb r3, [ip, #120] @ zero_extendqisi2
cmp sl, r3
- bcc .L1060
+ bcc .L1056
mov r6, r8
- b .L1059
-.L1063:
+ b .L1055
+.L1059:
mov r6, r8
mov r5, r0
-.L1059:
+.L1055:
mov r3, #239
mov r0, #200
str r3, [r4, #8]
str r3, [r6, r7, asl #8]
movne r0, #1
str r3, [r6, r7, asl #8]
- ldr r3, .L1067
+ ldr r3, .L1063
ldrb r3, [r3, #3836] @ zero_extendqisi2
add r3, r3, r3, asl #1
cmp r5, r3, lsr #2
movne r0, #256
add sp, sp, #20
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1068:
+.L1064:
.align 2
-.L1067:
+.L1063:
.word .LANCHOR0
.word .LANCHOR2
.fnend
mov r6, r3
mov r9, r1
bl NandcWaitFlashReady
- ldr ip, .L1078
+ ldr ip, .L1074
mov r5, #1
mvn r4, #0
- ldr fp, .L1078+4
+ ldr fp, .L1074+4
add r3, ip, r8, asl #3
ldrb sl, [r3, #20] @ zero_extendqisi2
ldr r2, [r3, #16]
add sl, sl, #8
add sl, r2, sl, asl #8
- b .L1070
-.L1074:
+ b .L1066
+.L1070:
mov r0, sl
uxtb r1, r5
str ip, [sp, #4]
bl FlashReadRawPage
ldr ip, [sp, #4]
cmn r0, #1
- beq .L1071
+ beq .L1067
ldrb r3, [ip, #3836] @ zero_extendqisi2
cmn r4, #1
moveq r4, r0
add r3, r3, r3, asl #1
cmp r0, r3, lsr #2
- bcc .L1077
+ bcc .L1073
mov r6, #0
mov r7, r6
-.L1071:
+.L1067:
add r5, r5, #1
-.L1070:
+.L1066:
ldrb r3, [fp, #120] @ zero_extendqisi2
add r3, r3, #1
cmp r5, r3
- bcc .L1074
- b .L1073
-.L1077:
- mov r4, r0
+ bcc .L1070
+ b .L1069
.L1073:
+ mov r4, r0
+.L1069:
mov r0, sl
mov r1, #0
bl SamsungSetRRPara
- ldr r3, .L1078
+ ldr r3, .L1074
adds r0, r4, #1
ldrb r3, [r3, #3836] @ zero_extendqisi2
movne r0, #1
moveq r0, r4
movne r0, #256
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1079:
+.L1075:
.align 2
-.L1078:
+.L1074:
.word .LANCHOR0
.word .LANCHOR2
.fnend
mov r9, r2
mov r7, r3
bl NandcWaitFlashReady
- ldr r3, .L1101
+ ldr r3, .L1097
add r2, r3, r8, asl #3
ldr r1, [r2, #16]
ldrb r4, [r2, #20] @ zero_extendqisi2
uxtb r2, r2
cmp r2, #1
movls sl, #0
- bls .L1081
+ bls .L1077
ldrb sl, [r3, #3777] @ zero_extendqisi2
cmp sl, #0
- beq .L1082
+ beq .L1078
mov r0, #0
mov sl, #1
bl NandcSetDdrMode
-.L1082:
+.L1078:
mov r3, #92
str r3, [r4, #8]
mov r3, #197
str r3, [r4, #8]
-.L1081:
+.L1077:
mov r6, #1
mvn r5, #0
- ldr fp, .L1101
- b .L1083
-.L1092:
+ ldr fp, .L1097
+ b .L1079
+.L1088:
ldrb r3, [fp, #3765] @ zero_extendqisi2
mov r0, r4
uxtb r1, r6
sub r3, r3, #67
uxtb r3, r3
cmp r3, #1
- bhi .L1084
+ bhi .L1080
bl SandiskSetRRPara
- b .L1085
-.L1084:
+ b .L1081
+.L1080:
bl ToshibaSetRRPara
-.L1085:
- ldr r2, .L1101
+.L1081:
+ ldr r2, .L1097
ldrb r3, [r2, #3765] @ zero_extendqisi2
cmp r3, #34
- bne .L1086
- ldr r2, .L1101+4
+ bne .L1082
+ ldr r2, .L1097+4
ldrb r3, [r2, #120] @ zero_extendqisi2
sub r3, r3, #3
cmp r6, r3
moveq r3, #179
streq r3, [r4, #8]
-.L1086:
+.L1082:
cmp sl, #0
mov r3, #38
str r3, [r4, #8]
mov r3, #93
str r3, [r4, #8]
- beq .L1087
+ beq .L1083
mov r0, #4
bl NandcSetDdrMode
ldr r1, [sp, #4]
str r3, [sp, #0]
bl NandcSetDdrMode
ldr r3, [sp, #0]
- b .L1088
-.L1087:
+ b .L1084
+.L1083:
mov r3, r7
mov r0, r8
ldr r1, [sp, #4]
mov r2, r9
bl FlashReadRawPage
mov r3, r0
-.L1088:
+.L1084:
cmn r3, #1
- beq .L1089
+ beq .L1085
ldrb r2, [fp, #3836] @ zero_extendqisi2
cmn r5, #1
moveq r5, r3
add r2, r2, r2, asl #1
cmp r3, r2, lsr #2
- bcc .L1100
+ bcc .L1096
mov r7, #0
mov r9, r7
-.L1089:
+.L1085:
add r6, r6, #1
-.L1083:
- ldr r2, .L1101+4
+.L1079:
+ ldr r2, .L1097+4
ldrb r3, [r2, #120] @ zero_extendqisi2
add r3, r3, #1
cmp r6, r3
- bcc .L1092
- b .L1091
-.L1100:
+ bcc .L1088
+ b .L1087
+.L1096:
mov r5, r3
-.L1091:
- ldr r6, .L1101
+.L1087:
+ ldr r6, .L1097
mov r0, r4
mov r1, #0
ldrb r3, [r6, #3765] @ zero_extendqisi2
sub r3, r3, #67
uxtb r3, r3
cmp r3, #1
- bhi .L1093
+ bhi .L1089
bl SandiskSetRRPara
- b .L1094
-.L1093:
+ b .L1090
+.L1089:
bl ToshibaSetRRPara
-.L1094:
+.L1090:
mov r3, #255
str r3, [r4, #8]
ldrb r3, [r6, #3836] @ zero_extendqisi2
movne r5, #256
bl NandcWaitFlashReady
cmp sl, #0
- beq .L1096
+ beq .L1092
mov r0, #4
bl NandcSetDdrMode
-.L1096:
+.L1092:
mov r0, r5
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1102:
+.L1098:
.align 2
-.L1101:
+.L1097:
.word .LANCHOR0
.word .LANCHOR2
.fnend
stmfd sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
.save {r3, r4, r5, r6, r7, r8, sl, lr}
mov r6, #0
- ldr r5, .L1110
- ldr r7, .L1110+4
- ldr r8, .L1110+8
+ ldr r5, .L1106
+ ldr r7, .L1106+4
+ ldr r8, .L1106+8
ldr r3, [r5, #3780]
ldrb r0, [r7, #128] @ zero_extendqisi2
str r3, [r7, #124]
ldr r0, [r5, #3780]
bl ftl_memset
ldr r3, [r7, #124]
- ldr r1, .L1110+12
+ ldr r1, .L1106+12
mov r2, #32
str r8, [r3, #0]
ldr r4, [r7, #124]
str r3, [r4, #1076]
bl memcpy
add r0, r4, #80
- ldr r1, .L1110+16
+ ldr r1, .L1106+16
mov r2, #8
bl memcpy
add r0, r4, #96
- ldr r1, .L1110+20
+ ldr r1, .L1106+20
mov r2, #32
bl memcpy
ldr r0, [r7, #124]
- ldr r1, .L1110+24
+ ldr r1, .L1106+24
mov r2, #32
add r0, r0, #160
bl memcpy
bl memcpy
mov r2, #852
add r0, r4, #224
- ldr r1, .L1110+28
+ ldr r1, .L1106+28
bl memcpy
add r0, r4, #12
movw r1, #2036
mov r0, #0
bl flash_enter_slc_mode
mov r4, r6
-.L1106:
+.L1102:
ldr r1, [r5, #4]
mov r0, #0
mov r2, r0
mul r1, r1, r4
bl FlashReadRawPage
cmn r0, #1
- beq .L1104
+ beq .L1100
ldr sl, [r7, #124]
ldr r3, [sl, #0]
cmp r3, r8
- bne .L1104
+ bne .L1100
add r0, sl, #12
movw r1, #2036
bl JSHash
ldr r3, [sl, #8]
cmp r3, r0
- bne .L1104
+ bne .L1100
add r3, r4, #1
str r3, [r7, #132]
ldr r3, [r5, #4]
cmp r6, #1
mul r3, r3, r4
str r3, [r7, #136]
- bhi .L1105
-.L1104:
+ bhi .L1101
+.L1100:
add r4, r4, #1
cmp r4, #4
- bne .L1106
-.L1105:
+ bne .L1102
+.L1101:
mov r0, #0
bl flash_exit_slc_mode
cmp r6, #0
mvneq r0, #0
movne r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L1111:
+.L1107:
.align 2
-.L1110:
+.L1106:
.word .LANCHOR0
.word .LANCHOR2
.word 1312902724
.save {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r2, #4
mov sl, r0
- ldr r1, .L1123
+ ldr r1, .L1119
add r0, sp, #4
bl memcpy
- ldr r3, .L1123+4
+ ldr r3, .L1119+4
ldr r2, [r3, #3788]
ldrb fp, [r3, #3836] @ zero_extendqisi2
- ldr r3, .L1123+8
+ ldr r3, .L1119+8
cmp r2, r3
- bne .L1113
+ bne .L1109
mov r0, #0
bl flash_enter_slc_mode
-.L1113:
- ldr r7, .L1123+4
+.L1109:
+ ldr r7, .L1119+4
mov r0, sl
mov r1, #0
mov r2, #2048
mvn r8, #0
mov r4, #2
mov r6, r7
- ldr r9, .L1123+12
- b .L1114
-.L1121:
+ ldr r9, .L1119+12
+ b .L1110
+.L1117:
mov r5, #0
-.L1116:
+.L1112:
add r3, sp, #4
ldrb r0, [r3, r5] @ zero_extendqisi2
bl FlashBchSel
mul r1, r1, r4
bl FlashReadRawPage
cmn r0, #1
- bne .L1115
+ bne .L1111
add r5, r5, #1
cmp r5, #4
- bne .L1116
- b .L1117
-.L1115:
+ bne .L1112
+ b .L1113
+.L1111:
ldr r3, [r6, #3780]
ldr r3, [r3, #0]
cmp r3, r9
- bne .L1117
+ bne .L1113
add r3, sp, #8
- ldr r0, .L1123+16
+ ldr r0, .L1119+16
add r5, r3, r5
ldrb r1, [r5, #-4] @ zero_extendqisi2
bl printk
ldr r3, [r6, #3780]
ldr r3, [r3, #512]
strb r3, [r6, #1]
- ldr r3, .L1123+20
+ ldr r3, .L1119+20
ldr r2, [r3, #132]
cmp r2, r4
- bls .L1120
+ bls .L1116
str r4, [r3, #132]
mov r8, #0
bl FlashSavePhyInfo
-.L1117:
+.L1113:
add r4, r4, #1
-.L1114:
+.L1110:
ldrb r3, [r7, #1] @ zero_extendqisi2
cmp r4, r3
- bcc .L1121
- b .L1118
-.L1120:
+ bcc .L1117
+ b .L1114
+.L1116:
mov r8, #0
-.L1118:
+.L1114:
mov r0, fp
bl FlashBchSel
- ldr r3, .L1123+4
+ ldr r3, .L1119+4
ldr r2, [r3, #3788]
- ldr r3, .L1123+8
+ ldr r3, .L1119+8
cmp r2, r3
- bne .L1119
+ bne .L1115
mov r0, #0
bl flash_exit_slc_mode
-.L1119:
+.L1115:
mov r0, r8
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1124:
+.L1120:
.align 2
-.L1123:
+.L1119:
.word .LANCHOR3+11
.word .LANCHOR0
.word 1446522928
.word -52655045
- .word .LC88
+ .word .LC87
.word .LANCHOR2
.fnend
.size FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r2, #4
- ldr r1, .L1135
+ ldr r1, .L1131
add r0, sp, #4
bl memcpy
- ldr r7, .L1135+4
- ldr r2, .L1135+8
+ ldr r7, .L1131+4
+ ldr r2, .L1131+8
movw r3, #2698
- ldr r5, .L1135+12
+ ldr r5, .L1131+12
mov r4, #0
mov r0, r4
mov r8, #4
str r4, [r5, #136]
str r3, [r5, #124]
bl flash_enter_slc_mode
- b .L1126
-.L1128:
+ b .L1122
+.L1124:
add r3, sp, #4
ldrb r0, [r3, r6] @ zero_extendqisi2
bl FlashBchSel
mov r3, r0
bl FlashReadRawPage
cmn r0, #1
- bne .L1127
+ bne .L1123
mov r0, #0
mov r1, r9
ldr r2, [r7, #3780]
mov r3, r0
bl FlashReadRawPage
cmn r0, #1
- bne .L1127
+ bne .L1123
add r6, r6, #1
cmp r6, #4
- beq .L1129
- b .L1128
-.L1127:
+ beq .L1125
+ b .L1124
+.L1123:
ldr r6, [r5, #124]
- ldr r3, .L1135+16
+ ldr r3, .L1131+16
ldr r2, [r6, #0]
cmp r2, r3
- bne .L1129
+ bne .L1125
cmp sl, #0
- bne .L1130
- ldr r2, .L1135+8
+ bne .L1126
+ ldr r2, .L1131+8
movw r3, #2698
mov r0, r4
ldrh r1, [r2, r3]
bl __aeabi_uidiv
- ldr r3, .L1135+12
+ ldr r3, .L1131+12
add r0, r0, #1
str r0, [r3, #132]
- b .L1131
-.L1130:
+ b .L1127
+.L1126:
add r0, r6, #12
movw r1, #2036
bl JSHash
ldr r3, [r6, #8]
cmp r3, r0
- bne .L1129
- ldr sl, .L1135+8
+ bne .L1125
+ ldr sl, .L1131+8
add r1, r6, #160
mov r2, #32
add r0, sl, #2688
bl memcpy
add r1, r6, #192
mov r2, #32
- ldr r0, .L1135+20
+ ldr r0, .L1131+20
bl memcpy
add r1, r6, #224
mov r2, #852
- ldr r0, .L1135+24
+ ldr r0, .L1131+24
bl memcpy
ldr r3, [r6, #1076]
mov r0, r4
streq r3, [r5, #132]
ldrh r3, [r6, #14]
strb r3, [r5, #140]
-.L1129:
+.L1125:
subs r8, r8, #1
add r4, r4, fp
- beq .L1133
-.L1126:
+ beq .L1129
+.L1122:
add r9, r4, #1
mov r6, #0
- b .L1128
-.L1133:
+ b .L1124
+.L1129:
mov r0, r8
bl flash_exit_slc_mode
-.L1131:
+.L1127:
mov r0, sl
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1136:
+.L1132:
.align 2
-.L1135:
+.L1131:
.word .LANCHOR3+11
.word .LANCHOR0
.word .LANCHOR1
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov sl, r3
- ldr r4, .L1158
+ ldr r4, .L1154
.pad #20
sub sp, sp, #20
mov fp, r0
ldr r3, [sp, #56]
cmp r3, #0
moveq r8, #1024
- beq .L1139
+ beq .L1135
mov r0, #1
bl FlashSetInterfaceMode
mov r0, #1
ldrb r0, [r4, #3776] @ zero_extendqisi2
bl NandcSetMode
cmn r8, #1
- beq .L1140
- ldr r0, .L1158+4
+ beq .L1136
+ ldr r0, .L1154+4
mov r2, r8
ldr r1, [sp, #0]
bl printk
cmp r8, #9
- bhi .L1141
+ bhi .L1137
add r4, r4, fp, asl #3
ldr r3, [r4, #16]
ldr r2, [r3, #3840]
ldr r2, [r3, #0]
orr r2, r2, #131072
str r2, [r3, #0]
-.L1141:
- ldr r3, .L1158+8
+.L1137:
+ ldr r3, .L1154+8
ldr r2, [r3, #144]
add r2, r2, #1
str r2, [r3, #144]
movcs sl, #0
strcs sl, [r3, #144]
movcs r9, sl
- bcc .L1140
-.L1139:
+ bcc .L1136
+.L1135:
mov r4, #0
str fp, [sp, #4]
mov r5, r4
mvn r6, #0
mov fp, r4
str r4, [sp, #8]
-.L1146:
+.L1142:
uxtb r0, r7
bl NandcSetDdrPara
mov r3, sl
bl FlashReadRawPage
add r3, r8, #1
cmp r0, r3
- bhi .L1142
+ bhi .L1138
cmp r0, #2
- bhi .L1152
+ bhi .L1148
add r5, r5, #1
cmp r5, #9
- bls .L1152
+ bls .L1148
mov ip, fp
rsb r4, r5, r7
ldr fp, [sp, #4]
mov r8, r0
mov r6, #0
- b .L1144
-.L1142:
+ b .L1140
+.L1138:
cmp fp, r5
- bcs .L1153
+ bcs .L1149
cmp r5, #7
rsb r3, r5, r4
str r3, [sp, #8]
- bhi .L1157
+ bhi .L1153
mov fp, r5
- b .L1153
-.L1152:
+ b .L1149
+.L1148:
mov r6, #0
mov r4, r7
mov r8, r0
mov sl, r6
mov r9, r6
- b .L1143
-.L1153:
+ b .L1139
+.L1149:
mov r5, #0
-.L1143:
+.L1139:
add r7, r7, #2
cmp r7, #69
- bls .L1146
+ bls .L1142
mov ip, fp
ldr fp, [sp, #4]
-.L1144:
+.L1140:
cmp ip, r5
- bcc .L1147
- b .L1145
-.L1157:
+ bcc .L1143
+ b .L1141
+.L1153:
ldr fp, [sp, #4]
-.L1145:
+.L1141:
ldr r4, [sp, #8]
-.L1147:
+.L1143:
cmp r4, #0
- beq .L1148
- ldr r0, .L1158+12
+ beq .L1144
+ ldr r0, .L1154+12
mov r1, r4
bl printk
uxtb r0, r4
bl NandcSetDdrPara
-.L1148:
+.L1144:
cmn r6, #1
- bne .L1140
- ldr r0, .L1158+16
+ bne .L1136
+ ldr r0, .L1154+16
mov r1, fp
ldr r2, [sp, #0]
bl printk
ldr r3, [sp, #56]
cmp r3, #0
moveq r8, r6
- beq .L1140
+ beq .L1136
ldr r3, [sp, #12]
ubfx r0, r3, #8, #8
bl NandcSetDdrPara
-.L1140:
+.L1136:
mov r0, r8
add sp, sp, #20
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1159:
+.L1155:
.align 2
-.L1158:
+.L1154:
.word .LANCHOR0
- .word .LC89
+ .word .LC88
.word .LANCHOR2
+ .word .LC89
.word .LC90
- .word .LC91
.fnend
.size FlashDdrTunningRead, .-FlashDdrTunningRead
.align 2
stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
.save {r0, r1, r4, r5, r6, r7, r8, lr}
mov r7, r0
- ldr r5, .L1164
+ ldr r5, .L1160
mov r4, #0
mov r6, r1
ldrb r0, [r5, #3776] @ zero_extendqisi2
mov r0, r7
bl FlashReadRawPage
cmn r0, #1
- beq .L1161
+ beq .L1157
cmn r8, #1
- bne .L1162
-.L1161:
+ bne .L1158
+.L1157:
ldrb r3, [r5, #3776] @ zero_extendqisi2
tst r3, #1
- beq .L1162
+ beq .L1158
mov r0, #1
bl FlashSetInterfaceMode
mov r0, #1
bl NandcSetMode
- ldr r3, .L1164
+ ldr r3, .L1160
mov r2, #0
strb r2, [r3, #3777]
- b .L1163
-.L1162:
+ b .L1159
+.L1158:
mov r3, #1
strb r3, [r5, #3777]
-.L1163:
+.L1159:
mov r0, #0
ldmfd sp!, {r2, r3, r4, r5, r6, r7, r8, pc}
-.L1165:
+.L1161:
.align 2
-.L1164:
+.L1160:
.word .LANCHOR0
.fnend
.size FlashDdrParaScan, .-FlashDdrParaScan
.save {r3, r4, r5, r6, r7, lr}
mov r7, r0
mov r0, #32768
- ldr r6, .L1208
+ ldr r6, .L1206
bl ftl_malloc
- ldr r5, .L1208+4
+ ldr r5, .L1206+4
mov r4, #0
str r0, [r6, #3780]
mov r0, #32768
str r0, [r5, #156]
mov r0, r7
bl NandcInit
- ldr r5, .L1208+8
-.L1169:
+ ldr r5, .L1206+8
+.L1165:
uxtb r0, r4
mov r1, r5
bl FlashReadIDRaw
cmp r4, #0
- bne .L1167
+ bne .L1163
ldrb r3, [r6, #2132] @ zero_extendqisi2
sub r3, r3, #1
uxtb r3, r3
cmp r3, #253
- bhi .L1201
+ bhi .L1199
ldrb r3, [r6, #2133] @ zero_extendqisi2
cmp r3, #255
- beq .L1202
-.L1167:
+ beq .L1200
+.L1163:
add r4, r4, #1
add r5, r5, #8
cmp r4, #4
- bne .L1169
- ldr r4, .L1208
+ bne .L1165
+ ldr r4, .L1206
ldrb r3, [r4, #2132] @ zero_extendqisi2
cmp r3, #173
- beq .L1170
+ beq .L1166
ldr r0, [r4, #3784]
bl NandcSetDdrMode
-.L1170:
+.L1166:
mov r1, #0
- ldr r0, .L1208+12
+ ldr r0, .L1206+12
mov r2, #852
bl ftl_memset
- ldr r3, .L1208+16
+ ldr r3, .L1206+16
str r3, [r4, #2776]
mov r3, #0
strb r3, [r4, #8]
adc ip, ip, r1
cmp r3, #218
cmpne r3, #241
- beq .L1171
+ beq .L1167
cmp r3, #220
- bne .L1172
- ldr r2, .L1208
+ bne .L1168
+ ldr r2, .L1206
ldrb r2, [r2, #2135] @ zero_extendqisi2
cmp r2, #149
- bne .L1172
-.L1171:
- ldr r2, .L1208
+ bne .L1168
+.L1167:
+ ldr r2, .L1206
mov r1, #1
mov r0, #16
strb r1, [r2, #0]
- ldr r1, .L1208+4
+ ldr r1, .L1206+4
strb r0, [r2, #1]
strb r0, [r1, #128]
ldrb r0, [r2, #2132] @ zero_extendqisi2
- ldr r2, .L1208+20
+ ldr r2, .L1206+20
cmp r0, #152
strb r0, [r2, #2969]
moveq r0, #24
movne r1, #2048
strneh r1, [r2, r3] @ movhi
mvnne r3, #37
- bne .L1205
-.L1174:
+ bne .L1203
+.L1170:
cmp r3, #220
- bne .L1175
+ bne .L1171
movw r3, #2982
mov r1, #4096
strh r1, [r2, r3] @ movhi
mvn r3, #35
-.L1205:
+.L1203:
strb r3, [r2, #2970]
-.L1175:
- ldr r1, .L1208+24
+.L1171:
+ ldr r1, .L1206+24
mov r2, #32
- ldr r0, .L1208+28
+ ldr r0, .L1206+28
bl memcpy
- ldr r0, .L1208+16
+ ldr r0, .L1206+16
mov r2, #32
add r1, r0, #280
bl memcpy
-.L1172:
- ldr r4, .L1208
+.L1168:
+ ldr r4, .L1206
ldrb r3, [r4, #0] @ zero_extendqisi2
cmp r3, #0
- bne .L1176
+ bne .L1172
bl FlashLoadPhyInfoInRam
cmp r0, #0
- bne .L1177
+ bne .L1173
ldr r3, [r4, #2776]
ldrh r0, [r3, #16]
ubfx r0, r0, #8, #3
strb r0, [r4, #3776]
tst r0, #1
- bne .L1177
+ bne .L1173
mov r3, #1
strb r3, [r4, #3777]
bl FlashSetInterfaceMode
ldrb r0, [r4, #3776] @ zero_extendqisi2
bl NandcSetMode
-.L1177:
- ldr r4, .L1208
+.L1173:
+ ldr r4, .L1206
ldr r3, [r4, #2776]
ldrb r3, [r3, #26] @ zero_extendqisi2
strb r3, [r4, #80]
bl FlashLoadPhyInfo
cmp r0, #0
- beq .L1176
+ beq .L1172
ldr r3, [r4, #3784]
cmp r3, #0
- beq .L1179
+ beq .L1175
mov r0, #1
bl FlashSetInterfaceMode
mov r0, #1
- b .L1206
-.L1179:
+ b .L1204
+.L1175:
ldrb r0, [r4, #3776] @ zero_extendqisi2
bl FlashSetInterfaceMode
ldrb r0, [r4, #3776] @ zero_extendqisi2
-.L1206:
+.L1204:
bl NandcSetMode
bl FlashLoadPhyInfo
cmp r0, #0
- beq .L1176
- ldr r4, .L1208
+ beq .L1172
+ ldr r4, .L1206
mov r0, #1
bl FlashSetInterfaceMode
mov r0, #1
bl NandcSetMode
- ldr r0, .L1208+32
+ ldr r0, .L1206+32
ldr r3, [r4, #2776]
ldrh r1, [r3, #14]
bl printk
ldr r3, [r4, #2776]
ldrb r0, [r3, #19] @ zero_extendqisi2
bl FlashGetReadRetryDefault
- ldr r1, .L1208+36
- ldr r0, .L1208+4
+ ldr r1, .L1206+36
+ ldr r0, .L1206+4
ldr r3, [r4, #2776]
ldrh r1, [r0, r1]
ldrb r2, [r3, #9] @ zero_extendqisi2
add r1, r1, #4080
add r1, r1, #15
cmp r2, r1, lsr #12
- blt .L1182
+ blt .L1178
ldrh r1, [r3, #14]
add r1, r1, #255
cmp r2, r1, lsr #8
- bge .L1183
-.L1182:
+ bge .L1179
+.L1178:
ldrh r2, [r3, #14]
bic r2, r2, #255
strh r2, [r3, #14] @ movhi
-.L1183:
- ldr r3, .L1208
+.L1179:
+ ldr r3, .L1206
ldrb r3, [r3, #3776] @ zero_extendqisi2
tst r3, #6
- beq .L1184
+ beq .L1180
bl FlashSavePhyInfo
- ldr r3, .L1208+4
+ ldr r3, .L1206+4
mov r0, #0
ldr r1, [r3, #136]
bl FlashDdrParaScan
-.L1184:
+.L1180:
bl FlashSavePhyInfo
-.L1176:
- ldr r1, .L1208
- ldr r3, [r1, #2776]
- ldrb r2, [r3, #26] @ zero_extendqisi2
- strb r2, [r1, #80]
- ldrh r2, [r3, #16]
- ubfx r0, r2, #7, #1
- strb r0, [r1, #8]
- ldr r0, .L1208+4
- tst r2, #64
- ubfx ip, r2, #3, #1
- strb ip, [r0, #160]
- ubfx ip, r2, #4, #1
- strb ip, [r1, #3837]
- ubfx ip, r2, #8, #3
- strb ip, [r1, #3776]
+.L1172:
+ ldr r2, .L1206
+ ldr r0, [r2, #2776]
+ ldrb r3, [r0, #26] @ zero_extendqisi2
+ strb r3, [r2, #80]
+ ldrh r3, [r0, #16]
+ ubfx r1, r3, #7, #1
+ strb r1, [r2, #8]
+ ldr r1, .L1206+4
+ tst r3, #64
+ ubfx ip, r3, #3, #1
+ strb ip, [r1, #160]
+ ubfx ip, r3, #4, #1
+ strb ip, [r2, #3837]
+ ubfx ip, r3, #8, #3
+ strb ip, [r2, #3776]
mov ip, #0
- str ip, [r0, #164]
- beq .L1185
- ldrb ip, [r1, #2909] @ zero_extendqisi2
- ldrb r2, [r3, #19] @ zero_extendqisi2
- strb ip, [r1, #3764]
- ldrb ip, [r1, #2910] @ zero_extendqisi2
- strb r2, [r1, #3765]
- strb ip, [r0, #120]
- sub ip, r2, #1
+ str ip, [r1, #164]
+ beq .L1181
+ ldrb ip, [r2, #2909] @ zero_extendqisi2
+ ldrb r3, [r0, #19] @ zero_extendqisi2
+ strb ip, [r2, #3764]
+ ldrb ip, [r2, #2910] @ zero_extendqisi2
+ strb r3, [r2, #3765]
+ strb ip, [r1, #120]
+ sub ip, r3, #1
uxtb ip, ip
cmp ip, #5
- bhi .L1186
- sub r2, r2, #5
- ldr ip, .L1208+40
+ bhi .L1182
+ sub r3, r3, #5
+ ldr ip, .L1206+40
+ uxtb r3, r3
+ cmp r3, #1
+ str ip, [r1, #164]
+ movls r3, #1
+ strls r3, [r2, #3828]
+ b .L1181
+.L1182:
+ sub r2, r3, #17
uxtb r2, r2
- cmp r2, #1
- str ip, [r0, #164]
- movls r2, #1
- strls r2, [r1, #3828]
- b .L1185
+ cmp r2, #2
+ bhi .L1183
+ ldr r2, .L1206+44
+ cmp r3, #19
+ moveq r3, #15
+ str r2, [r1, #164]
+ mov r2, #7
+ strb r2, [r1, #120]
+ streqb r3, [r1, #120]
+ b .L1181
+.L1183:
+ cmp r3, #33
+ cmpne r3, #65
+ beq .L1184
+ cmp r3, #66
+ bne .L1185
+.L1184:
+ ldr r3, .L1206+4
+ mov r1, #4
+ ldr r2, .L1206+48
+ str r2, [r3, #164]
+ ldr r2, .L1206
+ strb r1, [r2, #3764]
+ mov r2, #7
+ strb r2, [r3, #120]
+ b .L1181
+.L1185:
+ cmp r3, #67
+ cmpne r3, #34
+ beq .L1186
+ cmp r3, #35
+ beq .L1186
+ cmp r3, #68
+ bne .L1187
.L1186:
- sub r1, r2, #17
- uxtb r1, r1
- cmp r1, #2
- bhi .L1187
- ldr r1, .L1208+44
- cmp r2, #19
- moveq r2, #15
- str r1, [r0, #164]
- mov r1, #7
- strb r1, [r0, #120]
- streqb r2, [r0, #120]
- b .L1185
-.L1187:
- cmp r2, #33
- cmpne r2, #65
- beq .L1188
- cmp r2, #66
- bne .L1189
-.L1188:
- ldr r2, .L1208+4
- mov r0, #4
- ldr r1, .L1208+48
+ ldr r2, .L1206+4
+ cmp r3, #35
+ cmpne r3, #68
+ ldr r1, .L1206+48
+ sub r3, r3, #67
+ uxtb r3, r3
str r1, [r2, #164]
- ldr r1, .L1208
- strb r0, [r1, #3764]
mov r1, #7
strb r1, [r2, #120]
- b .L1185
-.L1189:
- cmp r2, #67
- cmpne r2, #34
- beq .L1190
- cmp r2, #35
- beq .L1190
- cmp r2, #68
- bne .L1191
+ moveq r1, #17
+ streqb r1, [r2, #120]
+ cmp r3, #1
+ ldr r3, .L1206
+ movls r2, #4
+ movhi r2, #5
+ strb r2, [r3, #3764]
+ b .L1181
+.L1187:
+ cmp r3, #49
+ ldreq r3, .L1206+52
+ streq r3, [r1, #164]
+.L1181:
+ ldr r5, .L1206
+ ldr r3, .L1206+56
+ ldr r2, [r5, #3788]
+ cmp r2, r3
+ bne .L1190
+ ldrb r3, [r5, #80] @ zero_extendqisi2
+ cmp r3, #0
+ movne r3, #0
+ strneb r3, [r0, #18]
.L1190:
- ldr r1, .L1208+4
- cmp r2, #35
- cmpne r2, #68
- ldr r0, .L1208+48
- sub r2, r2, #67
- uxtb r2, r2
- str r0, [r1, #164]
- mov r0, #7
- strb r0, [r1, #120]
- moveq r0, #17
- streqb r0, [r1, #120]
- cmp r2, #1
- ldr r2, .L1208
- movls r1, #4
- movhi r1, #5
- strb r1, [r2, #3764]
- b .L1185
-.L1191:
- cmp r2, #49
- ldreq r2, .L1208+52
- streq r2, [r0, #164]
-.L1185:
+ ldr r3, [r5, #2776]
+ ldr r4, .L1206
ldrb r1, [r3, #12] @ zero_extendqisi2
ldrh r0, [r3, #10]
- ldrb r4, [r3, #18] @ zero_extendqisi2
+ ldrb r6, [r3, #18] @ zero_extendqisi2
bl __aeabi_idiv
mov r1, r0
- mov r0, r4
+ mov r0, r6
bl BuildFlashLsbPageTable
bl FlashDieInfoInit
- ldr r3, .L1208
- ldrb r2, [r3, #2132] @ zero_extendqisi2
- cmp r2, #44
- bne .L1194
- ldrb r2, [r3, #3777] @ zero_extendqisi2
- cmp r2, #0
- beq .L1194
+ ldrb r3, [r5, #2132] @ zero_extendqisi2
+ cmp r3, #44
+ bne .L1191
+ ldrb r3, [r4, #3777] @ zero_extendqisi2
+ cmp r3, #0
+ beq .L1191
+ ldr r2, [r4, #3788]
+ ldr r3, .L1206+56
+ cmp r2, r3
+ bne .L1192
+ ldrb r3, [r4, #80] @ zero_extendqisi2
+ cmp r3, #0
+ bne .L1191
+.L1192:
+ ldr r3, .L1206
mov r2, #0
mov r0, #1
strb r2, [r3, #3777]
bl FlashSetInterfaceMode
mov r0, #1
bl NandcSetMode
-.L1194:
+.L1191:
mov r0, #0
bl flash_enter_slc_mode
- ldr r2, .L1208
+ ldr r2, .L1206
ldrb r3, [r2, #3776] @ zero_extendqisi2
tst r3, #6
- beq .L1195
+ beq .L1193
ldrb r2, [r2, #3777] @ zero_extendqisi2
cmp r2, #0
- bne .L1196
+ bne .L1194
tst r3, #1
- bne .L1195
-.L1196:
- ldr r3, .L1208+4
+ bne .L1193
+.L1194:
+ ldr r3, .L1206+4
mov r0, #0
ldr r1, [r3, #136]
bl FlashDdrParaScan
-.L1195:
- ldr r4, .L1208
+.L1193:
+ ldr r4, .L1206
mov r0, #0
bl flash_exit_slc_mode
ldr r3, [r4, #2776]
cmp r0, #0
movne r3, #16
strneb r3, [r4, #1]
- bne .L1199
- ldr r2, .L1208+4
+ bne .L1197
+ ldr r2, .L1206+4
ldrb r1, [r3, #1] @ zero_extendqisi2
ldrb r2, [r2, #140] @ zero_extendqisi2
cmp r1, r2
strhib r2, [r3, #1]
ldrb r3, [r3, #1] @ zero_extendqisi2
cmp r3, #15
- ldrls r3, .L1208
+ ldrls r3, .L1206
movls r2, #16
strlsb r2, [r3, #1]
-.L1199:
- ldr r4, .L1208
+.L1197:
+ ldr r4, .L1206
movw r6, #2214
- ldr r0, .L1208+56
+ ldr r0, .L1206+60
bl FlashTimingCfg
mov r3, #2208
ldr r5, [r4, #2776]
ldrb lr, [r4, #0] @ zero_extendqisi2
strh r1, [r4, r2] @ movhi
cmp lr, #1
- bne .L1200
+ bne .L1198
mov lr, #16
mov r7, r7, lsr #1
mov ip, ip, asl #1
strh r7, [r4, r6] @ movhi
strh ip, [r4, r0] @ movhi
strh r2, [r4, r3] @ movhi
-.L1200:
+.L1198:
ldrb r0, [r5, #20] @ zero_extendqisi2
bl FlashBchSel
bl FlashSuspend
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1201:
+.L1199:
mvn r0, #1
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1202:
+.L1200:
mvn r0, #1
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1209:
+.L1207:
.align 2
-.L1208:
+.L1206:
.word .LANCHOR0
.word .LANCHOR2
.word .LANCHOR0+2132
.word .LANCHOR1
.word .LANCHOR1+2592
.word .LANCHOR0+48
- .word .LC92
+ .word .LC91
.word -914
.word HynixReadRetrial
.word MicronReadRetrial
.word ToshibaReadRetrial
.word SamsungReadRetrial
+ .word 1446522928
.word 150000
.fnend
.size FlashInit, .-FlashInit
bl FlashReadRawPage
cmn r0, #1
mov r4, r0
- bne .L1211
- ldr r7, .L1216
+ bne .L1209
+ ldr r7, .L1214
ldrb r9, [r7, #8] @ zero_extendqisi2
cmp r9, #0
- beq .L1212
+ beq .L1210
mov r3, #0
mov r0, r6
strb r3, [r7, #8]
strb r9, [r7, #8]
cmn r0, #1
movne r4, r0
- bne .L1211
-.L1212:
- ldr r7, .L1216
+ bne .L1209
+.L1210:
+ ldr r7, .L1214
ldrb r3, [r7, #3777] @ zero_extendqisi2
cmp r3, #0
- beq .L1211
+ beq .L1209
ldr r3, [r7, #2164]
mov r0, r6
mov r1, r5
bl FlashDdrTunningRead
cmn r0, #1
mov r4, r0
- beq .L1213
+ beq .L1211
ldrb r3, [r7, #3836] @ zero_extendqisi2
cmp r0, r3, lsr #1
- bls .L1211
-.L1213:
+ bls .L1209
+.L1211:
ubfx r0, r9, #8, #8
bl NandcSetDdrPara
-.L1211:
- ldr r3, .L1216+4
+.L1209:
+ ldr r3, .L1214+4
ldr ip, [r3, #164]
adds r3, ip, #0
movne r3, #1
cmn r4, #1
movne r3, #0
cmp r3, #0
- beq .L1214
+ beq .L1212
mov r1, r5
mov r2, r8
mov r3, sl
mov r2, r6
mov r3, r5
mov r4, r0
- ldr r0, .L1216+8
+ ldr r0, .L1214+8
mov r1, r4
bl printk
-.L1214:
+.L1212:
mov r0, r4
ldmfd sp!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, pc}
-.L1217:
+.L1215:
.align 2
-.L1216:
+.L1214:
.word .LANCHOR0
.word .LANCHOR2
- .word .LC93
+ .word .LC92
.fnend
.size FlashReadPage, .-FlashReadPage
.align 2
.fnstart
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L1231
+ ldr r3, .L1229
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r8, r1
ldrb sl, [r3, #2697] @ zero_extendqisi2
mov r4, r0
mov r7, #0
- ldr r6, .L1231+4
- b .L1219
-.L1228:
+ ldr r6, .L1229+4
+ b .L1217
+.L1226:
rsb r3, r7, r8
add r2, sp, #20
mov r0, r4
cmp r3, r2
mvncs r3, #0
strcs r3, [r4, #0]
- bcs .L1221
+ bcs .L1219
add r3, r6, r3
ldrb r5, [r3, #3768] @ zero_extendqisi2
mov r0, r5
strne r3, [r4, #0]
ldr r3, [r4, #12]
cmp r3, #0
- beq .L1226
+ beq .L1224
ldr r2, [r3, #8]
cmn r2, #1
- bne .L1226
+ bne .L1224
ldr r3, [r3, #0]
cmn r3, #1
strne r2, [r4, #0]
-.L1226:
+.L1224:
ldr r3, [r4, #0]
cmn r3, #1
- bne .L1221
+ bne .L1219
ldr r1, [r4, #4]
- ldr r0, .L1231+8
+ ldr r0, .L1229+8
ldrb r2, [r6, #3836] @ zero_extendqisi2
bl printk
ldr r1, [r4, #8]
cmp r1, #0
- beq .L1227
- ldr r0, .L1231+12
+ beq .L1225
+ ldr r0, .L1229+12
mov r2, #4
mov r3, #8
bl rknand_print_hex
-.L1227:
+.L1225:
ldr r1, [r4, #12]
cmp r1, #0
- beq .L1221
+ beq .L1219
mov r2, #4
- ldr r0, .L1231+16
+ ldr r0, .L1229+16
mov r3, r2
bl rknand_print_hex
-.L1221:
+.L1219:
add r7, r7, #1
add r4, r4, #36
-.L1219:
+.L1217:
cmp r7, r8
- bne .L1228
+ bne .L1226
mov r0, #0
add sp, sp, #28
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1232:
+.L1230:
.align 2
-.L1231:
+.L1229:
.word .LANCHOR1
.word .LANCHOR0
+ .word .LC93
.word .LC94
.word .LC95
- .word .LC96
.fnend
.size FlashReadSlc2KPages, .-FlashReadSlc2KPages
.align 2
.fnstart
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L1269
+ ldr r3, .L1267
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.pad #52
str r1, [sp, #28]
str r2, [sp, #32]
str r3, [sp, #20]
- ldr r3, .L1269+4
+ ldr r3, .L1267+4
ldrb r8, [r3, #0] @ zero_extendqisi2
ldrb ip, [r3, #8] @ zero_extendqisi2
cmp r8, #0
str ip, [sp, #36]
moveq sl, r8
- beq .L1234
+ beq .L1232
bl FlashReadSlc2KPages
- b .L1235
-.L1258:
+ b .L1233
+.L1256:
mov r3, #36
ldr ip, [sp, #28]
mul r3, r3, sl
add r2, sp, #44
ldr r1, [sp, #32]
- ldr r5, .L1269+4
+ ldr r5, .L1267+4
add r6, r9, r3
str r3, [sp, #16]
rsb r3, sl, ip
mvncs r3, #0
mov r7, r0
strcs r3, [r9, ip]
- bcs .L1237
+ bcs .L1235
add r3, r5, r3
ldrb r4, [r3, #3768] @ zero_extendqisi2
- ldr r3, .L1269+8
+ ldr r3, .L1267+8
mov r0, r4
ldrb r3, [r3, #160] @ zero_extendqisi2
cmp r3, #0
sub r3, r3, #1
uxtb r3, r3
cmp r3, #5
- bhi .L1239
+ bhi .L1237
add r2, r5, r4
ldrb r3, [r2, #2920] @ zero_extendqisi2
ldrb r2, [r2, #3760] @ zero_extendqisi2
cmp r2, r3
- beq .L1239
+ beq .L1237
mov r0, r4
ldrb r1, [r5, #2909] @ zero_extendqisi2
add r2, r5, #2912
bl HynixSetRRPara
-.L1239:
+.L1237:
mov r0, r4
mov fp, fp, lsr #31
bl NandcFlashCs
orreq fp, fp, #1
str fp, [sp, #24]
cmp fp, #0
- beq .L1245
- ldr r3, .L1269+4
+ beq .L1243
+ ldr r3, .L1267+4
ldrb r3, [r3, #80] @ zero_extendqisi2
cmp r3, #0
- beq .L1245
+ beq .L1243
mov r0, r4
bl flash_enter_slc_mode
-.L1245:
- ldr fp, .L1269+4
-.L1268:
+.L1243:
+ ldr fp, .L1267+4
+.L1266:
ldr r1, [sp, #44]
cmn r1, #1
cmpeq r4, #255
moveq r3, #0
movne r3, #1
moveq r7, r3
- beq .L1241
+ beq .L1239
cmp r7, #0
- beq .L1242
+ beq .L1240
ldr r2, [fp, #4]
mov r0, r4
add r2, r1, r2
bl FlashReadDpCmd
- b .L1243
-.L1242:
+ b .L1241
+.L1240:
mov r0, r4
bl FlashReadCmd
-.L1243:
+.L1241:
mov r0, r4
bl NandcWaitFlashReady
cmp r7, #0
- beq .L1241
+ beq .L1239
mov r0, r4
ldr r1, [sp, #44]
bl FlashReadDpDataOutCmd
-.L1241:
+.L1239:
ldr r3, [r6, #12]
mov r0, r4
ldr r2, [sp, #20]
movne r2, #0
movne r7, #0
strneb r2, [fp, #8]
- bne .L1268
-.L1244:
+ bne .L1266
+.L1242:
cmp r7, #0
mov r5, r0
- beq .L1246
- ldr r3, .L1269+4
+ beq .L1244
+ ldr r3, .L1267+4
mov r0, r4
ldr r1, [r3, #4]
ldr r3, [sp, #44]
cmn r0, #1
mov r8, r0
moveq r7, #0
-.L1246:
+.L1244:
mov r0, r4
- ldr fp, .L1269+4
+ ldr fp, .L1267+4
bl NandcFlashDeCs
ldr ip, [sp, #36]
cmn r5, #1
strb ip, [fp, #8]
- bne .L1250
+ bne .L1248
ldrb r3, [fp, #3777] @ zero_extendqisi2
cmp r3, #0
- beq .L1248
+ beq .L1246
ldr r3, [fp, #2164]
mov r0, r4
ldr r1, [sp, #44]
bl FlashDdrTunningRead
cmn r0, #1
mov r5, r0
- beq .L1249
+ beq .L1247
ldrb r3, [fp, #3836] @ zero_extendqisi2
cmp r0, r3, lsr #1
- bls .L1264
-.L1249:
+ bls .L1262
+.L1247:
ubfx r0, r7, #8, #8
bl NandcSetDdrPara
cmn r5, #1
- bne .L1264
-.L1248:
- ldr r3, .L1269+8
+ bne .L1262
+.L1246:
+ ldr r3, .L1267+8
mov r0, r4
ldr r1, [sp, #44]
ldr r2, [r6, #8]
ldr r7, [r3, #164]
ldr r3, [r6, #12]
cmp r7, #0
- beq .L1251
+ beq .L1249
blx r7
cmn r0, #1
mov r5, r0
- bne .L1265
- ldr r2, .L1269+4
+ bne .L1263
+ ldr r2, .L1267+4
ldr r3, [r2, #2776]
ldrb r3, [r3, #19] @ zero_extendqisi2
sub r3, r3, #1
uxtb r3, r3
cmp r3, #5
- bhi .L1253
+ bhi .L1251
ldrb r1, [r2, #2909] @ zero_extendqisi2
mov r0, r4
add r2, r2, #2912
mov r3, #0
bl HynixSetRRPara
-.L1253:
+.L1251:
ldr r1, [sp, #44]
mov r0, r4
ldr r2, [r6, #8]
ldr r3, [r6, #12]
bl FlashReadRawPage
- ldr r3, .L1269+4
+ ldr r3, .L1267+4
ldr r1, [r6, #4]
ldrb r2, [r3, #3836] @ zero_extendqisi2
mov r5, r0
- ldr r0, .L1269+12
+ ldr r0, .L1267+12
mov r3, r5
bl printk
- b .L1265
-.L1251:
+ b .L1263
+.L1249:
bl FlashReadRawPage
mov r5, r0
- b .L1252
-.L1264:
+ b .L1250
+.L1262:
mov r7, #0
-.L1250:
- ldr r3, .L1269+4
+.L1248:
+ ldr r3, .L1267+4
ldrb r3, [r3, #3836] @ zero_extendqisi2
add r3, r3, r3, asl #1
cmp r5, r3, lsr #2
- bls .L1252
- ldr r3, .L1269+8
+ bls .L1250
+ ldr r3, .L1267+8
ldr r3, [r3, #164]
cmp r3, #0
moveq r5, #256
- b .L1252
-.L1265:
+ b .L1250
+.L1263:
mov r7, #0
-.L1252:
+.L1250:
ldr ip, [sp, #16]
cmp r5, #256
cmnne r5, #1
ldr ip, [sp, #16]
ldr r3, [r9, ip]
cmn r3, #1
- bne .L1255
- ldr r2, .L1269+4
+ bne .L1253
+ ldr r2, .L1267+4
ldr r1, [r6, #4]
- ldr r0, .L1269+16
+ ldr r0, .L1267+16
ldrb r2, [r2, #3836] @ zero_extendqisi2
bl printk
ldr r1, [r6, #12]
cmp r1, #0
- beq .L1255
+ beq .L1253
mov r2, #4
- ldr r0, .L1269+20
+ ldr r0, .L1267+20
mov r3, r2
bl rknand_print_hex
-.L1255:
+.L1253:
cmp r7, #0
- beq .L1256
- ldr r3, .L1269+4
+ beq .L1254
+ ldr r3, .L1267+4
ldrb r3, [r3, #3836] @ zero_extendqisi2
add r3, r3, r3, asl #1
cmp r8, r3, lsr #2
- bls .L1257
- ldr r3, .L1269+8
+ bls .L1255
+ ldr r3, .L1267+8
ldr r3, [r3, #164]
cmp r3, #0
moveq r8, #256
-.L1257:
+.L1255:
add r3, sl, #1
mov r2, #36
cmp r8, #256
movne r2, #0
str r8, [r9, r3]
strne r2, [r9, r3]
-.L1256:
+.L1254:
ldr ip, [sp, #24]
add sl, sl, r7
cmp ip, #0
- beq .L1237
- ldr r3, .L1269+4
+ beq .L1235
+ ldr r3, .L1267+4
ldrb r3, [r3, #80] @ zero_extendqisi2
cmp r3, #0
- beq .L1237
+ beq .L1235
mov r0, r4
bl flash_exit_slc_mode
-.L1237:
+.L1235:
add sl, sl, #1
-.L1234:
+.L1232:
ldr ip, [sp, #28]
cmp sl, ip
- bcc .L1258
+ bcc .L1256
mov r0, #0
-.L1235:
+.L1233:
add sp, sp, #52
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1270:
+.L1268:
.align 2
-.L1269:
+.L1267:
.word .LANCHOR1
.word .LANCHOR0
.word .LANCHOR2
- .word .LC97
- .word .LC94
.word .LC96
+ .word .LC93
+ .word .LC95
.fnend
.size FlashReadPages, .-FlashReadPages
.align 2
.fnstart
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L1297
+ ldr r2, .L1295
movw r3, #3000
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r5, r0
str r1, [sp, #12]
cmp r4, r3
- beq .L1290
+ beq .L1288
cmp r4, #0
- bne .L1272
- b .L1273
-.L1290:
+ bne .L1270
+ b .L1271
+.L1288:
mov r4, #0
-.L1272:
- ldr r2, .L1297+4
+.L1270:
+ ldr r2, .L1295+4
movw r3, #3912
ldr fp, [sp, #12]
ldrh r3, [r2, r3]
cmp fp, r3
- bne .L1274
-.L1273:
+ bne .L1272
+.L1271:
bl FtlGcPageVarInit
-.L1274:
+.L1272:
mvn r8, #0
mov r7, #0
movw sl, #65535
-.L1285:
+.L1283:
ldrh r3, [r5, #0]
mov r0, #0
strb r0, [r5, #8]
cmp r3, sl
- beq .L1291
-.L1276:
-.L1294:
- ldr r3, .L1297+4
+ beq .L1289
+.L1274:
+.L1292:
+ ldr r3, .L1295+4
movw r2, #3844
ldrh r9, [r3, r2]
- ldr r2, .L1297+8
+ ldr r2, .L1295+8
ldr lr, [r2, #-984]
ldr ip, [r2, #-1164]
movw r2, #3924
mov r6, r3
str r2, [sp, #8]
mov r2, r5
- b .L1277
-.L1279:
+ b .L1275
+.L1277:
ldrh r0, [r2, #16]
cmp r0, sl
- beq .L1278
+ beq .L1276
mov fp, #36
orr r0, r4, r0, asl #10
mla r1, fp, r6, lr
bic r0, r0, #3
add r0, ip, r0
str r0, [r1, #12]
-.L1278:
+.L1276:
add r3, r3, #1
add r2, r2, #2
uxth r3, r3
-.L1277:
+.L1275:
cmp r3, r9
- bne .L1279
- ldr r9, .L1297+8
+ bne .L1277
+ ldr r9, .L1295+8
mov r1, r6
mov r2, #0
ldr r0, [r9, #-984]
mul r3, r3, r6
mov r6, #0
str r3, [sp, #8]
- b .L1280
-.L1286:
- ldr fp, .L1297+8
+ b .L1278
+.L1284:
+ ldr fp, .L1295+8
ldr r1, [fp, #-984]
add r3, r1, r6
ldr r9, [r3, #4]
ldr r1, [r1, r6]
cmp r1, #0
mov r2, r0
- bne .L1281
+ bne .L1279
ldr r3, [r3, #12]
add r6, r6, #36
ldrh r1, [r3, #0]
cmp r1, sl
moveq r3, #1
streq r3, [fp, #-1016]
- beq .L1275
-.L1282:
+ beq .L1273
+.L1280:
ldr r0, [r3, #12]
mov r1, r9
ldr r2, [r3, #8]
bl FtlGcUpdatePage
- b .L1280
-.L1281:
+ b .L1278
+.L1279:
ldr r3, [fp, #-1884]
cmp r3, #0
- beq .L1283
+ beq .L1281
ldrh r3, [r5, #0]
ldr r2, [fp, #-2084]
mov r3, r3, asl #1
ldrh r3, [r2, r3]
cmp r3, #119
movls r8, r9
- bls .L1284
-.L1283:
+ bls .L1282
+.L1281:
cmn r1, #1
moveq r8, r9
-.L1284:
- ldr r2, .L1297+8
+.L1282:
+ ldr r2, .L1295+8
mov r0, #0 @ movhi
ldrh r3, [r5, #0]
mov r4, #0
mvn r3, #0
strh r3, [r5, #0] @ movhi
bl FtlGcPageVarInit
- b .L1285
-.L1280:
+ b .L1283
+.L1278:
ldr r3, [sp, #8]
cmp r6, r3
- bne .L1286
+ bne .L1284
ldr fp, [sp, #12]
add r7, r7, #1
add r4, r4, #1
cmp r7, fp
uxth r4, r4
- bcc .L1287
- ldr r2, .L1297
+ bcc .L1285
+ ldr r2, .L1295
movw r3, #3000
ldrh r1, [r2, r3]
cmp r1, sl
- beq .L1287
+ beq .L1285
add r1, r1, r7
strh r1, [r2, r3] @ movhi
- ldr r2, .L1297+4
+ ldr r2, .L1295+4
add r3, r3, #912
ldrh r3, [r2, r3]
cmp r3, r4
- bhi .L1288
-.L1287:
- ldr r2, .L1297+4
+ bhi .L1286
+.L1285:
+ ldr r2, .L1295+4
movw r3, #3912
ldrh r3, [r2, r3]
cmp r3, r4
- bhi .L1294
-.L1291:
+ bhi .L1292
+.L1289:
mov r2, #0
-.L1275:
- ldr r1, .L1297
+.L1273:
+ ldr r1, .L1295
movw r3, #3000
mvn r0, #0
strh r4, [r5, #2] @ movhi
mov r0, r5
mov r1, r4
bl ftl_sb_update_avl_pages
-.L1288:
+.L1286:
mov r0, r8
add sp, sp, #20
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1298:
+.L1296:
.align 2
-.L1297:
+.L1295:
.word .LANCHOR1
.word .LANCHOR0
.word .LANCHOR2
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r6, #0
- ldr r5, .L1357
+ ldr r5, .L1355
.pad #28
sub sp, sp, #28
- ldr r4, .L1357+4
+ ldr r4, .L1355+4
mov r1, r6
- ldr r3, .L1357+8
+ ldr r3, .L1355+8
movw r7, #3932
ldr r2, [r5, #3940]
ldr r0, [r4, #-1040]
ldr r0, [r5, #3960]
mov r2, r2, asl #1
bl ftl_memset
- ldr r0, .L1357+12
+ ldr r0, .L1355+12
mov r1, #255
mov r2, #12
bl ftl_memset
movw r3, #3852
ldrh r3, [r5, r3]
str r3, [sp, #8]
- b .L1300
-.L1302:
+ b .L1298
+.L1300:
add r3, r6, r5
ldr r1, [sp, #8]
ldrb r0, [r3, #3870] @ zero_extendqisi2
bl FtlBbmIsBadBlock
ldr r3, [sp, #0]
cmp r0, #0
- bne .L1301
+ bne .L1299
ldr r2, [r4, #-984]
mov r3, r3, asl #10
mla r2, r9, r7, r2
bic r3, r3, #3
add r3, r1, r3
str r3, [r2, #12]
-.L1301:
+.L1299:
add r5, r5, #1
uxth r5, r5
- b .L1338
-.L1351:
+ b .L1336
+.L1349:
mov r7, #0
movw fp, #3844
mov r5, r7
mov r9, #36
movw r8, #3924
-.L1338:
+.L1336:
ldrh r3, [r6, fp]
cmp r3, r5
- bhi .L1302
+ bhi .L1300
ldr r0, [r4, #-984]
mov r1, r7
mov r2, #1
bl FlashReadPages
mov fp, r7
str r8, [sp, #12]
- b .L1303
-.L1337:
+ b .L1301
+.L1335:
ldr r2, [r4, #-984]
add r0, r2, r8
ldr r7, [r2, r8]
cmn r7, #1
ldr r5, [r0, #12]
ubfx r6, r3, #10, #16
- bne .L1304
+ bne .L1302
mov r1, #1
add r3, r3, #1
mov r2, r1
cmp r3, r0
ldreq r3, [r4, #-984]
streq r7, [r3, r8]
-.L1304:
+.L1302:
ldr r3, [r4, #-984]
ldr r3, [r3, r8]
cmn r3, #1
- beq .L1305
+ beq .L1303
ldr r2, [r4, #-1848]
ldr r3, [r5, #4]
cmn r2, #1
- beq .L1306
+ beq .L1304
cmp r2, r3
- bhi .L1307
-.L1306:
+ bhi .L1305
+.L1304:
cmn r3, #1
addne r3, r3, #1
strne r3, [sl, #-1848]
-.L1307:
+.L1305:
ldrh r3, [r5, #0]
movw r2, #61604
cmp r3, r2
- beq .L1310
- bhi .L1313
+ beq .L1308
+ bhi .L1311
movw r2, #61574
cmp r3, r2
- bne .L1308
- b .L1355
-.L1313:
+ bne .L1306
+ b .L1353
+.L1311:
movw r2, #61634
cmp r3, r2
- beq .L1311
+ beq .L1309
movw r1, #65535
cmp r3, r1
- bne .L1308
- b .L1356
-.L1311:
- ldr r3, .L1357
+ bne .L1306
+ b .L1354
+.L1309:
+ ldr r3, .L1355
ldr r1, [r4, #-1040]
ldr r2, [r3, #3940]
- ldr r3, .L1357+8
+ ldr r3, .L1355+8
uxth r0, r2
ldrh r3, [r4, r3]
sub r7, r0, #1
sub r0, r0, #1
sxth r0, r0
str r0, [sp, #4]
- b .L1314
-.L1322:
+ b .L1312
+.L1320:
mov ip, r9, asl #2
ldr r0, [r1, r9, asl #2]
str ip, [sp, #16]
ldr ip, [r5, #4]
cmp ip, r0
- bls .L1315
+ bls .L1313
ldr r1, [r1, #0]
cmp r1, #0
- bne .L1316
+ bne .L1314
cmp r3, r2
- bne .L1317
-.L1316:
+ bne .L1315
+.L1314:
ldr r3, [r4, #-1044]
mov r1, #1
ldrh r0, [r3, #0]
bl FtlFreeSysBlkQueueIn
- b .L1318
-.L1317:
- ldr r2, .L1357+8
+ b .L1316
+.L1315:
+ ldr r2, .L1355+8
add r3, r3, #1
strh r3, [r4, r2] @ movhi
-.L1318:
+.L1316:
sxth ip, r7
mov r2, #0
str ip, [sp, #4]
- b .L1319
-.L1320:
+ b .L1317
+.L1318:
ldr r0, [r4, #-1040]
add r1, r3, #1
add r2, r2, #1
ldr r0, [r4, #-1044]
ldrh r1, [r0, r1]
strh r1, [r0, r3] @ movhi
-.L1319:
+.L1317:
ldr r0, [sp, #4]
sxth r3, r2
cmp r3, r0
- bne .L1320
+ bne .L1318
ldr r3, [sl, #-1040]
mov r9, r9, asl #1
ldr r2, [r5, #4]
str r2, [r3, ip]
ldr r3, [sl, #-1044]
strh r6, [r3, r9] @ movhi
- b .L1321
-.L1315:
+ b .L1319
+.L1313:
sub r7, r7, #1
uxth r7, r7
-.L1314:
+.L1312:
ldr r0, [sp, #4]
sxth r9, r7
cmp r9, r0
- bgt .L1322
-.L1321:
+ bgt .L1320
+.L1319:
sxth r7, r7
cmp r7, #0
- blt .L1305
-.L1323:
- ldr r3, .L1357+8
- ldr r1, .L1357
+ blt .L1303
+.L1321:
+ ldr r3, .L1355+8
+ ldr r1, .L1355
ldrh r2, [r4, r3]
ldr r1, [r1, #3940]
rsb r1, r2, r1
sub r1, r1, #1
sxth r1, r1
cmp r7, r1
- bgt .L1308
+ bgt .L1306
add r2, r2, #1
strh r2, [r4, r3] @ movhi
ldr r3, [r4, #-1040]
str r2, [r3, r7, asl #2]
mov r7, r7, asl #1
ldr r3, [r4, #-1044]
- b .L1353
-.L1355:
- ldr r3, .L1357
+ b .L1351
+.L1353:
+ ldr r3, .L1355
movw r2, #3932
movw r0, #3956
ldrh r2, [r3, r2]
rsb r1, r3, r1
str r1, [sp, #4]
ldr r1, [r4, #-924]
- b .L1324
-.L1332:
+ b .L1322
+.L1330:
mov ip, r9, asl #2
ldr r0, [r1, r9, asl #2]
str ip, [sp, #16]
ldr ip, [r5, #4]
cmp ip, r0
- bls .L1325
+ bls .L1323
ldr r1, [r1, #0]
cmp r1, #0
- ldr r1, .L1357
- bne .L1326
+ ldr r1, .L1355
+ bne .L1324
cmp r3, r2
- bne .L1327
-.L1326:
+ bne .L1325
+.L1324:
ldr r3, [r1, #3960]
mov r1, #1
ldrh r0, [r3, #0]
bl FtlFreeSysBlkQueueIn
- b .L1328
-.L1327:
+ b .L1326
+.L1325:
movw r2, #3956
add r3, r3, #1
strh r3, [r1, r2] @ movhi
-.L1328:
+.L1326:
sxth r0, r7
mov r2, #0
str r0, [sp, #20]
- ldr ip, .L1357
+ ldr ip, .L1355
str r5, [sp, #4]
- b .L1329
-.L1330:
+ b .L1327
+.L1328:
ldr r0, [r4, #-924]
add r1, r3, #1
add r2, r2, #1
ldr r0, [ip, #3960]
ldrh r1, [r0, r1]
strh r1, [r0, r3] @ movhi
-.L1329:
+.L1327:
ldr r0, [sp, #20]
sxth r3, r2
cmp r3, r0
- bne .L1330
+ bne .L1328
ldr r5, [sp, #4]
mov r9, r9, asl #1
ldr r3, [sl, #-924]
ldr ip, [sp, #16]
ldr r2, [r5, #4]
str r2, [r3, ip]
- ldr r3, .L1357
+ ldr r3, .L1355
ldr r3, [r3, #3960]
strh r6, [r3, r9] @ movhi
- b .L1331
-.L1325:
+ b .L1329
+.L1323:
sub r7, r7, #1
uxth r7, r7
-.L1324:
+.L1322:
ldr r0, [sp, #4]
sxth r9, r7
cmp r9, r0
- bgt .L1332
-.L1331:
+ bgt .L1330
+.L1329:
sxth r7, r7
cmp r7, #0
- blt .L1305
-.L1333:
- ldr r3, .L1357
+ blt .L1303
+.L1331:
+ ldr r3, .L1355
movw r0, #3932
movw r2, #3956
ldrh r0, [r3, r0]
rsb r0, r1, r0
sxth r0, r0
cmp r7, r0
- bgt .L1308
+ bgt .L1306
add r1, r1, #1
strh r1, [r3, r2] @ movhi
ldr r1, [r5, #4]
str r1, [r2, r7, asl #2]
mov r7, r7, asl #1
ldr r3, [r3, #3960]
-.L1353:
+.L1351:
strh r6, [r3, r7] @ movhi
- b .L1308
-.L1310:
- ldr r3, .L1357+16
+ b .L1306
+.L1308:
+ ldr r3, .L1355+16
movw r1, #65535
ldrh r2, [r4, r3]
cmp r2, r1
streqh r6, [r4, r3] @ movhi
- beq .L1354
- ldr r3, .L1357+20
+ beq .L1352
+ ldr r3, .L1355+20
movw r2, #65535
ldrh r0, [r4, r3]
cmp r0, r2
- beq .L1335
+ beq .L1333
mov r1, #1
bl FtlFreeSysBlkQueueIn
-.L1335:
+.L1333:
ldr r3, [r5, #4]
ldr r2, [sl, #-1760]
cmp r2, r3
- ldr r3, .L1357+20
+ ldr r3, .L1355+20
strcsh r6, [r4, r3] @ movhi
- bcs .L1308
- ldr r2, .L1357+16
+ bcs .L1306
+ ldr r2, .L1355+16
ldrh r1, [r4, r2]
strh r6, [r4, r2] @ movhi
strh r1, [r4, r3] @ movhi
-.L1354:
+.L1352:
ldr r3, [r5, #4]
str r3, [r4, #-1760]
- b .L1308
-.L1356:
+ b .L1306
+.L1354:
mov r0, r6
mov r1, #0
- b .L1352
-.L1305:
+ b .L1350
+.L1303:
mov r0, r6
mov r1, #1
-.L1352:
+.L1350:
bl FtlFreeSysBlkQueueIn
-.L1308:
+.L1306:
ldr r5, [sp, #12]
add r8, r8, #36
add r3, r5, #1
uxth r3, r3
str r3, [sp, #12]
-.L1303:
+.L1301:
ldr ip, [sp, #12]
cmp ip, fp
- bne .L1337
+ bne .L1335
ldr r5, [sp, #8]
add r3, r5, #1
uxth r3, r3
str r3, [sp, #8]
-.L1300:
- ldr r6, .L1357
+.L1298:
+ ldr r6, .L1355
movw r3, #3854
ldr ip, [sp, #8]
ldrh r3, [r6, r3]
cmp r3, ip
- bhi .L1351
- ldr r1, .L1357+4
+ bhi .L1349
+ ldr r1, .L1355+4
ldr r2, [r1, #-1044]
ldrh r3, [r2, #0]
cmp r3, #0
- bne .L1339
- ldr r0, .L1357+8
+ bne .L1337
+ ldr r0, .L1355+8
ldrh r1, [r1, r0]
cmp r1, #0
ldrne r0, [r6, #3940]
- bne .L1340
- b .L1339
-.L1344:
+ bne .L1338
+ b .L1337
+.L1342:
mov r1, r1, asl #1
ldrh r1, [r2, r1]
cmp r1, #0
- beq .L1341
- ldr r7, .L1357
+ beq .L1339
+ ldr r7, .L1355
sxth r6, r3
- ldr r1, .L1357+4
+ ldr r1, .L1355+4
mov r5, #0
- b .L1342
-.L1343:
+ b .L1340
+.L1341:
ldr ip, [r1, #-1044]
mov r0, r2, asl #1
rsb r4, r6, r2
str r2, [ip, r4, asl #2]
ldr r2, [r1, #-1044]
strh r5, [r2, r0] @ movhi
-.L1342:
+.L1340:
ldr r0, [r7, #3940]
sxth r2, r3
cmp r2, r0
- bcc .L1343
- b .L1339
-.L1341:
+ bcc .L1341
+ b .L1337
+.L1339:
add r3, r3, #1
uxth r3, r3
-.L1340:
+.L1338:
sxth r1, r3
cmp r1, r0
- bcc .L1344
-.L1339:
- ldr r2, .L1357
+ bcc .L1342
+.L1337:
+ ldr r2, .L1355
ldr r1, [r2, #3960]
ldrh r3, [r1, #0]
cmp r3, #0
- bne .L1345
+ bne .L1343
movw r0, #3956
ldrh r0, [r2, r0]
cmp r0, #0
movwne r0, #3932
ldrneh r2, [r2, r0]
- bne .L1346
- b .L1345
-.L1350:
+ bne .L1344
+ b .L1343
+.L1348:
mov ip, r0, asl #1
ldrh ip, [r1, ip]
cmp ip, #0
- beq .L1347
- ldr r1, .L1357
+ beq .L1345
+ ldr r1, .L1355
movw r8, #3932
- ldr r7, .L1357+4
+ ldr r7, .L1355+4
mov r6, #0
- b .L1348
-.L1349:
+ b .L1346
+.L1347:
ldr r4, [r1, #3960]
mov ip, r2, asl #1
rsb r5, r0, r2
str r2, [r4, r5, asl #2]
ldr r2, [r1, #3960]
strh r6, [r2, ip] @ movhi
-.L1348:
+.L1346:
ldrh ip, [r1, r8]
sxth r2, r3
cmp r2, ip
- blt .L1349
- b .L1345
-.L1347:
+ blt .L1347
+ b .L1343
+.L1345:
add r3, r3, #1
uxth r3, r3
-.L1346:
+.L1344:
sxth r0, r3
cmp r0, r2
- blt .L1350
-.L1345:
+ blt .L1348
+.L1343:
mov r0, #0
add sp, sp, #28
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1358:
+.L1356:
.align 2
-.L1357:
+.L1355:
.word .LANCHOR0
.word .LANCHOR2
.word -1048
.fnstart
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L1369
+ ldr r3, .L1367
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r8, r2
mov r6, r0
cmp r1, r2
mvnhi r7, #0
- bhi .L1360
+ bhi .L1358
mov r9, r0, lsr r9
mov r7, #0
- ldr sl, .L1369+4
+ ldr sl, .L1367+4
mov r9, r9, asl #2
- b .L1361
-.L1366:
+ b .L1359
+.L1364:
ldr r3, [sl, #-920]
mov r0, r6
- ldr r1, .L1369
+ ldr r1, .L1367
ldr fp, [r3, r9]
movw r3, #3918
ldrh r4, [r1, r3]
cmp r4, r5
uxthhi r4, r5
cmp fp, #0
- beq .L1363
- ldr r1, .L1369+4
+ beq .L1361
+ ldr r1, .L1367+4
add r0, sp, #12
str fp, [sp, #16]
ldr r2, [r1, #-968]
add r1, r1, r3, asl #9
mov r2, r4, asl #9
bl memcpy
- b .L1365
-.L1363:
+ b .L1363
+.L1361:
mov r0, r8
mov r1, fp
mov r2, r4, asl #9
bl ftl_memset
-.L1365:
+.L1363:
rsb r5, r4, r5
add r6, r6, r4
add r8, r8, r4, asl #9
add r9, r9, #4
-.L1361:
+.L1359:
cmp r5, #0
- bne .L1366
-.L1360:
+ bne .L1364
+.L1358:
mov r0, r7
add sp, sp, #52
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1370:
+.L1368:
.align 2
-.L1369:
+.L1367:
.word .LANCHOR0
.word .LANCHOR2
.fnend
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r0, #0
- ldr r5, .L1375
+ ldr r5, .L1373
mov r1, #1
- ldr r2, .L1375+4
+ ldr r2, .L1373+4
bl FtlVendorPartRead
- ldr r4, .L1375+8
+ ldr r4, .L1373+8
ldr r3, [r5, #-1704]
cmp r3, r4
- beq .L1372
- ldr r0, .L1375+4
+ beq .L1370
+ ldr r0, .L1373+4
mov r1, #0
mov r2, #512
bl ftl_memset
str r4, [r5, #-1704]
-.L1372:
+.L1370:
ldr r2, [r5, #-1704]
- ldr r3, .L1375
+ ldr r3, .L1373
cmp r2, r4
- bne .L1373
+ bne .L1371
ldr r2, [r3, #-1616]
str r2, [r3, #-1856]
ldr r2, [r3, #-1612]
str r2, [r3, #-1824]
ldr r2, [r3, #-1644]
str r2, [r3, #-1708]
-.L1373:
- ldr r4, .L1375
+.L1371:
+ ldr r4, .L1373
mov r3, #0
ldr r2, [r4, #-1636]
str r3, [r4, #-1004]
- ldr r3, .L1375+12
+ ldr r3, .L1373+12
cmp r2, r3
- bne .L1374
+ bne .L1372
mov r3, #1
- ldr r0, .L1375+16
+ ldr r0, .L1373+16
str r3, [r4, #-1884]
- ldr r1, .L1375+20
+ ldr r1, .L1373+20
bl printk
-.L1374:
- ldr r3, .L1375+24
+.L1372:
+ ldr r3, .L1373+24
movw r2, #3902
ldr r0, [r4, #-1840]
ldrh r1, [r3, r2]
bl __aeabi_uidiv
str r0, [r4, #-1832]
ldmfd sp!, {r3, r4, r5, pc}
-.L1376:
+.L1374:
.align 2
-.L1375:
+.L1373:
.word .LANCHOR2
.word .LANCHOR2-1704
.word 1179929683
.word 305432421
- .word .LC75
- .word .LC98
+ .word .LC74
+ .word .LC97
.word .LANCHOR0
.fnend
.size Ftl_load_ext_data, .-Ftl_load_ext_data
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r0, #64
- ldr r4, .L1379
- ldr r5, .L1379+4
+ ldr r4, .L1377
+ ldr r5, .L1377+4
ldr r2, [r4, #-936]
ldrh r1, [r4, r5]
bl FtlVendorPartRead
ldr r3, [r4, #-936]
ldr r2, [r3, #0]
- ldr r3, .L1379+8
+ ldr r3, .L1377+8
cmp r2, r3
- beq .L1378
- ldr r1, .L1379+12
- ldr r0, .L1379+16
+ beq .L1376
+ ldr r1, .L1377+12
+ ldr r0, .L1377+16
bl printk
ldrh r2, [r4, r5]
ldr r0, [r4, #-936]
mov r1, #0
mov r2, r2, asl #9
bl ftl_memset
-.L1378:
+.L1376:
mov r0, #0
ldmfd sp!, {r3, r4, r5, pc}
-.L1380:
+.L1378:
.align 2
-.L1379:
+.L1377:
.word .LANCHOR2
.word -940
.word 1112818501
- .word .LC99
- .word .LC75
+ .word .LC98
+ .word .LC74
.fnend
.size FtlLoadEctTbl, .-FtlLoadEctTbl
.align 2
stmfd sp!, {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
mov r6, r0
- ldr r4, .L1384
+ ldr r4, .L1382
mov r5, #12
ldr r3, [r4, #-1036]
ldr r7, [r3, r0, asl #2]
cmp r7, #0
- bne .L1382
+ bne .L1380
mul r5, r5, r1
ldr r3, [r4, #-1900]
- ldr r2, .L1384+4
+ ldr r2, .L1382+4
mov r1, #255
add r3, r3, r5
ldr r0, [r3, #8]
ldr r3, [r4, #-1900]
add r5, r3, r5
str r7, [r5, #4]
- b .L1383
-.L1382:
+ b .L1381
+.L1380:
mul r5, r5, r1
ldr r3, [r4, #-1900]
mov r1, #1
add r2, r3, r5
str r1, [r2, #4]
strh r6, [r3, r5] @ movhi
-.L1383:
+.L1381:
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1385:
+.L1383:
.align 2
-.L1384:
+.L1382:
.word .LANCHOR2
.word .LANCHOR0
.fnend
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 0, uses_anonymous_args = 0
cmp r1, #1
- ldr r3, .L1397
+ ldr r3, .L1395
stmfd sp!, {r4, r5, r6, r7, r8, sl, lr}
.save {r4, r5, r6, r7, r8, sl, lr}
movweq r2, #3914
bl FlashReadPages
ldr r3, [sp, #40]
cmn r3, #1
- bne .L1390
- b .L1395
-.L1393:
+ bne .L1388
+ b .L1393
+.L1391:
add r6, r6, r3
mov r0, r7
mov r1, #1
bl FlashReadPages
ldr r3, [sp, #40]
cmn r3, #1
- bne .L1391
+ bne .L1389
ldr r3, [sp, #44]
cmn r3, #1
- bne .L1391
+ bne .L1389
ldr r3, [sp, #4]
cmn r3, #1
subne r4, r6, #1
uxthne r4, r4
- bne .L1395
-.L1391:
+ bne .L1393
+.L1389:
add r6, r6, #1
uxth r8, r6
-.L1395:
+.L1393:
sxth r6, r8
sxth r3, r4
cmp r6, r3
- ble .L1393
-.L1390:
+ ble .L1391
+.L1388:
sxth r0, r4
add sp, sp, #108
ldmfd sp!, {r4, r5, r6, r7, r8, sl, pc}
-.L1398:
+.L1396:
.align 2
-.L1397:
+.L1395:
.word .LANCHOR0
.fnend
.size FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
stmfd sp!, {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
mov r5, #0
- ldr r4, .L1413
+ ldr r4, .L1411
mov r1, r5
- ldr r2, .L1413+4
- ldr r7, .L1413+8
+ ldr r2, .L1411+4
+ ldr r7, .L1411+8
ldr r3, [r4, #-952]
str r5, [r4, #176]
ldr r0, [r4, #-2064]
ldrh r0, [r4, r7]
movw r3, #65535
cmp r0, r3
- beq .L1411
+ beq .L1409
mov r1, #1
bl FtlGetLastWrittenPage
- ldr r3, .L1413+12
+ ldr r3, .L1411+12
add r2, r0, #1
mov r6, r0
strh r2, [r4, r3] @ movhi
- b .L1401
-.L1403:
+ b .L1399
+.L1401:
ldrh r2, [r4, r7]
mov r1, #1
- ldr r0, .L1413+16
+ ldr r0, .L1411+16
sub r5, r5, #1
orr r3, r3, r2, asl #10
str r3, [r4, #172]
bl FlashReadPages
ldr r3, [r4, #168]
cmn r3, #1
- bne .L1402
-.L1401:
+ bne .L1400
+.L1399:
add r3, r5, r6
sxth r3, r3
cmp r3, #0
- bge .L1403
-.L1402:
- ldr r4, .L1413
+ bge .L1401
+.L1400:
+ ldr r4, .L1411
mov r2, #48
- ldr r5, .L1413+4
+ ldr r5, .L1411+4
movw r6, #3852
- ldr r0, .L1413+20
+ ldr r0, .L1411+20
ldr r7, [r4, #176]
mov r1, r7
bl memcpy
add r1, r3, r1, asl #2
bl memcpy
ldr r2, [r4, #-1820]
- ldr r3, .L1413+24
+ ldr r3, .L1411+24
cmp r2, r3
- bne .L1411
- ldr r3, .L1413+28
- ldr r2, .L1413+32
+ bne .L1409
+ ldr r3, .L1411+28
+ ldr r2, .L1411+32
ldrb r1, [r4, #-1810] @ zero_extendqisi2
ldrh r3, [r4, r3]
strh r3, [r4, r2] @ movhi
movw r2, #3866
ldrh r2, [r5, r2]
cmp r1, r2
- bne .L1411
+ bne .L1409
movw r2, #3912
movw r1, #3918
ldrh r2, [r5, r2]
ldrh r1, [r5, r3]
movw r5, #65535
bl __aeabi_uidiv
- ldr r3, .L1413+36
- ldr r1, .L1413+40
+ ldr r3, .L1411+36
+ ldr r1, .L1411+40
strh r0, [r4, r3] @ movhi
sub r3, r3, #34
ldrh r2, [r4, r3]
ldrb r3, [r4, #-1809] @ zero_extendqisi2
strh r0, [r4, r1] @ movhi
mvn r1, #0
- ldr r0, .L1413+44
+ ldr r0, .L1411+44
strb r3, [r4, #-2036]
- ldr r3, .L1413+48
+ ldr r3, .L1411+48
strh r1, [r4, r3] @ movhi
mov r3, #0
- ldr r1, .L1413+52
+ ldr r1, .L1411+52
strh r3, [r4, r0] @ movhi
strb r3, [r4, #-1750]
ldrh r0, [r4, r1]
str r3, [r4, #-1860]
strh r0, [r4, r1] @ movhi
add r1, r1, #196
- ldr r0, .L1413+56
+ ldr r0, .L1411+56
ldrh r1, [r4, r1]
mov ip, r1, lsr #6
and r1, r1, #63
ldrb r1, [r4, #-1808] @ zero_extendqisi2
strh ip, [r4, r0] @ movhi
strb r1, [r4, #-1988]
- ldr r1, .L1413+60
+ ldr r1, .L1411+60
ldrh r0, [r4, r1]
sub r1, r1, #150
strh r0, [r4, r1] @ movhi
add r1, r1, #152
- ldr r0, .L1413+64
+ ldr r0, .L1411+64
ldrh r1, [r4, r1]
mov ip, r1, lsr #6
and r1, r1, #63
ldr r1, [r4, #-1848]
cmp r3, r1
strhi r3, [r4, #-1848]
- ldr r4, .L1413
+ ldr r4, .L1411
ldr r3, [r4, #-1784]
ldr r1, [r4, #-1844]
cmp r3, r1
strhi r3, [r4, #-1844]
cmp r2, r5
- beq .L1406
- ldr r0, .L1413+68
+ beq .L1404
+ ldr r0, .L1411+68
bl make_superblock
-.L1406:
- ldr r3, .L1413+72
+.L1404:
+ ldr r3, .L1411+72
ldrh r3, [r4, r3]
cmp r3, r5
- beq .L1407
- ldr r0, .L1413+76
+ beq .L1405
+ ldr r0, .L1411+76
bl make_superblock
-.L1407:
- ldr r5, .L1413
+.L1405:
+ ldr r5, .L1411
movw r4, #65535
- ldr r3, .L1413+80
+ ldr r3, .L1411+80
ldrh r3, [r5, r3]
cmp r3, r4
- beq .L1408
- ldr r0, .L1413+84
+ beq .L1406
+ ldr r0, .L1411+84
bl make_superblock
-.L1408:
- ldr r3, .L1413+48
+.L1406:
+ ldr r3, .L1411+48
ldrh r3, [r5, r3]
cmp r3, r4
- beq .L1412
- ldr r0, .L1413+88
+ beq .L1410
+ ldr r0, .L1411+88
bl make_superblock
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1411:
+.L1409:
mvn r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1412:
+.L1410:
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1414:
+.L1412:
.align 2
-.L1413:
+.L1411:
.word .LANCHOR2
.word .LANCHOR0
.word -1768
stmfd sp!, {r4, r5, r6, r7, r8, lr}
.save {r4, r5, r6, r7, r8, lr}
mov r3, #0
- ldr r6, .L1430
- ldr r8, .L1430+4
+ ldr r6, .L1428
+ ldr r8, .L1428+4
ldr r4, [r6, #-952]
mov r7, r6
str r3, [r6, #176]
ldrh r5, [r8, r3]
sub r5, r5, #1
uxth r5, r5
- b .L1416
-.L1420:
+ b .L1414
+.L1418:
mov r1, #1
mov r3, r5, asl #10
- ldr r0, .L1430+8
+ ldr r0, .L1428+8
mov r2, r1
str r3, [r6, #172]
bl FlashReadPages
ldr r3, [r6, #168]
cmn r3, #1
- bne .L1417
+ bne .L1415
ldr r3, [r6, #172]
mov r1, #1
- ldr r0, .L1430+8
+ ldr r0, .L1428+8
mov r2, r1
add r3, r3, #1
str r3, [r6, #172]
bl FlashReadPages
-.L1417:
+.L1415:
ldr r3, [r7, #168]
cmn r3, #1
- beq .L1418
+ beq .L1416
ldrh r2, [r4, #0]
movw r3, #61649
cmp r2, r3
- bne .L1418
- ldr r3, .L1430+4
+ bne .L1416
+ ldr r3, .L1428+4
movw r2, #3980
strh r5, [r3, r2] @ movhi
ldr r2, [r4, #4]
mov r2, #3984
ldrh r1, [r4, #8]
strh r1, [r3, r2] @ movhi
- b .L1419
-.L1418:
+ b .L1417
+.L1416:
sub r5, r5, #1
uxth r5, r5
-.L1416:
+.L1414:
movw r3, #3908
ldrh r3, [r8, r3]
sub r3, r3, #48
cmp r5, r3
- bgt .L1420
-.L1419:
- ldr r5, .L1430+4
+ bgt .L1418
+.L1417:
+ ldr r5, .L1428+4
movw r8, #3980
movw r3, #65535
ldrh r2, [r5, r8]
cmp r2, r3
- beq .L1429
+ beq .L1427
mov r6, #3984
ldrh r2, [r5, r6]
cmp r2, r3
- beq .L1422
- ldr r7, .L1430
+ beq .L1420
+ ldr r7, .L1428
mov r1, #1
mov r2, r2, asl #10
add r0, r7, #168
bl FlashReadPages
ldr r3, [r7, #168]
cmn r3, #1
- beq .L1422
+ beq .L1420
ldrh r2, [r4, #0]
movw r3, #61649
cmp r2, r3
- bne .L1422
+ bne .L1420
ldr r3, [r4, #4]
ldr r2, [r5, #3988]
cmp r3, r2
ldrhih r3, [r4, #8]
strhih r2, [r5, r8] @ movhi
strhih r3, [r5, r6] @ movhi
-.L1422:
- ldr r8, .L1430+4
+.L1420:
+ ldr r8, .L1428+4
movw r3, #3980
mov r1, #1
mov r6, #0
- ldr r5, .L1430
+ ldr r5, .L1428
ldrh r0, [r8, r3]
bl FtlGetLastWrittenPage
movw r3, #3982
add r2, r0, #1
mov r7, r0
strh r2, [r8, r3] @ movhi
- b .L1423
-.L1425:
+ b .L1421
+.L1423:
movw r2, #3980
mov r1, #1
ldrh r2, [r8, r2]
sub r6, r6, #1
- ldr r0, .L1430+8
+ ldr r0, .L1428+8
uxth r6, r6
orr r3, r3, r2, asl #10
str r3, [r5, #172]
bl FlashReadPages
ldr r3, [r5, #168]
cmn r3, #1
- bne .L1424
-.L1423:
+ bne .L1422
+.L1421:
add r3, r6, r7
sxth r3, r3
cmp r3, #0
- bge .L1425
-.L1424:
- ldr r3, .L1430+4
+ bge .L1423
+.L1422:
+ ldr r3, .L1428+4
movw r2, #3986
ldrh r1, [r4, #10]
ldrh r0, [r4, #12]
strh r1, [r3, r2] @ movhi
movw r2, #65535
cmp r0, r2
- beq .L1426
+ beq .L1424
ldr r2, [r3, #3840]
cmp r0, r2
- beq .L1426
+ beq .L1424
movw r1, #3854
ldrh r3, [r3, r1]
mov r3, r3, lsr #2
cmp r2, r3
- bcs .L1426
+ bcs .L1424
cmp r0, r3
- bcs .L1426
+ bcs .L1424
bl FtlSysBlkNumInit
-.L1426:
- ldr r6, .L1430+12
+.L1424:
+ ldr r6, .L1428+12
mov r4, #0
- ldr r8, .L1430+4
+ ldr r8, .L1428+4
movw r7, #3866
- ldr r5, .L1430
- b .L1427
-.L1428:
- ldr r3, .L1430+16
+ ldr r5, .L1428
+ b .L1425
+.L1426:
+ ldr r3, .L1428+16
ldr r1, [r5, #176]
ldr r0, [r6, #4]!
ldrh r2, [r5, r3]
mla r1, r4, r2, r1
bl memcpy
add r4, r4, #1
-.L1427:
+.L1425:
ldrh r3, [r8, r7]
cmp r4, r3
- bcc .L1428
+ bcc .L1426
mov r0, #0
ldmfd sp!, {r4, r5, r6, r7, r8, pc}
-.L1429:
+.L1427:
mvn r0, #0
ldmfd sp!, {r4, r5, r6, r7, r8, pc}
-.L1431:
+.L1429:
.align 2
-.L1430:
+.L1428:
.word .LANCHOR2
.word .LANCHOR0
.word .LANCHOR2+168
stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r5, #0
- ldr r3, .L1439
+ ldr r3, .L1437
movw fp, #3866
- ldr r7, .L1439+4
- ldr r6, .L1439+8
+ ldr r7, .L1437+4
+ ldr r6, .L1437+8
ldr r2, [r3, #-2076]
ldr r8, [r3, #-952]
str r2, [r3, #176]
str r8, [r3, #180]
- b .L1433
-.L1438:
+ b .L1431
+.L1436:
movw r9, #3908
mvn r3, #0
ldrh r4, [r6, r9]
strh r3, [r7], #2 @ movhi
add r4, r4, r3
- ldr sl, .L1439
+ ldr sl, .L1437
uxth r4, r4
- b .L1434
-.L1437:
+ b .L1432
+.L1435:
mla r3, r3, r5, r4
mov r1, #1
- ldr r0, .L1439+12
+ ldr r0, .L1437+12
mov r2, r1
mov r3, r3, asl #10
str r3, [sl, #172]
bl FlashReadPages
ldr r3, [sl, #168]
cmn r3, #1
- beq .L1435
+ beq .L1433
ldrh r2, [r8, #0]
movw r3, #61664
cmp r2, r3
streqh r4, [r7, #-2] @ movhi
- beq .L1436
-.L1435:
+ beq .L1434
+.L1433:
sub r4, r4, #1
uxth r4, r4
-.L1434:
+.L1432:
ldrh r3, [r6, r9]
sub r2, r3, #16
cmp r4, r2
- bgt .L1437
-.L1436:
+ bgt .L1435
+.L1434:
add r5, r5, #1
-.L1433:
+.L1431:
ldrh r3, [r6, fp]
cmp r5, r3
- bcc .L1438
+ bcc .L1436
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1440:
+.L1438:
.align 2
-.L1439:
+.L1437:
.word .LANCHOR2
.word .LANCHOR0+3992
.word .LANCHOR0
mov r9, r2
str r3, [sp, #12]
mov r4, r0
- ldr r3, .L1460
+ ldr r3, .L1458
mov r6, r0
mov r8, #0
- ldr r7, .L1460+4
+ ldr r7, .L1458+4
ldrb fp, [r3, #2697] @ zero_extendqisi2
- b .L1442
-.L1449:
+ b .L1440
+.L1447:
rsb r3, r8, sl
add r2, sp, #20
mov r0, r6
cmp r3, r2
mvncs r3, #0
strcs r3, [r6, #0]
- bcs .L1444
+ bcs .L1442
add r3, r7, r3
ldrb r5, [r3, #3768] @ zero_extendqisi2
mov r0, r5
mvnne r3, #0
strne r3, [r6, #0]
bl NandcFlashDeCs
-.L1444:
+.L1442:
add r8, r8, #1
add r6, r6, #36
-.L1442:
+.L1440:
cmp r8, sl
- bne .L1449
+ bne .L1447
ldr r3, [sp, #12]
cmp r3, #0
movne r6, #0
- ldrne r5, .L1460+8
- bne .L1450
- b .L1451
-.L1456:
+ ldrne r5, .L1458+8
+ bne .L1448
+ b .L1449
+.L1454:
ldr r3, [r4, #0]
cmn r3, #1
- bne .L1452
+ bne .L1450
ldr r1, [r4, #4]
- ldr r0, .L1460+12
+ ldr r0, .L1458+12
bl printk
- b .L1453
-.L1452:
+ b .L1451
+.L1450:
rsb r3, r6, sl
mov r1, r9
add r2, sp, #20
bl FlashReadPages
ldr r7, [sp, #28]
cmn r7, #1
- bne .L1454
- ldr r0, .L1460+16
+ bne .L1452
+ ldr r0, .L1458+16
ldr r1, [r4, #4]
bl printk
str r7, [r4, #0]
-.L1454:
+.L1452:
ldr r3, [r4, #12]
cmp r3, #0
- beq .L1455
+ beq .L1453
ldr r2, [r3, #0]
ldr r3, [r5, #156]
ldr r3, [r3, #0]
cmp r2, r3
- beq .L1455
- ldr r0, .L1460+20
+ beq .L1453
+ ldr r0, .L1458+20
ldr r1, [r4, #4]
bl printk
mvn r3, #0
str r3, [r4, #0]
-.L1455:
+.L1453:
ldr r3, [r4, #8]
cmp r3, #0
- beq .L1453
+ beq .L1451
ldr r2, [r3, #0]
ldr r3, [r5, #152]
ldr r3, [r3, #0]
cmp r2, r3
- beq .L1453
- ldr r0, .L1460+24
+ beq .L1451
+ ldr r0, .L1458+24
ldr r1, [r4, #4]
bl printk
mvn r3, #0
str r3, [r4, #0]
-.L1453:
+.L1451:
add r6, r6, #1
add r4, r4, #36
-.L1450:
+.L1448:
cmp r6, sl
- bne .L1456
-.L1451:
+ bne .L1454
+.L1449:
mov r0, #0
add sp, sp, #68
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1461:
+.L1459:
.align 2
-.L1460:
+.L1458:
.word .LANCHOR1
.word .LANCHOR0
.word .LANCHOR2
+ .word .LC99
.word .LC100
.word .LC101
.word .LC102
- .word .LC103
.fnend
.size FlashProgSlc2KPages, .-FlashProgSlc2KPages
.align 2
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.pad #76
sub sp, sp, #76
- ldr r5, .L1489
+ ldr r5, .L1487
mov r9, r0
str r1, [sp, #8]
mov sl, r2
cmp r6, #0
moveq fp, r5
str ip, [sp, #20]
- ldr ip, .L1489+4
+ ldr ip, .L1487+4
ldrb ip, [ip, #2697] @ zero_extendqisi2
str ip, [sp, #12]
- beq .L1463
+ beq .L1461
bl FlashProgSlc2KPages
- b .L1464
-.L1476:
+ b .L1462
+.L1474:
mov r4, #36
ldr r2, [sp, #8]
mul r4, r4, r6
mvncs r3, #0
strcs r3, [r9, r4]
mov r8, r0
- bcs .L1466
+ bcs .L1464
ldrb r1, [r5, #3837] @ zero_extendqisi2
add r2, fp, r2, asl #4
cmp r1, #0
ldr r2, [r2, #2788]
moveq r8, #0
cmp r2, #0
- beq .L1468
+ beq .L1466
cmp r3, #1
- bne .L1469
+ bne .L1467
ldr r0, [r5, #2164]
bl NandcIqrWaitFlashReady
-.L1469:
+.L1467:
ldrb r0, [sp, #32] @ zero_extendqisi2
bl FlashWaitCmdDone
-.L1468:
+.L1466:
ldr r2, [sp, #32]
mov r1, #0
cmp r8, #0
cmp r3, #1
strb r4, [r2, #2780]
mov r0, r4
- bne .L1471
+ bne .L1469
bl NandcWaitFlashReady
- b .L1472
-.L1471:
+ b .L1470
+.L1469:
bl NandcFlashCs
ldr r3, [sp, #32]
mov r0, r4
bl FlashWaitReadyEN
mov r0, r4
bl NandcFlashDeCs
-.L1472:
+.L1470:
ldr r2, [sp, #20]
sub r3, r2, #1
cmp r3, #5
- bhi .L1473
+ bhi .L1471
add r3, r5, r4
ldrb r3, [r3, #3760] @ zero_extendqisi2
cmp r3, #0
- beq .L1473
+ beq .L1471
mov r0, r4
ldrb r1, [r5, #2909] @ zero_extendqisi2
- ldr r2, .L1489+8
+ ldr r2, .L1487+8
mov r3, #0
bl HynixSetRRPara
-.L1473:
+.L1471:
mov r0, r4
bl NandcFlashCs
cmp sl, #1
- bne .L1474
+ bne .L1472
ldrb r3, [r5, #80] @ zero_extendqisi2
cmp r3, #0
- beq .L1474
+ beq .L1472
mov r0, r4
bl flash_enter_slc_mode
-.L1474:
+.L1472:
mov r0, r4
ldr r1, [sp, #28]
bl FlashProgFirstCmd
ldr r3, [r7, #8]
bl NandcXferData
cmp r8, #0
- beq .L1475
+ beq .L1473
mov r0, r4
ldr r1, [sp, #28]
bl FlashProgDpFirstCmd
ldr r2, [sp, #12]
ldr r3, [r3, #8]
bl NandcXferData
-.L1475:
+.L1473:
mov r0, r4
ldr r1, [sp, #28]
bl FlashProgSecondCmd
mov r0, r4
bl NandcFlashDeCs
add r6, r6, r8
-.L1466:
+.L1464:
add r6, r6, #1
-.L1463:
+.L1461:
ldr r3, [sp, #8]
cmp r6, r3
- bcc .L1476
- ldr r5, .L1489
+ bcc .L1474
+ ldr r5, .L1487
mov r4, #0
- ldr r6, .L1489+12
+ ldr r6, .L1487+12
ldr r0, [r5, #2164]
bl NandcIqrWaitFlashReady
- b .L1477
-.L1479:
+ b .L1475
+.L1477:
uxtb r0, r4
bl FlashWaitCmdDone
cmp sl, #1
- bne .L1478
+ bne .L1476
ldrb r3, [r5, #80] @ zero_extendqisi2
cmp r3, #0
- beq .L1478
+ beq .L1476
ldrb r0, [r6, r4, asl #4] @ zero_extendqisi2
bl flash_exit_slc_mode
-.L1478:
+.L1476:
add r4, r4, #1
-.L1477:
+.L1475:
ldrb r3, [r5, #3766] @ zero_extendqisi2
cmp r4, r3
- bcc .L1479
+ bcc .L1477
ldr r2, [sp, #16]
cmp r2, #0
ldreq r0, [sp, #16]
- beq .L1464
+ beq .L1462
mov r5, #0
- ldr r4, .L1489+16
+ ldr r4, .L1487+16
ldr r6, [sp, #8]
- b .L1480
-.L1485:
+ b .L1478
+.L1483:
ldr r3, [r9, #0]
cmn r3, #1
- bne .L1481
+ bne .L1479
ldr r1, [r9, #4]
- ldr r0, .L1489+20
+ ldr r0, .L1487+20
bl printk
- b .L1482
-.L1481:
+ b .L1480
+.L1479:
rsb r3, r5, r6
mov r1, sl
add r2, sp, #28
bl FlashReadPages
ldr r7, [sp, #36]
cmn r7, #1
- bne .L1483
- ldr r0, .L1489+24
+ bne .L1481
+ ldr r0, .L1487+24
ldr r1, [r9, #4]
bl printk
str r7, [r9, #0]
-.L1483:
+.L1481:
ldr r3, [r9, #12]
cmp r3, #0
- beq .L1484
+ beq .L1482
ldr r2, [r3, #0]
ldr r3, [r4, #156]
ldr r3, [r3, #0]
cmp r2, r3
- beq .L1484
- ldr r0, .L1489+28
+ beq .L1482
+ ldr r0, .L1487+28
ldr r1, [r9, #4]
bl printk
mvn r3, #0
str r3, [r9, #0]
-.L1484:
+.L1482:
ldr r3, [r9, #8]
cmp r3, #0
- beq .L1482
+ beq .L1480
ldr r2, [r3, #0]
ldr r3, [r4, #152]
ldr r3, [r3, #0]
cmp r2, r3
- beq .L1482
- ldr r0, .L1489+32
+ beq .L1480
+ ldr r0, .L1487+32
ldr r1, [r9, #4]
bl printk
mvn r3, #0
str r3, [r9, #0]
-.L1482:
+.L1480:
add r5, r5, #1
add r9, r9, #36
-.L1480:
+.L1478:
cmp r5, r6
- bne .L1485
+ bne .L1483
mov r0, #0
-.L1464:
+.L1462:
add sp, sp, #76
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1490:
+.L1488:
.align 2
-.L1489:
+.L1487:
.word .LANCHOR0
.word .LANCHOR1
.word .LANCHOR0+2912
.word .LANCHOR0+2780
.word .LANCHOR2
+ .word .LC99
.word .LC100
.word .LC101
.word .LC102
- .word .LC103
.fnend
.size FlashProgPages, .-FlashProgPages
.align 2
stmfd sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
.save {r3, r4, r5, r6, r7, r8, sl, lr}
mov r8, #0
- ldr r4, .L1500
+ ldr r4, .L1498
mov r1, #255
- ldr r6, .L1500+4
+ ldr r6, .L1498+4
movw sl, #3852
- ldr r7, .L1500+8
+ ldr r7, .L1498+8
ldr r3, [r4, #-2076]
ldr r5, [r4, #-952]
str r3, [r4, #176]
str r5, [r4, #180]
str r8, [r5, #12]
strh r3, [r5, #2] @ movhi
- ldr r3, .L1500+12
+ ldr r3, .L1498+12
strh r3, [r5, #0] @ movhi
ldr r3, [r4, #-1760]
str r8, [r5, #8]
str r3, [r5, #4]
- ldr r3, .L1500+16
+ ldr r3, .L1498+16
str r3, [r4, #-1820]
- ldr r3, .L1500+20
+ ldr r3, .L1498+20
str r3, [r4, #-1816]
- ldr r3, .L1500+24
+ ldr r3, .L1498+24
ldrh r2, [r4, r3]
sub r3, r3, #50
strh r2, [r4, r3] @ movhi
movw r3, #3866
ldrh r3, [r7, r3]
strb r3, [r4, #-1810]
- ldr r3, .L1500+28
+ ldr r3, .L1498+28
ldrh r2, [r4, r3]
add r3, r3, #238
strh r2, [r4, r3] @ movhi
ldrh r2, [r4, r3]
ldrb r3, [r4, #-2038] @ zero_extendqisi2
orr r2, r3, r2, asl #6
- ldr r3, .L1500+32
+ ldr r3, .L1498+32
strh r2, [r4, r3] @ movhi
ldrb r3, [r4, #-2036] @ zero_extendqisi2
strb r3, [r4, #-1809]
- ldr r3, .L1500+36
+ ldr r3, .L1498+36
ldrh r2, [r4, r3]
add r3, r3, #194
strh r2, [r4, r3] @ movhi
ldrh r2, [r4, r3]
ldrb r3, [r4, #-1990] @ zero_extendqisi2
orr r2, r3, r2, asl #6
- ldr r3, .L1500+40
+ ldr r3, .L1498+40
strh r2, [r4, r3] @ movhi
ldrb r3, [r4, #-1988] @ zero_extendqisi2
strb r3, [r4, #-1808]
- ldr r3, .L1500+44
+ ldr r3, .L1498+44
ldrh r2, [r4, r3]
add r3, r3, #150
strh r2, [r4, r3] @ movhi
ldrh r2, [r4, r3]
ldrb r3, [r4, #-1942] @ zero_extendqisi2
orr r2, r3, r2, asl #6
- ldr r3, .L1500+48
+ ldr r3, .L1498+48
strh r2, [r4, r3] @ movhi
ldrb r3, [r4, #-1940] @ zero_extendqisi2
strb r3, [r4, #-1807]
movw r3, #3922
ldrh r2, [r7, r3]
bl ftl_memset
- ldr r1, .L1500+52
+ ldr r1, .L1498+52
mov r2, #48
ldr r0, [r4, #176]
bl memcpy
mov r0, r8
bl FtlUpdateVaildLpn
movw r8, #65535
-.L1499:
+.L1497:
ldr r3, [r4, #-2076]
mov r1, #1
- ldr r7, .L1500+56
+ ldr r7, .L1498+56
ldrh r2, [r4, r6]
str r3, [r4, #176]
ldr r3, [r4, #-952]
- ldr r0, .L1500+60
+ ldr r0, .L1498+60
str r3, [r4, #180]
ldrh r3, [r4, r7]
orr r3, r3, r2, asl #10
str r3, [r4, #172]
mov r3, r1
bl FlashProgPages
- ldr r1, .L1500+8
+ ldr r1, .L1498+8
movw r3, #3914
ldrh r2, [r4, r7]
ldrh r3, [r1, r3]
sub r3, r3, #1
cmp r2, r3
- blt .L1493
- ldr r3, .L1500+64
+ blt .L1491
+ ldr r3, .L1498+64
ldrh r2, [r4, r6]
ldrh r8, [r4, r3]
strh r2, [r4, r3] @ movhi
str r3, [r5, #4]
mov r3, r1
strh r0, [r5, #2] @ movhi
- ldr r0, .L1500+60
+ ldr r0, .L1498+60
bl FlashProgPages
-.L1493:
- ldr r2, .L1500+56
+.L1491:
+ ldr r2, .L1498+56
ldr r1, [r4, #168]
ldrh r3, [r4, r2]
cmn r1, #1
add r3, r3, #1
uxth r3, r3
strh r3, [r4, r2] @ movhi
- bne .L1494
+ bne .L1492
cmp r3, #1
- ldreq r1, .L1500+8
+ ldreq r1, .L1498+8
movweq r3, #3914
ldreqh r3, [r1, r3]
subeq r3, r3, #1
streqh r3, [r4, r2] @ movhi
- b .L1499
-.L1494:
+ b .L1497
+.L1492:
cmp r3, #1
- beq .L1499
+ beq .L1497
movw r3, #65535
cmp r8, r3
- beq .L1496
+ beq .L1494
mov r0, r8
mov r1, #1
bl FtlFreeSysBlkQueueIn
-.L1496:
+.L1494:
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L1501:
+.L1499:
.align 2
-.L1500:
+.L1498:
.word .LANCHOR2
.word -1768
.word .LANCHOR0
stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r1, #0
- ldr r7, .L1511
+ ldr r7, .L1509
mov r6, #0
- ldr sl, .L1511+4
+ ldr sl, .L1509+4
movw r9, #3866
- ldr r8, .L1511+8
+ ldr r8, .L1509+8
ldr r3, [r7, #-952]
ldr r0, [r7, #-2076]
str r3, [r7, #180]
str r0, [r7, #176]
ldrh r2, [sl, r3]
bl ftl_memset
- b .L1503
-.L1504:
- ldr r3, .L1511+12
+ b .L1501
+.L1502:
+ ldr r3, .L1509+12
ldr r1, [r8, #4]!
ldrh r2, [r7, r3]
ldr r3, [r7, #176]
add r6, r6, #1
add r0, r3, r0, asl #2
bl memcpy
-.L1503:
+.L1501:
ldrh r3, [sl, r9]
- ldr r4, .L1511+4
+ ldr r4, .L1509+4
cmp r6, r3
- ldr r5, .L1511
- blt .L1504
+ ldr r5, .L1509
+ blt .L1502
ldr r6, [r5, #180]
mov r1, #255
mov r2, #16
mov fp, r7
mov r0, r6
bl ftl_memset
- ldr r3, .L1511+16
+ ldr r3, .L1509+16
strh r3, [r6, #0] @ movhi
ldr r3, [r4, #3988]
str r3, [r6, #4]
strh r3, [r6, #10] @ movhi
ldr r3, [r4, #3840]
strh r3, [r6, #12] @ movhi
- b .L1510
-.L1509:
+ b .L1508
+.L1507:
mov r7, #1
-.L1510:
+.L1508:
ldr r3, [r5, #-2076]
movw r8, #3980
- ldr r4, .L1511+4
+ ldr r4, .L1509+4
movw sl, #3982
mov r9, #3984
str r3, [r5, #176]
str r3, [r5, #172]
str r0, [sp, #0]
ldrh r3, [r4, r9]
- ldr r0, .L1511+20
+ ldr r0, .L1509+20
bl printk
mov r1, #1
mov r2, r1
mov r3, r1
- ldr r0, .L1511+24
+ ldr r0, .L1509+24
bl FlashProgPages
movw r3, #3914
ldrh r3, [r4, r3]
ldrh r2, [r4, sl]
sub r3, r3, #1
cmp r2, r3
- blt .L1506
+ blt .L1504
ldr r3, [r4, #3988]
mov r1, #1
ldrh r2, [r4, r8]
strh fp, [r4, sl] @ movhi
bl FlashEraseBlocks
mov r1, #1
- ldr r0, .L1511+24
+ ldr r0, .L1509+24
mov r2, r1
mov r3, r1
bl FlashProgPages
-.L1506:
- ldr r2, .L1511+4
+.L1504:
+ ldr r2, .L1509+4
movw r3, #3982
ldrh r1, [r2, r3]
add r1, r1, #1
strh r1, [r2, r3] @ movhi
ldr r3, [r5, #168]
cmn r3, #1
- bne .L1507
+ bne .L1505
ldr r1, [r5, #172]
- ldr r0, .L1511+28
+ ldr r0, .L1509+28
bl printk
- b .L1510
-.L1507:
+ b .L1508
+.L1505:
cmp r7, #0
- beq .L1509
+ beq .L1507
mov r0, #0
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1512:
+.L1510:
.align 2
-.L1511:
+.L1509:
.word .LANCHOR2
.word .LANCHOR0
.word .LANCHOR0+4004
.word -1032
.word -3887
- .word .LC104
+ .word .LC103
.word .LANCHOR2+168
- .word .LC105
+ .word .LC104
.fnend
.size FtlBbmTblFlush, .-FtlBbmTblFlush
.align 2
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
.save {r4, r5, r6, r7, r8, r9, sl, lr}
mov r9, r0
- ldr r4, .L1523
- ldr r3, .L1523+4
+ ldr r4, .L1521
+ ldr r3, .L1521+4
ldrh r3, [r4, r3]
cmp r3, #0
movne r6, #0
movne sl, r4
- bne .L1514
- b .L1515
-.L1521:
+ bne .L1512
+ b .L1513
+.L1519:
add r3, r3, r6
mov r1, r9
mov r5, #0
- ldr r7, .L1523+4
+ ldr r7, .L1521+4
ldrb r0, [r3, #3870] @ zero_extendqisi2
bl V2P_block
mov r8, r0
- b .L1516
-.L1520:
+ b .L1514
+.L1518:
add r3, r4, r5, asl #1
sub r3, r3, #1120
sub r3, r3, #12
ldrh r3, [r3, #0]
cmp r3, r8
- bne .L1517
+ bne .L1515
mov r1, r8
- ldr r0, .L1523+8
+ ldr r0, .L1521+8
bl printk
mov r0, r8
bl FtlBbmMapBadBlock
bl FtlBbmTblFlush
ldrh r1, [r4, r7]
mov r3, r5
- b .L1518
-.L1519:
+ b .L1516
+.L1517:
add r0, r3, #1
add r3, r4, r3, asl #1
sub r3, r3, #1120
ldrh r2, [r2, #0]
strh r2, [r3, #-12] @ movhi
uxth r3, r0
-.L1518:
+.L1516:
cmp r3, r1
- bcc .L1519
+ bcc .L1517
sub r1, r1, #1
strh r1, [sl, r7] @ movhi
-.L1517:
+.L1515:
add r5, r5, #1
uxth r5, r5
-.L1516:
+.L1514:
ldrh r3, [r4, r7]
cmp r3, r5
- bhi .L1520
+ bhi .L1518
add r6, r6, #1
uxth r6, r6
-.L1514:
- ldr r3, .L1523+12
+.L1512:
+ ldr r3, .L1521+12
movw r2, #3844
ldrh r2, [r3, r2]
cmp r2, r6
- bhi .L1521
+ bhi .L1519
bl FtlGcReFreshBadBlk
-.L1515:
+.L1513:
mov r0, #0
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L1524:
+.L1522:
.align 2
-.L1523:
+.L1521:
.word .LANCHOR2
.word -1134
- .word .LC106
+ .word .LC105
.word .LANCHOR0
.fnend
.size FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r2, r0, asl #1
- ldr r3, .L1533
+ ldr r3, .L1531
mov r4, r0
ldr r1, [r3, #-2064]
ldrh r2, [r1, r2]
cmp r2, #0
- bne .L1526
- ldr r1, .L1533+4
+ bne .L1524
+ ldr r1, .L1531+4
ldrh r0, [r3, r1]
cmp r0, r4
mvneq r2, #0
streqh r2, [r3, r1] @ movhi
- beq .L1528
- ldr r1, .L1533+8
+ beq .L1526
+ ldr r1, .L1531+8
ldrh r1, [r3, r1]
cmp r1, r4
- beq .L1529
- ldr r1, .L1533+12
+ beq .L1527
+ ldr r1, .L1531+12
ldrh r1, [r3, r1]
cmp r1, r4
- beq .L1529
- ldr r1, .L1533+16
+ beq .L1527
+ ldr r1, .L1531+16
ldrh r3, [r3, r1]
cmp r3, r4
- beq .L1529
-.L1528:
+ beq .L1527
+.L1526:
mov r1, r4
- ldr r0, .L1533+20
+ ldr r0, .L1531+20
bl List_remove_node
- ldr r5, .L1533
- ldr r3, .L1533+24
+ ldr r5, .L1531
+ ldr r3, .L1531+24
mov r0, r4
ldrh r2, [r5, r3]
sub r2, r2, #1
mov r0, r4
bl FtlGcFreeBadSuperBlk
mov r2, #1
- b .L1529
-.L1526:
+ b .L1527
+.L1524:
bl List_update_data_list
mov r2, #0
-.L1529:
+.L1527:
mov r0, r2
ldmfd sp!, {r3, r4, r5, pc}
-.L1534:
+.L1532:
.align 2
-.L1533:
+.L1531:
.word .LANCHOR2
.word -1756
.word -2044
movw r3, #65535
cmp r0, r3
mov r5, r0
- beq .L1536
- ldr r2, .L1541
+ beq .L1534
+ ldr r2, .L1539
mov r3, r0, asl #1
ldr r2, [r2, #-2064]
ldrh r4, [r2, r3]
cmp r4, #0
subne r4, r4, #1
strneh r4, [r2, r3] @ movhi
- bne .L1536
- ldr r0, .L1541+4
+ bne .L1534
+ ldr r0, .L1539+4
mov r1, r5
mov r2, r4
bl printk
mov r0, r4
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1536:
- ldr r7, .L1541
+.L1534:
+ ldr r7, .L1539
movw r3, #65535
- ldr r6, .L1541+8
+ ldr r6, .L1539+8
ldrh r0, [r7, r6]
cmp r0, r3
streqh r5, [r7, r6] @ movhi
moveq r0, #0
ldmeqfd sp!, {r3, r4, r5, r6, r7, pc}
cmp r0, r5
- beq .L1540
+ beq .L1538
bl update_vpc_list
strh r5, [r7, r6] @ movhi
adds r0, r0, #0
movne r0, #1
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1540:
+.L1538:
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1542:
+.L1540:
.align 2
-.L1541:
+.L1539:
.word .LANCHOR2
- .word .LC107
+ .word .LC106
.word -1024
.fnend
.size decrement_vpc_count, .-decrement_vpc_count
mov r4, r0
ldrb r3, [r0, #6] @ zero_extendqisi2
movw r6, #65535
- ldr r5, .L1555
- ldr r7, .L1555+4
+ ldr r5, .L1553
+ ldr r7, .L1553+4
add r3, r0, r3, asl #1
ldrh r3, [r3, #16]
- b .L1544
-.L1545:
+ b .L1542
+.L1543:
ldrb r3, [r4, #6] @ zero_extendqisi2
movw r2, #3844
ldrh r2, [r5, r2]
ldrb r3, [r4, #6] @ zero_extendqisi2
add r3, r4, r3, asl #1
ldrh r3, [r3, #16]
-.L1544:
+.L1542:
cmp r3, r6
- beq .L1545
+ beq .L1543
ldrb r2, [r4, #8] @ zero_extendqisi2
cmp r2, #1
- bne .L1547
+ bne .L1545
ldrb r2, [r5, #80] @ zero_extendqisi2
cmp r2, #0
- bne .L1547
+ bne .L1545
ldrh r2, [r4, #2]
add r2, r7, r2, asl #1
sub r2, r2, #912
ldrh r2, [r2, #0]
cmp r2, r6
- bne .L1547
+ bne .L1545
ldrh r3, [r4, #4]
ldrh r0, [r4, #0]
sub r3, r3, #1
strh r3, [r4, #4] @ movhi
bl decrement_vpc_count
- b .L1545
-.L1547:
+ b .L1543
+.L1545:
ldrh r6, [r4, #2]
movw r5, #65535
mov r7, r5
ldrh r3, [r4, #4]
sub r3, r3, #1
strh r3, [r4, #4] @ movhi
-.L1552:
- ldr r2, .L1555
+.L1550:
+ ldr r2, .L1553
movw r3, #3844
ldrh r2, [r2, r3]
ldrb r3, [r4, #6] @ zero_extendqisi2
-.L1549:
+.L1547:
add r3, r3, #1
uxtb r3, r3
cmp r3, r2
add r1, r4, r3, asl #1
ldrh r1, [r1, #16]
cmp r1, r5
- beq .L1549
+ beq .L1547
strb r3, [r4, #6]
ldrb r3, [r4, #8] @ zero_extendqisi2
cmp r3, #1
- bne .L1550
- ldr r3, .L1555
+ bne .L1548
+ ldr r3, .L1553
ldrb r2, [r3, #80] @ zero_extendqisi2
cmp r2, #0
ldrh r2, [r4, #2]
- bne .L1553
- ldr r3, .L1555+4
+ bne .L1551
+ ldr r3, .L1553+4
add r2, r3, r2, asl #1
sub r2, r2, #912
ldrh r3, [r2, #0]
cmp r3, r7
- bne .L1550
+ bne .L1548
ldrh r3, [r4, #4]
cmp r3, #0
- beq .L1550
+ beq .L1548
sub r3, r3, #1
ldrh r0, [r4, #0]
strh r3, [r4, #4] @ movhi
bl decrement_vpc_count
- b .L1552
-.L1553:
+ b .L1550
+.L1551:
movw r1, #3914
ldrh r1, [r3, r1]
cmp r2, r1
- bcc .L1550
- ldr r1, .L1555+4
+ bcc .L1548
+ ldr r1, .L1553+4
ldrh r2, [r4, #0]
ldrh r0, [r4, #4]
ldr r1, [r1, #-2064]
ldrh r3, [r3, r2]
strb r1, [r4, #6]
strh r3, [r4, #2] @ movhi
-.L1550:
+.L1548:
mov r0, r6
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1556:
+.L1554:
.align 2
-.L1555:
+.L1553:
.word .LANCHOR0
.word .LANCHOR2
.fnend
.size get_new_active_ppa, .-get_new_active_ppa
.align 2
- .type FtlSlcSuperblockCheck.part.18, %function
-FtlSlcSuperblockCheck.part.18:
+ .type FtlSlcSuperblockCheck.part.17, %function
+FtlSlcSuperblockCheck.part.17:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r4, r0
ldrb r3, [r0, #6] @ zero_extendqisi2
movw r6, #65535
- ldr r5, .L1563
- ldr r7, .L1563+4
+ ldr r5, .L1561
+ ldr r7, .L1561+4
add r3, r0, r3, asl #1
ldrh r3, [r3, #16]
- b .L1558
-.L1559:
+ b .L1556
+.L1557:
ldrb r3, [r4, #6] @ zero_extendqisi2
movw r2, #3844
ldrh r2, [r5, r2]
ldrb r3, [r4, #6] @ zero_extendqisi2
add r3, r4, r3, asl #1
ldrh r3, [r3, #16]
-.L1558:
+.L1556:
cmp r3, r6
- beq .L1559
+ beq .L1557
ldrb r2, [r4, #8] @ zero_extendqisi2
cmp r2, #1
- bne .L1561
+ bne .L1559
ldrb r3, [r5, #80] @ zero_extendqisi2
cmp r3, #0
- bne .L1561
+ bne .L1559
ldrh r3, [r4, #2]
add r3, r7, r3, asl #1
sub r3, r3, #912
ldrh r3, [r3, #0]
cmp r3, r6
- bne .L1561
+ bne .L1559
ldrh r3, [r4, #4]
ldrh r0, [r4, #0]
sub r3, r3, #1
bl decrement_vpc_count
ldrh r3, [r4, #4]
cmp r3, #0
- bne .L1559
+ bne .L1557
ldrh r2, [r4, #2]
strb r3, [r4, #6]
add r2, r2, #1
strh r2, [r4, #2] @ movhi
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1561:
- ldr r3, .L1563
+.L1559:
+ ldr r3, .L1561
ldrb r1, [r3, #80] @ zero_extendqisi2
cmp r1, #0
ldmeqfd sp!, {r3, r4, r5, r6, r7, pc}
ldrh r2, [r3, r2]
cmp r1, r2
ldmccfd sp!, {r3, r4, r5, r6, r7, pc}
- ldr r1, .L1563+4
+ ldr r1, .L1561+4
ldrh r2, [r4, #0]
ldrh r0, [r4, #4]
ldr r1, [r1, #-2064]
strb r1, [r4, #6]
strh r3, [r4, #2] @ movhi
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1564:
+.L1562:
.align 2
-.L1563:
+.L1561:
.word .LANCHOR0
.word .LANCHOR2
.fnend
- .size FtlSlcSuperblockCheck.part.18, .-FtlSlcSuperblockCheck.part.18
+ .size FtlSlcSuperblockCheck.part.17, .-FtlSlcSuperblockCheck.part.17
.align 2
.global FtlSlcSuperblockCheck
.type FtlSlcSuperblockCheck, %function
ldrh r3, [r0, #4]
cmp r3, #0
bxeq lr
- b FtlSlcSuperblockCheck.part.18
+ b FtlSlcSuperblockCheck.part.17
.fnend
.size FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
.align 2
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.pad #20
sub sp, sp, #20
- ldr r4, .L1601
+ ldr r4, .L1599
mov r5, r0
mov r7, r4
-.L1597:
- ldr r3, .L1601+4
+.L1595:
+ ldr r3, .L1599+4
cmp r5, r3
- bne .L1569
- ldr r3, .L1601+8
+ bne .L1567
+ ldr r3, .L1599+8
ldrh r2, [r4, r3]
ldr r3, [r4, #-1180]
mov r1, r2, lsr #1
ldr ip, [r4, #-1884]
cmp ip, #0
uxth r0, r0
- beq .L1591
+ beq .L1589
ldr ip, [r4, #-1824]
cmp ip, #29
- bhi .L1591
+ bhi .L1589
cmp ip, #2
- bls .L1596
+ bls .L1594
tst r2, #1
- beq .L1570
+ beq .L1568
cmp r3, #0
moveq r1, r3
- beq .L1571
- b .L1570
-.L1569:
+ beq .L1569
+ b .L1568
+.L1567:
ldrb r3, [r5, #8] @ zero_extendqisi2
cmp r3, #1
- bne .L1596
- ldr r3, .L1601+12
+ bne .L1594
+ ldr r3, .L1599+12
movw r2, #3864
ldrh r2, [r3, r2]
cmp r2, #1
- beq .L1596
+ beq .L1594
ldrb r3, [r3, #80] @ zero_extendqisi2
cmp r3, #0
- bne .L1596
+ bne .L1594
sub r3, r3, #2048
ldr r2, [r4, #-1884]
ldrh r3, [r4, r3]
cmp r2, #0
mov r1, r3, lsr #3
- beq .L1570
+ beq .L1568
ldr r2, [r4, #-1824]
cmp r2, #1
movls r1, #7
mulls r1, r1, r3
movls r1, r1, lsr #3
- b .L1570
-.L1591:
+ b .L1568
+.L1589:
mov r1, r0
-.L1570:
+.L1568:
cmp r1, #0
subne r1, r1, #1
uxthne r1, r1
- b .L1571
-.L1596:
+ b .L1569
+.L1594:
mov r1, #0
-.L1571:
- ldr r0, .L1601+16
+.L1569:
+ ldr r0, .L1599+16
bl List_pop_index_node
- ldr r3, .L1601+8
+ ldr r3, .L1599+8
ldrh r2, [r4, r3]
sub r2, r2, #1
strh r2, [r4, r3] @ movhi
bl make_superblock
ldrb r3, [r5, #7] @ zero_extendqisi2
cmp r3, #0
- beq .L1572
- ldr r2, .L1601+12
+ beq .L1570
+ ldr r2, .L1599+12
movw r3, #3844
ldr ip, [r4, #-2088]
mov fp, #0
mov r3, ip
mov r2, fp
stmia sp, {r5, ip}
- b .L1573
-.L1572:
+ b .L1571
+.L1570:
ldr r2, [r4, #-2064]
mov r3, r6, asl #1
mvn r1, #0
strh r1, [r2, r3] @ movhi
- b .L1598
-.L1576:
+ b .L1596
+.L1574:
str r0, [r3, #8]
movw r5, #65535
str r0, [r3, #12]
ldrh lr, [r1, #16]
cmp lr, r5
- beq .L1575
+ beq .L1573
ldr r5, [sp, #4]
mov ip, #36
mov lr, lr, asl #10
add fp, fp, #1
uxth fp, fp
str lr, [r9, #4]
-.L1575:
+.L1573:
add r2, r2, #1
add r3, r3, #36
add r1, r1, #2
uxth r2, r2
-.L1573:
+.L1571:
cmp r2, r8
- bne .L1576
+ bne .L1574
ldr r3, [r4, #-1884]
ldr r5, [sp, #0]
cmp r3, #0
- beq .L1577
- ldr r3, .L1601+20
+ beq .L1575
+ ldr r3, .L1599+20
cmp r5, r3
- bne .L1577
+ bne .L1575
ldr r2, [r4, #-2084]
mov r3, r6, asl #1
ldrh r3, [r2, r3]
cmp r3, #30
movhi r3, #0
strhib r3, [r4, #-2036]
-.L1577:
+.L1575:
ldrb r3, [r5, #8] @ zero_extendqisi2
ldr r2, [r4, #-2084]
cmp r3, #0
mov r3, r6, asl #1
ldrh r1, [r2, r3]
- bne .L1578
+ bne .L1576
cmp r1, #0
- ldrne ip, .L1601+12
+ ldrne ip, .L1599+12
movwne r0, #3902
moveq r1, #2
ldrneh r0, [ip, r0]
mov r1, #0
add r3, r3, #1
str r3, [r4, #-1840]
- b .L1600
-.L1578:
+ b .L1598
+.L1576:
add r1, r1, #1
strh r1, [r2, r3] @ movhi
ldr r3, [r4, #-1836]
mov r1, #1
add r3, r3, #1
str r3, [r4, #-1836]
-.L1600:
+.L1598:
bl ftl_set_blk_mode
ldr r3, [r4, #-2084]
mov r9, r6, asl #1
cmp r3, r2
movw r2, #3902
strhi r3, [r4, #-1828]
- ldr r3, .L1601+12
+ ldr r3, .L1599+12
ldrh r1, [r3, r2]
ldr r2, [r7, #-1836]
mla r0, r0, r1, r2
str r2, [r3, #16]
ldr r3, [r7, #-2088]
str r0, [r7, #-1832]
- b .L1583
-.L1584:
+ b .L1581
+.L1582:
add r8, r8, #1
ldr r2, [r3, #-32]
uxth r8, r8
bic r2, r2, #1020
bic r2, r2, #3
str r2, [r3, #-32]
-.L1583:
+.L1581:
cmp r8, fp
add r3, r3, #36
- bne .L1584
+ bne .L1582
mov r2, r8
ldr r0, [r4, #-2088]
ldrb r1, [r5, #8] @ zero_extendqisi2
mov r8, fp
mov r6, r5
mov r9, r2
- b .L1585
-.L1587:
+ b .L1583
+.L1585:
ldr r1, [r4, #-2088]
add r0, r1, fp
ldr r5, [r1, fp]
cmn r5, #1
- bne .L1586
+ bne .L1584
ldr r0, [r0, #4]
add r8, r8, #1
str r3, [sp, #12]
strb r1, [r6, #7]
ldr ip, [sp, #8]
ldr r3, [sp, #12]
-.L1586:
+.L1584:
add fp, fp, #36
add sl, sl, #2
-.L1585:
+.L1583:
cmp fp, r9
- bne .L1587
+ bne .L1585
cmp r8, #0
mov r5, r6
mov r9, ip
mov r6, r3
- beq .L1588
+ beq .L1586
mov r0, r3
bl update_multiplier_value
bl FtlBbmTblFlush
-.L1588:
+.L1586:
ldrb r3, [r5, #7] @ zero_extendqisi2
cmp r3, #0
- bne .L1589
+ bne .L1587
ldr r3, [r7, #-2064]
mvn r2, #0
strh r2, [r3, r9] @ movhi
-.L1598:
+.L1596:
mov r0, r6
bl INSERT_DATA_LIST
- b .L1597
-.L1589:
- ldr r1, .L1601+12
+ b .L1595
+.L1587:
+ ldr r1, .L1599+12
movw r2, #3912
mov r0, #0
strh r0, [r5, #2] @ movhi
ldrh r2, [r1, r2]
strh r6, [r5, #0] @ movhi
mul r2, r2, r3
- ldr r3, .L1601
+ ldr r3, .L1599
ldr r1, [r3, #-1848]
uxth r2, r2
strh r2, [r5, #4] @ movhi
strh r2, [r1, r3] @ movhi
add sp, sp, #20
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1602:
+.L1600:
.align 2
-.L1601:
+.L1599:
.word .LANCHOR2
.word .LANCHOR2-1948
.word -2048
.fnstart
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L1610
- stmfd sp!, {r4, r5, r6, r7, r8, sl, lr}
- .save {r4, r5, r6, r7, r8, sl, lr}
+ ldr r3, .L1608
+ stmfd sp!, {r4, r5, r6, r7, r8, lr}
+ .save {r4, r5, r6, r7, r8, lr}
mov r4, r0
- ldr r5, [r3, #-1164]
- .pad #44
- sub sp, sp, #44
- ldr r3, .L1610+4
- ldrb r8, [r3, #80] @ zero_extendqisi2
- cmp r8, #0
- beq .L1604
- ldrb r8, [r0, #8] @ zero_extendqisi2
- sub r0, r8, #1
- rsbs r8, r0, #0
- adc r8, r8, r0
-.L1604:
- mov sl, #7
- mvn r7, #0
- ldr r6, .L1610
- b .L1605
-.L1608:
+ ldrb r7, [r3, #80] @ zero_extendqisi2
+ .pad #40
+ sub sp, sp, #40
+ cmp r7, #0
+ beq .L1602
+ ldrb r7, [r0, #8] @ zero_extendqisi2
+ sub r0, r7, #1
+ rsbs r7, r0, #0
+ adc r7, r7, r0
+.L1602:
+ mov r8, #7
+ mvn r6, #0
+ ldr r5, .L1608+4
+ b .L1603
+.L1606:
ldrh r3, [r4, #4]
cmp r3, #0
- beq .L1606
+ beq .L1604
mov r0, r4
bl get_new_active_ppa
- ldr r3, [r6, #-2076]
- str r7, [sp, #20]
- mov r1, #1
+ ldr r2, [r5, #-952]
+ ldr r3, [r5, #-2076]
+ str r6, [sp, #20]
+ str r2, [sp, #16]
str r3, [sp, #12]
- ldr r3, [r6, #-952]
- str r3, [sp, #16]
- str r7, [r5, #8]
- str r7, [r5, #12]
+ str r6, [r2, #12]
+ str r6, [r2, #8]
ldrh r3, [r4, #0]
str r0, [sp, #8]
add r0, sp, #4
- strh r3, [r5, #2] @ movhi
+ strh r3, [r2, #2] @ movhi
mov r3, #0
- strh r3, [r5, #0] @ movhi
- ldr r2, [r6, #-1844]
- ldr r5, [r6, #-952]
- cmn r2, #2
- str r2, [r5, #4]
- addne r2, r2, #1
- moveq r2, #0
- str r2, [r6, #-1844]
- mov r2, r8
+ strh r3, [r2, #0] @ movhi
+ ldr r1, [r5, #-1844]
+ cmn r1, #2
+ str r1, [r2, #4]
+ addne r1, r1, #1
+ moveq r1, #0
+ mov r2, r7
+ str r1, [r5, #-1844]
+ mov r1, #1
bl FlashProgPages
ldrh r0, [r4, #0]
bl decrement_vpc_count
-.L1605:
- subs sl, sl, #1
- bne .L1608
-.L1606:
- ldr r2, .L1610
+.L1603:
+ subs r8, r8, #1
+ bne .L1606
+.L1604:
+ ldr r2, .L1608+4
ldrh r3, [r4, #0]
ldrh r1, [r4, #4]
ldr r2, [r2, #-2064]
ldrh r0, [r2, r3]
rsb r1, r1, r0
strh r1, [r2, r3] @ movhi
- ldr r2, .L1610+4
+ ldr r2, .L1608
movw r3, #3912
ldrh r3, [r2, r3]
strh r3, [r4, #2] @ movhi
mov r3, #0
strb r3, [r4, #6]
strh r3, [r4, #4] @ movhi
- add sp, sp, #44
- ldmfd sp!, {r4, r5, r6, r7, r8, sl, pc}
-.L1611:
+ add sp, sp, #40
+ ldmfd sp!, {r4, r5, r6, r7, r8, pc}
+.L1609:
.align 2
-.L1610:
- .word .LANCHOR2
+.L1608:
.word .LANCHOR0
+ .word .LANCHOR2
.fnend
.size FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
.align 2
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.pad #20
sub sp, sp, #20
- ldr r9, .L1638
+ ldr r9, .L1636
mov r6, #0
mov r8, r0
mov r7, r1
ldrb r2, [r9, #80] @ zero_extendqisi2
mov fp, #36
str r0, [r9, #3976]
- ldr sl, .L1638+4
+ ldr sl, .L1636+4
str r2, [sp, #8]
- b .L1613
-.L1617:
+ b .L1611
+.L1615:
mul r3, fp, r6
ldr r2, [sl, #-2088]
mov r0, #0
bl V2P_block
cmp r7, #0
str r0, [sp, #4]
- beq .L1614
+ beq .L1612
bl IsBlkInVendorPart
cmp r0, #0
- bne .L1615
-.L1614:
+ bne .L1613
+.L1612:
ldr r0, [sp, #4]
bl FtlBbmIsBadBlock
cmp r0, #0
addne r5, r5, #1
uxthne r5, r5
- bne .L1615
+ bne .L1613
ldr r3, [sl, #-2088]
ldr r1, [sp, #4]
mla r3, fp, r4, r3
bic r2, r2, #3
add r2, r1, r2
str r2, [r3, #12]
-.L1615:
+.L1613:
add r6, r6, #1
uxth r6, r6
-.L1613:
+.L1611:
movw r1, #3844
ldrh r3, [r9, r1]
cmp r3, r6
- bhi .L1617
+ bhi .L1615
cmp r4, #0
- beq .L1619
+ beq .L1617
ldr r2, [sp, #8]
mov r9, #0
- ldr r6, .L1638+4
+ ldr r6, .L1636+4
mov fp, r9
adds sl, r2, #0
mov r2, r4
ldr r0, [r6, #-2088]
mov r1, sl
bl FlashEraseBlocks
-.L1621:
+.L1619:
ldr r3, [r6, #-2088]
add r2, r3, r9
ldr r3, [r3, r9]
cmn r3, #1
- bne .L1620
+ bne .L1618
ldr r0, [r2, #4]
add r5, r5, #1
ubfx r0, r0, #10, #16
uxth r5, r5
bl FtlBbmMapBadBlock
-.L1620:
+.L1618:
add fp, fp, #1
add r9, r9, #36
uxth fp, fp
cmp fp, r4
- bne .L1621
-.L1622:
+ bne .L1619
+.L1620:
cmp r7, #0
mov r6, #0
- ldrne r2, .L1638
+ ldrne r2, .L1636
movwne r3, #3914
movne sl, #1
moveq r0, #1
strne r3, [sp, #4]
movne r3, r3, lsr #2
strne r3, [sp, #8]
-.L1632:
+.L1630:
mov r9, #0
- ldr fp, .L1638+4
+ ldr fp, .L1636+4
mov r4, r9
- b .L1623
-.L1626:
+ b .L1621
+.L1624:
mov r0, #36
ldr r2, [fp, #-2088]
mul r3, r0, r9
mov r1, #0
str r1, [r2, r3]
mov r1, r8
- ldr r2, .L1638
+ ldr r2, .L1636
add r3, r2, r9
ldrb r0, [r3, #3870] @ zero_extendqisi2
bl V2P_block
cmp r7, #0
str r0, [sp, #12]
- beq .L1624
+ beq .L1622
bl IsBlkInVendorPart
cmp r0, #0
- bne .L1625
-.L1624:
+ bne .L1623
+.L1622:
ldr r0, [sp, #12]
bl FtlBbmIsBadBlock
cmp r0, #0
- bne .L1625
+ bne .L1623
ldr r3, [fp, #-2088]
mov r0, #36
ldr r1, [sp, #12]
mla r3, r0, r4, r3
add r2, r6, r1, asl #10
- ldr r1, .L1638
+ ldr r1, .L1636
add r0, r0, #3888
str r2, [r3, #4]
ldr r2, [fp, #-960]
bic r2, r2, #3
add r2, r1, r2
str r2, [r3, #12]
-.L1625:
+.L1623:
add r9, r9, #1
uxth r9, r9
-.L1623:
- ldr r0, .L1638
+.L1621:
+ ldr r0, .L1636
movw r2, #3844
ldrh r3, [r0, r2]
cmp r3, r9
- bhi .L1626
+ bhi .L1624
cmp r4, #0
- beq .L1619
- ldr r9, .L1638+4
+ beq .L1617
+ ldr r9, .L1636+4
mov r3, #1
mov r1, r4
mov r2, sl
mov r3, #36
mul r3, r3, r4
str r3, [sp, #12]
- b .L1628
-.L1631:
+ b .L1626
+.L1629:
ldr r2, [r9, #-2088]
add r3, r2, fp
ldr r2, [r2, fp]
cmn r2, #1
- bne .L1629
+ bne .L1627
ldr r0, [r3, #4]
add r5, r5, #1
ubfx r0, r0, #10, #16
uxth r5, r5
bl FtlBbmMapBadBlock
- b .L1630
-.L1629:
+ b .L1628
+.L1627:
cmp r7, #0
- beq .L1630
+ beq .L1628
ldr r0, [r3, #4]
mov r1, #1
ubfx r0, r0, #10, #16
bl FtlFreeSysBlkQueueIn
-.L1630:
- add fp, fp, #36
.L1628:
+ add fp, fp, #36
+.L1626:
ldr r2, [sp, #12]
cmp fp, r2
- bne .L1631
+ bne .L1629
ldr r3, [sp, #8]
ldr r0, [sp, #4]
add r6, r6, r3
uxth r6, r6
cmp r6, r0
- bcc .L1632
+ bcc .L1630
cmp r8, #63
- bhi .L1619
- ldr r3, .L1638+4
+ bhi .L1617
+ ldr r3, .L1636+4
mov r1, sl
mov r2, r4
ldr r0, [r3, #-2088]
bl FlashEraseBlocks
-.L1619:
+.L1617:
mov r0, r5
add sp, sp, #20
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1639:
+.L1637:
.align 2
-.L1638:
+.L1636:
.word .LANCHOR0
.word .LANCHOR2
.fnend
.size FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
.align 2
- .type FlashTestBlk.part.20, %function
-FlashTestBlk.part.20:
+ .type FlashTestBlk.part.19, %function
+FlashTestBlk.part.19:
.fnstart
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 0, uses_anonymous_args = 0
-.L1641:
+.L1639:
stmfd sp!, {r4, r5, lr}
.save {r4, r5, lr}
.pad #108
sub sp, sp, #108
- ldr r4, .L1643
+ ldr r4, .L1641
mov r5, r0
mov r1, #165
add r0, sp, #40
mov r0, r4
add sp, sp, #108
ldmfd sp!, {r4, r5, pc}
-.L1644:
+.L1642:
.align 2
-.L1643:
+.L1641:
.word .LANCHOR2
.fnend
- .size FlashTestBlk.part.20, .-FlashTestBlk.part.20
+ .size FlashTestBlk.part.19, .-FlashTestBlk.part.19
.align 2
.global FlashTestBlk
.type FlashTestBlk, %function
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L1647
+ ldr r3, .L1645
ldr r3, [r3, #132]
cmp r0, r3
- bcc .L1646
- b FlashTestBlk.part.20
-.L1646:
+ bcc .L1644
+ b FlashTestBlk.part.19
+.L1644:
mov r0, #0
bx lr
-.L1648:
+.L1646:
.align 2
-.L1647:
+.L1645:
.word .LANCHOR2
.fnend
.size FlashTestBlk, .-FlashTestBlk
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.pad #76
sub sp, sp, #76
- ldr r4, .L1677
+ ldr r4, .L1675
movw r1, #2214
- ldr r3, .L1677+4
+ ldr r3, .L1675+4
mov r5, #0
- ldr r0, .L1677+8
+ ldr r0, .L1675+8
ldr r2, [r4, #148]
ldrh r9, [r3, r1]
mov r1, #1
mov r3, r9, lsr #4
str r3, [sp, #20]
sub r3, r9, #1
- ldr r4, .L1677+4
+ ldr r4, .L1675+4
uxth r3, r3
str r3, [sp, #24]
- b .L1651
-.L1673:
- ldr r3, .L1677
+ b .L1649
+.L1671:
+ ldr r3, .L1675
add r3, r3, r5, asl #1
ldrh r6, [r3, #208]
cmp r6, #0
- bne .L1652
+ bne .L1650
movw r3, #2220
ldr r0, [r4, #3780]
ldrh r2, [r4, r3]
bl ftl_memset
add r3, r4, r5
ldrb fp, [r3, #3768] @ zero_extendqisi2
- b .L1653
-.L1661:
+ b .L1651
+.L1659:
ldr r2, [sp, #12]
mvn r3, #0
strb r3, [sp, #34]
tst r2, #1
strb r3, [sp, #35]
- beq .L1654
+ beq .L1652
ldr r3, [r8, #2740]
add r2, sp, #34
mov r0, fp
ldrb r2, [r4, #0] @ zero_extendqisi2
ldr r3, [sp, #4]
cmp r2, #1
- bne .L1654
+ bne .L1652
ldr r1, [r4, #4]
add r2, sp, #35
mov r0, fp
ldrb r2, [sp, #35] @ zero_extendqisi2
and r3, r2, r3
strb r3, [sp, #34]
-.L1654:
+.L1652:
ldr r3, [sp, #12]
tst r3, #2
- beq .L1655
+ beq .L1653
ldr r3, [r4, #2776]
mov r0, fp
add r2, sp, #35
add r1, r1, r3
add r1, r1, r6
bl FlashReadSpare
-.L1655:
+.L1653:
ldr r3, [r4, #2776]
ldrb r3, [r3, #7] @ zero_extendqisi2
cmp r3, #1
cmpne r3, #8
ldrb r3, [sp, #34] @ zero_extendqisi2
- bne .L1656
+ bne .L1654
cmp r3, #0
- beq .L1675
+ beq .L1673
ldrb r0, [sp, #35] @ zero_extendqisi2
rsbs r0, r0, #1
movcc r0, #0
- b .L1657
-.L1656:
+ b .L1655
+.L1654:
cmp r3, #255
- bne .L1675
+ bne .L1673
ldrb r0, [sp, #35] @ zero_extendqisi2
subs r0, r0, #255
movne r0, #1
- b .L1657
-.L1675:
+ b .L1655
+.L1673:
mov r0, #1
-.L1657:
+.L1655:
ldr r2, [sp, #12]
tst r2, #4
- beq .L1658
+ beq .L1656
ldr r1, [r8, #2740]
mov r0, fp
add r1, r6, r1
bl SandiskProgTestBadBlock
-.L1658:
+.L1656:
cmp r0, #0
- beq .L1659
+ beq .L1657
mov r1, r5
mov r2, r7
- ldr r0, .L1677+12
+ ldr r0, .L1675+12
add sl, sl, #1
bl printk
ldr r3, [sp, #16]
ldrb r3, [r4, #3766] @ zero_extendqisi2
mul r3, r3, r2
cmp sl, r3
- bgt .L1660
-.L1659:
+ bgt .L1658
+.L1657:
ldr r3, [sp, #8]
add r7, r7, #1
add r6, r6, r3
-.L1653:
+.L1651:
uxth r3, r7
str r3, [sp, #16]
cmp r3, r9
- bcc .L1661
-.L1660:
+ bcc .L1659
+.L1658:
mov r2, sl
- ldr r0, .L1677+16
+ ldr r0, .L1675+16
mov r1, r5
bl printk
ldrb r3, [r4, #3766] @ zero_extendqisi2
ldr r2, [sp, #20]
mul r3, r3, r2
cmp sl, r3
- blt .L1662
+ blt .L1660
movw r3, #2220
ldr r0, [r4, #3780]
ldrh r2, [r4, r3]
mov r1, #0
mov r2, r2, asl #9
bl ftl_memset
-.L1662:
+.L1660:
cmp r5, #0
- bne .L1663
- ldr r3, .L1677
+ bne .L1661
+ ldr r3, .L1675
mov r8, r5
mov r7, r5
mov sl, #1
ldrh fp, [r3, #132]
- b .L1664
-.L1666:
+ b .L1662
+.L1664:
mov r0, r6
bl FlashTestBlk
cmp r0, #0
- beq .L1665
+ beq .L1663
mov r1, r6
- ldr r0, .L1677+20
+ ldr r0, .L1675+20
bl printk
ldr r3, [r4, #3780]
mov r2, r6, lsr #5
uxth r7, r7
orr r6, r1, sl, asl r6
str r6, [r3, r2, asl #2]
-.L1665:
+.L1663:
add r8, r8, #1
uxth r8, r8
-.L1664:
+.L1662:
add r6, r8, fp
ldrb r3, [r4, #1] @ zero_extendqisi2
uxth r6, r6
cmp r3, r6
- bhi .L1666
+ bhi .L1664
ldr r6, [sp, #24]
sub sl, r9, #50
mov r8, #1
- b .L1667
-.L1669:
+ b .L1665
+.L1667:
mov r0, r6
bl FlashTestBlk
cmp r0, #0
- beq .L1668
+ beq .L1666
mov r1, r6
- ldr r0, .L1677+20
+ ldr r0, .L1675+20
bl printk
ldr r3, [r4, #3780]
mov r2, r6, lsr #5
ldr r1, [r3, r2, asl #2]
orr r1, r1, r8, asl r0
str r1, [r3, r2, asl #2]
-.L1668:
+.L1666:
sub r6, r6, #1
uxth r6, r6
-.L1667:
+.L1665:
cmp r6, sl
- bgt .L1669
- ldr r3, .L1677
+ bgt .L1667
+ ldr r3, .L1675
ldrb r2, [r4, #1] @ zero_extendqisi2
ldr r3, [r3, #132]
rsb r3, r3, r2
cmp r7, r3
- bcc .L1663
+ bcc .L1661
movw r3, #2220
ldr r0, [r4, #3780]
ldrh r2, [r4, r3]
mov r1, #0
mov r2, r2, asl #9
bl ftl_memset
-.L1663:
+.L1661:
mul r8, r9, r5
- ldr r7, .L1677
+ ldr r7, .L1675
ldr r6, [sp, #24]
ldr fp, [sp, #28]
add sl, r7, r5, asl #1
-.L1670:
- ldr r0, .L1677+24
+.L1668:
+ ldr r0, .L1675+24
mov r1, r5
mov r2, r6
bl printk
ldr r3, [r4, #3780]
- b .L1671
-.L1672:
+ b .L1669
+.L1670:
sub r6, r6, #1
uxth r6, r6
-.L1671:
+.L1669:
mov r1, r6, lsr #5
and r2, r6, #31
ldr r1, [r3, r1, asl #2]
mov r2, r1, lsr r2
ands r2, r2, #1
- bne .L1672
- ldr r3, .L1677+28
+ bne .L1670
+ ldr r3, .L1675+28
mov r1, #1
strh r6, [sl, #208] @ movhi
add r0, sp, #36
cmp r3, #0
subne r6, r6, #1
uxthne r6, r6
- bne .L1670
-.L1652:
+ bne .L1668
+.L1650:
add r5, r5, #1
uxtb r5, r5
-.L1651:
+.L1649:
ldrb r3, [r4, #3766] @ zero_extendqisi2
cmp r3, r5
- bhi .L1673
+ bhi .L1671
add sp, sp, #76
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1678:
+.L1676:
.align 2
-.L1677:
+.L1675:
.word .LANCHOR2
.word .LANCHOR0
+ .word .LC107
.word .LC108
.word .LC109
.word .LC110
.word .LC111
- .word .LC112
.word -3872
.fnend
.size FlashMakeFactorBbt, .-FlashMakeFactorBbt
ldrh r2, [r4, #8]
sub r3, r3, #1
cmp r2, r3
- blt .L1680
+ blt .L1678
uxth r0, r0
mov r0, r0, asl #1
ldrh r7, [r5, r0]
cmp r7, #0
- beq .L1680
+ beq .L1678
ldr r3, [r4, #32]
cmp r3, #0
- bne .L1680
+ bne .L1678
mov r2, #1
- ldr r1, .L1687
+ ldr r1, .L1685
str r2, [r4, #32]
strh r3, [r5, r0] @ movhi
ldrh r3, [r4, #8]
movw r3, #3914
ldrh r3, [r1, r3]
cmp r2, r3
- bcc .L1681
+ bcc .L1679
mov r0, r4
bl ftl_map_blk_alloc_new_blk
-.L1681:
+.L1679:
mov r5, #0
- ldr r6, .L1687+4
+ ldr r6, .L1685+4
mov r9, r5
- b .L1682
-.L1685:
+ b .L1680
+.L1683:
ldr r3, [r8, r5, asl #2]
mov sl, r5, asl #2
cmp r7, r3, lsr #10
- bne .L1683
+ bne .L1681
ldr r3, [r6, #-972]
mov r1, #1
- ldr r0, .L1687+8
+ ldr r0, .L1685+8
mov r2, r1
str r3, [r6, #176]
ldr r3, [r6, #-952]
ldr r3, [r6, #168]
cmn r3, #1
streq r9, [r8, sl]
- beq .L1683
+ beq .L1681
mov r0, r4
mov r1, r5
ldr r2, [r6, #176]
bl FtlMapWritePage
-.L1683:
+.L1681:
add r5, r5, #1
uxth r5, r5
-.L1682:
+.L1680:
ldrh r3, [r4, #6]
cmp r3, r5
- bhi .L1685
+ bhi .L1683
mov r0, r7
mov r1, #1
bl FtlFreeSysBlkQueueIn
mov r3, #0
str r3, [r4, #32]
-.L1680:
- ldr r1, .L1687
+.L1678:
+ ldr r1, .L1685
movw r3, #3914
ldrh r2, [r4, #2]
ldrh r3, [r1, r3]
cmp r2, r3
- bcc .L1686
+ bcc .L1684
mov r0, r4
bl ftl_map_blk_alloc_new_blk
-.L1686:
+.L1684:
mov r0, #0
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L1688:
+.L1686:
.align 2
-.L1687:
+.L1685:
.word .LANCHOR0
.word .LANCHOR2
.word .LANCHOR2+168
ldr r5, [r0, #12]
cmp r3, r2
ldr r7, [r0, #24]
- bne .L1690
+ bne .L1688
ldrh r3, [r0, #8]
add r3, r3, #1
strh r3, [r0, #8] @ movhi
ldr r3, [r4, #28]
add r3, r3, #1
str r3, [r4, #28]
- b .L1691
-.L1690:
+ b .L1689
+.L1688:
mov r3, r3, asl #1
ldr r2, [r0, #28]
mov r1, #255
ldrh r6, [r5, r3]
- ldr r5, .L1695
+ ldr r5, .L1693
ldrh r3, [r0, #2]
orr r3, r3, r6, asl #10
str r3, [r5, #172]
ldr r3, [r5, #-952]
str r3, [r5, #180]
str r2, [r3, #4]
- ldr r2, .L1695+4
+ ldr r2, .L1693+4
strh r2, [r3, #8] @ movhi
ldrh r2, [r0, #4]
strh r6, [r3, #2] @ movhi
strh r2, [r3, #0] @ movhi
movw r3, #3914
- ldr r2, .L1695+8
+ ldr r2, .L1693+8
ldr r0, [r5, #-2076]
ldrh r2, [r2, r3]
mov r2, r2, asl #3
bl ftl_memset
mov r2, #0
mov r3, r2
- b .L1692
-.L1694:
+ b .L1690
+.L1692:
ldr r1, [r7, r3, asl #2]
cmp r6, r1, lsr #10
- bne .L1693
+ bne .L1691
add r2, r2, #1
ldr r1, [r5, #-2076]
uxth r2, r2
ldr r0, [r7, r3, asl #2]
add r1, r1, r2, asl #3
str r0, [r1, #4]
-.L1693:
+.L1691:
add r3, r3, #1
uxth r3, r3
-.L1692:
+.L1690:
ldrh r1, [r4, #6]
cmp r1, r3
- bhi .L1694
+ bhi .L1692
mov r1, #1
mov r3, #0
- ldr r0, .L1695+12
+ ldr r0, .L1693+12
mov r2, r1
bl FlashProgPages
ldrh r3, [r4, #2]
add r3, r3, #1
strh r3, [r4, #2] @ movhi
bl ftl_map_blk_gc
-.L1691:
+.L1689:
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1696:
+.L1694:
.align 2
-.L1695:
+.L1693:
.word .LANCHOR2
.word -1291
.word .LANCHOR0
stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r4, r0
- ldr r5, .L1704
+ ldr r5, .L1702
mov r6, r1
- ldr r9, .L1704+4
+ ldr r9, .L1702+4
mov r8, r2
movw fp, #3914
-.L1703:
+.L1701:
ldr r3, [r5, #-1864]
add r3, r3, #1
str r3, [r5, #-1864]
ldrh r2, [r4, #2]
sub r3, r3, #1
cmp r2, r3
- bge .L1698
+ bge .L1696
ldrh r2, [r4, #0]
movw r3, #65535
cmp r2, r3
- bne .L1699
-.L1698:
+ bne .L1697
+.L1696:
mov r0, r4
bl Ftl_write_map_blk_to_last_page
-.L1699:
+.L1697:
ldrh r3, [r4, #0]
mov r1, #0
ldr r2, [r4, #12]
ldr r0, [r5, #-952]
mov r3, r3, asl #1
- ldr r7, .L1704
+ ldr r7, .L1702
ldrh sl, [r2, r3]
mov r2, #16
ldrh r3, [r4, #2]
uxth r3, r3
strh r3, [r4, #2] @ movhi
cmp r3, #1
- beq .L1703
+ beq .L1701
ldr r3, [r5, #168]
cmn r3, #1
- beq .L1703
+ beq .L1701
ldr r2, [r7, #172]
mov r0, #0
ldr r3, [r4, #24]
str r2, [r3, r6, asl #2]
ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1705:
+.L1703:
.align 2
-.L1704:
+.L1702:
.word .LANCHOR2
.word .LANCHOR0
.fnend
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r4, #12
- ldr r5, .L1707
+ ldr r5, .L1705
mul r4, r4, r0
sub r0, r5, #1088
ldr r2, [r5, #-1900]
bic r3, r3, #-2147483648
str r3, [r4, #4]
ldmfd sp!, {r3, r4, r5, pc}
-.L1708:
+.L1706:
.align 2
-.L1707:
+.L1705:
.word .LANCHOR2
.fnend
.size flush_l2p_region, .-flush_l2p_region
stmfd sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
.save {r3, r4, r5, r6, r7, r8, sl, lr}
mov r8, r2
- ldr r3, .L1718
+ ldr r3, .L1716
mov r2, #3920
mov r4, r1
ldrh r7, [r3, r2]
movw r2, #3950
ldrh r2, [r3, r2]
uxth r6, r6
- ldr r3, .L1718+4
+ ldr r3, .L1716+4
uxth r7, r7
ldr sl, [r3, #-1900]
mov r3, #0
mov r5, r3
- b .L1710
-.L1716:
+ b .L1708
+.L1714:
add r3, r3, #12
add r1, sl, r3
ldrh r1, [r1, #-12]
cmp r1, r6
- bne .L1711
-.L1712:
+ bne .L1709
+.L1710:
cmp r8, #0
- ldr r3, .L1718+4
+ ldr r3, .L1716+4
mov r2, #12
- bne .L1713
+ bne .L1711
ldr r3, [r3, #-1900]
mla r2, r2, r5, r3
ldr r3, [r2, #8]
ldr r3, [r3, r7, asl #2]
str r3, [r4, #0]
- b .L1714
-.L1713:
+ b .L1712
+.L1711:
mul r2, r2, r5
ldr r1, [r3, #-1900]
ldr r0, [r4, #0]
ldr r1, [r2, #4]
orr r1, r1, #-2147483648
str r1, [r2, #4]
- ldr r2, .L1718+8
+ ldr r2, .L1716+8
strh r6, [r3, r2] @ movhi
-.L1714:
- ldr r3, .L1718+4
+.L1712:
+ ldr r3, .L1716+4
mov r2, #12
mov r0, #0
ldr r3, [r3, #-1900]
addne r3, r3, #1
strne r3, [r5, #4]
ldmfd sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L1711:
+.L1709:
add r5, r5, #1
uxth r5, r5
-.L1710:
+.L1708:
cmp r5, r2
- bne .L1716
+ bne .L1714
bl select_l2p_ram_region
mov r3, #12
mul r3, r3, r0
ldrh r1, [sl, r3]
movw r3, #65535
cmp r1, r3
- beq .L1717
+ beq .L1715
ldr r3, [r2, #4]
cmp r3, #0
- bge .L1717
+ bge .L1715
bl flush_l2p_region
-.L1717:
+.L1715:
mov r0, r6
mov r1, r5
bl load_l2p_region
- b .L1712
-.L1719:
+ b .L1710
+.L1717:
.align 2
-.L1718:
+.L1716:
.word .LANCHOR0
.word .LANCHOR2
.word -1896
ubfx r0, r1, #10, #16
str r1, [sp, #4]
bl P2V_block_in_plane
- ldr r3, .L1726
+ ldr r3, .L1724
ldr r1, [r3, #-2064]
mov r5, r0, asl #1
ldrh r2, [r1, r5]
cmp r2, #0
addne r2, r2, #1
strneh r2, [r1, r5] @ movhi
- bne .L1722
+ bne .L1720
ldr r4, [r3, #-2052]
cmp r4, #0
- beq .L1722
- ldr r1, .L1726+4
+ beq .L1720
+ ldr r1, .L1724+4
mov ip, #6
ldrh lr, [r3, r1]
ldr r3, [r3, #-2072]
- ldr r1, .L1726+8
+ ldr r1, .L1724+8
rsb r4, r3, r4
mov r4, r4, asr #1
mul r4, r1, r4
movw r1, #65535
uxth r4, r4
- b .L1723
-.L1725:
+ b .L1721
+.L1723:
cmp r4, r0
- bne .L1724
+ bne .L1722
mov r1, r4
- ldr r0, .L1726+12
+ ldr r0, .L1724+12
bl List_remove_node
- ldr r6, .L1726
- ldr r3, .L1726+4
+ ldr r6, .L1724
+ ldr r3, .L1724+4
mov r0, r4
ldrh r2, [r6, r3]
sub r2, r2, #1
ldrh r2, [r3, r5]
add r2, r2, #1
strh r2, [r3, r5] @ movhi
- b .L1722
-.L1724:
+ b .L1720
+.L1722:
mul r4, ip, r4
ldrh r4, [r3, r4]
cmp r4, r1
- beq .L1722
+ beq .L1720
add r2, r2, #1
uxth r2, r2
-.L1723:
+.L1721:
cmp r2, lr
- bne .L1725
-.L1722:
+ bne .L1723
+.L1720:
mov r0, r7
add r1, sp, #4
mov r2, #1
bl log2phys
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, pc}
-.L1727:
+.L1725:
.align 2
-.L1726:
+.L1724:
.word .LANCHOR2
.word -2048
.word -1431655765
cmp r2, #0
ldr r3, [r0, #24]
ldmeqfd sp!, {r4, r5, r6, pc}
- ldr r5, .L1732
+ ldr r5, .L1730
sub r6, r6, #1
mov r2, #0
str r2, [r0, #36]
ldr r3, [r3, r6, asl #2]
cmp r3, #0
str r3, [r5, #172]
- beq .L1730
+ beq .L1728
mov r1, #1
add r0, r5, #168
mov r2, r1
bl FlashReadPages
- b .L1731
-.L1730:
- ldr r2, .L1732+4
+ b .L1729
+.L1728:
+ ldr r2, .L1730+4
movw r3, #3922
mov r1, #255
ldrh r2, [r2, r3]
bl ftl_memset
-.L1731:
+.L1729:
mov r0, r4
mov r1, r6
ldr r2, [r5, #176]
ldmfd sp!, {r4, r5, r6, lr}
b FtlMapWritePage
-.L1733:
+.L1731:
.align 2
-.L1732:
+.L1730:
.word .LANCHOR2
.word .LANCHOR0
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L1744
+ ldr r3, .L1742
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r9, r2
mov r6, r0
cmp r1, r2
mvnhi r7, #0
- bhi .L1735
+ bhi .L1733
mov r8, r0, lsr r8
mov r7, #0
- ldr sl, .L1744+4
+ ldr sl, .L1742+4
mov ip, r8, asl #2
str ip, [sp, #8]
- b .L1736
-.L1741:
- ldr r1, .L1744
+ b .L1734
+.L1739:
+ ldr r1, .L1742
movw r2, #3918
ldr ip, [sp, #8]
mov r0, r6
str r3, [sp, #4]
bl __aeabi_uidivmod
ldr r3, [sp, #4]
- ldr r2, .L1744+4
+ ldr r2, .L1742+4
uxth r1, r1
str r1, [sp, #12]
rsb r5, r1, fp
cmp r5, r4
uxthhi r5, r4
cmp r3, #0
- beq .L1738
+ beq .L1736
cmp r5, fp
- beq .L1738
+ beq .L1736
str r3, [sp, #24]
mov r1, #1
ldr r3, [r2, #-968]
mov r3, #0
str r3, [sp, #32]
bl FlashReadPages
- b .L1739
-.L1738:
- ldr ip, .L1744
+ b .L1737
+.L1736:
+ ldr ip, .L1742
movw r3, #3922
ldr r0, [r2, #-968]
mov r1, #0
ldrh r2, [ip, r3]
bl ftl_memset
-.L1739:
+.L1737:
ldr r3, [sp, #12]
mov fp, r5, asl #9
ldr r0, [sl, #-968]
add r6, r6, r5
bl memcpy
mov r1, r8
- ldr r0, .L1744+8
+ ldr r0, .L1742+8
add r8, r8, #1
ldr r2, [sl, #-968]
add r9, r9, fp
str ip, [sp, #8]
cmn r0, #1
moveq r7, r0
-.L1736:
+.L1734:
cmp r4, #0
- bne .L1741
-.L1735:
+ bne .L1739
+.L1733:
mov r0, r7
add sp, sp, #60
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1745:
+.L1743:
.align 2
-.L1744:
+.L1742:
.word .LANCHOR0
.word .LANCHOR2
.word .LANCHOR2+224
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L1748
- ldr r2, .L1748+4
+ ldr r3, .L1746
+ ldr r2, .L1746+4
ldr r1, [r3, #-1704]
cmp r1, r2
bxne lr
- ldr r2, .L1748+8
+ ldr r2, .L1746+8
mov r0, #0
mov r1, #1
str r2, [r3, #-1700]
str r2, [r3, #-1644]
ldr r2, [r3, #-1004]
str r2, [r3, #-1640]
- ldr r2, .L1748+12
+ ldr r2, .L1746+12
b FtlVendorPartWrite
-.L1749:
+.L1747:
.align 2
-.L1748:
+.L1746:
.word .LANCHOR2
.word 1179929683
.word 1342177334
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r1, .L1757
+ ldr r1, .L1755
stmfd sp!, {r3, lr}
.save {r3, lr}
ldr r3, [r1, #-1884]
cmp r3, #0
moveq r2, #32
- beq .L1751
+ beq .L1749
ldr r2, [r1, #-1824]
cmp r2, #29
movls r2, #4
movhi r2, #32
-.L1751:
+.L1749:
mov r3, #264
ldrh r1, [r1, r3]
cmp r1, #31
addls r1, r1, #1
- ldrls r2, .L1757
+ ldrls r2, .L1755
strlsh r1, [r2, r3] @ movhi
movls r2, #1
cmp r0, #0
- ldr r3, .L1757
- bne .L1753
+ ldr r3, .L1755
+ bne .L1751
ldr r1, [r3, #-936]
ldr r0, [r1, #20]
ldr r1, [r1, #16]
add r2, r2, r0
cmp r1, r2
- bcc .L1754
-.L1753:
+ bcc .L1752
+.L1751:
ldr r2, [r3, #-936]
mov r0, #64
ldr r1, [r2, #16]
str r1, [r2, #20]
- ldr r1, .L1757+4
+ ldr r1, .L1755+4
str r1, [r2, #0]
- ldr r1, .L1757+8
+ ldr r1, .L1755+8
ldr r2, [r3, #-936]
ldrh r1, [r3, r1]
mov r3, r1, asl #9
str r3, [r2, #4]
bl FtlVendorPartWrite
bl Ftl_save_ext_data
-.L1754:
+.L1752:
mov r0, #0
ldmfd sp!, {r3, pc}
-.L1758:
+.L1756:
.align 2
-.L1757:
+.L1755:
.word .LANCHOR2
.word 1112818501
.word -940
.fnend
.size FtlEctTblFlush, .-FtlEctTblFlush
.align 2
- .type FtlReadRefresh.part.15, %function
-FtlReadRefresh.part.15:
+ .type FtlReadRefresh.part.14, %function
+FtlReadRefresh.part.14:
.fnstart
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
.save {r4, r5, r6, lr}
.pad #40
sub sp, sp, #40
- ldr r4, .L1764
+ ldr r4, .L1762
mov r5, #2048
- ldr r6, .L1764+4
-.L1762:
+ ldr r6, .L1762+4
+.L1760:
ldr r0, [r4, #-1620]
ldr r3, [r6, #3972]
cmp r0, r3
- bcs .L1760
+ bcs .L1758
mov r2, #0
mov r1, sp
bl log2phys
cmn r2, #1
add r3, r3, #1
str r3, [r4, #-1620]
- beq .L1761
+ beq .L1759
add r0, sp, #40
str r2, [sp, #8]
mov r1, #1
bl FlashReadPages
ldr r3, [sp, #4]
cmp r3, #256
- bne .L1760
+ bne .L1758
ldr r0, [sp, #0]
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
bl FtlGcRefreshBlock
- b .L1760
-.L1761:
+ b .L1758
+.L1759:
subs r5, r5, #1
- bne .L1762
-.L1760:
+ bne .L1760
+.L1758:
mvn r0, #0
add sp, sp, #40
ldmfd sp!, {r4, r5, r6, pc}
-.L1765:
+.L1763:
.align 2
-.L1764:
+.L1762:
.word .LANCHOR2
.word .LANCHOR0
.fnend
- .size FtlReadRefresh.part.15, .-FtlReadRefresh.part.15
+ .size FtlReadRefresh.part.14, .-FtlReadRefresh.part.14
.align 2
.global FtlReadRefresh
.type FtlReadRefresh, %function
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L1775
- ldr r0, .L1775+4
+ ldr r3, .L1773
+ ldr r0, .L1773+4
ldr r2, [r3, #-1624]
cmp r2, #0
mov r2, r3
- beq .L1767
+ beq .L1765
ldr r1, [r3, #-1620]
ldr r2, [r0, #3972]
cmp r1, r2
- bcs .L1768
- b FtlReadRefresh.part.15
-.L1768:
+ bcs .L1766
+ b FtlReadRefresh.part.14
+.L1766:
mov r2, #0
str r2, [r3, #-1624]
str r2, [r3, #-1620]
ldr r2, [r3, #-1880]
- b .L1774
-.L1767:
+ b .L1772
+.L1765:
ldrb r0, [r0, #80] @ zero_extendqisi2
ldr r1, [r3, #-1828]
cmp r0, #0
movne r1, #1048576
add r0, r2, #1048576
cmp r3, r0
- bhi .L1771
+ bhi .L1769
add r3, r1, r3
cmp r3, r2
- bcs .L1769
-.L1771:
- ldr r3, .L1775
+ bcs .L1767
+.L1769:
+ ldr r3, .L1773
mov r1, #1
str r1, [r3, #-1624]
mov r1, #0
str r1, [r3, #-1620]
-.L1774:
+.L1772:
str r2, [r3, #-1628]
-.L1769:
+.L1767:
mov r0, #0
bx lr
-.L1776:
+.L1774:
.align 2
-.L1775:
+.L1773:
.word .LANCHOR2
.word .LANCHOR0
.fnend
mov r1, #0
ldr r8, [r0, #24]
mov r9, #0
- ldr r5, .L1797
+ ldr r5, .L1795
str r3, [sp, #16]
mov r2, sl, asl #2
ldrh r3, [r0, #8]
str r9, [r4, #28]
sub r3, r3, #1
str r3, [sp, #12]
- b .L1778
-.L1792:
+ b .L1776
+.L1790:
ldr r0, [sp, #12]
cmp r3, r0
mov r3, r3, asl #1
- bne .L1779
+ bne .L1777
ldrh r0, [r7, r3]
mov r1, #1
add fp, r7, r3
mov r7, #0
ldr r2, [sp, #16]
strh r9, [r4, #0] @ movhi
- ldr r5, .L1797
+ ldr r5, .L1795
uxth r0, r0
add r3, r0, #1
strh r3, [r4, #2] @ movhi
str r7, [r5, #176]
add r9, r9, #1
str r3, [r4, #28]
- b .L1780
-.L1782:
+ b .L1778
+.L1780:
ldrh r2, [fp, #0]
mov r1, #1
- ldr r0, .L1797+4
+ ldr r0, .L1795+4
orr r3, r3, r2, asl #10
mov r2, r1
str r3, [r5, #172]
bl FlashReadPages
ldr r3, [r5, #168]
cmn r3, #1
- beq .L1781
+ beq .L1779
ldrh r3, [r6, #8]
cmp r3, sl
- bcs .L1781
+ bcs .L1779
ldrh r2, [r4, #4]
ldrh r1, [r6, #0]
cmp r1, r2
ldreq r2, [r5, #172]
streq r2, [r8, r3, asl #2]
-.L1781:
+.L1779:
add r7, r7, #1
uxth r7, r7
-.L1780:
+.L1778:
sxth r3, r7
cmp r3, r9
- blt .L1782
- b .L1783
-.L1779:
+ blt .L1780
+ b .L1781
+.L1777:
ldr r2, [r5, #-2076]
add r0, r7, r3
- ldr fp, .L1797+8
+ ldr fp, .L1795+8
str r0, [sp, #20]
str r2, [r5, #176]
ldrh r1, [r7, r3]
movw r3, #3914
ldrh r2, [fp, r3]
- ldr r0, .L1797+4
+ ldr r0, .L1795+4
sub r2, r2, #1
str r3, [sp, #0]
orr r2, r2, r1, asl #10
ldr r2, [r5, #168]
ldr r3, [sp, #0]
cmn r2, #1
- beq .L1784
+ beq .L1782
ldrh r1, [r6, #0]
ldrh r2, [r4, #4]
cmp r1, r2
- bne .L1784
+ bne .L1782
ldrh r1, [r6, #8]
movw r2, #64245
cmp r1, r2
- bne .L1784
- b .L1796
-.L1787:
+ bne .L1782
+ b .L1794
+.L1785:
ldr r0, [r5, #-2076]
mov ip, r1, asl #3
add r2, r2, #1
addcc r0, r0, ip
ldrcc r0, [r0, #4]
strcc r0, [r8, r1, asl #2]
- b .L1785
-.L1796:
+ b .L1783
+.L1794:
mov r2, #0
-.L1785:
+.L1783:
ldrh r0, [fp, r3]
sxth r1, r2
sub r0, r0, #1
cmp r1, r0
- blt .L1787
- b .L1788
-.L1784:
- ldr r1, .L1797
+ blt .L1785
+ b .L1786
+.L1782:
+ ldr r1, .L1795
mov fp, #0
- ldr r3, .L1797+8
+ ldr r3, .L1795+8
add ip, r1, #168
str fp, [r1, #176]
- b .L1789
-.L1791:
+ b .L1787
+.L1789:
ldr r0, [sp, #20]
ldrh r1, [r0, #0]
mov r0, ip
ldr r2, [r5, #168]
ldmia sp, {r3, ip}
cmn r2, #1
- beq .L1790
+ beq .L1788
ldrh r2, [r6, #8]
cmp r2, sl
- bcs .L1790
+ bcs .L1788
ldrh r1, [r4, #4]
ldrh r0, [r6, #0]
cmp r0, r1
ldreq r1, [r5, #172]
streq r1, [r8, r2, asl #2]
-.L1790:
+.L1788:
add fp, fp, #1
uxth fp, fp
-.L1789:
+.L1787:
movw r1, #3914
sxth r2, fp
ldrh r1, [r3, r1]
cmp r2, r1
- blt .L1791
-.L1788:
+ blt .L1789
+.L1786:
add r9, r9, #1
uxth r9, r9
-.L1778:
+.L1776:
ldr r1, [sp, #8]
sxth r3, r9
cmp r3, r1
- blt .L1792
-.L1783:
+ blt .L1790
+.L1781:
mov r0, r4
bl ftl_free_no_use_map_blk
- ldr r1, .L1797+8
+ ldr r1, .L1795+8
movw r3, #3914
ldrh r2, [r4, #2]
ldrh r3, [r1, r3]
cmp r2, r3
- bne .L1793
+ bne .L1791
mov r0, r4
bl ftl_map_blk_alloc_new_blk
-.L1793:
+.L1791:
ldrh r2, [r4, #8]
ldrh r3, [r4, #10]
cmp r2, r3
- bcc .L1794
+ bcc .L1792
mov r0, r4
bl ftl_map_blk_gc
-.L1794:
+.L1792:
mov r0, #0
add sp, sp, #28
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1798:
+.L1796:
.align 2
-.L1797:
+.L1795:
.word .LANCHOR2
.word .LANCHOR2+168
.word .LANCHOR0
stmfd sp!, {r3, lr}
.save {r3, lr}
bl FtlL2PDataInit
- ldr r0, .L1800
+ ldr r0, .L1798
bl FtlMapTblRecovery
mov r0, #0
ldmfd sp!, {r3, pc}
-.L1801:
+.L1799:
.align 2
-.L1800:
+.L1798:
.word .LANCHOR2-1088
.fnend
.size FtlLoadMapInfo, .-FtlLoadMapInfo
stmfd sp!, {r3, lr}
.save {r3, lr}
movw r2, #3932
- ldr r3, .L1803
- ldr r0, .L1803+4
+ ldr r3, .L1801
+ ldr r0, .L1801+4
ldrh r2, [r3, r2]
strh r2, [r0, #234] @ movhi
- ldr r2, .L1803+8
+ ldr r2, .L1801+8
strh r2, [r0, #228] @ movhi
movw r2, #3956
ldrh r2, [r3, r2]
bl FtlMapTblRecovery
mov r0, #0
ldmfd sp!, {r3, pc}
-.L1804:
+.L1802:
.align 2
-.L1803:
+.L1801:
.word .LANCHOR0
.word .LANCHOR2
.word -3962
sub sp, sp, #68
ldrh r3, [r0, #2]
mov r4, r0
- ldr r2, .L1890
+ ldr r2, .L1888
ldrb fp, [r0, #6] @ zero_extendqisi2
str r3, [sp, #20]
movw r3, #3912
moveq r2, r3 @ movhi
ldrneh r0, [r0, #16]
movwne r2, #65535
- bne .L1808
- b .L1887
-.L1809:
+ bne .L1806
+ b .L1885
+.L1807:
add r3, r3, #1
uxth r3, r3
add r1, r4, r3, asl #1
ldrh r0, [r1, #16]
-.L1808:
+.L1806:
cmp r0, r2
- beq .L1809
+ beq .L1807
ldrb r1, [r4, #8] @ zero_extendqisi2
cmp r1, #1
- bne .L1810
+ bne .L1808
bl FtlGetLastWrittenPage
cmn r0, #1
mov r7, r0
- beq .L1811
- ldr r3, .L1890
+ beq .L1809
+ ldr r3, .L1888
ldrb r2, [r3, #80] @ zero_extendqisi2
cmp r2, #0
- bne .L1880
+ bne .L1878
add r3, r3, r0, asl #1
movw r2, #2228
ldrh r5, [r3, r2]
- b .L1874
-.L1810:
+ b .L1872
+.L1808:
mov r1, #0
bl FtlGetLastWrittenPage
cmn r0, #1
mov r7, r0
- beq .L1811
-.L1880:
+ beq .L1809
+.L1878:
mov r5, r7
-.L1874:
- ldr r3, .L1890
+.L1872:
+ ldr r3, .L1888
movw r2, #3844
mov r6, #0
str r4, [sp, #40]
movw ip, #65535
ldrh r9, [r3, r2]
- ldr r2, .L1890+4
+ ldr r2, .L1888+4
ldr sl, [r2, #-984]
ldr r8, [r2, #-1164]
movw r2, #3924
ldrh lr, [r3, r2]
mov r2, r4
mov r3, r6
- b .L1813
-.L1811:
+ b .L1811
+.L1809:
mov r3, #0
strh r3, [r4, #2] @ movhi
mov r2, r3 @ movhi
-.L1887:
+.L1885:
strb r2, [r4, #6]
- b .L1807
-.L1815:
+ b .L1805
+.L1813:
ldrh r0, [r2, #16]
cmp r0, ip
- beq .L1814
+ beq .L1812
mov fp, #36
orr r0, r5, r0, asl #10
mla r1, fp, r6, sl
bic r0, r0, #3
add r0, r8, r0
str r0, [r1, #12]
-.L1814:
+.L1812:
add r3, r3, #1
add r2, r2, #2
uxth r3, r3
-.L1813:
+.L1811:
cmp r3, r9
- bne .L1815
+ bne .L1813
ldrb r3, [r4, #8] @ zero_extendqisi2
cmp r3, #1
movne r3, #0
- bne .L1881
- ldr r3, .L1890
+ bne .L1879
+ ldr r3, .L1888
ldrb r3, [r3, #80] @ zero_extendqisi2
adds r3, r3, #0
movne r3, #1
-.L1881:
- ldr r8, .L1890+4
+.L1879:
+ ldr r8, .L1888+4
mov r1, r6
str r3, [sp, #28]
mov sl, #0
mov r8, r2
str ip, [sp, #12]
mov fp, r7
- b .L1817
-.L1822:
+ b .L1815
+.L1820:
ldr r2, [r9, #0]
cmp r2, #0
strne r8, [sp, #12]
- bne .L1820
+ bne .L1818
ldr r2, [r9, #12]
ldr r7, [r2, #4]
cmn r7, #1
- beq .L1819
+ beq .L1817
ldr r1, [r3, #-1844]
mov r0, r7
str r2, [sp, #8]
cmp r0, #0
addne r7, r7, #1
strne r7, [r3, #-1844]
-.L1819:
+.L1817:
ldr r2, [r2, #0]
cmn r2, #1
- bne .L1820
- ldr r3, .L1890+4
+ bne .L1818
+ ldr r3, .L1888+4
mov r2, #36
uxth r7, fp
ldr r3, [r3, #-984]
mla sl, r2, sl, r3
ldr r0, [sl, #4]
- b .L1882
-.L1820:
+ b .L1880
+.L1818:
add sl, sl, #1
add r9, r9, #36
uxth sl, sl
-.L1817:
+.L1815:
cmp sl, r6
- bne .L1822
- ldr r3, .L1890+4
+ bne .L1820
+ ldr r3, .L1888+4
add r7, fp, #1
uxth r7, r7
ldr r3, [r3, #-984]
ldr r0, [r3, #4]
-.L1882:
+.L1880:
ubfx r0, r0, #10, #16
bl P2V_plane
ldrb r2, [r4, #8] @ zero_extendqisi2
- ldr r3, .L1890
+ ldr r3, .L1888
cmp r2, #1
str r0, [sp, #24]
- bne .L1823
+ bne .L1821
ldrb r1, [r3, #80] @ zero_extendqisi2
cmp r1, #0
addeq r7, r3, r7, asl #1
movweq r1, #2228
ldreqh r7, [r7, r1]
-.L1823:
+.L1821:
movw r1, #3912
ldr fp, [sp, #24]
ldrh r3, [r3, r1]
ldr r3, [sp, #20]
cmp r7, r3
cmpeq fp, ip
- beq .L1888
-.L1825:
+ beq .L1886
+.L1823:
ldr r3, [sp, #16]
ldr fp, [sp, #12]
sub r6, r3, #1
movw r3, #65535
cmp fp, r3
- bne .L1826
+ bne .L1824
cmp r2, #0
- bne .L1827
-.L1826:
- ldr r2, .L1890+4
+ bne .L1825
+.L1824:
+ ldr r2, .L1888+4
uxth r3, r5
ldr ip, [sp, #20]
mvn fp, #0
mov sl, r3
mov r9, fp
ldr r1, [r2, #-1012]
- ldr r8, .L1890+4
+ ldr r8, .L1888+4
cmn r1, #1
streq r6, [r2, #-1012]
ldr r2, [r2, #-1012]
ldrle r5, [sp, #20]
mov r7, r6
uxthgt r5, r5
- b .L1830
-.L1832:
+ b .L1828
+.L1830:
ldrh r0, [r1, #16]
movw lr, #65535
cmp r0, lr
- beq .L1831
+ beq .L1829
ldr ip, [sp, #16]
mov r3, #36
orr r0, r5, r0, asl #10
add r6, r6, #1
uxth r6, r6
str r0, [lr, #4]
-.L1831:
+.L1829:
add r2, r2, #1
add r1, r1, #2
uxth r2, r2
-.L1843:
+.L1841:
ldr lr, [sp, #44]
cmp r2, lr
- bne .L1832
+ bne .L1830
ldr r3, [sp, #36]
mov r1, r6
ldr r0, [r8, #-984]
ldr r2, [sp, #28]
str r3, [sp, #4]
bl FlashReadPages
- ldr r2, .L1890
+ ldr r2, .L1888
add r0, r8, r5, asl #1
mov r1, #0
str r0, [sp, #16]
ldrb ip, [r2, #80] @ zero_extendqisi2
ldr r2, [r8, #-984]
str ip, [sp, #36]
- b .L1833
-.L1841:
+ b .L1831
+.L1839:
ldr r0, [r2, #0]
cmp r0, #0
- bne .L1834
+ bne .L1832
ldr r0, [r2, #12]
movw ip, #65535
ldrh lr, [r0, #0]
cmp lr, ip
- beq .L1835
+ beq .L1833
ldr r0, [r0, #4]
cmn r0, #1
- beq .L1835
+ beq .L1833
cmn fp, #1
ldr r9, [r8, #-1012]
str r0, [r8, #-1012]
- bne .L1835
+ bne .L1833
ldr lr, [sp, #16]
sub r0, lr, #912
ldrh r0, [r0, #0]
cmp r0, ip
- bne .L1836
+ bne .L1834
ldr r0, [sp, #36]
cmp r0, #0
- beq .L1835
-.L1836:
+ beq .L1833
+.L1834:
cmp r9, r7
mvneq fp, #0
movne fp, r9
- b .L1835
-.L1834:
+ b .L1833
+.L1832:
mov r6, r7
mov r7, r3
ldrb r3, [r4, #8] @ zero_extendqisi2
cmp r3, #0
- bne .L1827
- ldr r3, .L1890+4
+ bne .L1825
+ ldr r3, .L1888+4
movw r2, #65535
add r5, r3, r5, asl #1
sub r5, r5, #912
ldrh r1, [r5, #0]
cmp r1, r2
- bne .L1837
+ bne .L1835
cmn fp, #1
- bne .L1883
-.L1838:
+ bne .L1881
+.L1836:
ldr fp, [sp, #12]
cmp fp, r6
- beq .L1839
-.L1883:
+ beq .L1837
+.L1881:
str fp, [r3, #-1012]
- b .L1827
-.L1839:
- ldr r2, [r3, #-1012]
- b .L1889
+ b .L1825
.L1837:
+ ldr r2, [r3, #-1012]
+ b .L1887
+.L1835:
cmp r9, r6
- beq .L1840
+ beq .L1838
cmn r9, #1
strne r9, [r3, #-1012]
- b .L1827
-.L1840:
+ b .L1825
+.L1838:
ldr r2, [r3, #-1012]
cmp r2, r6
- beq .L1827
-.L1889:
+ beq .L1825
+.L1887:
sub r2, r2, #1
- b .L1884
-.L1835:
+ b .L1882
+.L1833:
add r1, r1, #1
add r2, r2, #36
uxth r1, r1
-.L1833:
+.L1831:
cmp r1, r6
- bne .L1841
+ bne .L1839
add r5, r5, #1
uxth r5, r5
-.L1830:
+.L1828:
cmp r5, sl
- bhi .L1842
- ldr r1, .L1890
+ bhi .L1840
+ ldr r1, .L1888
movw r2, #3844
ldr lr, [r8, #-984]
mov r6, #0
str lr, [sp, #16]
mov r2, r6
str ip, [sp, #44]
- b .L1843
-.L1842:
+ b .L1841
+.L1840:
mov r6, r7
mov r7, r3
- ldr r3, .L1890+4
+ ldr r3, .L1888+4
mvn r2, #0
-.L1884:
+.L1882:
str r2, [r3, #-1012]
-.L1827:
- ldr r5, .L1890+4
+.L1825:
+ ldr r5, .L1888+4
movw r3, #266
mov r2, #1
sub r0, r5, #1088
bl FtlMapBlkWriteDumpData
ldr r9, [sp, #20]
str r7, [sp, #36]
-.L1844:
- ldr r3, .L1890
+.L1842:
+ ldr r3, .L1888
movw r2, #3844
mov r7, #0
ldr lr, [r5, #-984]
mov r2, r4
ldrb ip, [r3, #80] @ zero_extendqisi2
mov r3, r7
- b .L1845
-.L1848:
+ b .L1843
+.L1846:
ldrh r0, [r2, #16]
movw r1, #65535
cmp r0, r1
- beq .L1846
+ beq .L1844
mla r1, fp, r7, lr
orr r0, r9, r0, asl #10
str r0, [r1, #4]
ldrb sl, [r4, #8] @ zero_extendqisi2
cmp sl, #1
- bne .L1847
+ bne .L1845
cmp ip, #0
orrne r0, r0, #-2147483648
strne r0, [r1, #4]
-.L1847:
+.L1845:
add r7, r7, #1
uxth r7, r7
-.L1846:
+.L1844:
add r3, r3, #1
add r2, r2, #2
uxth r3, r3
-.L1845:
+.L1843:
cmp r3, r8
- bne .L1848
+ bne .L1846
mov r1, r7
ldr r0, [r5, #-984]
ldr r2, [sp, #28]
mul r3, r3, r7
mov r7, #0
str r3, [sp, #44]
- b .L1849
-.L1870:
+ b .L1847
+.L1868:
ldr sl, [r5, #-984]
add sl, sl, r7
ldr r8, [sl, #4]
bl P2V_plane
ldr r3, [sp, #20]
cmp r9, r3
- bcc .L1850
+ bcc .L1848
ldr fp, [sp, #32]
mov ip, r3
cmp r0, fp
cmp r9, ip
movne r3, #0
cmp r3, #0
- bne .L1850
+ bne .L1848
ldr r3, [sp, #24]
ldr ip, [sp, #36]
cmp r0, r3
cmpeq r9, ip
- beq .L1851
+ beq .L1849
ldr r3, [sl, #0]
cmn r3, #1
- beq .L1852
+ beq .L1850
ldr r8, [sl, #12]
movw lr, #61589
ldrh r3, [r8, #0]
cmp r3, lr
- bne .L1859
-.L1853:
+ bne .L1857
+.L1851:
ldr r6, [r8, #4]
cmn r6, #1
- beq .L1854
+ beq .L1852
ldr r1, [r5, #-1844]
mov r0, r6
bl ftl_cmp_data_ver
cmp r0, #0
addne r3, r6, #1
strne r3, [r5, #-1844]
-.L1854:
+.L1852:
ldr sl, [r8, #8]
add r1, sp, #56
ldr r3, [r8, #12]
bl log2phys
ldr r1, [r5, #-1012]
cmn r1, #1
- beq .L1855
+ beq .L1853
mov r0, r6
bl ftl_cmp_data_ver
cmp r0, #0
- beq .L1855
+ beq .L1853
ldr r3, [sp, #52]
cmn r3, #1
- beq .L1856
+ beq .L1854
ldr r0, [r5, #-984]
mov r1, #1
mov r2, #0
ldr r3, [r3, r7]
str ip, [sp, #16]
cmn r3, #1
- bne .L1857
- b .L1858
-.L1856:
+ bne .L1855
+ b .L1856
+.L1854:
ldr r3, [sp, #60]
ldr r2, [sp, #56]
cmp r2, r3
- bne .L1859
+ bne .L1857
mov r0, sl
add r1, sp, #52
mov r2, #1
bl log2phys
-.L1859:
- ldrh r0, [r4, #0]
- b .L1886
.L1857:
+ ldrh r0, [r4, #0]
+ b .L1884
+.L1855:
ldr r3, [sp, #12]
ldr r8, [r3, #8]
cmp r8, sl
- bne .L1858
+ bne .L1856
ldr r0, [r5, #-1012]
ldr r1, [sp, #16]
bl ftl_cmp_data_ver
cmp r0, #0
- beq .L1858
+ beq .L1856
ldr r3, [sp, #56]
ldr r2, [sp, #60]
cmp r3, r2
- beq .L1863
-.L1860:
+ beq .L1861
+.L1858:
ldr r2, [sp, #52]
cmp r3, r2
- beq .L1858
+ beq .L1856
cmn r3, #1
streq r3, [fp, #0]
- beq .L1862
+ beq .L1860
ldr ip, [fp, #12]
mov r0, fp
str r3, [fp, #4]
mov r2, #0
str ip, [sp, #12]
bl FlashReadPages
-.L1862:
+.L1860:
ldr r3, [r5, #-984]
ldr r3, [r3, r7]
cmn r3, #1
- beq .L1863
+ beq .L1861
ldr r3, [sp, #12]
ldr r0, [r5, #-1012]
ldr sl, [r3, #4]
mov r1, sl
bl ftl_cmp_data_ver
cmp r0, #0
- beq .L1863
+ beq .L1861
ldr r0, [sp, #16]
mov r1, sl
bl ftl_cmp_data_ver
cmp r0, #0
- beq .L1858
-.L1863:
+ beq .L1856
+.L1861:
mov r0, r8
ldr r1, [sp, #52]
bl FtlReUsePrevPpa
-.L1858:
+.L1856:
ldrh r0, [r4, #0]
mvn r3, #0
str r3, [sp, #52]
bl decrement_vpc_count
- b .L1865
-.L1855:
+ b .L1863
+.L1853:
ldr r3, [sp, #60]
ldr r2, [sp, #56]
cmp r2, r3
- beq .L1865
+ beq .L1863
mov r0, sl
add r1, sp, #60
mov r2, #1
bl log2phys
ldr fp, [sp, #56]
cmn fp, #1
- beq .L1865
+ beq .L1863
ldr r3, [sp, #52]
cmp fp, r3
- beq .L1865
+ beq .L1863
ubfx r0, fp, #10, #16
bl P2V_block_in_plane
- ldr r3, .L1890+8
+ ldr r3, .L1888+8
ldrh r3, [r5, r3]
cmp r3, r0
- beq .L1866
- ldr r3, .L1890+12
+ beq .L1864
+ ldr r3, .L1888+12
ldrh r3, [r5, r3]
cmp r3, r0
- beq .L1866
- ldr r3, .L1890+16
+ beq .L1864
+ ldr r3, .L1888+16
ldrh r3, [r5, r3]
cmp r3, r0
- bne .L1865
-.L1866:
- ldr ip, .L1890+4
+ bne .L1863
+.L1864:
+ ldr ip, .L1888+4
mov r1, #1
mov r2, #0
ldr r0, [ip, #-984]
str fp, [r0, #4]
ldr r8, [r0, #12]
bl FlashReadPages
- ldr r0, .L1890+4
+ ldr r0, .L1888+4
ldr r1, [r8, #4]
ldr r3, [r0, #-984]
ldr r3, [r3, #0]
cmn r3, #1
- beq .L1865
+ beq .L1863
mov r0, r6
bl ftl_cmp_data_ver
cmp r0, #0
- bne .L1865
+ bne .L1863
mov r0, sl
add r1, sp, #56
mov r2, #1
bl log2phys
-.L1865:
+.L1863:
ldr r0, [sp, #52]
cmn r0, #1
- beq .L1850
+ beq .L1848
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
ldr r2, [r5, #-2064]
mov r1, r0
ldrh r3, [r2, r3]
cmp r3, #0
- beq .L1867
-.L1886:
+ beq .L1865
+.L1884:
bl decrement_vpc_count
- b .L1850
-.L1867:
- ldr r0, .L1890+20
+ b .L1848
+.L1865:
+ ldr r0, .L1888+20
bl printk
- b .L1850
-.L1852:
+ b .L1848
+.L1850:
ldr r3, [r5, #268]
cmp r3, #31
addls r2, r5, r3, asl #2
bl decrement_vpc_count
ldr r3, [r5, #-1012]
cmn r3, #1
- beq .L1885
-.L1869:
+ beq .L1883
+.L1867:
cmp r3, r6
- bls .L1850
-.L1885:
+ bls .L1848
+.L1883:
str r6, [r5, #-1012]
-.L1850:
+.L1848:
add r7, r7, #36
-.L1849:
+.L1847:
ldr r3, [sp, #44]
cmp r7, r3
- bne .L1870
- ldr r3, .L1890
+ bne .L1868
+ ldr r3, .L1888
add r9, r9, #1
movw r2, #3912
uxth r9, r9
ldrh r2, [r3, r2]
cmp r9, r2
- bne .L1844
+ bne .L1842
mov r2, #0
movw r1, #3844
strh r2, [r4, #4] @ movhi
strh r9, [r4, #2] @ movhi
movw r2, #65535
ldr r0, [sp, #40]
- b .L1871
-.L1873:
+ b .L1869
+.L1871:
add r0, r0, #2
ldrh ip, [r0, #14]
cmp ip, r2
strneb r3, [r4, #6]
- bne .L1807
-.L1872:
+ bne .L1805
+.L1870:
add r3, r3, #1
uxth r3, r3
-.L1871:
+.L1869:
cmp r3, r1
- bne .L1873
- b .L1807
-.L1851:
+ bne .L1871
+ b .L1805
+.L1849:
ldr r7, [sp, #36]
ldr fp, [sp, #24]
strh r7, [r4, #2] @ movhi
strb fp, [r4, #6]
-.L1888:
+.L1886:
mov r0, r4
mov r1, r7
mov r2, fp
bl ftl_sb_update_avl_pages
-.L1807:
+.L1805:
mov r0, #0
add sp, sp, #68
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1891:
+.L1889:
.align 2
-.L1890:
+.L1888:
.word .LANCHOR0
.word .LANCHOR2
.word -2044
.word -1996
.word -1948
- .word .LC113
+ .word .LC112
.fnend
.size FtlRecoverySuperblock, .-FtlRecoverySuperblock
.align 2
.save {r4, r5, r6, r7, r8, sl, lr}
.pad #44
sub sp, sp, #44
- ldr r4, .L1901
- ldr r3, .L1901+4
+ ldr r4, .L1899
+ ldr r3, .L1899+4
mov r2, r4
ldrh r3, [r4, r3]
cmp r3, #0
- beq .L1893
+ beq .L1891
ldrb r1, [r4, #-2036] @ zero_extendqisi2
cmp r1, #0
- bne .L1893
- ldr r5, .L1901+8
+ bne .L1891
+ ldr r5, .L1899+8
movw r0, #3912
ldrb r1, [r4, #-2037] @ zero_extendqisi2
ldrh r0, [r5, r0]
mul r1, r0, r1
cmp r3, r1
- beq .L1893
+ beq .L1891
ldrb r8, [r4, #-2034] @ zero_extendqisi2
movw r3, #3844
ldr r7, [r5, #3972]
cmp r8, #0
ldrh r6, [r5, r3]
- bne .L1892
+ bne .L1890
sub r7, r7, #1
mov r1, sp
mov r2, r8
str r0, [sp, #12]
str r4, [sp, #16]
str r8, [r4, #4]
- beq .L1895
+ beq .L1893
add r0, sp, #4
mov r1, #1
mov r2, r8
bl FlashReadPages
- b .L1896
-.L1895:
+ b .L1894
+.L1893:
movw r3, #3922
mov r1, #255
ldrh r2, [r5, r3]
bl ftl_memset
-.L1896:
- ldr r3, .L1901+12
+.L1894:
+ ldr r3, .L1899+12
mov r6, r6, asl #2
- ldr r5, .L1901
- ldr sl, .L1901+4
+ ldr r5, .L1899
+ ldr sl, .L1899+4
strh r3, [r4, #0] @ movhi
- ldr r8, .L1901+16
- b .L1897
-.L1900:
+ ldr r8, .L1899+16
+ b .L1895
+.L1898:
ldrh r3, [r5, sl]
cmp r3, #0
- beq .L1898
+ beq .L1896
ldr r3, [sp, #8]
sub r6, r6, #1
str r7, [r4, #8]
- ldr r0, .L1901+20
+ ldr r0, .L1899+20
str r3, [r4, #12]
ldrh r3, [r5, r8]
strh r3, [r4, #2] @ movhi
bl FlashProgPages
ldrh r0, [r5, r8]
bl decrement_vpc_count
-.L1897:
+.L1895:
cmp r6, #0
- bne .L1900
-.L1898:
- ldr r3, .L1901
+ bne .L1898
+.L1896:
+ ldr r3, .L1899
mov r2, #1
strb r2, [r3, #-2034]
- b .L1892
-.L1893:
+ b .L1890
+.L1891:
mov r3, #0
strb r3, [r2, #-2034]
-.L1892:
+.L1890:
add sp, sp, #44
ldmfd sp!, {r4, r5, r6, r7, r8, sl, pc}
-.L1902:
+.L1900:
.align 2
-.L1901:
+.L1899:
.word .LANCHOR2
.word -2040
.word .LANCHOR0
.save {r3, r4, r5, r6, r7, lr}
bl FtlWriteDumpData
mov r4, #0
- ldr r7, .L1907
+ ldr r7, .L1905
movw r6, #3950
- ldr r5, .L1907+4
- b .L1904
-.L1906:
+ ldr r5, .L1905+4
+ b .L1902
+.L1904:
ldr r3, [r5, #-1900]
mov r2, #12
mla r3, r2, r4, r3
ldr r3, [r3, #4]
cmp r3, #0
- bge .L1905
+ bge .L1903
mov r0, r4
bl flush_l2p_region
-.L1905:
+.L1903:
add r4, r4, #1
uxth r4, r4
-.L1904:
+.L1902:
ldrh r3, [r7, r6]
cmp r3, r4
- bhi .L1906
+ bhi .L1904
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L1908:
+.L1906:
.align 2
-.L1907:
+.L1905:
.word .LANCHOR0
.word .LANCHOR2
.fnend
stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
.save {r0, r1, r4, r5, r6, r7, r8, lr}
mov r4, #0
- ldr r6, .L1916
- ldr r1, .L1916+4
- ldr r0, .L1916+8
+ ldr r6, .L1914
+ ldr r1, .L1914+4
+ ldr r0, .L1914+8
bl printk
movw r3, #3854
ldrh r2, [r6, r3]
mov r1, #0
- ldr r5, .L1916+12
+ ldr r5, .L1914+12
mov r2, r2, asl #1
ldr r0, [r5, #-932]
bl ftl_memset
- b .L1910
-.L1912:
+ b .L1908
+.L1910:
mov r0, r4
add r1, sp, #4
mov r2, #0
bl log2phys
ldr r0, [sp, #4]
cmn r0, #1
- beq .L1911
+ beq .L1909
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
ldr r3, [r5, #-932]
ldrh r2, [r3, r0]
add r2, r2, #1
strh r2, [r3, r0] @ movhi
-.L1911:
+.L1909:
add r4, r4, #1
-.L1910:
+.L1908:
ldr r3, [r6, #3972]
cmp r4, r3
- bcc .L1912
+ bcc .L1910
mov r4, #0
- ldr r7, .L1916
+ ldr r7, .L1914
movw r8, #3852
- ldr r5, .L1916+12
- b .L1913
-.L1915:
+ ldr r5, .L1914+12
+ b .L1911
+.L1913:
ldr r3, [r5, #-2064]
mov r6, r4, asl #1
ldrh r2, [r3, r6]
ldr r3, [r5, #-932]
ldrh r3, [r3, r6]
cmp r2, r3
- beq .L1914
+ beq .L1912
movw r1, #65535
cmp r2, r1
- beq .L1914
- ldr r0, .L1916+16
+ beq .L1912
+ ldr r0, .L1914+16
mov r1, r4
bl printk
- ldr r3, .L1916+20
+ ldr r3, .L1914+20
ldrh r3, [r5, r3]
cmp r3, r4
- beq .L1914
- ldr r3, .L1916+24
+ beq .L1912
+ ldr r3, .L1914+24
ldrh r3, [r5, r3]
cmp r3, r4
- beq .L1914
- ldr r3, .L1916+28
+ beq .L1912
+ ldr r3, .L1914+28
ldrh r3, [r5, r3]
cmp r3, r4
- beq .L1914
+ beq .L1912
ldr r3, [r5, #-932]
mov r0, r4
ldrh r2, [r3, r6]
bl update_vpc_list
bl l2p_flush
bl FtlVpcTblFlush
-.L1914:
+.L1912:
add r4, r4, #1
uxth r4, r4
-.L1913:
+.L1911:
ldrh r3, [r7, r8]
cmp r3, r4
- bhi .L1915
+ bhi .L1913
ldmfd sp!, {r2, r3, r4, r5, r6, r7, r8, pc}
-.L1917:
+.L1915:
.align 2
-.L1916:
+.L1914:
.word .LANCHOR0
.word .LANCHOR3+15
- .word .LC114
+ .word .LC113
.word .LANCHOR2
- .word .LC115
+ .word .LC114
.word -2044
.word -1948
.word -1996
ldrh r5, [r0, #0]
mov r4, r0
cmp r5, r3
- beq .L1919
- ldr r3, .L1929
+ beq .L1917
+ ldr r3, .L1927
mov r0, r5
ldr r2, [r3, #-2064]
mov r3, r5, asl #1
ldrh r3, [r2, r3]
cmp r3, #0
- beq .L1920
+ beq .L1918
bl INSERT_DATA_LIST
- b .L1919
-.L1920:
+ b .L1917
+.L1918:
bl INSERT_FREE_LIST
-.L1919:
+.L1917:
mov r3, #0
strb r3, [r4, #8]
- ldr r3, .L1929+4
+ ldr r3, .L1927+4
cmp r4, r3
- beq .L1921
- ldr r2, .L1929+8
+ beq .L1919
+ ldr r2, .L1927+8
movw r3, #3864
ldrh r3, [r2, r3]
cmp r3, #1
- beq .L1921
+ beq .L1919
ldrb r2, [r2, #80] @ zero_extendqisi2
cmp r2, #0
- beq .L1922
-.L1921:
+ beq .L1920
+.L1919:
mov r3, #1
strb r3, [r4, #8]
- b .L1923
-.L1922:
- ldr r2, .L1929+12
+ b .L1921
+.L1920:
+ ldr r2, .L1927+12
cmp r4, r2
- bne .L1923
+ bne .L1921
cmp r3, #3
- ldr r3, .L1929
- beq .L1924
+ ldr r3, .L1927
+ beq .L1922
ldr r2, [r3, #-1708]
cmp r2, #1
- bne .L1925
-.L1924:
+ bne .L1923
+.L1922:
mov r2, #1
strb r2, [r3, #-2036]
-.L1925:
+.L1923:
ldr r3, [r3, #-1884]
- ldr r2, .L1929
+ ldr r2, .L1927
cmp r3, #0
- beq .L1923
+ beq .L1921
ldr r3, [r2, #-1824]
cmp r3, #29
movls r3, #1
strlsb r3, [r2, #-2036]
-.L1923:
- ldr r3, .L1929+16
- ldr r6, .L1929
+.L1921:
+ ldr r3, .L1927+16
+ ldr r6, .L1927
ldrh r0, [r6, r3]
movw r3, #65535
cmp r0, r3
- beq .L1926
+ beq .L1924
cmp r5, r0
- bne .L1927
+ bne .L1925
ldr r2, [r6, #-2064]
mov r3, r0, asl #1
ldrh r3, [r2, r3]
cmp r3, #0
- beq .L1928
-.L1927:
+ beq .L1926
+.L1925:
bl update_vpc_list
-.L1928:
- ldr r3, .L1929+16
+.L1926:
+ ldr r3, .L1927+16
mvn r2, #0
strh r2, [r6, r3] @ movhi
-.L1926:
+.L1924:
mov r0, r4
bl allocate_data_superblock
bl l2p_flush
bl FtlEctTblFlush
mov r0, #0
ldmfd sp!, {r4, r5, r6, pc}
-.L1930:
+.L1928:
.align 2
-.L1929:
+.L1927:
.word .LANCHOR2
.word .LANCHOR2-1996
.word .LANCHOR0
.fnend
.size allocate_new_data_superblock, .-allocate_new_data_superblock
.align 2
- .type rk_ftl_garbage_collect.part.19, %function
-rk_ftl_garbage_collect.part.19:
+ .type rk_ftl_garbage_collect.part.18, %function
+rk_ftl_garbage_collect.part.18:
.fnstart
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2027
+ ldr r3, .L2025
movw ip, #65535
- ldr r2, .L2027+4
+ ldr r2, .L2025+4
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r7, r0
sub sp, sp, #36
cmp r0, ip
str r1, [sp, #20]
- beq .L1932
- ldr r1, .L2027+8
+ beq .L1930
+ ldr r1, .L2025+8
ldrh r4, [r3, r1]
cmp r4, ip
streqh r0, [r3, r1] @ movhi
mvneq r1, #0
streqh r1, [r3, r2] @ movhi
-.L1932:
+.L1930:
ldr r2, [r3, #-1188]
cmp r7, #1
- ldr r5, .L2027
+ ldr r5, .L2025
add r2, r2, #1
add r2, r2, r7, asl #7
str r2, [r3, #-1188]
- bne .L2007
+ bne .L2005
ldr r3, [r5, #-1884]
cmp r3, #0
- beq .L2007
+ beq .L2005
ldr r3, [r5, #-1824]
cmp r3, #29
- bhi .L2007
+ bhi .L2005
mov r6, #400
movw r4, #65535
ldrh r3, [r5, r6]
add r2, r2, r3
str r2, [r5, #-1188]
bl FtlGcReFreshBadBlk
- ldr r3, .L2027+12
+ ldr r3, .L2025+12
ldrh r3, [r5, r3]
cmp r3, r4
- bne .L1933
- ldr r2, .L2027+8
+ bne .L1931
+ ldr r2, .L2025+8
ldrh r4, [r5, r2]
cmp r4, r3
movne r4, r3
- bne .L1933
+ bne .L1931
ldr r3, [r5, #-1188]
cmp r3, #1024
- bls .L1933
+ bls .L1931
mov r3, #0
str r3, [r5, #-1188]
strh r3, [r5, r6] @ movhi
ldr r3, [r5, #-1824]
cmp r3, #0
moveq r3, #6
- beq .L2022
+ beq .L2020
cmp r3, #5
- bhi .L1935
+ bhi .L1933
mov r3, #18
-.L2022:
+.L2020:
strh r3, [r5, r6] @ movhi
-.L1935:
+.L1933:
mov r0, #32
movw r8, #65535
bl List_get_gc_head_node
uxth r2, r0
cmp r2, r8
- beq .L1936
- ldr r5, .L2027
- ldr r6, .L2027+16
+ beq .L1934
+ ldr r5, .L2025
+ ldr r6, .L2025+16
ldrh r0, [r5, r6]
cmp r0, #0
moveq r3, #1
streqh r3, [r5, r6] @ movhi
- beq .L1936
- ldr r3, .L2027+20
+ beq .L1934
+ ldr r3, .L2025+20
movw ip, #3914
movw lr, #3844
ldr r9, [r5, #-2064]
mul r3, r3, ip
add r3, r3, #1
cmp r1, r3
- bgt .L1936
+ bgt .L1934
add fp, r0, #1
mov sl, #0
str sl, [r5, #-1180]
ldr r2, [sp, #12]
uxth r4, r0
cmp r4, r8
- beq .L1936
+ beq .L1934
ldrh r2, [r9, r2]
mov r8, r4, asl #1
- ldr r0, .L2027+24
+ ldr r0, .L2025+24
mov r1, fp
ldrh r3, [r9, r8]
str r2, [sp, #0]
bl printk
ldrh r3, [r5, r6]
cmp r3, #40
- bls .L1938
+ bls .L1936
ldr r3, [r5, #-2064]
ldrh r3, [r3, r8]
cmp r3, #32
strhih sl, [r5, r6] @ movhi
-.L1938:
- mov r1, #6
- b .L2023
.L1936:
+ mov r1, #6
+ b .L2021
+.L1934:
bl GetSwlReplaceBlock
movw r3, #65535
cmp r0, r3
mov r4, r0
- bne .L1933
+ bne .L1931
mov r1, #0
-.L2023:
- ldr r2, .L2027
+.L2021:
+ ldr r2, .L2025
mov r3, #400
strh r1, [r2, r3] @ movhi
- b .L1933
-.L2007:
+ b .L1931
+.L2005:
movw r4, #65535
-.L1933:
- ldr r3, .L2027+12
- ldr r6, .L2027
+.L1931:
+ ldr r3, .L2025+12
+ ldr r6, .L2025
ldrh r2, [r6, r3]
movw r3, #65535
cmp r2, r3
- bne .L1939
- ldr r3, .L2027+28
+ bne .L1937
+ ldr r3, .L2025+28
ldrh r3, [r6, r3]
cmp r3, r2
- bne .L1939
- ldr r2, .L2027+8
+ bne .L1937
+ ldr r2, .L2025+8
ldrh sl, [r6, r2]
cmp sl, r3
- bne .L1939
- ldr r8, .L2027+32
+ bne .L1937
+ ldr r8, .L2025+32
ldr r2, [r6, #-1188]
ldrh r3, [r6, r8]
cmp r3, #23
movhi r3, #1024
movls r3, #5120
cmp r2, r3
- bls .L1939
+ bls .L1937
mov r2, #400
mov r3, #0
str r3, [r6, #-1188]
bl GetSwlReplaceBlock
cmp r0, sl
mov r4, r0
- bne .L1941
- ldr r3, .L2027+36
+ bne .L1939
+ ldr r3, .L2025+36
ldrh r1, [r6, r8]
ldrh r2, [r6, r3]
cmp r1, r2
movcs r2, #80
strcsh r2, [r6, r3] @ movhi
- bcs .L1951
+ bcs .L1949
mov r0, #64
bl List_get_gc_head_node
uxth r3, r0
cmp r3, r4
- beq .L1951
+ beq .L1949
ldr r2, [r6, #-1004]
cmp r2, #0
- bne .L1944
- ldr r2, .L2027+20
+ bne .L1942
+ ldr r2, .L2025+20
movw r1, #3864
ldrh r1, [r2, r1]
cmp r1, #3
- beq .L1944
+ beq .L1942
ldr r1, [r6, #-1708]
cmp r1, #0
- bne .L1944
+ bne .L1942
ldr r1, [r6, #-1884]
cmp r1, #0
- bne .L1944
+ bne .L1942
ldrb r0, [r2, #80] @ zero_extendqisi2
cmp r0, #0
- beq .L1945
-.L1944:
- ldr r1, .L2027
+ beq .L1943
+.L1942:
+ ldr r1, .L2025
mov r3, r3, asl #1
movw ip, #3844
movw lr, #3864
ldr r2, [r1, #-2064]
ldrh r0, [r2, r3]
movw r2, #3914
- ldr r3, .L2027+20
+ ldr r3, .L2025+20
ldrh r2, [r3, r2]
ldrh ip, [r3, ip]
ldrh r3, [r3, lr]
movne r3, #0
add r3, ip, r3
cmp r0, r3
- bgt .L1947
+ bgt .L1945
mov r0, #0
bl List_get_gc_head_node
- ldr r2, .L2027+20
- ldr r3, .L2027
+ ldr r2, .L2025+20
+ ldr r3, .L2025
ldr r2, [r2, #3972]
ldr r1, [r3, #-1892]
add r2, r2, r2, asl #1
cmp r1, r2, lsr #2
- ldr r2, .L2027+36
+ ldr r2, .L2025+36
movhi r1, #128
movls r1, #160
strh r1, [r3, r2] @ movhi
uxth r4, r0
- b .L1949
-.L1947:
- ldr r3, .L2027+36
+ b .L1947
+.L1945:
+ ldr r3, .L2025+36
mov r2, #128
strh r2, [r1, r3] @ movhi
- b .L1951
-.L1945:
+ b .L1949
+.L1943:
ldr r2, [r6, #-2064]
mov r3, r3, asl #1
- ldr r6, .L2027
- ldr r5, .L2027+36
+ ldr r6, .L2025
+ ldr r5, .L2025+36
ldrh r3, [r2, r3]
cmp r3, #7
movhi r3, #64
strhih r3, [r6, r5] @ movhi
- bhi .L1951
+ bhi .L1949
bl List_get_gc_head_node
mov r3, #128
strh r3, [r6, r5] @ movhi
uxth r4, r0
-.L1949:
+.L1947:
movw r3, #65535
cmp r4, r3
- beq .L1951
-.L1941:
- ldr r1, .L2027
+ beq .L1949
+.L1939:
+ ldr r1, .L2025
mov r0, r4, asl #1
- ldr r3, .L2027+32
+ ldr r3, .L2025+32
ldr ip, [r1, #-2084]
ldrh r2, [r1, r3]
ldr r3, [r1, #-2064]
ldrh r3, [r3, r0]
ldrh r0, [ip, r0]
str r0, [sp, #0]
- ldr r0, .L2027+40
+ ldr r0, .L2025+40
ldrh r1, [r1, r0]
- ldr r0, .L2027+44
+ ldr r0, .L2025+44
str r1, [sp, #4]
mov r1, r4
bl printk
-.L1951:
+.L1949:
bl FtlGcReFreshBadBlk
-.L1939:
+.L1937:
movw r1, #65535
rsb ip, r1, r4
rsbs r2, ip, #0
- ldr r5, .L2027
+ ldr r5, .L2025
adc r2, r2, ip
cmp r7, #0
movne r7, #0
andeq r7, r2, #1
cmp r7, #0
- beq .L1952
- ldr r3, .L2027+32
+ beq .L1950
+ ldr r3, .L2025+32
ldrh r2, [r5, r3]
cmp r2, #24
movhi r6, #1
- bhi .L1953
- ldr r1, .L2027+20
+ bhi .L1951
+ ldr r1, .L2025+20
movw r3, #3912
cmp r2, #16
ldrh r6, [r1, r3]
movhi r6, r6, lsr #5
- bhi .L1953
+ bhi .L1951
cmp r2, #12
movhi r6, r6, lsr #4
- bhi .L1953
+ bhi .L1951
cmp r2, #8
movhi r6, r6, lsr #2
-.L1953:
- ldr r1, .L2027+40
- ldr r3, .L2027
+.L1951:
+ ldr r1, .L2025+40
+ ldr r3, .L2025
ldrh r0, [r5, r1]
cmp r0, r2
mov r0, r1
- bcs .L1957
- ldr r2, .L2027+28
+ bcs .L1955
+ ldr r2, .L2025+28
movw ip, #65535
ldrh r2, [r3, r2]
cmp r2, ip
- bne .L1958
- ldr ip, .L2027+8
+ bne .L1956
+ ldr ip, .L2025+8
ldrh ip, [r3, ip]
cmp ip, r2
- bne .L1958
+ bne .L1956
mov r2, #400
ldrh r0, [r3, r2]
cmp r0, #0
- bne .L1959
- ldr r2, .L2027+20
+ bne .L1957
+ ldr r2, .L2025+20
ldr ip, [r3, #-1892]
ldr r2, [r2, #3972]
add r2, r2, r2, asl #1
cmp ip, r2, lsr #2
movcs r2, #18
- bcs .L2025
-.L1959:
- ldr r3, .L2027
- ldr r2, .L2027+48
- ldr r1, .L2027+40
+ bcs .L2023
+.L1957:
+ ldr r3, .L2025
+ ldr r2, .L2025+48
+ ldr r1, .L2025+40
ldrh r2, [r3, r2]
add r2, r2, r2, asl #1
mov r2, r2, asr #2
-.L2025:
+.L2023:
strh r2, [r3, r1] @ movhi
mov r2, #0
- ldr r3, .L2027
+ ldr r3, .L2025
str r2, [r3, #-1180]
- b .L1962
-.L1958:
- ldr r3, .L2027
- ldr r2, .L2027+48
+ b .L1960
+.L1956:
+ ldr r3, .L2025
+ ldr r2, .L2025+48
ldrh r2, [r3, r2]
add r2, r2, r2, asl #1
mov r2, r2, asr #2
strh r2, [r3, r0] @ movhi
-.L1957:
- ldr r3, .L2027
+.L1955:
+ ldr r3, .L2025
movw r4, #65535
ldr r8, [sp, #20]
ldr r2, [r3, #-1884]
cmp r3, #0
addne r6, r6, #1
uxthne r6, r6
- b .L1963
-.L1952:
- ldr r3, .L2027+28
+ b .L1961
+.L1950:
+ ldr r3, .L2025+28
ldrh r3, [r5, r3]
cmp r3, r1
- bne .L1964
- ldr r1, .L2027+8
+ bne .L1962
+ ldr r1, .L2025+8
ldrh r1, [r5, r1]
cmp r1, r3
movne r2, #0
andeq r2, r2, #1
cmp r2, #0
- beq .L1964
- ldr r2, .L2027+12
+ beq .L1962
+ ldr r2, .L2025+12
ldrh r4, [r5, r2]
cmp r4, r3
movne r4, r3
- bne .L1964
- ldr r3, .L2027+32
+ bne .L1962
+ ldr r3, .L2025+32
mov r6, #400
str r7, [r5, #-1180]
ldrh r7, [r5, r3]
add r3, r3, #856
ldrh r2, [r5, r3]
cmp r2, r7
- bcs .L1965
+ bcs .L1963
ldrh r2, [r5, r6]
cmp r2, #0
- bne .L1966
- ldr r2, .L2027+20
+ bne .L1964
+ ldr r2, .L2025+20
ldr r1, [r5, #-1892]
ldr r2, [r2, #3972]
add r2, r2, r2, asl #1
cmp r1, r2, lsr #2
movcs r2, #18
strcsh r2, [r5, r3] @ movhi
- bcs .L1968
-.L1966:
- ldr r3, .L2027
- ldr r2, .L2027+48
- ldr r1, .L2027+40
+ bcs .L1966
+.L1964:
+ ldr r3, .L2025
+ ldr r2, .L2025+48
+ ldr r1, .L2025+40
ldrh r2, [r3, r2]
add r2, r2, r2, asl #1
mov r2, r2, asr #2
strh r2, [r3, r1] @ movhi
-.L1968:
+.L1966:
bl FtlReadRefresh
mov r3, #400
- ldr r2, .L2027
- b .L2026
-.L1965:
+ ldr r2, .L2025
+ b .L2024
+.L1963:
ldrh r0, [r5, r6]
cmp r0, #0
- bne .L1964
- ldr r2, .L2027+48
+ bne .L1962
+ ldr r2, .L2025+48
ldrh r4, [r5, r2]
add r2, r4, r4, asl #1
mov r2, r2, asr #2
strh r2, [r5, r3] @ movhi
bl List_get_gc_head_node
ldr r3, [r5, #-2064]
- ldr r1, .L2027+20
+ ldr r1, .L2025+20
movw r2, #3914
ldrh r2, [r1, r2]
uxth r0, r0
mul r2, r1, r2
add r2, r2, r2, lsr #31
cmp r3, r2, asr #1
- ble .L1969
+ ble .L1967
sub r4, r4, #1
cmp r7, r4
- blt .L1969
+ blt .L1967
bl FtlReadRefresh
ldrh r0, [r5, r6]
- b .L1962
-.L1969:
+ b .L1960
+.L1967:
cmp r3, #0
movwne r4, #65535
- bne .L1964
+ bne .L1962
movw r0, #65535
bl decrement_vpc_count
- ldr r3, .L2027+32
- ldr r2, .L2027
+ ldr r3, .L2025+32
+ ldr r2, .L2025
ldrh r0, [r2, r3]
add r0, r0, #1
- b .L1962
-.L1964:
- ldr r3, .L2027
+ b .L1960
+.L1962:
+ ldr r3, .L2025
ldr r6, [r3, #-1884]
cmp r6, #0
movne r6, #2
moveq r6, #1
-.L1963:
- ldr r3, .L2027
+.L1961:
+ ldr r3, .L2025
movw r0, #65535
- ldr r2, .L2027+12
+ ldr r2, .L2025+12
ldrh r1, [r3, r2]
cmp r1, r0
- bne .L1970
+ bne .L1968
cmp r4, r1
strneh r4, [r3, r2] @ movhi
- bne .L1972
- ldr r1, .L2027+8
+ bne .L1970
+ ldr r1, .L2025+8
ldrh r0, [r3, r1]
cmp r0, r4
strneh r0, [r3, r2] @ movhi
mvnne r2, #0
strneh r2, [r3, r1] @ movhi
-.L1972:
+.L1970:
mov r2, #0
strb r2, [r3, #-1748]
- ldr r3, .L2027+20
- ldr r5, .L2027
- ldr r7, .L2027+12
+ ldr r3, .L2025+20
+ ldr r5, .L2025
+ ldr r7, .L2025+12
ldrb r3, [r3, #80] @ zero_extendqisi2
cmp r3, r2
- beq .L1973
+ beq .L1971
ldrh r0, [r5, r7]
bl ftl_get_blk_mode
strb r0, [r5, #-1748]
-.L1973:
- ldr r5, .L2027
+.L1971:
+ ldr r5, .L2025
ldrh r0, [r5, r7]
bl IsBlkInGcList
- ldr r7, .L2027+12
+ ldr r7, .L2025+12
mov r3, r5
cmp r0, #0
- ldrne r2, .L2027+12
+ ldrne r2, .L2025+12
mvnne r1, #0
strneh r1, [r5, r2] @ movhi
ldrh r2, [r3, r7]
movw r3, #65535
- ldr r5, .L2027
+ ldr r5, .L2025
cmp r2, r3
- beq .L1970
- ldr r0, .L2027+52
+ beq .L1968
+ ldr r0, .L2025+52
bl make_superblock
- ldr r1, .L2027+56
+ ldr r1, .L2025+56
movw r2, #402
mov r3, #0
strh r3, [r5, r2] @ movhi
ldrh r2, [r2, r3]
mov r3, #404
strh r2, [r5, r3] @ movhi
-.L1970:
- ldr r3, .L2027
- ldr r0, .L2027+12
- ldr r2, .L2027+60
+.L1968:
+ ldr r3, .L2025
+ ldr r0, .L2025+12
+ ldr r2, .L2025+60
ldrh r1, [r3, r0]
ldrh r2, [r3, r2]
cmp r2, r1
mov r2, r3
- beq .L1975
- ldr ip, .L2027+64
+ beq .L1973
+ ldr ip, .L2025+64
ldrh r3, [r3, ip]
cmp r3, r1
strne r4, [sp, #20]
- bne .L2021
-.L1976:
-.L1975:
+ bne .L2019
+.L1974:
+.L1973:
mvn r3, #0
strh r3, [r2, r0] @ movhi
mov r3, #400
-.L2026:
+.L2024:
ldrh r0, [r2, r3]
- b .L1962
-.L2021:
- ldr r4, .L2027
+ b .L1960
+.L2019:
+ ldr r4, .L2025
movw r0, #65535
- ldr r9, .L2027+12
+ ldr r9, .L2025+12
ldrh r3, [r4, r9]
cmp r3, r0
- bne .L1978
+ bne .L1976
mov r3, #0
str r3, [r4, #-1180]
-.L2020:
- ldr r8, .L2027+16
+.L2018:
+ ldr r8, .L2025+16
ldrh r7, [r4, r8]
mov r0, r7
bl List_get_gc_head_node
uxth r5, r0
strh r5, [r4, r9] @ movhi
cmp r5, r1
- ldreq r3, .L2027
+ ldreq r3, .L2025
moveq r2, #0
moveq r0, #8
streqh r2, [r3, r8] @ movhi
- beq .L1962
-.L1980:
+ beq .L1960
+.L1978:
mov r0, r5
add r7, r7, #1
bl IsBlkInGcList
cmp r0, #0
strneh r7, [r4, r8] @ movhi
- bne .L2020
- ldr ip, .L2027+20
+ bne .L2018
+ ldr ip, .L2025+20
uxth r7, r7
movw r3, #3912
strh r7, [r4, r8] @ movhi
mul r3, ip, r3
add ip, r3, r3, lsr #31
cmp r0, ip, asr #1
- bgt .L1983
+ bgt .L1981
cmp r7, #48
- bls .L1984
+ bls .L1982
cmp r0, #8
- bls .L1984
- ldr r0, .L2027+68
+ bls .L1982
+ ldr r0, .L2025+68
ldrh r0, [r4, r0]
cmp r0, #35
- bhi .L1984
-.L1983:
- ldr r0, .L2027+16
+ bhi .L1982
+.L1981:
+ ldr r0, .L2025+16
mov ip, #0
strh ip, [r4, r0] @ movhi
-.L1984:
+.L1982:
ldrh r2, [r1, r2]
movw r0, #65535
ldr r8, [sp, #20]
- ldr sl, .L2027
+ ldr sl, .L2025
cmp r2, r3
cmpge r8, r0
movne r3, #0
moveq r3, #1
- bne .L1985
- ldr r3, .L2027+12
+ bne .L1983
+ ldr r3, .L2025+12
mvn r2, #0
strh r2, [sl, r3] @ movhi
add r3, r3, #572
strh r2, [sl, r3] @ movhi
mov r3, #400
ldrh r0, [sl, r3]
- b .L1962
-.L1985:
+ b .L1960
+.L1983:
cmp r2, #0
- bne .L1986
+ bne .L1984
movw r0, #65535
bl decrement_vpc_count
- ldr r3, .L2027+16
+ ldr r3, .L2025+16
ldrh r2, [r4, r3]
add r2, r2, #1
strh r2, [r4, r3] @ movhi
- b .L2020
-.L1986:
+ b .L2018
+.L1984:
strb r3, [sl, #-1748]
- ldr r3, .L2027+20
+ ldr r3, .L2025+20
ldrb r3, [r3, #80] @ zero_extendqisi2
cmp r3, #0
- beq .L1987
+ beq .L1985
mov r0, r5
bl ftl_get_blk_mode
strb r0, [sl, #-1748]
-.L1987:
- ldr r4, .L2027
- ldr r0, .L2027+52
+.L1985:
+ ldr r4, .L2025
+ ldr r0, .L2025+52
bl make_superblock
movw r1, #402
mov r3, #0
strh r3, [r4, r1] @ movhi
- ldr r1, .L2027+12
+ ldr r1, .L2025+12
ldr r0, [r4, #-2064]
ldrh r1, [r4, r1]
mov r1, r1, asl #1
mov r1, #404
strb r3, [r4, #-1750]
strh r0, [r4, r1] @ movhi
- ldr r1, .L2027+56
+ ldr r1, .L2025+56
strh r3, [r4, r1] @ movhi
-.L1978:
+.L1976:
bl FtlReadRefresh
- ldr r3, .L2027
+ ldr r3, .L2025
mov r2, #1
movw r1, #3912
str r2, [r3, #-1000]
- ldr r2, .L2027+20
+ ldr r2, .L2025+20
ldrh r9, [r2, r1]
ldrb r1, [r2, #80] @ zero_extendqisi2
cmp r1, #0
- beq .L1988
+ beq .L1986
ldrb r1, [r3, #-1748] @ zero_extendqisi2
cmp r1, #1
movweq r1, #3914
ldreqh r9, [r2, r1]
-.L1988:
- ldr r2, .L2027+56
+.L1986:
+ ldr r2, .L2025+56
mov sl, #0
- ldr r4, .L2027
+ ldr r4, .L2025
mov fp, r9
ldrh r3, [r3, r2]
add r2, r3, r6
cmp r2, r9
rsbgt r6, r3, r9
uxthgt r6, r6
- b .L1990
-.L1992:
+ b .L1988
+.L1990:
ldrh r1, [r2, #2]!
movw r8, #65535
add r3, r3, #1
addne r7, r7, #1
uxthne r7, r7
strne r1, [r8, #4]
-.L1998:
+.L1996:
cmp r3, r5
- bne .L1992
+ bne .L1990
ldr r0, [r4, #-1160]
mov r1, r7
ldrb r2, [r4, #-1748] @ zero_extendqisi2
bl FlashReadPages
mov r9, r5
mov r8, r6
- b .L1993
-.L1996:
+ b .L1991
+.L1994:
ldr r3, [r4, #-1160]
add r2, r3, r5
ldr r3, [r3, r5]
ldr r6, [r2, #12]
cmn r3, #1
- beq .L1994
+ beq .L1992
ldrh r3, [r6, #0]
movw r0, #61589
cmp r3, r0
- bne .L1994
+ bne .L1992
add r1, sp, #28
mov r2, #0
ldr r0, [r6, #8]
bic r2, r2, #-2147483648
ldr r3, [r1, #4]
cmp r2, r3
- bne .L1994
+ bne .L1992
movw r3, #402
ldr r0, [r4, #-1176]
ldrh r2, [r4, r3]
str r2, [r3, #12]
ldr r3, [sp, #28]
str r3, [r6, #12]
- ldr r3, .L2027+28
+ ldr r3, .L2025+28
ldrh r3, [r4, r3]
strh r3, [r6, #2] @ movhi
ldr r3, [r4, #-1844]
add r3, r3, #1
str r3, [r4, #-1176]
bl FtlGcBufAlloc
- ldr r3, .L2027+20
+ ldr r3, .L2025+20
ldrb r3, [r3, #80] @ zero_extendqisi2
cmp r3, #0
- bne .L1995
+ bne .L1993
ldrb r3, [r4, #-1941] @ zero_extendqisi2
ldr r2, [r4, #-1176]
cmp r2, r3
- beq .L1995
- ldr r3, .L2027+72
+ beq .L1993
+ ldr r3, .L2025+72
ldrh r3, [r4, r3]
cmp r3, #0
- bne .L1994
-.L1995:
+ bne .L1992
+.L1993:
bl Ftl_gc_temp_data_write_back
cmp r0, #0
- ldrne r3, .L2027
+ ldrne r3, .L2025
movne r2, #0
strne r2, [r3, #-1000]
movne r2, #400
- bne .L2026
-.L1994:
+ bne .L2024
+.L1992:
add r9, r9, #1
add r5, r5, #36
uxth r9, r9
-.L1993:
+.L1991:
cmp r9, r7
- bne .L1996
+ bne .L1994
add sl, sl, #1
mov r6, r8
-.L1990:
+.L1988:
uxth r3, sl
- ldr r2, .L2027+56
+ ldr r2, .L2025+56
cmp r3, r6
- ldr r3, .L2027
- bcs .L1997
- ldr r1, .L2027+20
+ ldr r3, .L2025
+ bcs .L1995
+ ldr r1, .L2025+20
movw r3, #3844
ldrh ip, [r4, r2]
mov r7, #0
mov r0, #36
ldrh r5, [r1, r3]
add ip, ip, sl
- ldr r2, .L2027+76
+ ldr r2, .L2025+76
mov r3, r7
- b .L1998
-.L1997:
+ b .L1996
+.L1995:
ldrh r1, [r3, r2]
mov r9, fp
add r6, r6, r1
uxth r6, r6
strh r6, [r3, r2] @ movhi
cmp r6, fp
- bcs .L1999
+ bcs .L1997
movw r2, #402
mov r1, #404
ldrh r2, [r3, r2]
ldrh r3, [r3, r1]
cmp r2, r3
- bne .L2000
-.L1999:
- ldr r5, .L2027
+ bne .L1998
+.L1997:
+ ldr r5, .L2025
ldr r3, [r5, #-1176]
cmp r3, #0
- beq .L2001
+ beq .L1999
bl Ftl_gc_temp_data_write_back
cmp r0, #0
movne r3, #0
strne r3, [r5, #-1000]
movne r3, #400
ldrneh r0, [r5, r3]
- bne .L1962
-.L2001:
+ bne .L1960
+.L1999:
movw r2, #402
- ldr r3, .L2027
+ ldr r3, .L2025
ldrh ip, [r5, r2]
cmp ip, #0
- bne .L2002
- ldr r2, .L2027+12
+ bne .L2000
+ ldr r2, .L2025+12
ldr r0, [r3, #-2064]
ldrh r1, [r3, r2]
mov r1, r1, asl #1
ldrh r4, [r0, r1]
cmp r4, #0
- beq .L2002
+ beq .L2000
strh ip, [r0, r1] @ movhi
ldrh r0, [r3, r2]
bl update_vpc_list
bl FtlCacheWriteBack
bl l2p_flush
bl FtlVpcTblFlush
-.L2002:
- ldr r3, .L2027+12
+.L2000:
+ ldr r3, .L2025+12
mvn r1, #0
- ldr r2, .L2027
+ ldr r2, .L2025
strh r1, [r2, r3] @ movhi
-.L2000:
- ldr r3, .L2027
- ldr r2, .L2027+32
+.L1998:
+ ldr r3, .L2025
+ ldr r2, .L2025+32
ldrh r2, [r3, r2]
cmp r2, #2
- ldrls r2, .L2027+20
+ ldrls r2, .L2025+20
movwls r3, #3912
ldrlsh r6, [r2, r3]
- bls .L2021
-.L2003:
+ bls .L2019
+.L2001:
mov r1, #0
str r1, [r3, #-1000]
mov r1, #400
ldrh r0, [r3, r1]
cmp r0, #0
addeq r0, r2, #1
-.L1962:
+.L1960:
add sp, sp, #36
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2028:
+.L2026:
.align 2
-.L2027:
+.L2025:
.word .LANCHOR2
.word -1136
.word -1138
.word -1756
.word -1184
.word .LANCHOR0
- .word .LC116
+ .word .LC115
.word -1948
.word -2048
.word -1190
.word -1192
- .word .LC117
+ .word .LC116
.word -1772
.word .LANCHOR2-1756
.word -1754
.word -1944
.word .LANCHOR2-1742
.fnend
- .size rk_ftl_garbage_collect.part.19, .-rk_ftl_garbage_collect.part.19
+ .size rk_ftl_garbage_collect.part.18, .-rk_ftl_garbage_collect.part.18
.align 2
.global rk_ftl_garbage_collect
.type rk_ftl_garbage_collect, %function
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r4, r0
- ldr r3, .L2035
+ ldr r3, .L2033
mov r5, r1
ldr r0, [r3, #-1000]
cmp r0, #0
movne r0, #0
ldmnefd sp!, {r3, r4, r5, pc}
- ldr r2, .L2035+4
+ ldr r2, .L2033+4
ldrh r2, [r3, r2]
cmp r2, #47
ldmlsfd sp!, {r3, r4, r5, pc}
- ldr r1, .L2035+8
+ ldr r1, .L2033+8
movw r2, #3000
ldrh r1, [r1, r2]
movw r2, #65535
cmp r1, r2
- beq .L2031
- ldr r1, .L2035+12
+ beq .L2029
+ ldr r1, .L2033+12
ldrh r3, [r3, r1]
cmp r3, r2
- beq .L2031
+ beq .L2029
mov r0, #1
bl FtlGcFreeTempBlock
cmp r0, #0
- bne .L2034
-.L2031:
+ bne .L2032
+.L2029:
mov r0, r4
mov r1, r5
ldmfd sp!, {r3, r4, r5, lr}
- b rk_ftl_garbage_collect.part.19
-.L2034:
+ b rk_ftl_garbage_collect.part.18
+.L2032:
mov r0, #1
ldmfd sp!, {r3, r4, r5, pc}
-.L2036:
+.L2034:
.align 2
-.L2035:
+.L2033:
.word .LANCHOR2
.word -2056
.word .LANCHOR1
.fnstart
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2059
+ ldr r3, .L2057
stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
.save {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
ldr r4, [r3, #408]
- ldr r3, .L2059+4
+ ldr r3, .L2057+4
ldr r1, [r3, #3964]
cmp r1, #0
- beq .L2038
+ beq .L2036
ldrb r8, [r3, #80] @ zero_extendqisi2
cmp r8, #0
- beq .L2039
+ beq .L2037
ldrb r8, [r4, #8] @ zero_extendqisi2
sub lr, r8, #1
rsbs r8, lr, #0
adc r8, r8, lr
-.L2039:
+.L2037:
ldr r0, [r3, #3968]
mov r2, r8
ldrb r3, [r4, #9] @ zero_extendqisi2
mov r5, #0
bl FlashProgPages
mov r7, r5
- ldr r6, .L2059+4
- ldr r9, .L2059
- b .L2040
-.L2045:
+ ldr r6, .L2057+4
+ ldr r9, .L2057
+ b .L2038
+.L2043:
ldr r2, [r6, #3968]
add r3, r2, r5
ldr r2, [r2, r5]
cmn r2, #1
- beq .L2058
+ beq .L2056
ldr r2, [r3, #4]
cmp r8, #0
ldr r0, [r3, #16]
ldr r3, [r3, #12]
ldr r0, [r3, #12]
cmn r0, #1
- beq .L2043
+ beq .L2041
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
ldr r2, [r9, #-2064]
mov sl, r0
ldrh r2, [r2, r3]
cmp r2, #0
- bne .L2044
- ldr r0, .L2059+8
+ bne .L2042
+ ldr r0, .L2057+8
mov r1, sl
bl printk
-.L2044:
+.L2042:
mov r0, sl
bl decrement_vpc_count
-.L2043:
+.L2041:
add r7, r7, #1
add r5, r5, #36
-.L2040:
+.L2038:
ldr r3, [r6, #3964]
cmp r7, r3
- bcc .L2045
- b .L2046
-.L2054:
+ bcc .L2043
+ b .L2044
+.L2052:
ldr r3, [r6, #3968]
mvn r2, #0
movw sl, #3912
str r2, [r3, r5]
- b .L2047
-.L2050:
+ b .L2045
+.L2048:
ldr r0, [r3, #4]
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
ldrh r3, [r4, #0]
cmp r3, r0
- bne .L2048
+ bne .L2046
ldr r2, [r7, #-2064]
mov r3, r3, asl #1
ldrh r1, [r4, #4]
mov r3, #0
strb r3, [r4, #6]
strh r3, [r4, #4] @ movhi
-.L2048:
+.L2046:
ldrh r3, [r4, #4]
cmp r3, #0
- bne .L2049
+ bne .L2047
mov r0, r4
bl allocate_new_data_superblock
-.L2049:
+.L2047:
ldr r3, [r7, #-1608]
add r3, r3, #1
str r3, [r7, #-1608]
str r3, [r0, #4]
ldrb r3, [r4, #9] @ zero_extendqisi2
bl FlashProgPages
-.L2047:
+.L2045:
ldr r2, [r6, #3968]
add r3, r2, r5
ldr r2, [r2, r5]
cmn r2, #1
- beq .L2050
+ beq .L2048
ldr r2, [r3, #4]
cmp r8, #0
ldr r0, [r3, #16]
ldr r3, [r3, #12]
ldr r0, [r3, #12]
cmn r0, #1
- beq .L2052
+ beq .L2050
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
ldr r2, [r7, #-2064]
mov sl, r0
ldrh r2, [r2, r3]
cmp r2, #0
- bne .L2053
- ldr r0, .L2059+8
+ bne .L2051
+ ldr r0, .L2057+8
mov r1, sl
bl printk
-.L2053:
+.L2051:
mov r0, sl
bl decrement_vpc_count
-.L2052:
+.L2050:
add r9, r9, #1
add r5, r5, #36
- b .L2041
-.L2058:
- ldr r6, .L2059+4
+ b .L2039
+.L2056:
+ ldr r6, .L2057+4
mov r5, #0
- ldr r7, .L2059
+ ldr r7, .L2057
mov r9, r5
-.L2041:
+.L2039:
ldr r3, [r6, #3964]
cmp r9, r3
- bcc .L2054
+ bcc .L2052
movw r4, #16386
- ldr r6, .L2059
- ldr r5, .L2059+12
- b .L2055
-.L2056:
+ ldr r6, .L2057
+ ldr r5, .L2057+12
+ b .L2053
+.L2054:
mov r0, #1
mov r1, r0
bl rk_ftl_garbage_collect
subs r4, r4, #1
- beq .L2046
-.L2055:
+ beq .L2044
+.L2053:
ldrh r3, [r6, r5]
cmp r3, #0
- bne .L2056
-.L2046:
- ldr r3, .L2059+4
+ bne .L2054
+.L2044:
+ ldr r3, .L2057+4
mov r2, #0
str r2, [r3, #3964]
-.L2038:
+.L2036:
mov r0, #0
ldmfd sp!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, pc}
-.L2060:
+.L2058:
.align 2
-.L2059:
+.L2057:
.word .LANCHOR2
.word .LANCHOR0
- .word .LC118
+ .word .LC117
.word -1134
.fnend
.size FtlCacheWriteBack, .-FtlCacheWriteBack
stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, sl, lr}
.save {r0, r1, r2, r4, r5, r6, r7, r8, sl, lr}
movw r3, #3912
- ldr r2, .L2083
+ ldr r2, .L2081
ldrh r1, [r2, r3]
- ldr r2, .L2083+4
- ldr r3, .L2083+8
+ ldr r2, .L2081+4
+ ldr r3, .L2081+8
ldrh r4, [r3, r2]
movw r2, #65535
cmp r4, r2
- beq .L2063
+ beq .L2061
cmp r0, #0
- beq .L2064
- ldr ip, .L2083+12
+ beq .L2062
+ ldr ip, .L2081+12
movw r0, #3000
ldrh lr, [ip, r0]
cmp lr, r2
movne r1, #2
- bne .L2064
+ bne .L2062
mov r2, #0
strh r2, [ip, r0] @ movhi
sub r2, r2, #2048
ldrh r3, [r3, r2]
cmp r3, #17
movhi r1, #2
-.L2064:
- ldr r0, .L2083+16
+.L2062:
+ ldr r0, .L2081+16
bl FtlGcScanTempBlk
cmn r0, #1
str r0, [sp, #4]
- beq .L2065
- ldr r3, .L2083+8
+ beq .L2063
+ ldr r3, .L2081+8
mov r4, r4, asl #1
ldr r3, [r3, #-2084]
ldrh r2, [r3, r4]
cmp r2, #4
- bls .L2066
+ bls .L2064
sub r2, r2, #5
mov r0, #1
strh r2, [r3, r4] @ movhi
bl FtlEctTblFlush
-.L2066:
- ldr r3, .L2083+8
+.L2064:
+ ldr r3, .L2081+8
ldr r2, [r3, #-1016]
cmp r2, #0
- bne .L2067
+ bne .L2065
ldr r2, [r3, #-1608]
ldr r0, [sp, #4]
add r2, r2, #1
ubfx r0, r0, #10, #16
bl FtlBbmMapBadBlock
bl FtlBbmTblFlush
-.L2067:
- ldr r3, .L2083+8
+.L2065:
+ ldr r3, .L2081+8
mov r2, #0
str r2, [r3, #-1016]
- b .L2078
-.L2065:
- ldr r2, .L2083+12
+ b .L2076
+.L2063:
+ ldr r2, .L2081+12
movw r3, #3000
ldrh r2, [r2, r3]
movw r3, #65535
cmp r2, r3
- bne .L2078
-.L2063:
- ldr r6, .L2083+8
+ bne .L2076
+.L2061:
+ ldr r6, .L2081+8
movw r3, #65535
- ldr r5, .L2083+4
+ ldr r5, .L2081+4
mov r4, #0
str r4, [r6, #-1016]
ldrh r2, [r6, r5]
cmp r2, r3
moveq r0, r4
- beq .L2068
+ beq .L2066
bl FtlCacheWriteBack
- ldr ip, .L2083
+ ldr ip, .L2081
movw r0, #3912
ldrb r1, [r6, #-1941] @ zero_extendqisi2
ldrh r3, [r6, r5]
ldrh r0, [ip, r0]
ldr r2, [r6, #-2064]
- ldr sl, .L2083+20
+ ldr sl, .L2081+20
mov r3, r3, asl #1
mul r1, r0, r1
strh r1, [r2, r3] @ movhi
ldrh r2, [r6, sl]
add r3, r2, r3
str r3, [r6, #-1860]
- b .L2069
-.L2072:
+ b .L2067
+.L2070:
mov r7, #12
ldr r8, [r6, #-1144]
mul r7, r7, r4
ldr r0, [sp, #4]
ldr r3, [r8, r7]
cmp r0, r3
- bne .L2070
+ bne .L2068
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
add r1, r5, #4
ldr r0, [r5, #8]
bl log2phys
mov r0, r7
- b .L2081
-.L2070:
+ b .L2079
+.L2068:
ldr r3, [r5, #4]
cmp r0, r3
- beq .L2071
- ldr r3, .L2083+4
+ beq .L2069
+ ldr r3, .L2081+4
ldrh r0, [r6, r3]
-.L2081:
+.L2079:
bl decrement_vpc_count
-.L2071:
+.L2069:
add r4, r4, #1
uxth r4, r4
-.L2069:
+.L2067:
ldrh r3, [r6, sl]
- ldr r5, .L2083+8
+ ldr r5, .L2081+8
cmp r3, r4
- bhi .L2072
+ bhi .L2070
movw r0, #65535
bl decrement_vpc_count
- ldr r3, .L2083+4
+ ldr r3, .L2081+4
ldr r1, [r5, #-2064]
ldrh r0, [r5, r3]
mov r5, r3
mov r2, r0, asl #1
ldrh r2, [r1, r2]
cmp r2, #0
- beq .L2073
+ beq .L2071
bl INSERT_DATA_LIST
- b .L2074
-.L2073:
+ b .L2072
+.L2071:
bl INSERT_FREE_LIST
-.L2074:
- ldr r4, .L2083+8
+.L2072:
+ ldr r4, .L2081+8
mvn r3, #0
- ldr r2, .L2083+20
+ ldr r2, .L2081+20
strh r3, [r4, r5] @ movhi
mov r3, #0
strh r3, [r4, r2] @ movhi
- ldr r2, .L2083+24
+ ldr r2, .L2081+24
strh r3, [r4, r2] @ movhi
bl l2p_flush
bl FtlVpcTblFlush
ldr r3, [r4, #-1884]
mov r1, r4
- ldr r2, .L2083+28
+ ldr r2, .L2081+28
cmp r3, #0
- beq .L2075
+ beq .L2073
ldr r3, [r4, #-1824]
cmp r3, #29
- bhi .L2075
+ bhi .L2073
ldrh r3, [r4, r2]
sub r2, r2, #276
mvn r1, #0
ldrh r2, [r4, r2]
cmp r2, r3
movcc r3, r3, asl #1
- ldrcc r2, .L2083+32
+ ldrcc r2, .L2081+32
strcch r3, [r4, r2] @ movhi
- ldr r3, .L2083+36
- ldr r2, .L2083+8
- b .L2082
-.L2075:
- ldr r0, .L2083+40
+ ldr r3, .L2081+36
+ ldr r2, .L2081+8
+ b .L2080
+.L2073:
+ ldr r0, .L2081+40
ldrh r2, [r1, r2]
- ldr r3, .L2083+8
+ ldr r3, .L2081+8
ldrh r0, [r1, r0]
add r2, r2, r2, asl #1
cmp r0, r2, lsr #2
- ble .L2080
- ldr r2, .L2083+36
+ ble .L2078
+ ldr r2, .L2081+36
mvn r1, #0
strh r1, [r3, r2] @ movhi
add r2, r2, #564
mov r1, #20
-.L2082:
+.L2080:
strh r1, [r3, r2] @ movhi
- b .L2080
-.L2078:
+ b .L2078
+.L2076:
mov r0, #1
- b .L2068
-.L2080:
+ b .L2066
+.L2078:
mov r0, #0
-.L2068:
+.L2066:
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, r8, sl, pc}
-.L2084:
+.L2082:
.align 2
-.L2083:
+.L2081:
.word .LANCHOR0
.word -1948
.word .LANCHOR2
@ frame_needed = 0, uses_anonymous_args = 0
stmfd sp!, {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
- ldr r3, .L2094
+ ldr r3, .L2092
ldrb r3, [r3, #80] @ zero_extendqisi2
cmp r3, #0
- ldr r3, .L2094+4
- beq .L2086
+ ldr r3, .L2092+4
+ beq .L2084
ldr r2, [r3, #-1176]
tst r2, #1
- beq .L2086
- ldr r2, .L2094+8
+ beq .L2084
+ ldr r2, .L2092+8
ldrh r2, [r3, r2]
cmp r2, #0
- bne .L2091
-.L2086:
+ bne .L2089
+.L2084:
mov r2, #0
ldr r0, [r3, #-980]
ldr r1, [r3, #-1176]
mov r3, r2
bl FlashProgPages
mov r4, #0
- ldr r5, .L2094+4
+ ldr r5, .L2092+4
mov r6, #36
- b .L2088
-.L2090:
+ b .L2086
+.L2088:
mul r3, r6, r4
ldr r1, [r5, #-980]
add r2, r1, r3
ldr r1, [r1, r3]
cmn r1, #1
- bne .L2089
- ldr r2, .L2094+12
+ bne .L2087
+ ldr r2, .L2092+12
mov lr, #0
ldr ip, [r7, #-2064]
ldrh r0, [r7, r2]
bl FtlBbmMapBadBlock
bl FtlBbmTblFlush
bl FtlGcPageVarInit
- b .L2093
-.L2089:
+ b .L2091
+.L2087:
ldr r3, [r2, #12]
add r4, r4, #1
ldr r1, [r2, #4]
ldr r0, [r3, #12]
ldr r2, [r3, #8]
bl FtlGcUpdatePage
-.L2088:
+.L2086:
ldr r1, [r5, #-1176]
- ldr r7, .L2094+4
+ ldr r7, .L2092+4
cmp r4, r1
- bcc .L2090
+ bcc .L2088
ldr r0, [r7, #-980]
bl FtlGcBufFree
- ldr r3, .L2094+8
+ ldr r3, .L2092+8
mov r0, #0
str r0, [r7, #-1176]
ldrh r3, [r7, r3]
ldmnefd sp!, {r3, r4, r5, r6, r7, pc}
mov r0, #1
bl FtlGcFreeTempBlock
-.L2093:
+.L2091:
mov r0, #1
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L2091:
+.L2089:
mov r0, #0
ldmfd sp!, {r3, r4, r5, r6, r7, pc}
-.L2095:
+.L2093:
.align 2
-.L2094:
+.L2092:
.word .LANCHOR0
.word .LANCHOR2
.word -1944
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
movw r5, #3912
- ldr r6, .L2098
- ldr r0, .L2098+4
- ldr r4, .L2098+8
+ ldr r6, .L2096
+ ldr r0, .L2096+4
+ ldr r4, .L2096+8
ldrh r1, [r6, r5]
bl FtlGcScanTempBlk
- ldr r3, .L2098+12
+ ldr r3, .L2096+12
ldrh r2, [r4, r3]
ldrh r3, [r6, r5]
cmp r2, r3
mov r3, #0
str r3, [r4, #-1016]
ldmfd sp!, {r4, r5, r6, pc}
-.L2099:
+.L2097:
.align 2
-.L2098:
+.L2096:
.word .LANCHOR0
.word .LANCHOR2-1948
.word .LANCHOR2
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
movw r2, #266
- ldr r3, .L2101
+ ldr r3, .L2099
mov r4, #0
- ldr r5, .L2101+4
+ ldr r5, .L2099+4
strh r4, [r3, r2] @ movhi
str r4, [r3, #268]
mov r0, r5
bl decrement_vpc_count
mov r0, r4
ldmfd sp!, {r3, r4, r5, pc}
-.L2102:
+.L2100:
.align 2
-.L2101:
+.L2099:
.word .LANCHOR2
.word .LANCHOR2-2044
.fnend
@ frame_needed = 0, uses_anonymous_args = 0
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
- ldr r5, .L2114
- ldr r4, .L2114+4
+ ldr r5, .L2112
+ ldr r4, .L2112+4
ldr r0, [r5, #3848]
uxth r0, r0
bl FtlFreeSysBlkQueueInit
bl FtlScanSysBlk
- ldr r3, .L2114+8
+ ldr r3, .L2112+8
ldrh r2, [r4, r3]
movw r3, #65535
cmp r2, r3
- beq .L2112
+ beq .L2110
bl FtlLoadSysInfo
subs r6, r0, #0
- bne .L2112
+ bne .L2110
bl FtlLoadMapInfo
bl FtlLoadVonderInfo
bl Ftl_load_ext_data
ldrh r2, [r5, r3]
mov r3, r6
ldr r1, [r4, #-1900]
- b .L2105
-.L2107:
+ b .L2103
+.L2105:
add r0, r1, r6
add r6, r6, #12
ldr r0, [r0, #4]
cmp r0, #0
- blt .L2106
+ blt .L2104
add r3, r3, #1
-.L2105:
+.L2103:
cmp r3, r2
- blt .L2107
-.L2106:
- ldr r4, .L2114+4
+ blt .L2105
+.L2104:
+ ldr r4, .L2112+4
cmp r3, r2
- ldr r1, .L2114+12
+ ldr r1, .L2112+12
ldrh r0, [r4, r1]
add r0, r0, #1
strh r0, [r4, r1] @ movhi
- blt .L2108
+ blt .L2106
movw r3, #266
ldrh r3, [r4, r3]
cmp r3, #0
- beq .L2109
-.L2108:
- ldr r0, .L2114+16
+ beq .L2107
+.L2106:
+ ldr r0, .L2112+16
bl FtlSuperblockPowerLostFix
- ldr r0, .L2114+20
+ ldr r0, .L2112+20
bl FtlSuperblockPowerLostFix
- ldr r0, .L2114+24
+ ldr r3, .L2112+24
+ ldr r1, [r4, #-2064]
+ ldr r2, .L2112+28
+ ldrh r3, [r4, r3]
+ ldrh r0, [r4, r2]
+ mov r3, r3, asl #1
+ ldrh ip, [r1, r3]
+ rsb r0, r0, ip
+ strh r0, [r1, r3] @ movhi
+ ldr r0, .L2112
+ movw r1, #3912
+ ldr r3, .L2112+32
+ ldr lr, [r4, #-2064]
+ ldrh ip, [r0, r1]
+ strh ip, [r4, r3] @ movhi
+ mov r3, #0
+ strh r3, [r4, r2] @ movhi
+ add r2, r2, #44
+ strb r3, [r4, #-2038]
+ ldrh ip, [r4, r2]
+ add r2, r2, #4
+ ldrh r5, [r4, r2]
+ mov ip, ip, asl #1
+ ldrh r6, [lr, ip]
+ rsb r5, r5, r6
+ strh r5, [lr, ip] @ movhi
+ ldrh r0, [r0, r1]
+ ldr r1, .L2112+36
+ strh r3, [r4, r2] @ movhi
+ strb r3, [r4, #-1990]
+ strh r0, [r4, r1] @ movhi
+ ldr r0, .L2112+40
bl FtlMapBlkWriteDumpData
- ldr r0, .L2114+28
+ ldr r0, .L2112+44
bl FtlMapBlkWriteDumpData
- ldr r3, .L2114+32
+ ldr r3, .L2112+48
ldrh r2, [r4, r3]
add r2, r2, #1
strh r2, [r4, r3] @ movhi
bl l2p_flush
bl FtlVpcTblFlush
bl FtlVpcTblFlush
-.L2109:
+.L2107:
mov r0, #1
- ldr r4, .L2114+4
+ ldr r4, .L2112+4
bl FtlUpdateVaildLpn
- ldr r3, .L2114+36
+ ldr r3, .L2112+24
ldrh r0, [r4, r3]
movw r3, #65535
cmp r0, r3
- beq .L2110
- ldr r3, .L2114+40
+ beq .L2108
+ ldr r3, .L2112+28
ldrh r3, [r4, r3]
cmp r3, #0
- bne .L2110
- ldr r3, .L2114+44
+ bne .L2108
+ ldr r3, .L2112+52
ldrh r3, [r4, r3]
cmp r3, #0
- bne .L2110
+ bne .L2108
bl FtlGcRefreshBlock
- ldr r3, .L2114+48
+ ldr r3, .L2112+56
ldrh r0, [r4, r3]
bl FtlGcRefreshBlock
- ldr r0, .L2114+16
+ ldr r0, .L2112+16
bl allocate_new_data_superblock
- ldr r0, .L2114+20
+ ldr r0, .L2112+20
bl allocate_new_data_superblock
add r0, r4, #224
bl FtlMapBlkWriteDumpData
-.L2110:
- ldr r3, .L2114+12
- ldr r2, .L2114+4
+.L2108:
+ ldr r3, .L2112+12
+ ldr r2, .L2112+4
ldrh r0, [r2, r3]
ands r4, r0, #31
- bne .L2113
+ bne .L2111
bl FtlVpcCheckAndModify
mov r0, r4
ldmfd sp!, {r4, r5, r6, pc}
-.L2112:
+.L2110:
mvn r0, #0
ldmfd sp!, {r4, r5, r6, pc}
-.L2113:
+.L2111:
mov r0, #0
ldmfd sp!, {r4, r5, r6, pc}
-.L2115:
+.L2113:
.align 2
-.L2114:
+.L2112:
.word .LANCHOR0
.word .LANCHOR2
.word -1768
.word -1792
.word .LANCHOR2-2044
.word .LANCHOR2-1996
+ .word -2044
+ .word -2040
+ .word -2042
+ .word -1994
.word .LANCHOR2-1088
.word .LANCHOR2+224
.word -1790
- .word -2044
- .word -2040
.word -1992
.word -1996
.fnend
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
-.L2117:
+.L2115:
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mvn r3, #0
- ldr r4, .L2119
+ ldr r4, .L2117
mov r2, #0
- ldr r1, .L2119+4
+ ldr r1, .L2117+4
mov r5, r0
- ldr r0, .L2119+8
+ ldr r0, .L2117+8
str r3, [r4, #2960]
- ldr r3, .L2119+12
+ ldr r3, .L2117+12
str r2, [r3, #412]
bl printk
mov r0, r5
bl FtlConstantsInit
bl FtlMemInit
bl FtlVariablesInit
- ldr r3, .L2119+16
+ ldr r3, .L2117+16
ldr r0, [r3, #3848]
uxth r0, r0
bl FtlFreeSysBlkQueueInit
bl FtlLoadBbt
cmp r0, #0
- bne .L2118
+ bne .L2116
bl FtlSysBlkInit
cmp r0, #0
moveq r3, #1
streq r3, [r4, #2960]
-.L2118:
+.L2116:
mov r0, #0
ldmfd sp!, {r3, r4, r5, pc}
-.L2120:
+.L2118:
.align 2
-.L2119:
+.L2117:
.word .LANCHOR1
- .word .LC76
.word .LC75
+ .word .LC74
.word .LANCHOR2
.word .LANCHOR0
.fnend
.save {r3, r4, r5, lr}
mov r0, #2048
bl ftl_malloc
- ldr r4, .L2125
+ ldr r4, .L2123
mov r5, #0
add r1, r4, #420
str r5, [r4, #112]
ldr r3, [r4, #112]
cmp r3, r5
mvneq r4, #0
- beq .L2122
+ beq .L2120
bl rk_nandc_irq_init
ldr r0, [r4, #416]
mov r1, r5
ldr r0, [r4, #112]
bl FlashInit
subs r4, r0, #0
- bne .L2123
- ldr r0, .L2125+4
+ bne .L2121
+ ldr r0, .L2123+4
bl FtlInit
-.L2123:
- ldr r0, .L2125+8
+.L2121:
+ ldr r0, .L2123+8
mov r1, r4
bl printk
-.L2122:
+.L2120:
mov r0, r4
ldmfd sp!, {r3, r4, r5, pc}
-.L2126:
+.L2124:
.align 2
-.L2125:
+.L2123:
.word .LANCHOR2
.word .LANCHOR0+2200
- .word .LC119
+ .word .LC118
.fnend
.size rk_ftl_init, .-rk_ftl_init
.align 2
@ frame_needed = 0, uses_anonymous_args = 0
stmfd sp!, {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
- ldr r3, .L2130
- ldr r5, .L2130+4
+ ldr r3, .L2128
+ ldr r5, .L2128+4
ldrh r2, [r5, r3]
movw r3, #65535
cmp r2, r3
- beq .L2128
- ldr r3, .L2130+8
+ beq .L2126
+ ldr r3, .L2128+8
ldrh r3, [r5, r3]
cmp r3, #0
- bne .L2129
-.L2128:
+ bne .L2127
+.L2126:
bl FtlCacheWriteBack
mov r0, #0
bl FtlGcFreeTempBlock
- ldr r0, .L2130+12
+ ldr r0, .L2128+12
mov r4, #0
strb r4, [r5, #-1940]
bl allocate_data_superblock
- ldr r3, .L2130+16
+ ldr r3, .L2128+16
strh r4, [r5, r3] @ movhi
add r3, r3, #12
strh r4, [r5, r3] @ movhi
bl FtlVpcTblFlush
mov r0, r4
bl FtlEctTblFlush
-.L2129:
- ldr r0, .L2130+12
+.L2127:
+ ldr r0, .L2128+12
ldmfd sp!, {r3, r4, r5, lr}
b get_new_active_ppa
-.L2131:
+.L2129:
.align 2
-.L2130:
+.L2128:
.word -1948
.word .LANCHOR2
.word -1944
stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, lr}
.save {r0, r1, r2, r4, r5, r6, r7, lr}
add r2, r1, r0
- ldr r5, .L2141
+ ldr r5, .L2139
mov r7, r0
mov r4, r1
ldr r3, [r5, #3952]
cmp r2, r3
mvnhi r0, #0
- bhi .L2133
+ bhi .L2131
cmp r1, #31
movls r0, #0
- bls .L2133
+ bls .L2131
bl FtlCacheWriteBack
movw r3, #3918
ldrh r6, [r5, r3]
mov r5, r0
uxth r7, r7
cmp r7, #0
- beq .L2134
+ beq .L2132
rsb r6, r7, r6
add r5, r0, #1
cmp r6, r4
movcs r6, r4
uxth r6, r6
rsb r4, r6, r4
-.L2134:
+.L2132:
mvn r3, #0
- ldr r7, .L2141
+ ldr r7, .L2139
str r3, [sp, #4]
movw r6, #3918
- b .L2135
-.L2137:
+ b .L2133
+.L2135:
mov r0, r5
mov r1, sp
mov r2, #0
bl log2phys
ldr r3, [sp, #0]
cmn r3, #1
- beq .L2136
- ldr r3, .L2141+4
+ beq .L2134
+ ldr r3, .L2139+4
add r1, sp, #4
mov r0, r5
ldr r2, [r3, #424]
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
bl decrement_vpc_count
-.L2136:
+.L2134:
ldrh r3, [r7, r6]
add r5, r5, #1
rsb r4, r3, r4
-.L2135:
+.L2133:
ldrh r3, [r7, r6]
cmp r4, r3
- bcs .L2137
- ldr r3, .L2141+4
+ bcs .L2135
+ ldr r3, .L2139+4
mov r4, #0
ldr r2, [r3, #424]
cmp r2, #32
- bls .L2140
+ bls .L2138
str r4, [r3, #424]
bl l2p_flush
bl FtlVpcTblFlush
-.L2140:
+.L2138:
mov r0, r4
-.L2133:
+.L2131:
ldmfd sp!, {r1, r2, r3, r4, r5, r6, r7, pc}
-.L2142:
+.L2140:
.align 2
-.L2141:
+.L2139:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@ frame_needed = 0, uses_anonymous_args = 0
stmfd sp!, {r3, lr}
.save {r3, lr}
- ldr r3, .L2146
+ ldr r3, .L2144
ldr r3, [r3, #2960]
cmp r3, #1
- bne .L2145
+ bne .L2143
bl FtlSysFlush
-.L2145:
+.L2143:
mov r0, #0
ldmfd sp!, {r3, pc}
-.L2147:
+.L2145:
.align 2
-.L2146:
+.L2144:
.word .LANCHOR1
.fnend
.size FtlDeInit, .-FtlDeInit
sub sp, sp, #100
mov r5, r2
mov r8, r3
- bne .L2150
+ bne .L2148
add r0, r1, #256
mov r1, r2
mov r2, r3
bl FtlVendorPartWrite
- b .L2151
-.L2150:
- ldr r9, .L2199
+ b .L2149
+.L2148:
+ ldr r9, .L2197
add r7, r2, r1
ldr r3, [r9, #3952]
cmp r7, r3
mvnhi r0, #0
- bhi .L2151
- ldr r6, .L2199+4
+ bhi .L2149
+ ldr r6, .L2197+4
mov r3, #2048
mov r0, r1
str r3, [r6, #428]
str r0, [sp, #44]
add r3, r5, r3
str r3, [r6, #-1856]
- ldr r3, .L2199+8
+ ldr r3, .L2197+8
add r7, r3, #48
movhi r7, r3
ldr r3, [r9, #3964]
cmp r3, #0
- beq .L2185
+ beq .L2183
ldr r2, [r9, #3968]
sub r3, r3, #1
mov r7, #36
ldr r3, [r7, #16]
cmp lr, r3
strne r5, [sp, #32]
- bne .L2154
+ bne .L2152
ldr r3, [r6, #-1868]
mov r0, r4
mov r1, sl
bl memcpy
cmp fp, #0
ldr r3, [sp, #4]
- bne .L2155
+ bne .L2153
ldr r2, [r6, #432]
cmp r2, #2
movle r0, fp
- ble .L2151
-.L2155:
+ ble .L2149
+.L2153:
add r8, r8, r3
add r4, r4, r9
ldr r3, [sp, #20]
add r3, r3, #1
str r7, [sp, #32]
str r3, [sp, #20]
-.L2154:
- ldr r3, .L2199+4
+.L2152:
+ ldr r3, .L2197+4
mov r2, #0
ldr r7, [r3, #408]
str r2, [r3, #432]
- b .L2153
-.L2185:
+ b .L2151
+.L2183:
str r5, [sp, #32]
-.L2153:
+.L2151:
ldr r0, [sp, #20]
ldr r1, [sp, #44]
bl FtlCacheMetchLpa
cmp r0, #0
- beq .L2156
+ beq .L2154
bl FtlCacheWriteBack
-.L2156:
+.L2154:
cmp r5, sl, asl #1
- ldr r5, .L2199
+ ldr r5, .L2197
mov fp, #0
ldr r6, [sp, #20]
movcc r3, #0
movcs r3, #1
str r3, [sp, #24]
- ldr r3, .L2199+4
+ ldr r3, .L2197+4
mov sl, r5
str fp, [sp, #40]
mov r9, r8
str r7, [r3, #408]
- b .L2196
-.L2182:
+ b .L2194
+.L2180:
ldrh r1, [r7, #4]
cmp r1, #0
- bne .L2158
- ldr r3, .L2199+8
- ldr r2, .L2199+4
+ bne .L2156
+ ldr r3, .L2197+8
+ ldr r2, .L2197+4
cmp r7, r3
- ldr r8, .L2199+12
- bne .L2159
- ldr r3, .L2199+16
+ ldr r8, .L2197+12
+ bne .L2157
+ ldr r3, .L2197+16
ldrh r3, [r2, r3]
cmp r3, #0
- bne .L2160
- ldr r0, .L2199+20
+ bne .L2158
+ ldr r0, .L2197+20
str r3, [sp, #4]
bl allocate_new_data_superblock
ldr r3, [sp, #4]
str r3, [r8, #3004]
-.L2160:
- ldr r0, .L2199+8
+.L2158:
+ ldr r0, .L2197+8
bl allocate_new_data_superblock
ldr r2, [r8, #3004]
- ldr r3, .L2199+20
+ ldr r3, .L2197+20
cmp r2, #0
movne r7, r3
- b .L2161
-.L2159:
+ b .L2159
+.L2157:
str r1, [r8, #3004]
- ldr r1, .L2199+24
+ ldr r1, .L2197+24
ldrh r2, [r2, r1]
cmp r2, #0
movne r7, r3
- bne .L2161
+ bne .L2159
mov r0, r7
bl allocate_new_data_superblock
-.L2161:
+.L2159:
ldrh r3, [r7, #4]
cmp r3, #0
- bne .L2162
+ bne .L2160
mov r0, r7
bl allocate_new_data_superblock
-.L2162:
- ldr r3, .L2199+4
+.L2160:
+ ldr r3, .L2197+4
str r7, [r3, #408]
-.L2158:
- ldr r2, .L2199+4
+.L2156:
+ ldr r2, .L2197+4
mov r8, r7
ldrh r3, [r7, #4]
ldr r1, [r2, #-988]
str r3, [sp, #36]
mov r3, #0
str r3, [sp, #28]
- b .L2163
-.L2179:
+ b .L2161
+.L2177:
ldrh r3, [r8, #4]
cmp r3, #0
- beq .L2191
+ beq .L2189
ldr r7, [sp, #44]
rsb r2, r7, r6
ldr r7, [sp, #24]
rsbs r3, r2, #0
adc r3, r3, r2
tst r3, r7
- beq .L2165
+ beq .L2163
ldr r7, [sp, #28]
cmp r7, #0
- beq .L2165
+ beq .L2163
movw lr, #3918
ldr r7, [sp, #32]
ldrh r2, [r5, lr]
add r1, r7, r4
mls r1, r2, r6, r1
cmp r1, r2
- bne .L2191
-.L2165:
+ bne .L2189
+.L2163:
add r1, sp, #56
mov r2, #0
mov r0, r6
movw r2, #3924
mov ip, #36
ldrh r2, [r5, r2]
- ldr r7, .L2199+4
+ ldr r7, .L2197+4
mla r1, ip, lr, r1
mul lr, lr, r2
ldr r7, [r7, #-944]
ldrh lr, [r5, r0]
ldr r0, [r5, #3964]
mul lr, r0, lr
- ldr r0, .L2199+4
+ ldr r0, .L2197+4
bic lr, lr, #3
str lr, [sp, #12]
ldr lr, [r0, #-964]
ldr r3, [sp, #4]
str r1, [sp, #12]
orrs r1, r1, r3
- beq .L2166
+ beq .L2164
ldr r2, [sp, #12]
cmp r2, #0
- beq .L2167
+ beq .L2165
movw r3, #3918
mov r0, r4
ldrh fp, [r5, r3]
str r1, [sp, #40]
cmp fp, r3
movcs fp, r3
- b .L2168
-.L2167:
+ b .L2166
+.L2165:
cmp r3, #0
- beq .L2168
+ beq .L2166
ldr r3, [sp, #32]
movw lr, #3918
add fp, r3, r4
ldr r3, [sp, #12]
str r3, [sp, #40]
uxth fp, fp
-.L2168:
+.L2166:
movw lr, #3918
ldrh r3, [r5, lr]
cmp fp, r3
- bne .L2169
+ bne .L2167
ldr r3, [sp, #12]
ldr r0, [sl, #3964]
cmp r3, #0
mov r3, #36
mla r3, r3, r0, r2
strne r1, [r3, #8]
- bne .L2172
+ bne .L2170
ldr r0, [r3, #8]
movw r3, #3922
ldrh r2, [sl, r3]
- b .L2197
-.L2169:
+ b .L2195
+.L2167:
ldr r2, [sp, #56]
mov r3, #36
cmn r2, #1
- beq .L2173
+ beq .L2171
ldr r1, [r5, #3964]
add r0, sp, #60
str r2, [sp, #64]
bl FlashReadPages
ldr r3, [sp, #60]
cmn r3, #1
- ldr r3, .L2199+4
+ ldr r3, .L2197+4
ldreq r2, [r3, #-1632]
addeq r2, r2, #1
streq r2, [r3, #-1632]
- beq .L2175
+ beq .L2173
ldr r2, [r7, #8]
cmp r2, r6
- beq .L2175
+ beq .L2173
ldr r2, [r3, #-1632]
- ldr r0, .L2199+28
+ ldr r0, .L2197+28
add r2, r2, #1
str r2, [r3, #-1632]
mov r2, r6
ldr r1, [r7, #8]
bl printk
- b .L2175
-.L2173:
+ b .L2173
+.L2171:
ldr r1, [r5, #3964]
ldr r2, [r5, #3968]
mla r3, r3, r1, r2
movw r3, #3922
ldrh r2, [r5, r3]
bl ftl_memset
-.L2175:
+.L2173:
ldr r3, [sp, #12]
ldr r1, [r5, #3964]
cmp r3, #0
ldreq r0, [r3, #8]
addne r0, r0, r3, asl #9
addeq r1, r9, r1, asl #9
- b .L2197
-.L2166:
+ b .L2195
+.L2164:
ldr r3, [sp, #24]
ldr r2, [r5, #3964]
cmp r3, #0
ldr r3, [r5, #3968]
mla ip, ip, r2, r3
- beq .L2177
+ beq .L2175
movw lr, #3918
ldrh r3, [r5, lr]
mul r3, r3, r6
rsb r3, r4, r3
add r3, r9, r3, asl #9
str r3, [ip, #8]
- b .L2172
-.L2177:
+ b .L2170
+.L2175:
movw r0, #3918
movw r3, #3922
ldrh r1, [r5, r0]
mul r1, r1, r6
rsb r1, r4, r1
add r1, r9, r1, asl #9
-.L2197:
+.L2195:
bl memcpy
-.L2172:
- ldr r3, .L2199+32
+.L2170:
+ ldr r3, .L2197+32
ldr r0, [sp, #52]
ldr lr, [sp, #48]
strh r3, [r0, lr] @ movhi
- ldr r3, .L2199+4
+ ldr r3, .L2197+4
str r6, [r7, #8]
add r6, r6, #1
ldr r2, [r3, #-1844]
ldr r3, [sp, #28]
add r3, r3, #1
str r3, [sp, #28]
-.L2163:
+.L2161:
ldr r7, [sp, #28]
ldr r3, [sp, #36]
cmp r7, r3
- bne .L2179
+ bne .L2177
mov r7, r8
- b .L2164
-.L2191:
+ b .L2162
+.L2189:
ldr r3, [sp, #28]
mov r7, r8
str r3, [sp, #36]
-.L2164:
+.L2162:
ldr r3, [sp, #16]
ldr lr, [sp, #36]
ldr r2, [r5, #3964]
rsb r3, lr, r3
str r3, [sp, #16]
- ldr r3, .L2199+4
+ ldr r3, .L2197+4
ldr r0, [sp, #24]
ldr r3, [r3, #-988]
cmp r2, r3
orrcs r0, r0, #1
uxtb r3, r0
cmp r3, #0
- bne .L2180
+ bne .L2178
ldrh r2, [r7, #4]
cmp r2, #0
- bne .L2194
-.L2180:
+ bne .L2192
+.L2178:
bl FtlCacheWriteBack
ldr lr, [sp, #16]
mov r3, #0
cmp lr, #3
ldr r3, [sp, #24]
movls r3, #0
-.L2194:
+.L2192:
str r3, [sp, #24]
-.L2196:
+.L2194:
ldr r3, [sp, #16]
cmp r3, #0
- bne .L2182
+ bne .L2180
mov r0, r3
ldr r7, [sp, #44]
ldr r3, [sp, #20]
rsb r1, r3, r7
bl rk_ftl_garbage_collect
ldr r0, [sp, #16]
-.L2151:
+.L2149:
add sp, sp, #100
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2200:
+.L2198:
.align 2
-.L2199:
+.L2197:
.word .LANCHOR0
.word .LANCHOR2
.word .LANCHOR2-2044
.word -1992
.word .LANCHOR2-1996
.word -2040
- .word .LC120
+ .word .LC119
.word -3947
.fnend
.size FtlWrite, .-FtlWrite
mov r4, r1
mov r8, r3
str r2, [sp, #28]
- bne .L2203
+ bne .L2201
add r0, r1, #256
mov r1, r2
mov r2, r3
bl FtlVendorPartRead
str r0, [sp, #16]
- b .L2204
-.L2203:
+ b .L2202
+.L2201:
ldr r3, [sp, #28]
add r3, r3, r1
str r3, [sp, #20]
- ldr r3, .L2233
+ ldr r3, .L2231
ldr r1, [sp, #20]
ldr r2, [r3, #3952]
cmp r1, r2
mvnhi r3, #0
strhi r3, [sp, #16]
- bhi .L2204
+ bhi .L2202
movw r2, #3918
mov r0, r4
ldrh r5, [r3, r2]
ldr r1, [sp, #28]
add r3, r3, r0
str r3, [sp, #8]
- ldr r3, .L2233+4
+ ldr r3, .L2231+4
mov fp, r0
ldr r0, [sp, #12]
ldr r2, [r3, #-1852]
str r2, [r3, #-1880]
bl FtlCacheMetchLpa
cmp r0, #0
- beq .L2205
+ beq .L2203
bl FtlCacheWriteBack
-.L2205:
+.L2203:
mov r9, #0
ldr r6, [sp, #12]
str r9, [sp, #32]
mov r5, r9
str r9, [sp, #16]
- ldr r7, .L2233
- b .L2228
-.L2222:
+ ldr r7, .L2231
+ b .L2226
+.L2220:
mov r2, #0
mov r0, r6
add r1, sp, #60
bl log2phys
ldr r2, [sp, #60]
cmn r2, #1
- bne .L2229
- b .L2232
-.L2210:
+ bne .L2227
+ b .L2230
+.L2208:
mla r0, r0, r6, sl
cmp r0, r4
- bcc .L2209
+ bcc .L2207
ldr r2, [sp, #20]
cmp r0, r2
- bcs .L2209
+ bcs .L2207
rsb r0, r4, r0
mov r1, #0
mov r2, #512
add r0, r8, r0, asl #9
bl ftl_memset
ldr r3, [sp, #4]
-.L2209:
+.L2207:
add sl, sl, #1
- b .L2207
-.L2232:
+ b .L2205
+.L2230:
mov sl, #0
movw r3, #3918
-.L2207:
+.L2205:
ldrh r0, [r7, r3]
cmp sl, r0
- bcc .L2210
- b .L2211
-.L2229:
- ldr r3, .L2233+4
+ bcc .L2208
+ b .L2209
+.L2227:
+ ldr r3, .L2231+4
mov sl, #36
ldr r1, [r3, #-984]
mla sl, sl, r5, r1
cmp r6, r1
str r2, [sl, #4]
movw r2, #3918
- bne .L2212
+ bne .L2210
ldr r3, [r3, #-960]
mov r0, r4
str r3, [sl, #8]
str r1, [sp, #32]
cmp r1, r3
streq r8, [sl, #8]
- b .L2213
-.L2212:
+ b .L2211
+.L2210:
cmp r6, fp
ldrneh r3, [r7, r2]
mulne r3, r3, r6
- bne .L2230
+ bne .L2228
ldr r3, [r3, #-956]
ldrh r2, [r7, r2]
ldr r1, [sp, #20]
mul r3, r2, r6
rsb r9, r3, r1
cmp r9, r2
- bne .L2213
-.L2230:
+ bne .L2211
+.L2228:
rsb r3, r4, r3
add r3, r8, r3, asl #9
str r3, [sl, #8]
-.L2213:
+.L2211:
movw r3, #3924
- ldr r2, .L2233+4
+ ldr r2, .L2231+4
ldrh r3, [r7, r3]
str r6, [sl, #16]
ldr r2, [r2, #-948]
bic r3, r3, #3
add r3, r2, r3
str r3, [sl, #12]
-.L2211:
+.L2209:
ldr r3, [sp, #8]
add r6, r6, #1
subs r3, r3, #1
str r3, [sp, #8]
- beq .L2215
+ beq .L2213
movw r3, #3844
ldrh r3, [r7, r3]
cmp r5, r3, asl #3
- bne .L2228
-.L2215:
+ bne .L2226
+.L2213:
cmp r5, #0
- beq .L2228
- ldr sl, .L2233+4
+ beq .L2226
+ ldr sl, .L2231+4
mov r1, r5
mov r2, #0
ldr r0, [sl, #-984]
str r3, [sp, #48]
mov r3, #0
str r3, [sp, #24]
-.L2221:
+.L2219:
ldr r3, [sp, #24]
mov r5, #36
ldr r1, [sp, #12]
add r3, r3, r5
ldr r2, [r3, #16]
cmp r2, r1
- bne .L2217
+ bne .L2215
ldr r1, [r3, #8]
ldr r3, [sl, #-960]
cmp r1, r3
- bne .L2218
+ bne .L2216
ldr r3, [sp, #40]
mov r0, r8
ldr r2, [sp, #44]
add r1, r1, r3
- b .L2231
-.L2217:
+ b .L2229
+.L2215:
cmp r2, fp
- bne .L2218
+ bne .L2216
ldr r1, [r3, #8]
ldr r3, [sl, #-956]
cmp r1, r3
- bne .L2218
+ bne .L2216
movw r2, #3918
ldrh r0, [r7, r2]
ldr r2, [sp, #48]
mul r0, r0, fp
rsb r0, r4, r0
add r0, r8, r0, asl #9
-.L2231:
+.L2229:
bl memcpy
-.L2218:
+.L2216:
ldr r3, [sl, #-984]
add r0, r3, r5
ldr r2, [r3, r5]
streq r1, [sl, #-1632]
ldr r3, [r3, r5]
cmp r3, #256
- bne .L2220
+ bne .L2218
ldr r0, [r0, #4]
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
bl FtlGcRefreshBlock
-.L2220:
+.L2218:
ldr r3, [sp, #24]
add r3, r3, #1
str r3, [sp, #24]
cmp r3, r6
- bne .L2221
+ bne .L2219
ldr r6, [sp, #52]
mov r5, #0
-.L2228:
+.L2226:
ldr r3, [sp, #8]
cmp r3, #0
- bne .L2222
- ldr r3, .L2233+8
- ldr r2, .L2233+4
+ bne .L2220
+ ldr r3, .L2231+8
+ ldr r2, .L2231+4
ldrh r3, [r2, r3]
cmp r3, #0
- beq .L2204
+ beq .L2202
ldr r0, [sp, #8]
mov r1, #1
bl rk_ftl_garbage_collect
-.L2204:
+.L2202:
ldr r0, [sp, #16]
add sp, sp, #68
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2234:
+.L2232:
.align 2
-.L2233:
+.L2231:
.word .LANCHOR0
.word .LANCHOR2
.word -1134
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
movw r2, #2214
- ldr r9, .L2245
+ ldr r9, .L2243
movw r3, #2212
- ldr r4, .L2245+4
+ ldr r4, .L2243+4
.pad #52
sub sp, sp, #52
mov r1, #0
add r3, r8, r7
uxth r3, r3
str r3, [sp, #4]
- b .L2237
-.L2243:
+ b .L2235
+.L2241:
ldr r5, [sp, #4]
sub r3, r8, #8
mul fp, r8, r4
- ldr sl, .L2245+4
- b .L2238
-.L2241:
+ ldr sl, .L2243+4
+ b .L2236
+.L2239:
add r2, fp, r5
mov r1, #1
add r0, sp, #12
ldr r2, [sp, #12]
ldr r3, [sp, #0]
cmn r2, #1
- beq .L2239
+ beq .L2237
ldr r2, [sl, #148]
ldrh r1, [r2, #0]
movw r2, #61664
cmp r1, r2
- bne .L2239
- ldr r0, .L2245+8
+ bne .L2237
+ ldr r0, .L2243+8
mov r1, r4
mov r2, r5
add r6, r6, #1
bl printk
- ldr r3, .L2245+4
+ ldr r3, .L2243+4
uxth r6, r6
add r3, r3, r4, asl #1
strh r5, [r3, #208] @ movhi
- b .L2240
-.L2239:
+ b .L2238
+.L2237:
sub r5, r5, #1
uxth r5, r5
-.L2238:
+.L2236:
cmp r5, r3
- bgt .L2241
-.L2240:
+ bgt .L2239
+.L2238:
ldrb r3, [r9, #3766] @ zero_extendqisi2
add r4, r4, #1
cmp r3, r6
uxtb r4, r4
moveq r7, #0
-.L2237:
+.L2235:
ldrb r3, [r9, #3766] @ zero_extendqisi2
cmp r3, r4
- bhi .L2243
+ bhi .L2241
mov r0, r7
add sp, sp, #52
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2246:
+.L2244:
.align 2
-.L2245:
+.L2243:
.word .LANCHOR0
.word .LANCHOR2
- .word .LC121
+ .word .LC120
.fnend
.size FlashLoadFactorBbt, .-FlashLoadFactorBbt
.align 2
.fnstart
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2257
+ ldr r3, .L2255
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
.save {r4, r5, r6, r7, r8, r9, sl, lr}
mov r6, r1
sub sp, sp, #40
ldr r3, [r3, #3780]
mov r4, r0
- ldr r7, .L2257+4
+ ldr r7, .L2255+4
mul r8, r8, r2
str r3, [sp, #12]
ldr r3, [r7, #148]
mul sl, r8, r6
uxth r5, r5
sub r8, r8, #16
- b .L2248
-.L2254:
+ b .L2246
+.L2252:
mov r1, #1
add r3, r5, sl
add r0, sp, #4
bl FlashReadPages
ldr r3, [sp, #4]
cmn r3, #1
- beq .L2249
+ beq .L2247
ldr r3, [r7, #148]
ldrh r2, [r3, #0]
movw r3, #61664
cmp r2, r3
- bne .L2249
+ bne .L2247
cmp r4, #0
moveq r0, r4
- beq .L2250
+ beq .L2248
cmp r6, #0
- beq .L2256
- b .L2252
-.L2253:
+ beq .L2254
+ b .L2250
+.L2251:
ldr r3, [r0, #3780]
ubfx r2, r6, #5, #16
and r5, r6, #31
uxth r6, r6
orr lr, lr, r1, asl r5
str lr, [r3, r2, asl #2]
- b .L2251
-.L2256:
- ldr ip, .L2257+4
+ b .L2249
+.L2254:
+ ldr ip, .L2255+4
mov r1, #1
- ldr r0, .L2257
-.L2251:
+ ldr r0, .L2255
+.L2249:
ldr r3, [ip, #132]
cmp r6, r3
- bcc .L2253
-.L2252:
- ldr r3, .L2257
+ bcc .L2251
+.L2250:
+ ldr r3, .L2255
mov r2, r9
mov r0, r4
ldr r1, [r3, #3780]
bl memcpy
mov r2, #4
- ldr r0, .L2257+8
+ ldr r0, .L2255+8
mov r1, r4
mov r3, r2
bl rknand_print_hex
mov r0, #0
- b .L2250
-.L2249:
+ b .L2248
+.L2247:
sub r5, r5, #1
uxth r5, r5
-.L2248:
+.L2246:
cmp r5, r8
- bgt .L2254
+ bgt .L2252
mvn r0, #0
-.L2250:
+.L2248:
add sp, sp, #40
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L2258:
+.L2256:
.align 2
-.L2257:
+.L2255:
.word .LANCHOR0
.word .LANCHOR2
- .word .LC122
+ .word .LC121
.fnend
.size FlashReadFacBbtData, .-FlashReadFacBbtData
.align 2
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2266
+ ldr r3, .L2264
stmfd sp!, {r4, r5, r6, r7, r8, lr}
.save {r4, r5, r6, r7, r8, lr}
mov r5, r0
ldr r3, [r3, #2776]
- ldr r6, .L2266+4
+ ldr r6, .L2264+4
ldrb r2, [r3, #13] @ zero_extendqisi2
ldrh r4, [r3, #14]
ldr r0, [r6, #116]
mov r2, r2, lsr #3
bl FlashReadFacBbtData
cmn r0, #1
- beq .L2265
+ beq .L2263
mov r2, #0
mov r0, r4, lsr #4
mov r3, r2
sub r4, r4, #1
mov r1, #1
- b .L2261
-.L2263:
+ b .L2259
+.L2261:
ldr ip, [r6, #116]
mov r8, r2, lsr #5
and r7, r2, #31
uxthne r3, r3
strneh r2, [r5, ip] @ movhi
cmp r3, r0
- bcs .L2265
+ bcs .L2263
add r2, r2, #1
uxth r2, r2
-.L2261:
+.L2259:
cmp r2, r4
- blt .L2263
- b .L2260
-.L2265:
+ blt .L2261
+ b .L2258
+.L2263:
mov r3, #0
-.L2260:
+.L2258:
mov r3, r3, asl #1
mvn r2, #0
mov r0, #0
strh r2, [r5, r3] @ movhi
ldmfd sp!, {r4, r5, r6, r7, r8, pc}
-.L2267:
+.L2265:
.align 2
-.L2266:
+.L2264:
.word .LANCHOR0
.word .LANCHOR2
.fnend
.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
bl FtlBbtMemInit
mov r5, #0
- ldr r7, .L2285
+ ldr r7, .L2283
bl FtlLoadFactoryBbt
- ldr r6, .L2285+4
+ ldr r6, .L2283+4
add sl, r7, #12
- ldr r4, .L2285+8
- b .L2269
-.L2275:
+ ldr r4, .L2283+8
+ b .L2267
+.L2273:
ldrh r3, [sl], #2
movw r2, #65535
ldr r0, [r4, #-2076]
cmp r3, r2
str r0, [r4, #176]
str r9, [r4, #180]
- beq .L2270
+ beq .L2268
ldrh r8, [r6, fp]
mov r1, #1
mov r2, r1
- ldr r0, .L2285+12
+ ldr r0, .L2283+12
mla r8, r8, r5, r3
mov r3, r8, asl #10
str r3, [r4, #172]
ldr r1, [r4, #176]
mov r2, r2, lsr #3
bl memcpy
- b .L2271
-.L2270:
+ b .L2269
+.L2268:
mov r1, r5
bl FlashGetBadBlockList
ldr r0, [r4, #176]
ldr r1, [r7, #28]
bl FtlBbt2Bitmap
ldrh fp, [r6, fp]
-.L2273:
+.L2271:
sub fp, fp, #1
uxth fp, fp
-.L2284:
+.L2282:
movw r8, #3908
ldrh r0, [r6, r8]
mla r0, r0, r5, fp
uxth r0, r0
bl FtlBbmIsBadBlock
cmp r0, #1
- beq .L2273
+ beq .L2271
mov r1, #0
mov r2, #16
strh fp, [sl, #-2] @ movhi
ldr r0, [r4, #-952]
bl ftl_memset
- ldr r3, .L2285+16
+ ldr r3, .L2283+16
strh r3, [r9, #0] @ movhi
mov r3, #0
str r3, [r9, #4]
mla r8, r8, r5, r3
mov r3, r8, asl #10
str r3, [r4, #172]
- ldr r3, .L2285+20
+ ldr r3, .L2283+20
ldrh r2, [r4, r3]
mov r2, r2, asl #2
bl memcpy
mov r1, #1
mov r2, r1
- ldr r0, .L2285+12
+ ldr r0, .L2283+12
bl FlashEraseBlocks
mov r1, #1
mov r3, r1
- ldr r0, .L2285+12
+ ldr r0, .L2283+12
mov r2, r1
bl FlashProgPages
ldr r3, [r4, #168]
cmn r3, #1
- bne .L2271
+ bne .L2269
uxth r0, r8
bl FtlBbmMapBadBlock
- b .L2284
-.L2271:
+ b .L2282
+.L2269:
uxth r0, r8
add r5, r5, #1
bl FtlBbmMapBadBlock
add r7, r7, #4
-.L2269:
+.L2267:
movw r3, #3866
ldrh r3, [r6, r3]
cmp r5, r3
- bcc .L2275
+ bcc .L2273
mov r4, #0
- ldr r7, .L2285+4
+ ldr r7, .L2283+4
movw r6, #3926
- b .L2276
-.L2277:
+ b .L2274
+.L2275:
mov r0, r4
add r4, r4, #1
bl FtlBbmMapBadBlock
uxth r4, r4
-.L2276:
+.L2274:
ldrh r3, [r7, r6]
- ldr r5, .L2285+4
+ ldr r5, .L2283+4
cmp r3, r4
- bhi .L2277
+ bhi .L2275
movw r7, #3992
movw r6, #3980
ldrh r4, [r5, r7]
sub r4, r4, #1
uxth r4, r4
- b .L2278
-.L2283:
+ b .L2276
+.L2281:
mov r0, r4
bl FtlBbmIsBadBlock
cmp r0, #1
- beq .L2279
+ beq .L2277
mov r0, r4
bl FlashTestBlk
cmp r0, #0
- beq .L2280
+ beq .L2278
mov r0, r4
bl FtlBbmMapBadBlock
- b .L2279
-.L2280:
+ b .L2277
+.L2278:
ldrh r2, [r5, r6]
movw r3, #65535
cmp r2, r3
streqh r4, [r5, r6] @ movhi
-.L2281:
- ldrne r2, .L2285+4
+.L2279:
+ ldrne r2, .L2283+4
movne r3, #3984
strneh r4, [r2, r3] @ movhi
- bne .L2282
-.L2279:
+ bne .L2280
+.L2277:
sub r4, r4, #1
uxth r4, r4
-.L2278:
+.L2276:
ldrh r3, [r5, r7]
sub r3, r3, #48
cmp r4, r3
- bgt .L2283
-.L2282:
- ldr r4, .L2285+4
+ bgt .L2281
+.L2280:
+ ldr r4, .L2283+4
movw r7, #3980
- ldr r3, .L2285+8
+ ldr r3, .L2283+8
mov r6, #3984
mov r5, #0
movw r8, #3982
bl FtlBbmTblFlush
mov r0, r5
ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2286:
+.L2284:
.align 2
-.L2285:
+.L2283:
.word .LANCHOR0+3980
.word .LANCHOR0
.word .LANCHOR2
stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r2, #0
- ldr r3, .L2307
+ ldr r3, .L2305
str r2, [r3, #-1848]
str r2, [r3, #-1844]
- ldr r3, .L2307+4
+ ldr r3, .L2305+4
ldr r0, [r3, #3848]
uxth r0, r0
bl FtlFreeSysBlkQueueInit
bl FtlLoadBbt
cmp r0, #0
- beq .L2288
+ beq .L2286
bl FtlMakeBbt
-.L2288:
+.L2286:
mov r3, #0
- ldr ip, .L2307+4
+ ldr ip, .L2305+4
movw r0, #3918
- ldr r2, .L2307
- ldr r1, .L2307+8
- b .L2289
-.L2290:
+ ldr r2, .L2305
+ ldr r1, .L2305+8
+ b .L2287
+.L2288:
ldr lr, [r2, #-960]
mvn r4, r3
orr r4, r3, r4, asl #16
str r1, [lr, r3, asl #2]
add r3, r3, #1
uxth r3, r3
-.L2289:
+.L2287:
ldrh lr, [ip, r0]
- ldr r8, .L2307+4
+ ldr r8, .L2305+4
cmp r3, lr, asl #7
- blt .L2290
+ blt .L2288
movw r3, #3852
mov r5, #0
ldrh r6, [r8, r3]
movw r7, #3854
- b .L2291
-.L2292:
+ b .L2289
+.L2290:
mov r0, r6
mov r1, #1
bl FtlLowFormatEraseBlock
uxth r6, r6
add r5, r5, r0
uxth r5, r5
-.L2291:
+.L2289:
ldrh r3, [r8, r7]
- ldr r4, .L2307+4
+ ldr r4, .L2305+4
cmp r3, r6
- bhi .L2292
+ bhi .L2290
movw r3, #3844
ldrh r1, [r4, r3]
sub r3, r5, #3
cmp r3, r1, asl #1
- bge .L2293
-.L2297:
+ bge .L2291
+.L2295:
mov r4, #0
- ldr r8, .L2307+4
+ ldr r8, .L2305+4
mov r6, r4
movw r7, #3852
- b .L2294
-.L2293:
+ b .L2292
+.L2291:
mov r0, r5
movw r6, #3854
bl __aeabi_uidiv
bl FtlFreeSysBlkQueueInit
movw r3, #3852
ldrh r5, [r4, r3]
- b .L2295
-.L2296:
+ b .L2293
+.L2294:
mov r0, r5
mov r1, #1
bl FtlLowFormatEraseBlock
add r5, r5, #1
uxth r5, r5
-.L2295:
+.L2293:
ldrh r3, [r4, r6]
cmp r3, r5
- bhi .L2296
- b .L2297
-.L2298:
+ bhi .L2294
+ b .L2295
+.L2296:
mov r0, r6
mov r1, #0
bl FtlLowFormatEraseBlock
uxth r6, r6
add r4, r4, r0
uxth r4, r4
-.L2294:
+.L2292:
ldrh r3, [r8, r7]
- ldr r5, .L2307+4
+ ldr r5, .L2305+4
cmp r3, r6
- bhi .L2298
+ bhi .L2296
movw r3, #3854
ldr fp, [r5, #3856]
ldrh r3, [r5, r3]
- ldr r9, .L2307
+ ldr r9, .L2305
mov r0, fp
- ldr sl, .L2307+12
+ ldr sl, .L2305+12
str r3, [r5, #3976]
movw r3, #3844
ldrh r6, [r5, r3]
str r0, [r5, #3972]
mul r3, r3, r6
cmp r4, r3
- ble .L2299
+ ble .L2297
rsb r0, r4, fp
mov r1, r6
bl __aeabi_uidiv
mov r0, r0, lsr #5
add r0, r0, #24
strh r0, [r9, sl] @ movhi
-.L2299:
- ldr r5, .L2307
+.L2297:
+ ldr r5, .L2305
ldr r3, [r5, #-1884]
cmp r3, #1
- bne .L2300
+ bne .L2298
mov r0, r4
mov r1, r6
bl __aeabi_uidiv
- ldr sl, .L2307+12
+ ldr sl, .L2305+12
ldrh r9, [r5, sl]
uxtah r0, r9, r0
add r9, r9, r0, lsr #2
strh r9, [r5, sl] @ movhi
-.L2300:
- ldr r0, .L2307+4
+.L2298:
+ ldr r0, .L2305+4
mov r3, #3904
ldrh r3, [r0, r3]
cmp r3, #0
- beq .L2301
- ldr r1, .L2307
- ldr r2, .L2307+12
+ beq .L2299
+ ldr r1, .L2305
+ ldr r2, .L2305+12
ldrh ip, [r1, r2]
add ip, ip, r3, lsr #1
strh ip, [r1, r2] @ movhi
addgt r3, r3, #32
addgt r8, r8, r3
strgth r8, [r1, r2] @ movhi
-.L2301:
- ldr r4, .L2307
- ldr r5, .L2307+4
- ldr r3, .L2307+12
- ldr r7, .L2307+16
+.L2299:
+ ldr r4, .L2305
+ ldr r5, .L2305+4
+ ldr r3, .L2305+12
+ ldr r7, .L2305+16
ldr r2, [r5, #3972]
ldrh r3, [r4, r3]
rsb r3, r3, r2
ldr r0, [r4, #-2064]
mov r2, r2, asl #1
bl ftl_memset
- ldr r1, .L2307+20
+ ldr r1, .L2305+20
mov r3, #0
- ldr r2, .L2307+24
+ ldr r2, .L2305+24
str r3, [r4, #-1892]
strh r3, [r4, r1] @ movhi
sub r1, r1, #288
ldr r0, [r4, #-1888]
mov r2, r2, lsr #3
bl ftl_memset
-.L2302:
- ldr r0, .L2307+28
+.L2300:
+ ldr r0, .L2305+28
bl make_superblock
ldrb r3, [r4, #-2037] @ zero_extendqisi2
- ldr r5, .L2307
+ ldr r5, .L2305
cmp r3, #0
- ldr r3, .L2307+16
- bne .L2303
+ ldr r3, .L2305+16
+ bne .L2301
ldrh r3, [r4, r7]
ldr r2, [r4, #-2064]
mov r3, r3, asl #1
ldrh r3, [r4, r7]
add r3, r3, #1
strh r3, [r4, r7] @ movhi
- b .L2302
-.L2303:
+ b .L2300
+.L2301:
ldr r2, [r5, #-1848]
mvn r7, #0
ldr r1, [r5, #-2064]
- ldr r6, .L2307+32
+ ldr r6, .L2305+32
str r2, [r5, #-2032]
add r2, r2, #1
str r2, [r5, #-1848]
- ldr r2, .L2307+36
+ ldr r2, .L2305+36
ldrh r0, [r5, r2]
ldrh r2, [r5, r3]
mov r2, r2, asl #1
strh r0, [r1, r2] @ movhi
mov r2, #0
- ldr r0, .L2307+40
+ ldr r0, .L2305+40
ldrh r3, [r5, r3]
strb r2, [r5, #-1990]
add r3, r3, #1
strh r3, [r5, r6] @ movhi
mov r3, #1
strb r3, [r5, #-1988]
-.L2304:
- ldr r0, .L2307+44
+.L2302:
+ ldr r0, .L2305+44
bl make_superblock
ldrb r3, [r5, #-1989] @ zero_extendqisi2
- ldr r4, .L2307
+ ldr r4, .L2305
cmp r3, #0
- bne .L2305
+ bne .L2303
ldrh r3, [r5, r6]
ldr r2, [r5, #-2064]
mov r3, r3, asl #1
ldrh r3, [r5, r6]
add r3, r3, #1
strh r3, [r5, r6] @ movhi
- b .L2304
-.L2305:
+ b .L2302
+.L2303:
ldr r3, [r4, #-1848]
mvn r5, #0
ldr r2, [r4, #-2064]
str r3, [r4, #-1984]
add r3, r3, #1
str r3, [r4, #-1848]
- ldr r3, .L2307+48
+ ldr r3, .L2305+48
ldrh r1, [r4, r3]
sub r3, r3, #4
ldrh r3, [r4, r3]
mov r3, r3, asl #1
strh r1, [r2, r3] @ movhi
- ldr r3, .L2307+52
+ ldr r3, .L2305+52
strh r5, [r4, r3] @ movhi
bl FtlFreeSysBlkQueueOut
- ldr r3, .L2307+56
+ ldr r3, .L2305+56
mov r2, #0
strh r0, [r4, r3] @ movhi
add r3, r3, #2
bl FtlSysBlkInit
cmp r0, #0
mov r0, #0
- ldreq r3, .L2307+60
+ ldreq r3, .L2305+60
moveq r2, #1
streq r2, [r3, #2960]
ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2308:
+.L2306:
.align 2
-.L2307:
+.L2305:
.word .LANCHOR2
.word .LANCHOR0
.word 168778952
@ frame_needed = 0, uses_anonymous_args = 0
stmfd sp!, {r0, r1, r2, r3, r4, lr}
.save {r0, r1, r2, r3, r4, lr}
- ldr r4, .L2333
+ ldr r4, .L2331
ldr r0, [r4, #112]
bl FlashInit
cmp r0, #0
movne r0, #0
- bne .L2310
+ bne .L2308
bl FlashLoadFactorBbt
cmp r0, #0
- beq .L2311
+ beq .L2309
bl FlashMakeFactorBbt
-.L2311:
+.L2309:
ldr r0, [r4, #116]
bl FlashReadIdbDataRaw
cmp r0, #0
- beq .L2312
+ beq .L2310
mov r1, #0
mov r2, #16
mov r0, sp
mov r3, #0
mov r0, #1
mov r2, r3
-.L2314:
+.L2312:
ands ip, r1, r0, asl r2
add r2, r2, #1
addne r3, r3, #1
cmp r2, #16
- bne .L2314
+ bne .L2312
cmp r3, #6
- ldrls r3, .L2333+4
- bls .L2329
+ ldrls r3, .L2331+4
+ bls .L2327
mov r2, #0
mov r0, #1
-.L2315:
+.L2313:
ands ip, r1, r0, asl r2
add r2, r2, #1
addne r3, r3, #1
cmp r2, #24
- bne .L2315
+ bne .L2313
cmp r3, #17
- ldr r3, .L2333+4
+ ldr r3, .L2331+4
movhi r2, #36
-.L2329:
+.L2327:
strb r2, [r3, #1]
movw r2, #2226
- ldr r3, .L2333+4
+ ldr r3, .L2331+4
ldrb r1, [r3, #1] @ zero_extendqisi2
strh r1, [r3, r2] @ movhi
-.L2312:
- ldr r1, .L2333+8
+.L2310:
+ ldr r1, .L2331+8
mov r4, #1
- ldr r0, .L2333+12
+ ldr r0, .L2331+12
bl printk
- ldr r0, .L2333+16
+ ldr r0, .L2331+16
bl FtlConstantsInit
bl FtlVariablesInit
- ldr r3, .L2333+4
+ ldr r3, .L2331+4
ldr r0, [r3, #3848]
uxth r0, r0
bl FtlFreeSysBlkQueueInit
- b .L2319
-.L2321:
- add r4, r4, #1
+ b .L2317
.L2319:
+ add r4, r4, #1
+.L2317:
bl FtlLoadBbt
cmp r0, #0
- bne .L2331
-.L2320:
+ bne .L2329
+.L2318:
bl FtlSysBlkInit
cmp r0, #0
- beq .L2322
-.L2331:
+ beq .L2320
+.L2329:
bl FtlLowFormat
cmp r4, #3
- bls .L2321
- b .L2332
-.L2322:
- ldr r3, .L2333+20
+ bls .L2319
+ b .L2330
+.L2320:
+ ldr r3, .L2331+20
mov r2, #1
str r2, [r3, #2960]
- b .L2310
-.L2332:
+ b .L2308
+.L2330:
mvn r0, #0
-.L2310:
+.L2308:
add sp, sp, #16
ldmfd sp!, {r4, pc}
-.L2334:
+.L2332:
.align 2
-.L2333:
+.L2331:
.word .LANCHOR2
.word .LANCHOR0
- .word .LC76
.word .LC75
+ .word .LC74
.word .LANCHOR0+2200
.word .LANCHOR1
.fnend
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L2337
+ ldr r3, .L2335
ldr r2, [r3, #3788]
- ldr r3, .L2337+4
+ ldr r3, .L2335+4
cmp r2, r3
bxne lr
b flash_enter_slc_mode
-.L2338:
+.L2336:
.align 2
-.L2337:
+.L2335:
.word .LANCHOR0
.word 1446522928
.fnend
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L2341
+ ldr r3, .L2339
ldr r2, [r3, #3788]
- ldr r3, .L2341+4
+ ldr r3, .L2339+4
cmp r2, r3
bxne lr
b flash_exit_slc_mode
-.L2342:
+.L2340:
.align 2
-.L2341:
+.L2339:
.word .LANCHOR0
.word 1446522928
.fnend
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.pad #28
sub sp, sp, #28
- ldr r4, .L2348
+ ldr r4, .L2346
mov r6, r0
str r2, [sp, #20]
mov sl, r1
- ldr r0, .L2348+4
+ ldr r0, .L2346+4
mov r1, r6
ldr r2, [r4, #2776]
ldr r3, [r4, #4]
- ldr r8, .L2348+8
+ ldr r8, .L2346+8
ldrb r5, [r2, #9] @ zero_extendqisi2
mov r2, sl
mul r5, r5, r3
mov r7, r1
str ip, [sp, #12]
ubfx r2, r2, #2, #2
- b .L2344
-.L2346:
+ b .L2342
+.L2344:
add r1, r5, r7
rsb r3, r2, #4
ubfx r1, r1, #2, #16
add r3, r3, #2224
add r3, r3, #4
ldrh r3, [r3, #0]
- beq .L2345
+ beq .L2343
ldr r0, [r4, #3788]
- ldr ip, .L2348+12
+ ldr ip, .L2346+12
cmp r0, ip
moveq r3, r1
-.L2345:
+.L2343:
ldr ip, [sp, #12]
ldrb r0, [r8, #128] @ zero_extendqisi2
add r2, r2, ip
mov r2, #0
add r5, ip, r5
uxth r5, r5
-.L2344:
+.L2342:
cmp r5, sl
- bcc .L2346
+ bcc .L2344
mov r1, r6
mov r2, sl
mov r3, #0
- ldr r0, .L2348+16
+ ldr r0, .L2346+16
bl printk
mov r0, #0
add sp, sp, #28
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2349:
+.L2347:
.align 2
-.L2348:
+.L2346:
.word .LANCHOR0
- .word .LC123
+ .word .LC122
.word .LANCHOR2
.word 1446522928
- .word .LC124
+ .word .LC123
.fnend
.size IdBlockReadData, .-IdBlockReadData
.align 2
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.pad #92
sub sp, sp, #92
- ldr r4, .L2357
+ ldr r4, .L2355
mov r5, r0
str r2, [sp, #20]
mov r8, r1
- ldr r0, .L2357+4
+ ldr r0, .L2355+4
mov r1, r5
ldr r2, [r4, #2776]
mov r7, r5
ldr r3, [r4, #4]
- ldr fp, .L2357+8
+ ldr fp, .L2355+8
ldrb r6, [r2, #9] @ zero_extendqisi2
mov r2, r8
mul r6, r6, r3
mov r9, r1
rsb r1, r1, r5
str r1, [sp, #16]
- b .L2351
-.L2355:
+ b .L2349
+.L2353:
add r3, r6, r9
ubfx r3, r3, #2, #16
cmp r3, #0
- beq .L2352
+ beq .L2350
add r1, r3, #1
ldrb r0, [r4, #80] @ zero_extendqisi2
add r2, r4, r1, asl #1
add r2, r2, #2224
add r2, r2, #4
ldrh r2, [r2, #0]
- beq .L2353
+ beq .L2351
ldr r0, [r4, #3788]
cmp r0, fp
uxtheq r2, r1
-.L2353:
+.L2351:
sub r2, r2, #1
mov r2, r2, asl #2
str r2, [sp, #24]
mov r2, #0
str r2, [sp, #28]
-.L2352:
+.L2350:
add r2, r4, r3, asl #1
add r2, r2, #2224
ldrh r5, [r2, #4]
ldrb r2, [r4, #80] @ zero_extendqisi2
cmp r2, #0
- beq .L2354
+ beq .L2352
ldr r2, [r4, #3788]
cmp r2, fp
moveq r5, r3
-.L2354:
+.L2352:
ldr r2, [sp, #16]
ldr r1, [sp, #20]
ldrb ip, [r4, #3836] @ zero_extendqisi2
mla r3, sl, r5, r2
add r2, r1, r6, asl #9
- ldr r1, .L2357+12
+ ldr r1, .L2355+12
add r6, r6, #4
uxth r6, r6
ldrb r0, [r1, #128] @ zero_extendqisi2
mov r1, r0
mov r0, #0
bl FlashPageProgMsbFFData
-.L2351:
+.L2349:
cmp r6, r8
- bcc .L2355
+ bcc .L2353
mov r1, r7
mov r2, r8
mov r3, #0
- ldr r0, .L2357+16
+ ldr r0, .L2355+16
bl printk
mov r5, r7
mov r0, #0
add sp, sp, #92
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2358:
+.L2356:
.align 2
-.L2357:
+.L2355:
.word .LANCHOR0
- .word .LC125
+ .word .LC124
.word 1446522928
.word .LANCHOR2
- .word .LC126
+ .word .LC125
.fnend
.size IDBlockWriteData, .-IDBlockWriteData
.align 2
.fnstart
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2372
+ ldr r3, .L2370
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
mov r7, r2
bl kmalloc_order_trace
subs r5, r0, #0
mvneq r0, #0
- beq .L2360
+ beq .L2358
add sl, r6, #508
add sl, sl, #3
mov sl, sl, lsr #9
cmp sl, #255
- bhi .L2361
+ bhi .L2359
add r0, r4, sl, asl #9
mov r1, r4
rsb r2, sl, #256
bl memcpy
-.L2361:
- ldr r8, .L2372
+.L2359:
+ ldr r8, .L2370
mov r3, #5
- ldr r0, .L2372+4
+ ldr r0, .L2370+4
mov r1, r7
mov r2, #4
add sl, sl, #128
ldr r1, [r4, #512]
cmp sl, #256
movcs sl, #256
- ldr r0, .L2372+8
+ ldr r0, .L2370+8
mov fp, #0
bl printk
ldrb r3, [r8, #1] @ zero_extendqisi2
ldr r2, [r4, #512]
mov r1, sl
- ldr r0, .L2372+12
+ ldr r0, .L2370+12
mov r9, fp
cmp r2, r3
mov r8, r4
bl printk
mov r1, sl, asl #7
str r1, [sp, #12]
-.L2367:
- ldr r1, .L2372
+.L2365:
+ ldr r1, .L2370
movw r2, #2226
ldr r3, [r6], #4
ldrh r2, [r1, r2]
cmp r3, r2
- bcs .L2363
- ldr r2, .L2372+16
+ bcs .L2361
+ ldr r2, .L2370+16
ldr r2, [r2, #132]
cmp r3, r2
- bcc .L2363
+ bcc .L2361
mov r0, r5
mov r1, #512
bl __memzero
bl IdBlockReadData
mov r3, #0
mov r7, r3
-.L2366:
+.L2364:
ldr r1, [r5, r3]
add r3, r3, #4
add r2, r8, r3
ldr r2, [r2, #-4]
cmp r1, r2
- beq .L2364
+ beq .L2362
bic r4, r7, #255
stmia sp, {r1, r2}
mov r3, r7
mov r1, r9
ldr r2, [r6, #-4]
mov r4, r4, asl #2
- ldr r0, .L2372+20
+ ldr r0, .L2370+20
bl printk
- ldr r0, .L2372+24
+ ldr r0, .L2370+24
add r1, r8, r4
mov r2, #4
mov r3, #256
bl rknand_print_hex
mov r3, #256
mov r2, #4
- ldr r0, .L2372+28
+ ldr r0, .L2370+28
add r1, r5, r4
bl rknand_print_hex
mov r0, r5
mul r0, r0, r1
mov r1, #4
bl IDBlockWriteData
- ldr r0, .L2372+32
+ ldr r0, .L2370+32
bl printk
ldr r2, [sp, #12]
cmp r7, r2
- bcc .L2363
- b .L2365
-.L2364:
+ bcc .L2361
+ b .L2363
+.L2362:
ldr r1, [sp, #12]
add r7, r7, #1
cmp r7, r1
- bne .L2366
-.L2365:
- add fp, fp, #1
+ bne .L2364
.L2363:
+ add fp, fp, #1
+.L2361:
add r9, r9, #1
cmp r9, #5
- bne .L2367
+ bne .L2365
mov r0, r5
bl kfree
cmp fp, #0
mvneq r0, #0
movne r0, #0
-.L2360:
+.L2358:
add sp, sp, #20
ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2373:
+.L2371:
.align 2
-.L2372:
+.L2370:
.word .LANCHOR0
+ .word .LC126
.word .LC127
.word .LC128
- .word .LC129
.word .LANCHOR2
+ .word .LC129
.word .LC130
.word .LC131
.word .LC132
- .word .LC133
.fnend
.size write_idblock, .-write_idblock
.align 2
stmfd sp!, {r4, lr}
.save {r4, lr}
mov r2, r0
- ldr ip, .L2377
- b .L2375
-.L2376:
+ ldr ip, .L2375
+ b .L2373
+.L2374:
ldrb r4, [r3, r2] @ zero_extendqisi2
add r2, r2, #1
eor r4, r4, r0, lsr #24
add r4, ip, r4, asl #2
ldr r4, [r4, #3008]
eor r0, r4, r0, asl #8
-.L2375:
+.L2373:
cmp r2, r1
- bne .L2376
+ bne .L2374
ldmfd sp!, {r4, pc}
-.L2378:
+.L2376:
.align 2
-.L2377:
+.L2375:
.word .LANCHOR1
.fnend
.size CRC_32, .-CRC_32
.type rknand_sys_storage_ioctl, %function
rknand_sys_storage_ioctl:
.fnstart
- @ args = 0, pretend = 0, frame = 520
+ @ args = 0, pretend = 0, frame = 528
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2488
+ ldr r3, .L2493
stmfd sp!, {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
cmp r1, r3
- .pad #520
- sub sp, sp, #520
- mov r6, r1
- mov r5, r2
- ldr r4, [r0, #124]
- beq .L2388
- bhi .L2397
- ldr r3, .L2488+4
+ .pad #528
+ sub sp, sp, #528
+ mov r5, r1
+ mov r4, r2
+ beq .L2386
+ bhi .L2395
+ ldr r3, .L2493+4
cmp r1, r3
- beq .L2385
- bhi .L2398
+ beq .L2383
+ bhi .L2396
sub r3, r3, #125
cmp r1, r3
- beq .L2382
- bhi .L2399
+ beq .L2380
+ bhi .L2397
sub r3, r3, #237
cmp r1, r3
- bne .L2431
- b .L2484
-.L2399:
- ldr r3, .L2488+8
+ bne .L2438
+ b .L2489
+.L2397:
+ ldr r3, .L2493+8
cmp r1, r3
- beq .L2383
+ beq .L2381
add r3, r3, #1
cmp r1, r3
- bne .L2431
- b .L2485
-.L2398:
- ldr r3, .L2488+12
+ bne .L2438
+ b .L2490
+.L2396:
+ ldr r3, .L2493+12
cmp r1, r3
- beq .L2387
- bhi .L2400
- ldr r3, .L2488+16
+ beq .L2385
+ bhi .L2398
+ ldr r3, .L2493+16
cmp r1, r3
- bne .L2431
- b .L2486
-.L2400:
- ldr r3, .L2488+20
+ bne .L2438
+ b .L2491
+.L2398:
+ ldr r3, .L2493+20
cmp r1, r3
- beq .L2387
+ beq .L2385
add r3, r3, #10
cmp r1, r3
- bne .L2431
- b .L2387
-.L2397:
- ldr r3, .L2488+24
+ bne .L2438
+ b .L2385
+.L2395:
+ ldr r3, .L2493+24
cmp r1, r3
- beq .L2393
- bhi .L2401
+ beq .L2391
+ bhi .L2399
sub r3, r3, #78
cmp r1, r3
- beq .L2390
- bcc .L2389
+ beq .L2388
+ bcc .L2387
add r3, r3, #21
cmp r1, r3
- beq .L2391
+ beq .L2389
add r3, r3, #56
cmp r1, r3
- bne .L2431
- b .L2487
-.L2401:
- ldr r3, .L2488+28
+ bne .L2438
+ b .L2492
+.L2399:
+ ldr r3, .L2493+28
cmp r1, r3
- beq .L2396
- bhi .L2402
+ beq .L2394
+ bhi .L2400
sub r3, r3, #956
sub r3, r3, #1
cmp r1, r3
- beq .L2394
+ beq .L2392
add r3, r3, #956
cmp r1, r3
- bne .L2431
- b .L2395
-.L2402:
- ldr r3, .L2488+32
+ bne .L2438
+ b .L2393
+.L2400:
+ ldr r3, .L2493+32
cmp r1, r3
- beq .L2395
+ beq .L2393
add r3, r3, #1
cmp r1, r3
- bne .L2431
- b .L2396
-.L2389:
- ldr r0, .L2488+36
+ bne .L2438
+ b .L2394
+.L2387:
+ ldr r0, .L2493+36
bl printk
- mov r0, r4
- mov r1, r5
+ ldr r3, .L2493+40
+ mov r1, #208
+ mov r2, #4096
+ ldr r0, [r3, #48]
+ bl kmem_cache_alloc_trace
+ subs r5, r0, #0
+ beq .L2446
+ mov r1, r4
mov r2, #512
bl rk_copy_from_user
cmp r0, #0
- bne .L2477
-.L2403:
- ldr r0, .L2488+40
- ldmia r4, {r1, r2}
+ bne .L2488
+.L2401:
+ ldr r0, .L2493+44
+ ldmia r5, {r1, r2}
bl printk
- ldr r6, [r4, #4]
- cmp r6, #8
- bhi .L2470
+ ldr r3, [r5, #4]
+ cmp r3, #8
+ str r3, [sp, #4]
+ bhi .L2409
bl rknand_device_unlock
- mov r2, r4
- mov r1, r6
- ldr r0, [r4, #0]
+ ldr r1, [sp, #4]
+ mov r2, r5
+ ldr r0, [r5, #0]
bl IdBlockReadData
bl rknand_device_unlock
- mov r1, r4
- mov r0, r5
- mov r2, r6, asl #9
- bl rk_copy_to_user
- subs r4, r0, #0
- ldrne r0, .L2488+44
- beq .L2404
- b .L2479
-.L2390:
- ldr r0, .L2488+48
- bl printk
+ ldr r2, [sp, #4]
mov r0, r4
mov r1, r5
+ mov r2, r2, asl #9
+ bl rk_copy_to_user
+ cmp r0, #0
+ beq .L2474
+ ldr r0, .L2493+48
+.L2487:
+ bl printk
+ b .L2409
+.L2388:
+ ldr r0, .L2493+52
+ bl printk
+ ldr r3, .L2493+40
+ mov r1, #208
+ mov r2, #4096
+ ldr r0, [r3, #48]
+ bl kmem_cache_alloc_trace
+ subs r5, r0, #0
+ beq .L2446
+ mov r1, r4
mov r2, #4096
bl rk_copy_from_user
cmp r0, #0
- bne .L2477
+ bne .L2488
.L2405:
- ldr r5, .L2488+52
- ldr r0, .L2488+56
- ldmia r4, {r1, r2}
+ ldr r4, .L2493+56
+ ldr r0, .L2493+60
+ ldmia r5, {r1, r2}
bl printk
- ldr r3, [r5, #436]
+ ldr r3, [r4, #436]
cmp r3, #0
bne .L2406
mov r0, #260096
mov r2, #6
bl kmalloc_order_trace
cmp r0, #0
- str r0, [r5, #436]
- beq .L2470
+ str r0, [r4, #436]
+ beq .L2409
.L2406:
- ldr r2, [r4, #4]
+ ldr r2, [r5, #4]
movw r3, #4088
cmp r2, r3
- bhi .L2470
- ldr r3, [r4, #0]
+ bhi .L2409
+ ldr r3, [r5, #0]
cmp r3, #251904
- bhi .L2470
- ldr r1, .L2488+52
+ bhi .L2409
+ ldr r1, .L2493+56
ldr r0, [r1, #436]
- add r1, r4, #8
+ add r1, r5, #8
add r0, r0, r3
bl memcpy
- b .L2475
-.L2487:
- ldr r0, .L2488+60
+.L2474:
+ mov r0, r5
+ bl kfree
+.L2475:
+ mov r4, #0
+ b .L2404
+.L2492:
+ ldr r0, .L2493+64
bl printk
- mov r0, r4
- mov r1, r5
+ ldr r3, .L2493+40
+ mov r1, #208
+ mov r2, #4096
+ ldr r0, [r3, #48]
+ bl kmem_cache_alloc_trace
+ subs r5, r0, #0
+ beq .L2446
+ mov r1, r4
mov r2, #28
bl rk_copy_from_user
cmp r0, #0
- bne .L2477
-.L2407:
- ldmia r4, {r1, r2}
- ldr r0, .L2488+64
+ beq .L2408
+.L2488:
+ ldr r0, .L2493+68
+ b .L2487
+.L2408:
+ ldmia r5, {r1, r2}
+ ldr r0, .L2493+72
bl printk
- ldr r1, [r4, #0]
+ ldr r1, [r5, #0]
cmp r1, #256000
- bhi .L2470
- ldr r5, .L2488+52
- ldr r0, [r5, #436]
+ bhi .L2409
+ ldr r4, .L2493+56
+ ldr r0, [r4, #436]
cmp r0, #0
- beq .L2470
+ beq .L2409
+.L2410:
bl CRC_32
- ldr r3, [r4, #4]
+ ldr r3, [r5, #4]
cmp r3, r0
- bne .L2450
+ beq .L2411
+ mov r0, r5
+ bl kfree
+ b .L2452
+.L2411:
bl rknand_device_unlock
- add r2, r4, #8
- ldr r1, [r5, #436]
- ldr r0, [r4, #0]
- mov r4, #0
+ ldr r1, [r4, #436]
+ add r2, r5, #8
+ ldr r0, [r5, #0]
bl write_idblock
+ mov r6, #0
bl rknand_device_unlock
- ldr r0, [r5, #436]
+ ldr r0, [r4, #436]
+ bl kfree
+ str r6, [r4, #436]
+ mov r0, r5
+ mov r4, r6
bl kfree
- str r4, [r5, #436]
b .L2404
-.L2391:
- ldr r0, .L2488+68
+.L2409:
+ mov r0, r5
+ b .L2478
+.L2389:
+ ldr r0, .L2493+76
bl printk
- mov r0, r4
+ ldr r3, .L2493+40
+ mov r1, #208
+ mov r2, #4096
+ ldr r0, [r3, #48]
+ bl kmem_cache_alloc_trace
+ subs r5, r0, #0
+ beq .L2446
bl ReadFlashInfo
- mov r0, r5
- mov r1, r4
+ mov r0, r4
+ mov r1, r5
mov r2, #11
- b .L2480
-.L2388:
- ldr r0, .L2488+72
+ b .L2485
+.L2386:
+ ldr r0, .L2493+80
bl printk
bl rknand_device_unlock
bl FtlReInitForSDUpdata
mov r6, r0
bl rknand_device_unlock
cmp r6, #0
- bne .L2470
+ bne .L2469
bl nand_blk_add_whole_disk
+ ldr r3, .L2493+40
+ mov r1, #208
+ mov r2, #4096
+ ldr r0, [r3, #48]
+ bl kmem_cache_alloc_trace
+ subs r5, r0, #0
+ beq .L2446
bl rknand_device_unlock
mov r1, r6
mov r2, #64
- mov r0, r4
+ mov r0, r5
bl FlashReadFacBbtData
bl rknand_device_unlock
- ldr r0, .L2488+76
- mov r1, r4
+ ldr r0, .L2493+84
+ mov r1, r5
mov r2, #4
mov r3, #8
bl rknand_print_hex
- mov r0, r5
- mov r1, r4
+ mov r0, r4
+ mov r1, r5
mov r2, #64
- b .L2480
-.L2393:
- ldr r0, .L2488+80
+ b .L2485
+.L2391:
+ ldr r0, .L2493+88
bl printk
- ldr r3, .L2488+52
- mov r0, r5
- mov r1, r4
+ ldr r3, .L2493+56
+ add r1, sp, #528
+ mov r0, r4
mov r2, #4
ldr r3, [r3, #440]
ldr r3, [r3, #20]
- str r3, [r4, #0]
- b .L2480
-.L2394:
- ldr r0, .L2488+84
+ str r3, [r1, #-524]!
+ b .L2482
+.L2392:
+ ldr r0, .L2493+92
bl printk
+ ldr r3, .L2493+40
+ mov r1, #208
+ mov r2, #4096
+ ldr r0, [r3, #48]
+ bl kmem_cache_alloc_trace
+ subs r5, r0, #0
+ beq .L2446
bl rknand_device_unlock
mov r1, #264
mov r2, #2
- mov r3, r4
+ mov r3, r5
mov r0, #16
bl FtlRead
bl rknand_device_unlock
- mov r0, r5
- mov r1, r4
+ mov r0, r4
+ mov r1, r5
mov r2, #1024
- b .L2480
-.L2382:
- ldr r0, .L2488+88
+.L2485:
+ bl rk_copy_to_user
+ subs r4, r0, #0
+ mov r0, r5
+ beq .L2414
+.L2478:
+ bl kfree
+ b .L2469
+.L2414:
+ bl kfree
+ b .L2404
+.L2380:
+ ldr r0, .L2493+96
bl printk
- mov r0, sp
- mov r1, r5
+ add r0, sp, #8
+ mov r1, r4
mov r2, #520
bl rk_copy_from_user
- subs r4, r0, #0
- bne .L2477
-.L2408:
- ldr r2, [sp, #0]
- ldr r3, .L2488+92
+ subs r5, r0, #0
+ bne .L2479
+.L2415:
+ ldr r2, [sp, #8]
+ ldr r3, .L2493+100
cmp r2, r3
- bne .L2472
- ldr r3, [sp, #4]
+ bne .L2471
+ ldr r3, [sp, #12]
cmp r3, #512
- bhi .L2472
- ldr r6, .L2488+52
+ bhi .L2471
+ ldr r6, .L2493+56
mov r2, #512
- mov r0, sp
+ add r0, sp, #8
ldr r1, [r6, #440]
bl memcpy
ldr r2, [r6, #444]
- ldr r3, .L2488+96
+ ldr r3, .L2493+104
cmp r2, r3
- beq .L2409
- add r0, sp, #64
+ beq .L2416
+ add r0, sp, #72
mov r1, #128
- str r4, [sp, #8]
- str r4, [sp, #12]
+ str r5, [sp, #16]
+ str r5, [sp, #20]
bl __memzero
-.L2409:
- add r0, sp, #256
+.L2416:
+ add r0, sp, #264
mov r1, #256
mov r3, #0
- str r3, [sp, #16]
+ str r3, [sp, #24]
bl __memzero
- mov r0, r5
- mov r1, sp
- mov r2, #520
-.L2480:
- bl rk_copy_to_user
- b .L2478
-.L2383:
- ldr r0, .L2488+100
+ b .L2481
+.L2381:
+ ldr r0, .L2493+108
bl printk
- mov r0, sp
- mov r1, r5
+ add r0, sp, #8
+ mov r1, r4
mov r2, #520
bl rk_copy_from_user
cmp r0, #0
- ldrne r0, .L2488+104
bne .L2479
- ldr r2, [sp, #0]
- ldr r3, .L2488+92
+.L2417:
+ ldr r2, [sp, #8]
+ ldr r3, .L2493+100
cmp r2, r3
- bne .L2472
- ldr r3, [sp, #4]
+ bne .L2471
+ ldr r3, [sp, #12]
cmp r3, #512
- bhi .L2472
- ldr r4, .L2488+52
- ldr r3, .L2488+96
+ bhi .L2471
+ ldr r4, .L2493+56
+ ldr r3, .L2493+104
ldr r2, [r4, #444]
cmp r2, r3
- bne .L2450
- ldr r3, [sp, #12]
+ bne .L2452
+ ldr r3, [sp, #20]
sub r2, r3, #1
cmp r2, #127
mvnhi r4, #2
- bhi .L2380
+ bhi .L2378
ldr r0, [r4, #440]
- add r1, sp, #64
+ add r1, sp, #72
str r3, [r0, #12]
add r0, r0, #64
- ldr r2, [sp, #12]
+ ldr r2, [sp, #20]
bl memcpy
mov r0, #1
ldr r1, [r4, #440]
b .L2476
-.L2486:
- ldr r0, .L2488+108
+.L2491:
+ ldr r0, .L2493+112
bl printk
- mov r0, sp
- mov r1, r5
+ add r0, sp, #8
+ mov r1, r4
mov r2, #520
bl rk_copy_from_user
cmp r0, #0
- bne .L2477
-.L2411:
- ldr r2, [sp, #0]
- ldr r3, .L2488+112
+ bne .L2479
+.L2418:
+ ldr r2, [sp, #8]
+ ldr r3, .L2493+116
cmp r2, r3
- bne .L2472
- ldr r3, [sp, #4]
+ bne .L2471
+ ldr r3, [sp, #12]
cmp r3, #512
- bhi .L2472
- ldr r5, .L2488+52
+ bhi .L2471
+ ldr r5, .L2493+56
ldr r4, [r5, #448]
cmp r4, #0
- beq .L2380
+ beq .L2378
ldr r3, [r5, #452]
- ldr r2, .L2488+116
+ ldr r2, .L2493+120
ldr r1, [r3, #0]
cmp r1, r2
- beq .L2412
+ beq .L2419
str r2, [r3, #0]
mov r2, #504
ldr r3, [r5, #452]
mov r2, #0
str r2, [r3, #8]
str r2, [r3, #12]
-.L2412:
+.L2419:
ldr r1, [r5, #452]
mov r4, #0
mov r0, r4
str r4, [r1, #16]
bl StorageSysDataStore
ldr r3, [r5, #440]
- ldr r2, .L2488+92
- ldr r5, .L2488+52
+ ldr r2, .L2493+100
+ ldr r5, .L2493+56
ldr r1, [r3, #0]
cmp r1, r2
strne r2, [r3, #0]
ldr r0, [r5, #440]
mov r1, #128
- ldrne r3, .L2488+52
+ ldrne r3, .L2493+56
movne r2, #504
ldrne r3, [r3, #440]
stmneib r3, {r2, r4}
str r4, [r5, #448]
str r4, [r5, #444]
b .L2404
-.L2385:
- ldr r0, .L2488+120
+.L2383:
+ ldr r0, .L2493+124
bl printk
- mov r0, sp
- mov r1, r5
+ mov r1, r4
+ add r0, sp, #8
mov r2, #520
bl rk_copy_from_user
subs r4, r0, #0
- bne .L2477
-.L2414:
- ldr r2, [sp, #0]
- ldr r3, .L2488+124
+ bne .L2479
+.L2421:
+ ldr r2, [sp, #8]
+ ldr r3, .L2493+128
cmp r2, r3
- bne .L2472
- ldr r3, [sp, #4]
+ bne .L2471
+ ldr r3, [sp, #12]
cmp r3, #512
- bhi .L2472
- ldr r5, .L2488+52
+ bhi .L2471
+ ldr r5, .L2493+56
ldr r3, [r5, #448]
cmp r3, #1
- beq .L2380
+ beq .L2378
ldr r3, [r5, #452]
mov r0, #0
- ldr r2, .L2488+116
+ ldr r2, .L2493+120
ldr r1, [r3, #0]
cmp r1, r2
strne r2, [r3, #0]
str r3, [r1, #16]
bl StorageSysDataStore
ldr r3, [r5, #440]
- ldr r2, .L2488+92
+ ldr r2, .L2493+100
ldr r1, [r3, #0]
cmp r1, r2
- beq .L2416
+ beq .L2423
str r2, [r3, #0]
mov r1, #504
- ldr r3, .L2488+52
+ ldr r3, .L2493+56
mov r2, #0
ldr r3, [r3, #440]
stmib r3, {r1, r2}
-.L2416:
- ldr r5, .L2488+52
+.L2423:
+ ldr r5, .L2493+56
mov r1, #128
mov r4, #0
ldr r0, [r5, #440]
mov r3, #1
str r3, [r5, #448]
b .L2404
-.L2485:
- ldr r0, .L2488+128
+.L2490:
+ ldr r0, .L2493+132
bl printk
- mov r0, sp
- mov r1, r5
+ add r0, sp, #8
+ mov r1, r4
mov r2, #520
bl rk_copy_from_user
cmp r0, #0
- bne .L2477
-.L2417:
- ldr r2, [sp, #0]
- ldr r3, .L2488+132
+ bne .L2479
+.L2424:
+ ldr r2, [sp, #8]
+ ldr r3, .L2493+136
cmp r2, r3
- bne .L2472
- ldr r2, [sp, #4]
+ bne .L2471
+ ldr r2, [sp, #12]
cmp r2, #512
- addls r0, sp, #8
- ldrls r1, .L2488+136
- bls .L2483
- b .L2472
-.L2387:
- ldr r3, .L2488+20
- cmp r6, r3
- ldreq r0, .L2488+140
- beq .L2473
- ldr r3, .L2488+144
- cmp r6, r3
- ldreq r0, .L2488+148
- ldrne r0, .L2488+152
-.L2473:
+ addls r0, sp, #16
+ ldrls r1, .L2493+140
+ bls .L2480
+ b .L2471
+.L2385:
+ ldr r3, .L2493+20
+ cmp r5, r3
+ ldreq r0, .L2493+144
+ beq .L2472
+ ldr r3, .L2493+148
+ cmp r5, r3
+ ldreq r0, .L2493+152
+ ldrne r0, .L2493+156
+.L2472:
bl printk
- mov r0, sp
- mov r1, r5
+ add r0, sp, #8
+ mov r1, r4
mov r2, #520
bl rk_copy_from_user
cmp r0, #0
- bne .L2477
-.L2421:
- ldr r2, [sp, #0]
- ldr r3, .L2488+156
+ bne .L2479
+.L2428:
+ ldr r2, [sp, #8]
+ ldr r3, .L2493+160
cmp r2, r3
- bne .L2470
- ldr r3, .L2488+144
- ldr r4, .L2488+52
- cmp r6, r3
- bne .L2422
- ldr r3, [r4, #440]
- mov r2, sp
- ldr r3, [r3, #20]
- strb r3, [sp, #8]
- str r3, [sp, #4]
- bic r3, r2, #8128
- bic r3, r3, #63
- ldr r3, [r3, #8]
-@ 444 "/home/zyf/rk30/rk3288_android4.4/kernel/arch/arm/include/asm/uaccess.h" 1
- adds r2, r5, #16; sbcccs r2, r2, r3; movcc r3, #0
-@ 0 "" 2
- cmp r3, #0
- bne .L2470
- mov r0, r5
- mov r1, sp
+ bne .L2469
+ ldr r3, .L2493+148
+ ldr r6, .L2493+56
+ cmp r5, r3
+ bne .L2429
+ ldr r3, [r6, #440]
+ mov r0, r4
+ add r1, sp, #8
mov r2, #16
- bl __copy_to_user
+ ldr r3, [r3, #20]
+ str r3, [sp, #12]
+ strb r3, [sp, #16]
+ bl rk_copy_to_user
cmp r0, #0
moveq r4, r0
mvnne r4, #13
- b .L2380
-.L2422:
- ldr r3, [r4, #968]
+ b .L2378
+.L2429:
+ ldr r3, [r6, #968]
cmp r3, #10
- bhi .L2470
- ldr r3, [r4, #440]
- ldr r1, [sp, #4]
+ bhi .L2469
+ ldr r3, [r6, #440]
+ ldr r1, [sp, #12]
ldr r2, [r3, #24]
cmp r2, r1
- beq .L2423
+ beq .L2430
cmp r2, #0
- beq .L2423
- ldr r0, .L2488+160
+ beq .L2430
+ ldr r0, .L2493+164
bl printk
- ldr r3, [r4, #968]
+ ldr r3, [r6, #968]
add r3, r3, #1
- str r3, [r4, #968]
- b .L2470
-.L2423:
- ldr r0, .L2488+52
+ str r3, [r6, #968]
+ b .L2469
+.L2430:
+ ldr r0, .L2493+56
mov r2, #0
str r2, [r0, #968]
- ldr r0, .L2488+20
- cmp r6, r0
+ ldr r0, .L2493+20
+ cmp r5, r0
mov r0, #1
strne r1, [r3, #24]
mov r1, r3
mvneq r4, #1
movne r4, #0
b .L2404
-.L2395:
- ldr r0, .L2488+164
+.L2393:
+ ldr r0, .L2493+168
bl printk
- mov r0, sp
- mov r1, r5
+ add r0, sp, #8
+ mov r1, r4
mov r2, #520
bl rk_copy_from_user
cmp r0, #0
- bne .L2477
-.L2426:
- ldr r2, [sp, #0]
- ldr r3, .L2488+168
+ bne .L2479
+.L2433:
+ ldr r2, [sp, #8]
+ ldr r3, .L2493+172
cmp r2, r3
- bne .L2472
- ldr r2, [sp, #4]
+ bne .L2471
+ ldr r2, [sp, #12]
cmp r2, #504
- bhi .L2472
- ldr r3, .L2488+172
- add r0, sp, #8
- cmp r6, r3
- ldr r3, .L2488+52
+ bhi .L2471
+ ldr r3, .L2493+176
+ add r0, sp, #16
+ cmp r5, r3
+ ldr r3, .L2493+56
ldreq r1, [r3, #972]
ldrne r1, [r3, #976]
add r1, r1, #8
-.L2483:
+.L2480:
bl memcpy
- mov r2, sp
- bic r3, r2, #8128
- bic r3, r3, #63
- ldr r3, [r3, #8]
-@ 444 "/home/zyf/rk30/rk3288_android4.4/kernel/arch/arm/include/asm/uaccess.h" 1
- adds r2, r5, #520; sbcccs r2, r2, r3; movcc r3, #0
-@ 0 "" 2
- cmp r3, #0
- bne .L2470
- mov r0, r5
- mov r1, sp
+.L2481:
+ add r1, sp, #8
+ mov r0, r4
mov r2, #520
- bl __copy_to_user
-.L2478:
+.L2482:
+ bl rk_copy_to_user
subs r4, r0, #0
- bne .L2470
+ bne .L2469
b .L2404
-.L2396:
- ldr r0, .L2488+176
+.L2394:
+ ldr r0, .L2493+180
bl printk
- mov r0, sp
- mov r1, r5
+ add r0, sp, #8
+ mov r1, r4
mov r2, #520
bl rk_copy_from_user
cmp r0, #0
- beq .L2429
-.L2477:
- ldr r0, .L2488+180
+ beq .L2436
.L2479:
+ ldr r0, .L2493+68
bl printk
- b .L2470
-.L2429:
- ldr r2, [sp, #0]
- ldr r3, .L2488+168
+ b .L2469
+.L2436:
+ ldr r2, [sp, #8]
+ ldr r3, .L2493+172
cmp r2, r3
- bne .L2472
- ldr r2, [sp, #4]
+ bne .L2471
+ ldr r2, [sp, #12]
cmp r2, #504
- bhi .L2472
- ldr r3, .L2488+28
+ bhi .L2471
+ ldr r3, .L2493+28
add r2, r2, #8
- ldr r4, .L2488+52
- cmp r6, r3
- bne .L2430
- mov r1, sp
+ ldr r4, .L2493+56
+ cmp r5, r3
+ bne .L2437
+ add r1, sp, #8
ldr r0, [r4, #972]
bl memcpy
- mov r0, #2
ldr r1, [r4, #972]
- b .L2476
-.L2430:
- mov r1, sp
- ldr r0, [r4, #976]
- bl memcpy
- ldr r1, [r4, #976]
- mov r0, #3
+ mov r0, #2
.L2476:
bl StorageSysDataStore
mov r4, r0
b .L2404
-.L2484:
+.L2437:
+ add r1, sp, #8
+ ldr r0, [r4, #976]
+ bl memcpy
+ mov r0, #3
+ ldr r1, [r4, #976]
+ b .L2476
+.L2489:
bl rknand_dev_flush
-.L2475:
- mov r4, #0
- b .L2404
-.L2472:
+ b .L2475
+.L2471:
mvn r4, #0
.L2404:
mov r1, r4
- ldr r0, .L2488+184
+ ldr r0, .L2493+184
bl printk
- b .L2380
-.L2431:
+ b .L2378
+.L2438:
mvn r4, #21
- b .L2380
-.L2450:
+ b .L2378
+.L2446:
+ mvn r4, #11
+ b .L2378
+.L2452:
mvn r4, #1
- b .L2380
-.L2470:
+ b .L2378
+.L2469:
mvn r4, #13
-.L2380:
+.L2378:
mov r0, r4
- add sp, sp, #520
+ add sp, sp, #528
ldmfd sp!, {r4, r5, r6, pc}
-.L2489:
+.L2494:
.align 2
-.L2488:
+.L2493:
.word 1074033155
.word 1074029694
.word 1074029570
.word 1074033235
.word 1074034193
.word 1074034194
- .word .LC134
+ .word .LC133
+ .word kmalloc_caches
+ .word .LC135
.word .LC136
.word .LC137
- .word .LC138
.word .LANCHOR2
+ .word .LC138
.word .LC139
+ .word .LC134
.word .LC140
.word .LC141
.word .LC142
.word .LC144
.word .LC145
.word .LC146
- .word .LC147
.word 1263358532
.word -1067903959
+ .word .LC147
.word .LC148
- .word .LC149
- .word .LC150
.word 1112753220
.word 1146313043
- .word .LC151
+ .word .LC149
.word 1112755781
- .word .LC152
+ .word .LC150
.word 1094995539
.word .LANCHOR2+456
- .word .LC153
+ .word .LC151
.word 1074031676
+ .word .LC152
+ .word .LC153
+ .word 1280262987
.word .LC154
.word .LC155
- .word 1280262987
- .word .LC156
- .word .LC157
.word 1145980246
.word 1074034192
- .word .LC158
- .word .LC135
- .word .LC159
+ .word .LC156
+ .word .LC157
.fnend
.size rknand_sys_storage_ioctl, .-rknand_sys_storage_ioctl
.align 2
stmfd sp!, {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
mov r2, #512
- ldr r4, .L2493
+ ldr r4, .L2498
mov r6, #0
add r0, r4, #456
ldr r5, [r4, #416]
str r6, [r4, #444]
str r6, [r4, #968]
str r3, [r4, #448]
- beq .L2491
+ beq .L2496
mov r0, r5
mov r1, #508
bl JSHash
cmp r7, r0
- beq .L2491
+ beq .L2496
str r6, [r5, #16]
- ldr r0, .L2493+4
+ ldr r0, .L2498+4
str r6, [r4, #448]
bl printk
-.L2491:
+.L2496:
ldr r3, [r4, #448]
mov r0, #2
- ldr r4, .L2493
+ ldr r4, .L2498
cmp r3, #0
- ldrne r2, .L2493+8
- ldrne r3, .L2493
+ ldrne r2, .L2498+8
+ ldrne r3, .L2498
ldr r1, [r4, #972]
strne r2, [r3, #444]
bl StorageSysDataLoad
ldr r1, [r4, #976]
mov r0, #3
bl StorageSysDataLoad
- ldr r0, .L2493+12
+ ldr r0, .L2498+12
ldmfd sp!, {r3, r4, r5, r6, r7, lr}
b misc_register
-.L2494:
+.L2499:
.align 2
-.L2493:
+.L2498:
.word .LANCHOR2
- .word .LC160
+ .word .LC158
.word -1067903959
.word .LANCHOR1+4032
.fnend
@ frame_needed = 0, uses_anonymous_args = 0
stmfd sp!, {r3, lr}
.save {r3, lr}
- ldr r0, .L2496
+ ldr r0, .L2501
bl misc_deregister
mov r0, #0
ldmfd sp!, {r3, pc}
-.L2497:
+.L2502:
.align 2
-.L2496:
+.L2501:
.word .LANCHOR1+4032
.fnend
.size StorageSysDataDeInit, .-StorageSysDataDeInit
.global read_retry_cur_offset
.section .rodata
.set .LANCHOR3,. + 0
- .type __func__.14422, %object
- .size __func__.14422, 11
-__func__.14422:
+ .type __func__.14255, %object
+ .size __func__.14255, 11
+__func__.14255:
.ascii "FtlMemInit\000"
.LC0:
.byte 60
.byte 40
.byte 24
.byte 16
- .type __func__.15298, %object
- .size __func__.15298, 21
-__func__.15298:
+ .type __func__.15131, %object
+ .size __func__.15131, 21
+__func__.15131:
.ascii "FtlVpcCheckAndModify\000"
.section .rodata.str1.1,"aMS",%progbits,1
.LC1:
- .ascii "Context allocation failed\012\000"
+ .ascii "FlashEraseBlocks pageAddr error %x\012\000"
.LC2:
- .ascii "FlashEraseBlocks pageAddr error %x \012\000"
-.LC3:
.ascii "No.%d FLASH ID:%x %x %x %x %x %x\012\000"
-.LC4:
+.LC3:
.ascii "phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
.ascii "\000"
-.LC5:
+.LC4:
.ascii "FLASH INFO:\012\000"
-.LC6:
+.LC5:
.ascii "FLASH ID: %x\012\000"
-.LC7:
+.LC6:
.ascii "Device Capacity: %d MB\012\000"
-.LC8:
+.LC7:
.ascii "FMWAIT: %x %x %x %x\012\000"
-.LC9:
+.LC8:
.ascii "FTL INFO:\012\000"
-.LC10:
+.LC9:
.ascii "g_MaxLpn = 0x%x\012\000"
-.LC11:
+.LC10:
.ascii "g_VaildLpn = 0x%x\012\000"
-.LC12:
+.LC11:
.ascii "read_page_count = 0x%x\012\000"
-.LC13:
+.LC12:
.ascii "discard_page_count = 0x%x\012\000"
-.LC14:
+.LC13:
.ascii "write_page_count = 0x%x\012\000"
-.LC15:
+.LC14:
.ascii "cache_write_count = 0x%x\012\000"
-.LC16:
+.LC15:
.ascii "l2p_write_count = 0x%x\012\000"
-.LC17:
+.LC16:
.ascii "gc_page_count = 0x%x\012\000"
-.LC18:
+.LC17:
.ascii "totle_write = %d MB\012\000"
-.LC19:
+.LC18:
.ascii "totle_read = %d MB\012\000"
-.LC20:
+.LC19:
.ascii "GSV = 0x%x\012\000"
-.LC21:
+.LC20:
.ascii "GDV = 0x%x\012\000"
-.LC22:
+.LC21:
.ascii "bad blk num = %d %d\012\000"
-.LC23:
+.LC22:
.ascii "free_superblocks = 0x%x\012\000"
-.LC24:
+.LC23:
.ascii "mlc_EC = 0x%x\012\000"
-.LC25:
+.LC24:
.ascii "slc_EC = 0x%x\012\000"
-.LC26:
+.LC25:
.ascii "avg_EC = 0x%x\012\000"
-.LC27:
+.LC26:
.ascii "sys_EC = 0x%x\012\000"
-.LC28:
+.LC27:
.ascii "max_EC = 0x%x\012\000"
-.LC29:
+.LC28:
.ascii "min_EC = 0x%x\012\000"
-.LC30:
+.LC29:
.ascii "PLT = 0x%x\012\000"
-.LC31:
+.LC30:
.ascii "POT = 0x%x\012\000"
-.LC32:
+.LC31:
.ascii "MaxSector = 0x%x\012\000"
-.LC33:
+.LC32:
.ascii "init_sys_blks_pp = 0x%x\012\000"
-.LC34:
+.LC33:
.ascii "sys_blks_pp = 0x%x\012\000"
-.LC35:
+.LC34:
.ascii "free sysblock = 0x%x\012\000"
-.LC36:
+.LC35:
.ascii "data_blks_pp = 0x%x\012\000"
-.LC37:
+.LC36:
.ascii "data_op_blks_pp = 0x%x\012\000"
-.LC38:
+.LC37:
.ascii "max_data_blks = 0x%x\012\000"
-.LC39:
+.LC38:
.ascii "Sys.id = 0x%x\012\000"
-.LC40:
+.LC39:
.ascii "Bbt.id = 0x%x\012\000"
-.LC41:
+.LC40:
.ascii "ACT.page = 0x%x\012\000"
-.LC42:
+.LC41:
.ascii "ACT.plane = 0x%x\012\000"
-.LC43:
+.LC42:
.ascii "ACT.id = 0x%x\012\000"
-.LC44:
+.LC43:
.ascii "ACT.mode = 0x%x\012\000"
-.LC45:
+.LC44:
.ascii "ACT.a_pages = 0x%x\012\000"
-.LC46:
+.LC45:
.ascii "ACT VPC = 0x%x\012\000"
-.LC47:
+.LC46:
.ascii "BUF.page = 0x%x\012\000"
-.LC48:
+.LC47:
.ascii "BUF.plane = 0x%x\012\000"
-.LC49:
+.LC48:
.ascii "BUF.id = 0x%x\012\000"
-.LC50:
+.LC49:
.ascii "BUF.mode = 0x%x\012\000"
-.LC51:
+.LC50:
.ascii "BUF.a_pages = 0x%x\012\000"
-.LC52:
+.LC51:
.ascii "BUF VPC = 0x%x\012\000"
-.LC53:
+.LC52:
.ascii "TMP.page = 0x%x\012\000"
-.LC54:
+.LC53:
.ascii "TMP.plane = 0x%x\012\000"
-.LC55:
+.LC54:
.ascii "TMP.id = 0x%x\012\000"
-.LC56:
+.LC55:
.ascii "TMP.mode = 0x%x\012\000"
-.LC57:
+.LC56:
.ascii "TMP.a_pages = 0x%x\012\000"
-.LC58:
+.LC57:
.ascii "GC.page = 0x%x\012\000"
-.LC59:
+.LC58:
.ascii "GC.plane = 0x%x\012\000"
-.LC60:
+.LC59:
.ascii "GC.id = 0x%x\012\000"
-.LC61:
+.LC60:
.ascii "GC.mode = 0x%x\012\000"
-.LC62:
+.LC61:
.ascii "GC.a_pages = 0x%x\012\000"
-.LC63:
+.LC62:
.ascii "WR_CHK = 0x%x %x %x %x\012\000"
-.LC64:
+.LC63:
.ascii "Read Err Cnt = 0x%x\012\000"
-.LC65:
+.LC64:
.ascii "Prog Err Cnt = 0x%x\012\000"
-.LC66:
+.LC65:
.ascii "gc_free_blk_th= 0x%x\012\000"
-.LC67:
+.LC66:
.ascii "gc_merge_free_blk_th= 0x%x\012\000"
-.LC68:
+.LC67:
.ascii "gc_skip_write_count= 0x%x\012\000"
-.LC69:
+.LC68:
.ascii "gc_blk_index= 0x%x\012\000"
-.LC70:
+.LC69:
.ascii "free min EC= 0x%x\012\000"
-.LC71:
+.LC70:
.ascii "free max EC= 0x%x\012\000"
-.LC72:
+.LC71:
.ascii "GC__SB VPC = 0x%x\012\000"
-.LC73:
+.LC72:
.ascii "%d. [0x%x]=0x%x 0x%x 0x%x\012\000"
-.LC74:
+.LC73:
.ascii "free %d. [0x%x] 0x%x 0x%x\012\000"
-.LC75:
+.LC74:
.ascii "%s\012\000"
+.LC75:
+ .ascii "FTL version: 5.0.36 20170512\000"
.LC76:
- .ascii "FTL version: 5.0.36 20170316\000"
-.LC77:
.ascii "GetSwlReplaceBlock min_ec_id =%x %x\012\000"
-.LC78:
+.LC77:
.ascii "swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
.ascii "\012\000"
-.LC79:
+.LC78:
.ascii "FtlGcRefreshBlock 0x%x \012\000"
-.LC80:
+.LC79:
.ascii "FtlGcMarkBadPhyBlk %d 0x%x\012\000"
-.LC81:
+.LC80:
.ascii "%s error allocating memory. return -1\012\000"
-.LC82:
+.LC81:
.ascii "%s 0x%x:\000"
-.LC83:
+.LC82:
.ascii "%x \000"
-.LC84:
+.LC83:
.ascii "\000"
-.LC85:
+.LC84:
.ascii "%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\012"
.ascii "\000"
-.LC86:
+.LC85:
.ascii "nandc:\000"
-.LC87:
+.LC86:
.ascii "%d flReg.d32=%x %x\012\000"
-.LC88:
+.LC87:
.ascii "ECC:%d\012\000"
-.LC89:
+.LC88:
.ascii "sdr read ok %x ecc=%d\012\000"
-.LC90:
+.LC89:
.ascii "sync para %d\012\000"
-.LC91:
+.LC90:
.ascii "TOG mode Read error %x %x\012\000"
-.LC92:
+.LC91:
.ascii "FlashLoadPhyInfo fail %x!!\012\000"
-.LC93:
+.LC92:
.ascii "read retry status %x %x %x\012\000"
-.LC94:
+.LC93:
.ascii "Read pageadd=%x ecc=%x err=%x\012\000"
-.LC95:
+.LC94:
.ascii "data:\000"
-.LC96:
+.LC95:
.ascii "spare:\000"
-.LC97:
+.LC96:
.ascii "ReadRetry pageadd=%x ecc=%x err=%x\012\000"
-.LC98:
+.LC97:
.ascii "slc mode\000"
-.LC99:
+.LC98:
.ascii "no ect\000"
-.LC100:
+.LC99:
.ascii "prog error: = %x\012\000"
-.LC101:
+.LC100:
.ascii "prog read error: = %x\012\000"
-.LC102:
+.LC101:
.ascii "prog read s error: = %x %x %x\012\000"
-.LC103:
+.LC102:
.ascii "prog read d error: = %x %x %x\012\000"
-.LC104:
+.LC103:
.ascii "FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC105:
+.LC104:
.ascii "FtlBbmTblFlush error:%x\012\000"
-.LC106:
+.LC105:
.ascii "FtlGcFreeBadSuperBlk 0x%x\012\000"
-.LC107:
+.LC106:
.ascii "decrement_vpc_count %x = %d\012\000"
-.LC108:
+.LC107:
.ascii "FlashMakeFactorBbt %d\012\000"
-.LC109:
+.LC108:
.ascii "bad block:%d %d\012\000"
-.LC110:
+.LC109:
.ascii "FMFB:%d %d\012\000"
-.LC111:
+.LC110:
.ascii "E:bad block:%d\012\000"
-.LC112:
+.LC111:
.ascii "FMFB:Save %d %d\012\000"
-.LC113:
+.LC112:
.ascii "spuer block %x vpn is 0\012 \000"
-.LC114:
+.LC113:
.ascii "...%s enter...\012\000"
-.LC115:
+.LC114:
.ascii "FtlCheckVpc %x = %x %x\012\000"
-.LC116:
+.LC115:
.ascii "%d GC datablk = %x vpc %x %x\012\000"
-.LC117:
+.LC116:
.ascii "SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
-.LC118:
+.LC117:
.ascii "Ftlwrite decrement_vpc_count %x = %d\012\000"
-.LC119:
+.LC118:
.ascii "FtlInit %x\012\000"
-.LC120:
+.LC119:
.ascii "FtlWrite: lpa error:%x %x\012\000"
-.LC121:
+.LC120:
.ascii "FLFB:%d %d\012\000"
-.LC122:
+.LC121:
.ascii "BBT:\000"
-.LC123:
+.LC122:
.ascii "IdBlockReadData %x %x\012\000"
-.LC124:
+.LC123:
.ascii "IdBlockReadData %x %x ret= %x\012\000"
-.LC125:
+.LC124:
.ascii "IDBlockWriteData %x %x\012\000"
-.LC126:
+.LC125:
.ascii "IDBlockWriteData %x %x ret= %x\012\000"
-.LC127:
+.LC126:
.ascii "idblk:\000"
-.LC128:
+.LC127:
.ascii "idb reverse %x %x\012\000"
-.LC129:
+.LC128:
.ascii "write_idblock totle_sec %x %x\012\000"
-.LC130:
+.LC129:
.ascii "write and check error:%d idb=%x,offset=%x,r=%x,w=%x"
- .ascii " \012\000"
-.LC131:
+ .ascii "\012\000"
+.LC130:
.ascii "write\000"
-.LC132:
+.LC131:
.ascii "read\000"
-.LC133:
+.LC132:
.ascii "write_idblock error\012\000"
-.LC134:
+.LC133:
.ascii "READ_SECTOR_IO\012\000"
+.LC134:
+ .ascii "rk_copy_from_user error\012\000"
.LC135:
- .ascii "rk_copy_from_user error \012\000"
-.LC136:
.ascii "READ_SECTOR_IO %x %x\012\000"
-.LC137:
+.LC136:
.ascii "rk_copy_to_user error\012\000"
-.LC138:
+.LC137:
.ascii "WRITE_SECTOR_IO\012\000"
-.LC139:
+.LC138:
.ascii "WRITE_SECTOR_IO %x %x\012\000"
-.LC140:
+.LC139:
.ascii "END_WRITE_SECTOR_IO\012\000"
-.LC141:
+.LC140:
.ascii "END_WRITE_SECTOR_IO %x %x\012\000"
-.LC142:
+.LC141:
.ascii "GET_FLASH_INFO_IO\012\000"
-.LC143:
+.LC142:
.ascii "GET_BAD_BLOCK_IO\012\000"
-.LC144:
+.LC143:
.ascii "bbt:\000"
-.LC145:
+.LC144:
.ascii "GET_LOCK_FLAG_IO\012\000"
-.LC146:
+.LC145:
.ascii "GET_PUBLIC_KEY_IO\012\000"
-.LC147:
+.LC146:
.ascii "RKNAND_GET_DRM_KEY\012\000"
-.LC148:
+.LC147:
.ascii "RKNAND_STORE_DRM_KEY\012\000"
-.LC149:
- .ascii "copy_from_user error \012\000"
-.LC150:
+.LC148:
.ascii "RKNAND_DIASBLE_SECURE_BOOT\012\000"
-.LC151:
+.LC149:
.ascii "RKNAND_ENASBLE_SECURE_BOOT\012\000"
-.LC152:
+.LC150:
.ascii "RKNAND_GET_SN_SECTOR\012\000"
-.LC153:
+.LC151:
.ascii "RKNAND_LOADER_UNLOCK\012\000"
-.LC154:
+.LC152:
.ascii "RKNAND_LOADER_STATUS\012\000"
-.LC155:
+.LC153:
.ascii "RKNAND_LOADER_LOCK\012\000"
-.LC156:
+.LC154:
.ascii "LockKey not match %d\012\000"
-.LC157:
+.LC155:
.ascii "RKNAND_GET_VENDOR_SECTOR\012\000"
-.LC158:
+.LC156:
.ascii "RKNAND_STORE_VENDOR_SECTOR\012\000"
-.LC159:
+.LC157:
.ascii "return ret = %lx\012\000"
-.LC160:
+.LC158:
.ascii "secureBootEn check error\012\000"
-.LC161:
+.LC159:
.ascii "rknand_sys_storage\000"
.data
.align 2
.size rknand_sys_storage_dev, 36
rknand_sys_storage_dev:
.word 255
- .word .LC161
+ .word .LC159
.word rknand_sys_storage_fops
.space 24
.type rknand_sys_storage_fops, %object
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
+ * date: 2017-05-26
*/
.cpu generic+fp+simd
.file "rk_ftl_arm_v8.S"
#NO_APP
.text
.align 2
- .type rknand_sys_storage_release, %function
-rknand_sys_storage_release:
- stp x29, x30, [sp, -16]!
- add x29, sp, 0
- ldr x0, [x1,208]
- cbz x0, .L2
- str xzr, [x1,208]
- bl kfree
-.L2:
- mov w0, 0
- ldp x29, x30, [sp], 16
- ret
- .size rknand_sys_storage_release, .-rknand_sys_storage_release
- .align 2
.type rknand_sys_storage_open, %function
rknand_sys_storage_open:
- stp x29, x30, [sp, -32]!
- adrp x0, kmalloc_caches+96
- mov x2, 4096
- add x29, sp, 0
- str x19, [sp,16]
- mov x19, x1
- ldr x0, [x0,#:lo12:kmalloc_caches+96]
- mov w1, 192
- movk w1, 0x240, lsl 16
- bl kmem_cache_alloc_trace
- str xzr, [x19,208]
- cbnz x0, .L8
- adrp x0, .LC0
- add x0, x0, :lo12:.LC0
- bl printk
- mov w0, -12
- b .L9
-.L8:
- str x0, [x19,208]
mov w0, 0
-.L9:
- ldr x19, [sp,16]
- ldp x29, x30, [sp], 32
ret
.size rknand_sys_storage_open, .-rknand_sys_storage_open
.align 2
+ .type rknand_sys_storage_release, %function
+rknand_sys_storage_release:
+ mov w0, 0
+ ret
+ .size rknand_sys_storage_release, .-rknand_sys_storage_release
+ .align 2
.type ftl_set_blk_mode.part.8, %function
ftl_set_blk_mode.part.8:
adrp x1, .LANCHOR0
mov x5, x0
adrp x0, .LANCHOR0+8
ldrb w0, [x0,#:lo12:.LANCHOR0+8]
- cbz w0, .L16
+ cbz w0, .L9
ldrb w4, [x5,1]
mov w0, 0
ldrb w3, [x1,1]
cmp w4, w3
- beq .L13
-.L16:
+ beq .L6
+.L9:
mov x3, 0
-.L14:
+.L7:
cmp w3, w2
mov w4, w3
- bcs .L19
+ bcs .L13
ldrb w0, [x5,x3]
add x3, x3, 1
add x6, x1, x3
ldrb w6, [x6,-1]
cmp w6, w0
- beq .L14
+ beq .L7
add w0, w4, 1
- b .L13
-.L19:
- mov w0, 0
+ b .L6
.L13:
+ mov w0, 0
+.L6:
ret
.size FlashMemCmp8, .-FlashMemCmp8
.align 2
ldrh w19, [x2,w3,uxtw 1]
adrp x2, .LANCHOR0+16
ldrb w2, [x2,#:lo12:.LANCHOR0+16]
- cbz w2, .L22
+ cbz w2, .L16
bl FlashRsvdBlkChk
cmp w0, wzr
orr w1, w19, -1073741824
csel w19, w1, w19, ne
-.L22:
+.L16:
mov w0, w19
ldr x19, [sp,16]
ldp x29, x30, [sp], 32
add x0, x19, :lo12:.LANCHOR0
ldr w2, [x0,20]
cmp w2, 5
- bls .L29
+ bls .L23
adrp x2, .LANCHOR1
and w20, w1, 127
add x2, x2, :lo12:.LANCHOR1
ldrb w0, [x0,16]
ldrh w20, [x2,w20,uxtw 1]
- cbz w0, .L30
+ cbz w0, .L24
mov w0, w21
bl FlashRsvdBlkChk
cmp w0, wzr
orr w1, w20, -1073741824
csel w20, w1, w20, ne
-.L30:
+.L24:
add x19, x19, :lo12:.LANCHOR0
add x21, x19, x21, sxtw 4
ldr x0, [x21,24]
str w20, [x0,336]
- b .L28
-.L29:
+ b .L22
+.L23:
cmp w2, 4
- bne .L28
+ bne .L22
adrp x2, .LANCHOR1
and w3, w1, 127
add x2, x2, :lo12:.LANCHOR1
ldrb w0, [x0,16]
ldrh w22, [x2,w3,uxtw 1]
lsl w22, w22, 8
- cbz w0, .L32
+ cbz w0, .L26
mov w0, w21
bl FlashRsvdBlkChk
- cbz w0, .L32
+ cbz w0, .L26
ubfiz w20, w20, 1, 7
orr w20, w20, 1
orr w22, w22, w20
-.L32:
+.L26:
add x19, x19, :lo12:.LANCHOR0
add x21, x19, x21, sxtw 4
ldr x0, [x21,24]
str w22, [x0,336]
-.L28:
+.L22:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x29, x30, [sp], 48
ldrb w2, [x5,8]
and w5, w1, 255
add x2, x6, x2, lsl 8
- bne .L46
+ bne .L40
mov w6, 6
str w6, [x2,2056]
str wzr, [x2,2052]
str w5, [x2,2052]
str w4, [x2,2052]
str w3, [x2,2052]
- b .L48
-.L46:
+ b .L42
+.L40:
str wzr, [x2,2056]
str wzr, [x2,2052]
str wzr, [x2,2052]
str w3, [x2,2056]
str wzr, [x2,2052]
str wzr, [x2,2052]
-.L48:
+.L42:
mov w3, 224
str w3, [x2,2056]
bl FlashSetRandomizer
uxtb w0, w0
add x1, x1, :lo12:.LANCHOR0
ldrb w2, [x1,120]
- cbz w2, .L49
+ cbz w2, .L43
sbfiz x0, x0, 4, 32
add x1, x1, 24
add x2, x1, x0
add x0, x1, x0, lsl 8
mov w1, 218
str w1, [x0,8]
-.L49:
+.L43:
ret
.size flash_enter_slc_mode, .-flash_enter_slc_mode
.align 2
uxtb w0, w0
add x1, x1, :lo12:.LANCHOR0
ldrb w2, [x1,120]
- cbz w2, .L54
+ cbz w2, .L48
sbfiz x0, x0, 4, 32
add x1, x1, 24
add x2, x1, x0
add x0, x1, x0, lsl 8
mov w1, 223
str w1, [x0,8]
-.L54:
+.L48:
ret
.size flash_exit_slc_mode, .-flash_exit_slc_mode
.align 2
add x5, x4, x0
ldr x4, [x4,x0]
ldrb w0, [x5,8]
- cbz w2, .L61
+ cbz w2, .L55
add x2, x4, x0, lsl 8
mov w5, 96
str w5, [x2,2056]
str w5, [x2,2052]
ldr w2, [x3,12]
add w1, w1, w2
-.L61:
+.L55:
add x0, x4, x0, lsl 8
mov w2, 96
str w2, [x0,2056]
mov w0, 42982
mov x2, 0
movk w0, 0x47c6, lsl 16
-.L69:
+.L63:
cmp w1, w2
- bls .L71
+ bls .L65
lsl w3, w0, 5
ldrb w4, [x5,x2]
add w3, w3, w0, lsr 2
add x2, x2, 1
add w3, w3, w4
eor w0, w0, w3
- b .L69
-.L71:
+ b .L63
+.L65:
ret
.size JSHash, .-JSHash
.align 2
udiv w10, w6, w5
msub w5, w10, w5, w6
uxth w6, w5
- bne .L77
+ bne .L71
add x1, x7, :lo12:.LANCHOR0
ldrb w5, [x1,120]
- cbnz w5, .L77
+ cbnz w5, .L71
add x1, x1, 196
ldrh w8, [x1,w8,sxtw 1]
-.L77:
+.L71:
add x7, x7, :lo12:.LANCHOR0
cmp w4, 1
add x7, x7, 708
add w5, w5, w8
str w5, [x2]
str w10, [x3]
- bls .L78
+ bls .L72
ldr w1, [x0,4]
ldr w0, [x0,60]
add w1, w1, 1024
cmp w1, w0
cset w1, eq
-.L78:
+.L72:
mov w0, w1
ret
.size LogAddr2PhyAddr, .-LogAddr2PhyAddr
mov x20, x1
ldr x2, [x21,128]
ldr w19, [x2]
- beq .L90
+ beq .L84
orr w19, w19, 24576
and w0, w0, 4
and w19, w19, -32769
str w1, [x0,308]
mov w1, 39
str w1, [x0,308]
- b .L92
-.L90:
+ b .L86
+.L84:
and w19, w19, -8193
-.L92:
+.L86:
add x1, x20, :lo12:.LANCHOR0
ldr x0, [x1,128]
str w19, [x0]
sub sp, sp, #16
lsr w0, w0, 4
str w0, [sp,12]
-.L99:
+.L93:
ldr w0, [sp,12]
sub w1, w0, #1
str w1, [sp,12]
- cbnz w0, .L99
+ cbnz w0, .L93
add sp, sp, 16
ret
.size NandcDelayns, .-NandcDelayns
adrp x26, .LANCHOR0
mov w27, 85
mov x19, x2
-.L103:
+.L97:
add x25, x26, :lo12:.LANCHOR0
ldrb w0, [x25,753]
cmp w0, w20
- bls .L109
+ bls .L103
add x0, x19, 256
str w27, [x22,8]
ldrsb w0, [x20,x0]
bl NandcDelayns
ldrb w0, [x25,752]
cmp w0, 34
- bne .L104
+ bne .L98
ldrsb w0, [x24,x20]
- b .L108
-.L104:
+ b .L102
+.L98:
cmp w0, 35
- bne .L106
+ bne .L100
ldrsb w0, [x21,x20]
- b .L108
-.L106:
+ b .L102
+.L100:
ldrsb w0, [x23,400]
-.L108:
+.L102:
str w0, [x22]
add x20, x20, 1
- b .L103
-.L109:
+ b .L97
+.L103:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
adrp x23, .LANCHOR0
mov w24, 161
mov x19, x2
-.L111:
+.L105:
add x0, x23, :lo12:.LANCHOR0
ldrb w0, [x0,753]
cmp w0, w20
- bls .L113
+ bls .L107
str w24, [x21,8]
add x0, x19, 408
str wzr, [x21]
str w0, [x21]
mov w0, 300
bl NandcDelayns
- b .L111
-.L113:
+ b .L105
+.L107:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
add x19, x19, 760
ldrb w0, [x0,19]
cmp w0, 6
- bne .L115
+ bne .L109
add x19, x19, x23, lsl 6
lsl w0, w24, 2
add x19, x19, 20
add x19, x19, x0, sxtw
- b .L116
-.L115:
+ b .L110
+.L109:
lsl x2, x23, 3
add x2, x2, x24, sxtw
add x19, x19, x2, lsl 3
add x19, x19, 20
-.L116:
+.L110:
add x2, x22, :lo12:.LANCHOR0
lsl x0, x23, 4
add x2, x2, 24
add x20, x20, x21
mov x21, 0
str w0, [x20,2056]
-.L117:
+.L111:
cmp x21, x27
- beq .L119
+ beq .L113
ldrb w0, [x25,x21]
str w0, [x20,2052]
mov w0, 200
ldrb w0, [x19,x21]
add x21, x21, 1
str w0, [x20,2048]
- b .L117
-.L119:
+ b .L111
+.L113:
add x22, x22, :lo12:.LANCHOR0
mov w0, 22
add x23, x22, x23
sub w0, w0, #1
uxtb w0, w0
cmp w0, 5
- bhi .L120
+ bhi .L114
add x21, x19, 1620
add x22, x19, 764
-.L125:
+.L119:
lsl x1, x20, 3
uxtb w0, w20
ldrb w1, [x1,x21]
cmp w1, 173
- bne .L122
+ bne .L116
ldrb w1, [x19,761]
mov x2, x22
mov w3, 0
bl HynixSetRRPara
-.L122:
+.L116:
add x20, x20, 1
cmp x20, 4
- bne .L125
-.L120:
+ bne .L119
+.L114:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x29, x30, [sp], 48
ldrb w19, [x6,8]
ldrb w0, [x0,8]
cmp w0, 2
- bne .L128
+ bne .L122
add x4, x4, 88
- cbnz w2, .L129
+ cbnz w2, .L123
ldrb w2, [x4,13]
- b .L137
-.L129:
+ b .L131
+.L123:
ldrb w2, [x4,14]
-.L137:
+.L131:
add x0, x19, 8
add x3, x3, :lo12:.LANCHOR0
add x0, x20, x0, lsl 8
str w2, [x0,8]
mov w2, 0
ldrb w4, [x3,103]
- cbz w4, .L132
+ cbz w4, .L126
add x3, x19, 8
lsl x3, x3, 8
-.L136:
+.L130:
cmp w2, w4
- bcs .L132
+ bcs .L126
add x5, x20, x3
lsl w0, w2, 3
lsr w0, w1, w0
add w2, w2, 1
and w0, w0, 255
str w0, [x5,4]
- b .L136
-.L128:
+ b .L130
+.L122:
add x0, x19, 8
mov w1, 112
add x0, x20, x0, lsl 8
str w1, [x0,8]
-.L132:
+.L126:
add x19, x19, 8
mov w0, 80
lsl x19, x19, 8
uxtb w19, w0
mov w20, w1
uxtb w21, w2
-.L142:
+.L136:
mov w0, w19
mov w1, w20
mov w2, w21
bl FlashReadStatusEN
cmp w0, 255
mov w3, w0
- beq .L142
- tbz x3, 6, .L142
+ beq .L136
+ tbz x3, 6, .L136
ldp x19, x20, [sp,16]
ldr x21, [sp,32]
ldp x29, x30, [sp], 48
add x19, x0, x1
ldrb w21, [x0,x1]
ldr x0, [x19,8]
- cbz x0, .L147
+ cbz x0, .L141
mov w0, w21
add x20, x20, 708
bl NandcFlashCs
str w0, [x1]
str xzr, [x19,8]
ldr x1, [x19,16]
- cbz x1, .L147
+ cbz x1, .L141
str w0, [x1]
str xzr, [x19,16]
-.L147:
+.L141:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
mov w19, 34464
ldr x20, [x1,x0]
movk w19, 0x1, lsl 16
-.L154:
+.L148:
mov w0, 100
bl NandcDelayns
ldr w0, [x20]
str w0, [x29,40]
ldr w0, [x29,40]
- tbnz x0, 9, .L155
+ tbnz x0, 9, .L149
subs w19, w19, #1
- bne .L154
+ bne .L148
mov w0, -1
- b .L153
-.L155:
+ b .L147
+.L149:
mov w0, 0
-.L153:
+.L147:
ldp x19, x20, [sp,16]
ldp x29, x30, [sp], 48
ret
mov w13, 32
mov w14, 5
uxtb w5, w2
-.L170:
+.L164:
ldrb w3, [x6,x4]
ldr x1, [x7]
cmp w3, 152
ldrb w2, [x7,8]
- beq .L160
+ beq .L154
cmp w3, 69
- beq .L160
+ beq .L154
cmp w3, 173
- beq .L160
+ beq .L154
cmp w3, 44
- bne .L161
-.L160:
+ bne .L155
+.L154:
cmp w0, 1
- bne .L163
- cbz w11, .L161
+ bne .L157
+ cbz w11, .L155
ubfiz x2, x2, 8, 8
cmp w3, 173
add x1, x1, x2
str w8, [x1,2056]
- bne .L164
+ bne .L158
str w0, [x1,2052]
- b .L181
-.L164:
+ b .L175
+.L158:
cmp w3, 44
- bne .L166
+ bne .L160
str w0, [x1,2052]
str w14, [x1,2048]
- b .L168
-.L166:
+ b .L162
+.L160:
str w9, [x1,2052]
str w0, [x1,2048]
- b .L168
-.L163:
- cbz w5, .L161
+ b .L162
+.L157:
+ cbz w5, .L155
ubfiz x2, x2, 8, 8
cmp w3, 173
add x1, x1, x2
str w8, [x1,2056]
- bne .L167
+ bne .L161
str w10, [x1,2052]
str w13, [x1,2048]
- b .L168
-.L167:
+ b .L162
+.L161:
cmp w3, 44
- bne .L169
+ bne .L163
str w10, [x1,2052]
str w12, [x1,2048]
- b .L168
-.L169:
+ b .L162
+.L163:
str w9, [x1,2052]
-.L181:
+.L175:
str wzr, [x1,2048]
-.L168:
+.L162:
str wzr, [x1,2048]
str wzr, [x1,2048]
str wzr, [x1,2048]
-.L161:
+.L155:
add x6, x6, 8
add x7, x7, 16
cmp x6, 32
- bne .L170
+ bne .L164
mov w0, 0
bl NandcWaitFlashReady
mov w0, 0
add x0, x0, x1
add x1, x2, x1
mov x2, 0
-.L185:
+.L179:
add x3, x5, :lo12:.LANCHOR0
ldrb w4, [x3,753]
cmp w4, w2
- bls .L190
+ bls .L184
ldrb w3, [x3,752]
cmp w3, 67
- bne .L186
+ bne .L180
ldrsb w3, [x0,x2]
- b .L189
-.L186:
+ b .L183
+.L180:
ldrsb w3, [x1,x2]
-.L189:
+.L183:
str w3, [x20]
add x2, x2, 1
- b .L185
-.L190:
+ b .L179
+.L184:
mov w0, 0
bl NandcWaitFlashReady
ldp x19, x20, [sp,16]
stp x29, x30, [sp, -96]!
add x29, sp, 0
stp x21, x22, [sp,32]
- adrp x22, __stack_chk_guard
adrp x21, .LANCHOR0
+ str x25, [sp,64]
stp x23, x24, [sp,48]
- stp x25, x26, [sp,64]
add x21, x21, :lo12:.LANCHOR0
- mov w25, w1
- adrp x24, .LC1
- ldr x1, [x22,#:lo12:__stack_chk_guard]
+ adrp x23, .LC0
stp x19, x20, [sp,16]
- str x1, [x29,88]
+ mov w24, w1
mov x20, x0
- mov w23, 0
- add x26, x21, 1652
- add x24, x24, :lo12:.LC1
-.L192:
- cmp w23, w25
- beq .L202
- add x2, x29, 80
- sub w4, w25, w23
+ mov w22, 0
+ add x25, x21, 1652
+ add x23, x23, :lo12:.LC0
+.L186:
+ cmp w22, w24
+ beq .L195
+ add x2, x29, 88
+ sub w4, w24, w22
mov x0, x20
mov w1, 0
- add x3, x29, 84
+ add x3, x29, 92
bl LogAddr2PhyAddr
- ldr w2, [x29,84]
+ ldr w2, [x29,92]
ldrb w0, [x21,1845]
cmp w2, w0
- bcc .L193
+ bcc .L187
mov w0, -1
str w0, [x20]
- b .L194
-.L193:
+ b .L188
+.L187:
uxtw x2, w2
add x0, x21, x2
ldrb w19, [x0,1848]
mov x0, 24
mul x2, x2, x0
mov w0, w19
- strb w19, [x26,x2]
+ strb w19, [x25,x2]
bl NandcWaitFlashReady
mov w0, w19
bl NandcFlashCs
- ldr w1, [x29,80]
+ ldr w1, [x29,88]
mov w2, 0
mov w0, w19
bl FlashEraseCmd
mov w0, w19
bl NandcWaitFlashReady
- ldr w1, [x29,80]
+ ldr w1, [x29,88]
mov w0, w19
bl FlashReadStatus
sbfx x0, x0, 0, 1
str w0, [x20]
mov w0, w19
- ldr w1, [x29,80]
+ ldr w1, [x29,88]
ldr w2, [x21,12]
add w1, w2, w1
mov w2, 0
bl FlashEraseCmd
mov w0, w19
bl NandcWaitFlashReady
- ldr w1, [x29,80]
+ ldr w1, [x29,88]
mov w0, w19
bl FlashReadStatus
- tbz x0, 0, .L195
+ tbz x0, 0, .L189
mov w0, -1
str w0, [x20]
-.L195:
+.L189:
ldr w0, [x20]
cmn w0, #1
- bne .L196
- ldr w1, [x29,80]
- mov x0, x24
+ bne .L190
+ ldr w1, [x29,88]
+ mov x0, x23
bl printk
-.L196:
+.L190:
mov w0, w19
bl NandcFlashDeCs
-.L194:
- add w23, w23, 1
+.L188:
+ add w22, w22, 1
add x20, x20, 56
- b .L192
-.L202:
- ldr x2, [x29,88]
+ b .L186
+.L195:
mov w0, 0
- ldr x1, [x22,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L198
- bl __stack_chk_fail
-.L198:
+ ldr x25, [sp,64]
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
- ldp x25, x26, [sp,64]
ldp x29, x30, [sp], 96
ret
.size FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
mov w0, -81
strb w3, [x1,6]
strb w0, [x1,7]
- bne .L204
+ bne .L197
mov w0, -89
strb w0, [x1,4]
adrp x0, .LANCHOR1+521
mov w1, -9
strb w1, [x0,#:lo12:.LANCHOR1+521]
- b .L241
-.L204:
+ b .L234
+.L197:
cmp w26, 3
- bne .L206
+ bne .L199
mov w0, -80
strb w0, [x1,4]
mov w0, -79
mov w0, -74
strb w0, [x1,10]
mov w0, -73
- b .L257
-.L206:
+ b .L250
+.L199:
cmp w26, 4
- bne .L207
+ bne .L200
mov w5, -52
strb w5, [x1,4]
mov w5, -65
mov w5, -51
strb w3, [x1,10]
strb w5, [x1,8]
-.L257:
+.L250:
mov w21, 8
strb w0, [x1,11]
mov w20, w21
- b .L205
-.L207:
+ b .L198
+.L200:
cmp w26, 5
- bne .L208
+ bne .L201
mov w0, 56
strb w0, [x1,4]
mov w0, 57
strb w0, [x1,6]
mov w0, 59
strb w0, [x1,7]
- b .L256
-.L208:
+ b .L249
+.L201:
cmp w26, 6
- bne .L241
+ bne .L234
mov w0, 14
strb w0, [x1,4]
mov w0, 15
strb w0, [x1,6]
mov w0, 17
strb w0, [x1,7]
- b .L256
-.L241:
+ b .L249
+.L234:
mov w21, 7
-.L256:
+.L249:
mov w20, 4
-.L205:
+.L198:
sub w0, w26, #1
cmp w0, 1
- bhi .L253
+ bhi .L246
adrp x24, .LANCHOR1
add x27, x19, :lo12:.LANCHOR0
add x24, x24, :lo12:.LANCHOR1
add x28, x27, 760
add x4, x27, 24
add x24, x24, 504
-.L209:
+.L202:
ldrb w0, [x27,1845]
cmp w0, w23
- bls .L216
+ bls .L209
add x0, x27, x23, sxtw
ldrb w0, [x0,1848]
mov x25, 0
ldrb w0, [x1,8]
mov w1, 55
add x26, x26, x0, lsl 8
-.L211:
+.L204:
add x0, x28, x25
str w1, [x26,2056]
str x4, [x29,128]
ldr x1, [x29,136]
cmp w20, w25, uxtb
ldr x4, [x29,128]
- bhi .L211
+ bhi .L204
mov x0, 0
-.L212:
+.L205:
add w2, w0, 8
mov x1, 0
-.L213:
+.L206:
add x3, x1, x0
add x1, x1, 4
add x3, x24, x3
add w3, w5, w3
strb w3, [x22,w2,sxtw]
add w2, w2, 8
- bne .L213
+ bne .L206
add x0, x0, 1
cmp x0, 4
- bne .L212
+ bne .L205
add w23, w23, 1
strb wzr, [x22,16]
strb wzr, [x22,24]
strb wzr, [x22,48]
strb wzr, [x22,41]
strb wzr, [x22,49]
- b .L209
-.L253:
+ b .L202
+.L246:
sub w0, w26, #3
cmp w0, 3
- bhi .L216
+ bhi .L209
mul w0, w20, w21
cmp w26, 6
mov w1, 4
uxtb x0, w0
add x0, x0, 1
str x0, [x29,104]
-.L217:
+.L210:
ldrb w0, [x23,1845]
cmp w0, w22
- bhi .L240
-.L216:
+ bhi .L233
+.L209:
add x19, x19, :lo12:.LANCHOR0
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
ldp x29, x30, [sp], 144
ret
-.L240:
+.L233:
add x0, x23, x22, sxtw
ldrb w0, [x0,1848]
ldr x1, [x29,136]
cmp w26, 4
str w0, [x28,2056]
ldr x3, [x29,96]
- bne .L218
+ bne .L211
mov w0, 64
str w3, [x28,2052]
str w0, [x28,2048]
mov w0, 204
- b .L258
-.L218:
+ b .L251
+.L211:
cmp w27, 1
- bhi .L220
+ bhi .L213
ldr x0, [x29,136]
ldrb w0, [x0,4]
str w0, [x28,2052]
mov w0, 82
- b .L259
-.L220:
+ b .L252
+.L213:
mov w0, 174
str w0, [x28,2052]
str wzr, [x28,2048]
mov w0, 176
-.L258:
+.L251:
str w0, [x28,2052]
mov w0, 77
-.L259:
+.L252:
str w0, [x28,2048]
mov w0, 22
str w0, [x28,2056]
str wzr, [x28,2056]
str wzr, [x28,2052]
str wzr, [x28,2052]
- bne .L221
+ bne .L214
mov w0, 31
str w0, [x28,2052]
- b .L222
-.L221:
+ b .L215
+.L214:
str wzr, [x28,2052]
-.L222:
+.L215:
mov w3, 2
str w3, [x28,2052]
str wzr, [x28,2052]
cmp w27, 1
csel w3, w3, w0, hi
mov w0, 0
-.L224:
+.L217:
add w0, w0, 1
ldr w4, [x28,2048]
uxtb w0, w0
cmp w0, w3
- bne .L224
+ bne .L217
ldr x6, [x23,1856]
mov x0, 0
-.L225:
+.L218:
ldr w1, [x29,124]
cmp w1, w0
- ble .L260
+ ble .L253
ldr w3, [x28,2048]
strb w3, [x6,x0]
add x0, x0, 1
- b .L225
-.L260:
+ b .L218
+.L253:
ldr x8, [x23,1856]
mov w5, w24
mov w4, 8
-.L228:
+.L221:
mov w0, 0
-.L227:
+.L220:
add w3, w0, w5
add w0, w0, 1
sbfiz x3, x3, 2, 32
ldr w7, [x8,x3]
mvn w7, w7
str w7, [x8,x3]
- bne .L227
+ bne .L220
ldr w0, [x29,116]
subs w4, w4, #1
add w5, w5, w0
- bne .L228
+ bne .L221
mov x4, 0
mov w12, 1
-.L229:
+.L222:
mov w3, 0
ldr x11, [x23,1856]
mov w7, w3
-.L233:
+.L226:
lsl w5, w12, w7
mov w9, w4
mov w0, 16
mov w8, 0
-.L231:
+.L224:
ldr w10, [x11,w9,sxtw 2]
add w9, w9, w24
and w10, w5, w10
cmp w10, w5
csinc w8, w8, w8, ne
subs w0, w0, #1
- bne .L231
+ bne .L224
cmp w8, 9
orr w5, w3, w5
add w7, w7, 1
csel w3, w5, w3, cs
cmp w7, 32
- bne .L233
+ bne .L226
str w3, [x11,x4,lsl 2]
add x4, x4, 1
cmp w24, w4
- bgt .L229
+ bgt .L222
mov w4, w0
-.L236:
+.L229:
mov x3, 0
-.L235:
+.L228:
add w5, w0, w3
ldr x1, [x29,128]
ldrb w7, [x6,x3]
add x3, x3, 1
cmp w20, w3, uxtb
strb w7, [x1,w5,sxtw]
- bhi .L235
+ bhi .L228
ldr x1, [x29,104]
add w4, w4, 1
cmp w4, w21
add x6, x6, x1
ldr w1, [x29,120]
add w0, w0, w1
- blt .L236
+ blt .L229
mov w0, 255
str w0, [x28,2056]
mov w0, w25
bl NandcWaitFlashReady
cmp w27, 1
- bhi .L238
+ bhi .L231
mov w0, 54
str w0, [x28,2056]
ldr x0, [x29,136]
str w0, [x28,2056]
mov w0, w22
bl FlashReadCmd
- b .L239
-.L238:
+ b .L232
+.L231:
mov w0, 56
str w0, [x28,2056]
-.L239:
+.L232:
mov w0, w25
add w22, w22, 1
bl NandcWaitFlashReady
uxtb w22, w22
- b .L217
+ b .L210
.size HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
.align 2
.global FlashReadDpCmd
cmp w0, 1
and w5, w1, 255
lsr w0, w1, 16
- bne .L262
+ bne .L255
add x19, x6, x19, lsl 8
ldrb w2, [x3,8]
str x1, [x29,72]
str w20, [x19,2052]
str w0, [x19,2056]
ldr x1, [x29,72]
- b .L263
-.L262:
+ b .L256
+.L255:
add x19, x6, x19, lsl 8
ldrb w2, [x3,8]
str w2, [x19,2056]
str w22, [x19,2052]
str w20, [x19,2052]
str w0, [x19,2056]
-.L263:
+.L256:
mov w0, w21
bl FlashSetRandomizer
ldr x23, [sp,48]
add x20, x0, :lo12:.LANCHOR0
mov x19, x0
ldrb w1, [x20,1864]
- cbz w1, .L265
+ cbz w1, .L258
ldrb w0, [x20,1844]
- tbz x0, 0, .L265
+ tbz x0, 0, .L258
mov w0, 1
bl FlashSetInterfaceMode
mov w0, 1
bl NandcSetMode
strb wzr, [x20,1864]
-.L265:
+.L258:
add x0, x19, :lo12:.LANCHOR0
ldr x0, [x0,24]
str wzr, [x0,336]
add x1, x1, :lo12:.LANCHOR0
sdiv w0, w0, w2
cmp w0, 250
- ble .L274
+ ble .L267
ldr x0, [x1,128]
mov w1, 8354
- b .L281
-.L274:
+ b .L274
+.L267:
cmp w0, 220
- ble .L276
+ ble .L269
ldr x0, [x1,128]
- b .L282
-.L276:
+ b .L275
+.L269:
cmp w0, 185
- ble .L277
+ ble .L270
ldr x0, [x1,128]
mov w1, 4226
- b .L281
-.L277:
+ b .L274
+.L270:
cmp w0, 160
ldr x0, [x1,128]
- ble .L278
+ ble .L271
mov w1, 4194
- b .L281
-.L278:
+ b .L274
+.L271:
cmp w19, 35
mov w1, 4193
- bls .L281
+ bls .L274
cmp w19, 99
mov w1, 4225
- bls .L281
-.L282:
+ bls .L274
+.L275:
mov w1, 8322
-.L281:
+.L274:
str w1, [x0,4]
ldr x19, [sp,16]
ldp x29, x30, [sp], 32
and w1, w1, -33
cmp w1, 1
add x29, sp, 0
- bls .L284
+ bls .L277
mov w1, 8322
cmp w0, w1
- bne .L285
-.L284:
+ bne .L278
+.L277:
adrp x1, .LANCHOR0+128
ldr x1, [x1,#:lo12:.LANCHOR0+128]
str w0, [x1,4]
-.L285:
+.L278:
adrp x0, .LANCHOR1+493
ldrb w0, [x0,#:lo12:.LANCHOR1+493]
bl NandcTimeCfg
str w0, [x1,1940]
mov w1, 4096
str w3, [x2,8]
- bne .L289
-.L292:
+ bne .L282
+.L285:
and w1, w1, -17
- b .L290
-.L289:
+ b .L283
+.L282:
cmp w0, 24
- bne .L291
+ bne .L284
orr w1, w1, 16
- b .L290
-.L291:
+ b .L283
+.L284:
cmp w0, 40
orr w1, w1, 262144
orr w1, w1, 16
- beq .L292
-.L290:
+ beq .L285
+.L283:
orr w1, w1, 1
str w1, [x2,12]
ret
str w2, [x1,336]
ldr w2, [x0,164]
str w2, [x1,344]
-.L299:
+.L292:
lsl x0, x21, 3
ldrb w0, [x0,x19]
sub w0, w0, #1
uxtb w0, w0
cmp w0, 253
- bhi .L298
+ bhi .L291
mov w0, w21
bl FlashReset
-.L298:
+.L291:
add x21, x21, 1
cmp x21, 4
- bne .L299
+ bne .L292
add x19, x20, :lo12:.LANCHOR0
ldrb w0, [x19,1864]
- cbz w0, .L300
+ cbz w0, .L293
mov w0, 1
bl NandcSetMode
ldrb w0, [x19,1844]
ldr w0, [x19,152]
lsr w0, w0, 8
bl NandcSetDdrPara
-.L300:
+.L293:
add x20, x20, :lo12:.LANCHOR0
ldr x0, [x20,744]
ldrb w0, [x0,20]
mov w1, 1
bl NandCIrqEnable
ldr w0, [x19]
- tbnz x0, 9, .L310
+ tbnz x0, 9, .L303
mov x0, x19
bl wait_for_nand_flash_ready
- b .L309
-.L310:
+ b .L302
+.L303:
mov x0, x19
mov w1, 1
bl NandCIrqDisable
-.L309:
+.L302:
ldr x19, [sp,16]
ldp x29, x30, [sp], 32
ret
.global FlashEraseBlocks
.type FlashEraseBlocks, %function
FlashEraseBlocks:
- stp x29, x30, [sp, -144]!
+ stp x29, x30, [sp, -128]!
add x29, sp, 0
- stp x23, x24, [sp,48]
- mov w23, w2
- adrp x2, __stack_chk_guard
stp x27, x28, [sp,80]
mov w27, w1
- str x2, [x29,120]
- ldr x1, [x2,#:lo12:__stack_chk_guard]
- mov x24, x0
- str x1, [x29,136]
adrp x1, .LANCHOR0
stp x19, x20, [sp,16]
add x19, x1, :lo12:.LANCHOR0
- str x1, [x29,112]
+ str x1, [x29,104]
+ stp x23, x24, [sp,48]
+ mov w23, w2
+ mov x24, x0
+ ldrb w2, [x19,8]
+ mov w20, 0
stp x21, x22, [sp,32]
stp x25, x26, [sp,64]
- ldrb w3, [x19,8]
- mov w20, 0
- cbz w3, .L313
+ cbz w2, .L306
mov w1, w23
bl FlashEraseSLc2KBlocks
- b .L314
-.L313:
+ b .L307
+.L306:
mov w28, 56
add x25, x19, 1652
mov x26, 24
-.L339:
+.L331:
cmp w20, w23
- bcs .L340
+ bcs .L332
umull x5, w20, w28
mov w1, 0
sub w4, w23, w20
add x21, x24, x5
- add x2, x29, 128
+ add x2, x29, 120
mov x0, x21
- add x3, x29, 132
- str x5, [x29,104]
+ add x3, x29, 124
+ str x5, [x29,96]
bl LogAddr2PhyAddr
mov w22, w0
ldrb w1, [x19,1845]
- ldr w0, [x29,132]
- ldr x5, [x29,104]
+ ldr w0, [x29,124]
+ ldr x5, [x29,96]
cmp w0, w1
- bcc .L315
+ bcc .L308
mov w0, -1
str w0, [x24,x5]
- b .L316
-.L315:
+ b .L309
+.L308:
ldrb w1, [x19,1945]
cmp w1, wzr
uxtw x1, w0
csel w22, w22, wzr, ne
madd x1, x1, x26, x25
ldr x1, [x1,8]
- cbz x1, .L318
+ cbz x1, .L311
bl FlashWaitCmdDone
-.L318:
- ldr w0, [x29,132]
- ldr w1, [x29,128]
+.L311:
+ ldr w0, [x29,124]
+ ldr w1, [x29,120]
madd x2, x0, x26, x25
str x21, [x2,8]
str xzr, [x2,16]
str w1, [x2,4]
- cbz w22, .L319
+ cbz w22, .L312
add w1, w20, 1
umull x1, w1, w28
add x1, x24, x1
str x1, [x2,16]
-.L319:
+.L312:
add x1, x19, x0
mul x0, x0, x26
ldrb w21, [x1,1848]
mov w0, w21
bl NandcFlashCs
cmp w27, 1
- bne .L320
+ bne .L313
ldrb w0, [x19,120]
- cbz w0, .L320
+ cbz w0, .L313
mov w0, w21
bl flash_enter_slc_mode
-.L320:
- ldr w1, [x29,132]
+.L313:
+ ldr w1, [x29,124]
add x0, x19, 708
add w20, w20, w22
ldr w0, [x0,x1,lsl 2]
- ldr w1, [x29,128]
+ ldr w1, [x29,120]
cmp w0, wzr
mov w0, w21
cset w2, ne
bl FlashWaitReadyEN
- ldr w1, [x29,128]
+ ldr w1, [x29,120]
mov w0, w21
mov w2, w22
bl FlashEraseCmd
mov w0, w21
bl NandcFlashDeCs
-.L316:
+.L309:
add w20, w20, 1
- b .L339
-.L340:
- ldr x0, [x29,112]
+ b .L331
+.L332:
+ ldr x0, [x29,104]
mov x20, 0
mov x22, 24
add x19, x0, :lo12:.LANCHOR0
add x21, x19, 1652
ldr x0, [x19,128]
bl NandcIqrWaitFlashReady
-.L322:
+.L315:
ldrb w0, [x19,1845]
cmp w0, w20
- bls .L341
+ bls .L333
mov w0, w20
bl FlashWaitCmdDone
cmp w27, 1
- bne .L323
+ bne .L316
ldrb w0, [x19,120]
- cbz w0, .L323
+ cbz w0, .L316
mul x0, x20, x22
ldrb w0, [x0,x21]
bl flash_exit_slc_mode
-.L323:
+.L316:
add x20, x20, 1
- b .L322
-.L341:
+ b .L315
+.L333:
mov w0, 0
-.L314:
- ldr x1, [x29,120]
- ldr x2, [x29,136]
- ldr x1, [x1,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L325
- bl __stack_chk_fail
-.L325:
+.L307:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 144
+ ldp x29, x30, [sp], 128
ret
.size FlashEraseBlocks, .-FlashEraseBlocks
.align 2
.type NandcSendDumpDataDone, %function
NandcSendDumpDataDone:
sub sp, sp, #16
-.L345:
+.L337:
ldr w1, [x0,8]
str w1, [sp,8]
ldr w1, [sp,8]
- tbz x1, 20, .L345
+ tbz x1, 20, .L337
add sp, sp, 16
ret
.size NandcSendDumpDataDone, .-NandcSendDumpDataDone
cmp w0, 3
orr w20, w20, 1024
bfi w20, w3, 4, 1
- bls .L349
+ bls .L341
ldr w0, [x21,16]
cmp x5, xzr
str w0, [x29,88]
ldr w0, [x29,88]
and w0, w0, -5
str w0, [x29,88]
- cbnz w8, .L363
- cbz x22, .L350
-.L363:
- cbnz w24, .L352
-.L360:
+ cbnz w8, .L355
+ cbz x22, .L342
+.L355:
+ cbnz w24, .L344
+.L352:
mov x0, x21
bl rk_nandc_xfer_irq_flag_init
mov x0, x21
mov x0, x22
asr w2, w2, 1
bfi w20, w2, 22, 6
- cbnz x22, .L354
+ cbnz x22, .L346
add x0, x19, :lo12:.LANCHOR0
ldr x0, [x0,1888]
- b .L354
-.L352:
+ b .L346
+.L344:
add x1, x19, :lo12:.LANCHOR0
mov w6, 128
mov w3, 0
cmp w0, 25
mov w0, 64
csel w6, w0, w6, cc
-.L356:
+.L348:
cmp w4, w2
- bcs .L360
+ bcs .L352
lsr w0, w3, 2
ubfiz x0, x0, 2, 30
- cbz w8, .L357
+ cbz w8, .L349
ldrh w7, [x5,2]
ldr x10, [x1,1896]
ldrh w11, [x5],4
orr w7, w11, w7, lsl 16
str w7, [x10,x0]
- b .L358
-.L357:
+ b .L350
+.L349:
ldr x7, [x1,1896]
str w9, [x7,x0]
-.L358:
+.L350:
add w4, w4, 1
add w3, w3, w6
- b .L356
-.L354:
+ b .L348
+.L346:
add x19, x19, :lo12:.LANCHOR0
ubfx x25, x20, 22, 5
mov w2, w24
ldr w0, [x29,88]
orr w0, w0, 448
str w0, [x29,88]
- cbnz x22, .L361
+ cbnz x22, .L353
ldr w0, [x29,88]
mov w1, 2
bfi w0, w1, 3, 3
str w0, [x29,88]
-.L361:
+.L353:
ldr w0, [x29,88]
cmp w24, wzr
cset w1, eq
ldr w0, [x29,88]
orr w0, w0, 1
str w0, [x29,88]
-.L350:
+.L342:
ldr w0, [x29,88]
str w0, [x21,16]
-.L349:
+.L341:
str w23, [x21,12]
str w20, [x21,8]
orr w20, w20, 4
Ftl_log2:
mov w2, 1
mov w1, 0
-.L368:
+.L360:
cmp w2, w0
- bhi .L370
+ bhi .L362
add w1, w1, 1
lsl w2, w2, 1
uxth w1, w1
- b .L368
-.L370:
+ b .L360
+.L362:
sub w0, w1, #1
ret
.size Ftl_log2, .-Ftl_log2
strh w2, [x0,1974]
strh w1, [x0,1976]
strh w4, [x0,1962]
-.L375:
+.L367:
add x5, x0, 1984
strb w3, [x3,x5]
add x3, x3, 1
cmp x3, 32
- bne .L375
+ bne .L367
ldrh w3, [x23,20]
ldrb w0, [x23,15]
cmp w3, w0
- bcs .L376
+ bcs .L368
uxtb w8, w1
mov w3, 0
mul w11, w1, w2
ubfiz w10, w8, 1, 7
add x12, x19, :lo12:.LANCHOR0
-.L377:
+.L369:
cmp w3, w1
- bcs .L379
+ bcs .L371
uxtb w0, w3
mov w5, w3
mov w7, 0
-.L380:
+.L372:
cmp w7, w2
- bcs .L393
+ bcs .L385
add x9, x12, 1984
add w13, w5, w11
add w14, w0, w8
strb w14, [x9,x13]
add w5, w5, w1
uxtb w0, w0
- b .L380
-.L393:
+ b .L372
+.L385:
add w3, w3, 1
- b .L377
-.L379:
+ b .L369
+.L371:
add x0, x19, :lo12:.LANCHOR0
lsl w2, w2, 1
lsr w4, w4, 1
strh w2, [x0,1974]
strh w4, [x0,1962]
-.L376:
+.L368:
add x0, x19, :lo12:.LANCHOR0
mov w2, 5
cmp w6, 1
strh w2, [x0,2016]
strh wzr, [x0,2018]
- bne .L381
+ bne .L373
strh w6, [x0,2016]
-.L381:
+.L373:
add x0, x19, :lo12:.LANCHOR0
mov w2, 4352
strh w2, [x0,2020]
ldrb w2, [x0,8]
- cbz w2, .L382
+ cbz w2, .L374
mov w2, 384
strh w2, [x0,2020]
-.L382:
+.L374:
add x21, x19, :lo12:.LANCHOR0
ldrh w20, [x21,1962]
ldrh w22, [x21,1974]
strh w0, [x21,2040]
mul w0, w22, w20
str w0, [x21,1968]
- bls .L383
+ bls .L375
and w0, w20, 255
strh w0, [x21,2018]
-.L383:
+.L375:
add x2, x19, :lo12:.LANCHOR0
ldrh w1, [x2,2018]
ldrh w0, [x2,2020]
sdiv w24, w1, w24
uxth w24, w24
cmp w24, 4
- bls .L384
+ bls .L376
strh w24, [x2,2048]
- b .L385
-.L384:
+ b .L377
+.L376:
mov w1, 4
strh w1, [x2,2048]
-.L385:
+.L377:
add x1, x19, :lo12:.LANCHOR0
asr w0, w0, w3
lsl w20, w20, 6
ldrh w0, [x1,2048]
udiv w0, w0, w22
add w20, w20, w0
- bne .L392
+ bne .L384
add w20, w20, 4
-.L392:
+.L384:
add x19, x19, :lo12:.LANCHOR0
str w20, [x1,1948]
ldrh w0, [x19,1948]
add x1, x1, :lo12:.LANCHOR0
mov w0, 0
ldrh w2, [x1,2072]
- cbz w2, .L395
+ cbz w2, .L387
ldrh w2, [x1,2048]
ldr x3, [x1,2080]
mov x1, 0
-.L396:
+.L388:
cmp w2, w1, uxth
- bls .L401
+ bls .L393
add x1, x1, 1
add x0, x3, x1, lsl 1
ldrh w0, [x0,-2]
cmp w0, w4
- bne .L396
+ bne .L388
mov w0, 1
- b .L395
-.L401:
+ b .L387
+.L393:
mov w0, 0
-.L395:
+.L387:
ret
.size IsBlkInVendorPart, .-IsBlkInVendorPart
.align 2
add x2, x2, :lo12:.LANCHOR0
mov w0, 0
ldr w3, [x2,2088]
- cbz w3, .L403
+ cbz w3, .L395
ldr x5, [x2,2096]
mov x0, 56
mov x2, 0
-.L404:
+.L396:
cmp w3, w2
- bls .L413
+ bls .L405
madd x4, x2, x0, x5
add x2, x2, 1
ldr w4, [x4,24]
cmp w4, w6
- bcc .L404
+ bcc .L396
cmp w4, w1
- bhi .L404
+ bhi .L396
mov w0, 1
- b .L403
-.L413:
+ b .L395
+.L405:
mov w0, 0
-.L403:
+.L395:
ret
.size FtlCacheMetchLpa, .-FtlCacheMetchLpa
.align 2
ldr w5, [x0,x6]
orr w4, w4, w5
str w4, [x0,x6]
- adrp x0, .LC2
- add x0, x0, :lo12:.LC2
+ adrp x0, .LC1
+ add x0, x0, :lo12:.LC1
bl printk
ldrh w0, [x19,6]
add w0, w0, 1
ldrh w1, [x0,2022]
ldrh w21, [x0,1974]
mul w21, w1, w21
-.L423:
+.L415:
cmp w20, w21
- bge .L429
+ bge .L421
mov w0, w20
bl FtlBbmIsBadBlock
- cbz w0, .L424
+ cbz w0, .L416
add w19, w19, 1
uxth w19, w19
-.L424:
+.L416:
add w20, w20, 1
uxth w20, w20
- b .L423
-.L429:
+ b .L415
+.L421:
mov w0, w19
ldr x21, [sp,32]
ldp x19, x20, [sp,16]
ftl_cmp_data_ver:
cmp w0, w1
mov w2, -2147483648
- bls .L434
+ bls .L426
sub w1, w0, w1
cmp w1, w2
cset w0, ls
- b .L435
-.L434:
+ b .L427
+.L426:
sub w1, w1, w0
cmp w1, w2
cset w0, hi
-.L435:
+.L427:
ret
.size ftl_cmp_data_ver, .-ftl_cmp_data_ver
.align 2
mov x19, x2
ldrh w0, [x0,2214]
cmp w0, 1024
- beq .L438
- cbz w1, .L440
+ beq .L430
+ cbz w1, .L432
adrp x20, .LANCHOR2
mov w0, w22
add x20, x20, :lo12:.LANCHOR2
ldr w0, [x20,-72]
add w0, w0, 1
str w0, [x20,-72]
-.L440:
+.L432:
add x1, x19, :lo12:.LANCHOR0
add x1, x1, 2208
ldrh w0, [x1,6]
and w2, w2, 1023
strh w22, [x0,8]
strh w2, [x1,4]
-.L438:
+.L430:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x29, x30, [sp], 48
mov w19, 0
add x20, x20, 2208
adrp x21, .LANCHOR2
-.L448:
+.L440:
ldrh w0, [x20,6]
cmp w0, w19
- bls .L456
+ bls .L448
ldrh w0, [x20,2]
add w0, w0, w19
add x0, x20, x0, sxtw 1
ldr x1, [x1,-80]
ldrh w0, [x1,x0]
str w0, [x3,x2]
- b .L448
-.L456:
+ b .L440
+.L448:
adrp x4, .LANCHOR0
adrp x7, .LANCHOR2
mov w0, 0
add x4, x4, :lo12:.LANCHOR0
mov x8, x7
-.L450:
+.L442:
ldrh w6, [x4,2214]
sub w1, w6, #1
cmp w0, w1
- bge .L457
+ bge .L449
add x1, x7, :lo12:.LANCHOR2
add w5, w0, 1
uxth w5, w5
ldr x3, [x1,-64]
mov w2, w5
mov w1, w0
-.L451:
+.L443:
cmp w2, w6
- bcs .L458
+ bcs .L450
ubfiz x9, x2, 2, 16
ldr w10, [x3,w1,uxtw 2]
ldr w9, [x3,x9]
csel w1, w1, w2, ls
add w2, w2, 1
uxth w2, w2
- b .L451
-.L458:
+ b .L443
+.L450:
cmp w0, w1
- beq .L454
+ beq .L446
ubfiz x2, x0, 2, 16
ubfiz x6, x1, 2, 32
ldr w10, [x3,x2]
ldrh w6, [x1,8]
strh w2, [x1,8]
strh w6, [x0,8]
-.L454:
+.L446:
mov w0, w5
- b .L450
-.L457:
+ b .L442
+.L449:
ldp x19, x20, [sp,16]
ldr x21, [sp,32]
ldp x29, x30, [sp], 48
add x1, x1, 2208
ldrh w4, [x1,6]
cmp w4, 1024
- beq .L460
+ beq .L452
ldrh w5, [x1,2]
mov w3, w0
-.L461:
+.L453:
cmp w3, w4
- bcs .L465
+ bcs .L457
add w2, w3, w5
ubfiz x2, x2, 1, 10
add x2, x1, x2
ldrh w0, [x2,8]
cmp w0, w6
- beq .L464
+ beq .L456
add w3, w3, 1
- b .L461
-.L465:
+ b .L453
+.L457:
mov w0, 0
- b .L460
-.L464:
+ b .L452
+.L456:
mov w0, 1
-.L460:
+.L452:
ret
.size IsInFreeQueue, .-IsInFreeQueue
.align 2
add x1, x1, :lo12:.LANCHOR0
add x1, x1, 2208
ldrh w3, [x1,6]
- cbz w3, .L467
+ cbz w3, .L459
ldrh w2, [x1,2]
add x0, x1, x2, sxtw 1
ldrh w0, [x0,8]
strh w3, [x1,6]
and w2, w2, 1023
strh w2, [x1,2]
-.L467:
+.L459:
ret
.size FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
.align 2
uxth w0, w0
mov w9, 65535
cmp w0, w9
- beq .L471
+ beq .L463
adrp x2, .LANCHOR2
mov w7, 6
add x5, x2, :lo12:.LANCHOR2
strh w1, [x4,2]
strh w1, [x11,x10]
ldr x1, [x5,-48]
- cbnz x1, .L472
+ cbnz x1, .L464
str x4, [x5,-48]
- b .L471
-.L472:
+ b .L463
+.L464:
ubfiz x8, x0, 1, 16
ldr x13, [x5,-40]
ldrh w2, [x4,4]
ldr x14, [x5,-80]
uxth w2, w2
add x8, x14, x8
-.L479:
+.L471:
ubfiz x15, x2, 1, 16
ldrh w16, [x1,4]
cmp w16, wzr
mul w5, w5, w16
csinv w5, w5, wzr, ne
cmp w5, w6
- bne .L475
+ bne .L467
ldrh w15, [x14,x15]
ldrh w5, [x8]
cmp w15, w5
- bcc .L477
- b .L476
-.L475:
- bhi .L476
-.L477:
+ bcc .L469
+ b .L468
+.L467:
+ bhi .L468
+.L469:
ldrh w5, [x1]
cmp w5, w9
- bne .L478
+ bne .L470
strh w2, [x4,2]
add x2, x3, :lo12:.LANCHOR2
strh w0, [x1]
str x4, [x2,-32]
- b .L471
-.L478:
+ b .L463
+.L470:
umull x1, w5, w7
mov w2, w5
add x1, x12, x1
- b .L479
-.L476:
+ b .L471
+.L468:
strh w2, [x11,x10]
ldrh w2, [x1,2]
strh w2, [x4,2]
add x2, x3, :lo12:.LANCHOR2
ldr x3, [x2,-48]
cmp x1, x3
- bne .L480
+ bne .L472
strh w0, [x1,2]
str x4, [x2,-48]
- b .L471
-.L480:
+ b .L463
+.L472:
ldrh w3, [x1,2]
mov w4, 6
ldr x2, [x2,-56]
umull x3, w3, w4
strh w0, [x2,x3]
strh w0, [x1,2]
-.L471:
+.L463:
mov w0, 0
ret
.size insert_data_list, .-insert_data_list
uxth w0, w0
mov w7, 65535
cmp w0, w7
- beq .L485
+ beq .L477
adrp x2, .LANCHOR2
mov w6, 6
add x5, x2, :lo12:.LANCHOR2
strh w1, [x4,2]
strh w1, [x9,x8]
ldr x1, [x5,-16]
- cbnz x1, .L486
+ cbnz x1, .L478
str x4, [x5,-16]
- b .L485
-.L486:
+ b .L477
+.L478:
ldr x11, [x5,-80]
ubfiz x2, x0, 1, 16
ldr x10, [x5,-56]
asr x2, x2, 1
madd x2, x5, x2, x2
uxth w2, w2
-.L489:
+.L481:
ubfiz x5, x2, 1, 16
ldrh w5, [x11,x5]
cmp w5, w12
- bcs .L487
+ bcs .L479
ldrh w5, [x1]
cmp w5, w7
- bne .L488
+ bne .L480
strh w2, [x4,2]
strh w0, [x1]
- b .L485
-.L488:
+ b .L477
+.L480:
umull x1, w5, w6
mov w2, w5
add x1, x10, x1
- b .L489
-.L487:
+ b .L481
+.L479:
ldrh w5, [x1,2]
strh w5, [x4,2]
strh w2, [x9,x8]
add x2, x3, :lo12:.LANCHOR2
ldr x3, [x2,-16]
cmp x1, x3
- bne .L490
+ bne .L482
strh w0, [x1,2]
str x4, [x2,-16]
- b .L485
-.L490:
+ b .L477
+.L482:
ldrh w3, [x1,2]
mov w4, 6
ldr x2, [x2,-56]
umull x3, w3, w4
strh w0, [x2,x3]
strh w0, [x1,2]
-.L485:
+.L477:
mov w0, 0
ret
.size insert_free_list, .-insert_free_list
ldr x2, [x6,-56]
add x4, x2, x1
cmp x4, x3
- bne .L493
+ bne .L485
ldrh w3, [x2,x1]
cmp w3, w7
- bne .L494
+ bne .L486
str xzr, [x0]
- b .L495
-.L494:
+ b .L487
+.L486:
umull x3, w3, w5
add x3, x2, x3
str x3, [x0]
mov w0, -1
strh w0, [x3,2]
- b .L495
-.L493:
+ b .L487
+.L485:
ldrh w0, [x2,x1]
ldrh w3, [x4,2]
cmp w0, w7
- bne .L496
+ bne .L488
umull x3, w3, w5
mov w0, -1
strh w0, [x2,x3]
- b .L495
-.L496:
+ b .L487
+.L488:
umull x0, w0, w5
add x0, x2, x0
strh w3, [x0,2]
ldrh w7, [x2,x1]
umull x3, w3, w5
strh w7, [x0,x3]
-.L495:
+.L487:
mov w0, -1
strh w0, [x2,x1]
strh w0, [x4,2]
str x19, [sp,16]
mov w19, 65535
ldr x2, [x0]
- cbz x2, .L498
+ cbz x2, .L490
adrp x3, .LANCHOR2-56
mov w5, w19
mov w6, 6
ldr x4, [x3,#:lo12:.LANCHOR2-56]
-.L499:
- cbnz w1, .L500
-.L502:
+.L491:
+ cbnz w1, .L492
+.L494:
sub x2, x2, x4
mov x1, -6148914691236517206
asr x2, x2, 1
uxth w19, w2
mov w1, w19
bl List_remove_node
- b .L498
-.L500:
+ b .L490
+.L492:
ldrh w3, [x2]
cmp w3, w5
- beq .L502
+ beq .L494
umull x3, w3, w6
sub w1, w1, #1
add x2, x4, x3
uxth w1, w1
- b .L499
-.L498:
+ b .L491
+.L490:
mov w0, w19
ldr x19, [sp,16]
ldp x29, x30, [sp], 32
add x2, x2, :lo12:.LANCHOR2
mov w0, 65535
ldr x1, [x2,-48]
- cbz x1, .L511
+ cbz x1, .L503
ldr x4, [x2,-56]
mov w5, 6
-.L507:
- cbz w3, .L508
+.L499:
+ cbz w3, .L500
ldrh w2, [x1]
cmp w2, w0
- beq .L511
+ beq .L503
umull x2, w2, w5
sub w3, w3, #1
add x1, x4, x2
uxth w3, w3
- b .L507
-.L508:
+ b .L499
+.L500:
sub x1, x1, x4
mov x0, -6148914691236517206
asr x1, x1, 1
madd x1, x0, x1, x1
uxth w0, w1
-.L511:
+.L503:
ret
.size List_get_gc_head_node, .-List_get_gc_head_node
.align 2
add x19, x0, :lo12:.LANCHOR2
ldrh w0, [x0,#:lo12:.LANCHOR2]
cmp w0, w20
- beq .L513
+ beq .L505
ldrh w0, [x19,48]
cmp w0, w20
- beq .L513
+ beq .L505
ldrh w0, [x19,96]
cmp w0, w20
- beq .L513
+ beq .L505
mov w2, 6
ldr x4, [x19,-56]
ldr x0, [x19,-48]
umull x3, w20, w2
add x3, x4, x3
cmp x3, x0
- beq .L513
+ beq .L505
ldr x5, [x19,-40]
ubfiz x0, x20, 1, 16
ldrh w1, [x3,4]
cmp w0, wzr
csinv w0, w0, wzr, ne
cmp w1, w0
- bcs .L513
+ bcs .L505
sub x0, x19, #48
mov w1, w20
bl List_remove_node
strh w0, [x19,-24]
mov w0, w20
bl INSERT_DATA_LIST
-.L513:
+.L505:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x29, x30, [sp], 32
mov w20, 0
ldrh w2, [x0,10]
ldr x1, [x0,16]
-.L517:
+.L509:
cmp w20, w2
- beq .L520
+ beq .L512
mov x22, x1
ldrh w21, [x1],2
- cbnz w21, .L518
+ cbnz w21, .L510
mov x19, x0
bl FtlFreeSysBlkQueueOut
uxth w1, w0
strh w0, [x22]
- cbz w1, .L520
+ cbz w1, .L512
ldr w0, [x19,48]
strh w21, [x19,2]
add w0, w0, 1
strh w20, [x19]
add w0, w0, 1
strh w0, [x19,8]
- b .L520
-.L518:
+ b .L512
+.L510:
add w20, w20, 1
uxth w20, w20
- b .L517
-.L520:
+ b .L509
+.L512:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
add x1, x0, :lo12:.LANCHOR2
mov x3, x0
ldr x1, [x1,144]
-.L524:
+.L516:
uxth w0, w4
cmp w0, w2
- bcs .L540
+ bcs .L532
add x4, x4, 1
add x6, x1, x4, lsl 4
ldrh w6, [x6,-16]
cmp w6, w5
- bne .L524
- b .L525
-.L540:
+ bne .L516
+ b .L517
+.L532:
mov w0, w2
mov x4, 0
mov w7, -2147483648
-.L527:
+.L519:
uxth w6, w4
cmp w6, w2
- bcs .L541
+ bcs .L533
add x5, x1, x4, lsl 4
ldr w5, [x5,4]
- tbnz w5, #31, .L536
+ tbnz w5, #31, .L528
cmp w5, w7
- bcc .L528
-.L536:
+ bcc .L520
+.L528:
mov w5, w7
mov w6, w0
-.L528:
+.L520:
add x4, x4, 1
mov w7, w5
mov w0, w6
- b .L527
-.L541:
+ b .L519
+.L533:
cmp w0, w2
- bcc .L525
+ bcc .L517
add x0, x3, :lo12:.LANCHOR2
add x1, x1, 4
mov w4, -1
mov w3, 0
ldrh w5, [x0,152]
mov w0, w2
-.L531:
+.L523:
cmp w3, w2
- beq .L525
+ beq .L517
ldr w7, [x1]
cmp w7, w4
- bcs .L532
+ bcs .L524
ldrh w6, [x1,-4]
cmp w6, w5
csel w4, w4, w7, eq
cmp w6, w5
csel w0, w0, w3, eq
-.L532:
+.L524:
add w3, w3, 1
add x1, x1, 16
uxth w3, w3
- b .L531
-.L525:
+ b .L523
+.L517:
ret
.size select_l2p_ram_region, .-select_l2p_ram_region
.align 2
adrp x1, .LANCHOR2
add x3, x1, :lo12:.LANCHOR2
ldrh w2, [x3,154]
- cbnz w0, .L543
+ cbnz w0, .L535
cmp w2, 4
- bhi .L543
+ bhi .L535
add w2, w2, 1
strh w2, [x3,154]
- b .L542
-.L543:
+ b .L534
+.L535:
adrp x2, .LANCHOR0+1960
add x0, x1, :lo12:.LANCHOR2
mov w7, 65535
str wzr, [x0,156]
ldr x6, [x0,-40]
mov x0, 0
-.L544:
+.L536:
cmp w5, w0, uxth
- bls .L542
+ bls .L534
ldrh w4, [x6,x0,lsl 1]
cmp w4, w7
- beq .L545
+ beq .L537
add x3, x1, :lo12:.LANCHOR2
ldr w2, [x3,156]
add w2, w4, w2
str w2, [x3,156]
-.L545:
+.L537:
add x0, x0, 1
- b .L544
-.L542:
+ b .L536
+.L534:
ret
.size FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
.align 2
stp x29, x30, [sp, -16]!
uxth w0, w0
add x29, sp, 0
- cbz w1, .L549
+ cbz w1, .L541
bl ftl_set_blk_mode.part.8
- b .L548
-.L549:
+ b .L540
+.L541:
adrp x1, .LANCHOR0
ubfx x2, x0, 5, 11
lsl x2, x2, 2
ldr w1, [x3,x2]
bic w0, w1, w0
str w0, [x3,x2]
-.L548:
+.L540:
ldp x29, x30, [sp], 16
ret
.size ftl_set_blk_mode, .-ftl_set_blk_mode
strh wzr, [x0,4]
mov w6, 65535
ldrh w4, [x4,1952]
-.L553:
+.L545:
cmp w2, w4
- bcs .L559
+ bcs .L551
add x5, x0, x2, sxtw 1
ldrh w5, [x5,16]
cmp w5, w6
- beq .L554
+ beq .L546
ldrh w5, [x0,4]
add w5, w5, 1
strh w5, [x0,4]
-.L554:
+.L546:
add w2, w2, 1
uxth w2, w2
- b .L553
-.L559:
+ b .L545
+.L551:
add x3, x3, :lo12:.LANCHOR0
mov w6, 65535
add x4, x0, x4, uxth 1
ldrh w5, [x3,2026]
mov x3, x0
-.L556:
+.L548:
cmp x3, x4
- beq .L560
+ beq .L552
ldrh w2, [x3,16]
cmp w2, w6
- beq .L557
+ beq .L549
ldrh w2, [x0,4]
add w2, w5, w2
sub w2, w2, #1
sub w2, w2, w1
strh w2, [x0,4]
-.L557:
+.L549:
add x3, x3, 2
- b .L556
-.L560:
+ b .L548
+.L552:
ret
.size ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
.align 2
mov x23, x1
mov w25, -1
ldrh w24, [x1,1952]
-.L562:
+.L554:
cmp w24, w21, uxth
- bls .L569
+ bls .L561
add x0, x23, 1984
ldrh w1, [x19]
ldrb w0, [x0,x21]
strh w25, [x22]
mov w26, w0
bl FtlBbmIsBadBlock
- cbnz w0, .L563
+ cbnz w0, .L555
strh w26, [x22]
ldrb w0, [x19,7]
add w0, w0, 1
strb w0, [x19,7]
-.L563:
+.L555:
add x21, x21, 1
add x22, x22, 2
- b .L562
-.L569:
+ b .L554
+.L561:
add x0, x20, :lo12:.LANCHOR0
ldrb w1, [x19,7]
strb wzr, [x19,9]
adrp x0, .LANCHOR2
add x0, x0, :lo12:.LANCHOR2
ldr w1, [x0,160]
- cbz w1, .L565
+ cbz w1, .L557
ldrh w1, [x19]
ldr x0, [x0,-80]
ldrh w0, [x0,x1,lsl 1]
cmp w0, 59
- bhi .L565
+ bhi .L557
mov w0, 1
strb w0, [x19,9]
-.L565:
+.L557:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
mov w19, w22
ldrh w24, [x1,2026]
mov x20, x1
-.L571:
+.L563:
cmp w23, w22, uxth
- bls .L578
+ bls .L570
add x0, x20, 1984
mov w1, w21
ldrb w0, [x0,x22]
bl V2P_block
bl FtlBbmIsBadBlock
- cbnz w0, .L572
+ cbnz w0, .L564
add w19, w19, w24
uxth w19, w19
-.L572:
+.L564:
add x22, x22, 1
- b .L571
-.L578:
- cbz w19, .L574
+ b .L563
+.L570:
+ cbz w19, .L566
mov w0, 32768
sdiv w19, w0, w19
-.L574:
+.L566:
mov w0, 6
umull x21, w21, w0
adrp x0, .LANCHOR2-56
add x2, x2, :lo12:.LANCHOR2
ldr x1, [x2,-16]
mov w0, w1
- cbz x1, .L580
+ cbz x1, .L572
ldr x0, [x2,-56]
sub x1, x1, x0
mov x0, -6148914691236517206
ldr x0, [x2,-80]
and x1, x1, 65535
ldrh w0, [x0,x1,lsl 1]
-.L580:
+.L572:
ret
.size GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
.align 2
add x5, x2, :lo12:.LANCHOR2
ldr x1, [x5,-16]
mov w0, w1
- cbz x1, .L583
+ cbz x1, .L575
ldrh w3, [x5,-8]
mov w0, 7
mov w6, 6
madd x1, x3, x1, x1
mov w3, 0
uxth w1, w1
-.L585:
+.L577:
cmp w3, w4
- beq .L588
+ beq .L580
umull x5, w1, w6
ldrh w5, [x0,x5]
cmp w5, w7
- bne .L586
-.L588:
+ bne .L578
+.L580:
add x2, x2, :lo12:.LANCHOR2
ubfiz x1, x1, 1, 16
ldr x0, [x2,-80]
ldrh w0, [x0,x1]
- b .L583
-.L586:
+ b .L575
+.L578:
add w3, w3, 1
mov w1, w5
uxth w3, w3
- b .L585
-.L583:
+ b .L577
+.L575:
ret
.size GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
.align 2
.global FtlPrintInfo2buf
.type FtlPrintInfo2buf, %function
FtlPrintInfo2buf:
- stp x29, x30, [sp, -128]!
+ stp x29, x30, [sp, -112]!
+ adrp x1, .LC2
add x29, sp, 0
- stp x23, x24, [sp,48]
- adrp x24, __stack_chk_guard
- mov x23, x0
stp x25, x26, [sp,64]
- adrp x26, .LANCHOR0
- ldr x1, [x24,#:lo12:__stack_chk_guard]
- add x26, x26, :lo12:.LANCHOR0
- str x1, [x29,120]
- adrp x1, .LC3
- add x1, x1, :lo12:.LC3
+ adrp x25, .LANCHOR0
+ add x1, x1, :lo12:.LC2
+ add x25, x25, :lo12:.LANCHOR0
+ str x27, [sp,80]
stp x19, x20, [sp,16]
+ stp x23, x24, [sp,48]
stp x21, x22, [sp,32]
- stp x27, x28, [sp,80]
+ mov x23, x0
bl strcpy
add x20, x23, 12
- ldr w2, [x26,168]
- adrp x1, .LC4
+ ldr w2, [x25,168]
+ adrp x1, .LC3
mov x0, x20
- add x1, x1, :lo12:.LC4
+ add x1, x1, :lo12:.LC3
bl sprintf
add x20, x20, x0, sxtw
- adrp x1, .LC5
- ldr w2, [x26,2044]
+ adrp x1, .LC4
+ ldr w2, [x25,2044]
mov x0, x20
- add x1, x1, :lo12:.LC5
+ add x1, x1, :lo12:.LC4
bl sprintf
add x20, x20, x0, sxtw
adrp x0, .LANCHOR1+532
ldr w0, [x0,#:lo12:.LANCHOR1+532]
cmp w0, 1
- beq .L591
+ beq .L583
sub w0, w20, w23
- b .L592
-.L591:
- add x0, x29, 104
- add x1, x29, 108
- add x2, x29, 112
- add x3, x29, 116
- adrp x25, .LANCHOR2
+ b .L584
+.L583:
+ add x0, x29, 96
+ add x1, x29, 100
+ add x2, x29, 104
+ add x3, x29, 108
+ adrp x24, .LANCHOR2
bl NandcGetTimeCfg
- add x22, x25, :lo12:.LANCHOR2
- ldr w4, [x29,112]
- adrp x1, .LC6
- ldr w5, [x29,116]
- add x1, x1, :lo12:.LC6
- ldr w3, [x29,108]
+ add x22, x24, :lo12:.LANCHOR2
+ ldr w4, [x29,104]
+ adrp x1, .LC5
+ ldr w5, [x29,108]
+ add x1, x1, :lo12:.LC5
+ ldr w3, [x29,100]
mov x0, x20
- ldr w2, [x29,104]
+ ldr w2, [x29,96]
bl sprintf
add x21, x20, x0, sxtw
- adrp x1, .LC7
+ adrp x1, .LC6
mov x0, x21
- add x1, x1, :lo12:.LC7
+ add x1, x1, :lo12:.LC6
add x21, x21, 10
bl strcpy
- ldr w2, [x26,2104]
+ ldr w2, [x25,2104]
+ adrp x1, .LC7
+ mov x0, x21
+ add x1, x1, :lo12:.LC7
+ bl sprintf
+ add x21, x21, x0, sxtw
+ ldr w2, [x22,156]
adrp x1, .LC8
mov x0, x21
add x1, x1, :lo12:.LC8
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,156]
+ ldr w2, [x22,164]
adrp x1, .LC9
mov x0, x21
add x1, x1, :lo12:.LC9
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,164]
+ ldr w2, [x22,168]
adrp x1, .LC10
mov x0, x21
add x1, x1, :lo12:.LC10
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,168]
+ ldr w2, [x22,172]
adrp x1, .LC11
mov x0, x21
add x1, x1, :lo12:.LC11
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,172]
+ ldr w2, [x22,176]
adrp x1, .LC12
mov x0, x21
add x1, x1, :lo12:.LC12
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,176]
+ ldr w2, [x22,180]
adrp x1, .LC13
mov x0, x21
add x1, x1, :lo12:.LC13
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,180]
+ ldr w2, [x22,184]
adrp x1, .LC14
mov x0, x21
add x1, x1, :lo12:.LC14
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,184]
+ ldr w2, [x22,188]
adrp x1, .LC15
mov x0, x21
add x1, x1, :lo12:.LC15
+ lsr w2, w2, 11
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,188]
+ ldr w2, [x22,192]
adrp x1, .LC16
mov x0, x21
add x1, x1, :lo12:.LC16
lsr w2, w2, 11
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,192]
+ ldr w2, [x22,196]
adrp x1, .LC17
mov x0, x21
add x1, x1, :lo12:.LC17
- lsr w2, w2, 11
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,196]
+ ldr w2, [x22,200]
adrp x1, .LC18
- mov x0, x21
add x1, x1, :lo12:.LC18
+ mov x0, x21
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,200]
+ bl FtlBbtCalcTotleCnt
+ uxth w3, w0
+ ldrh w2, [x25,2118]
adrp x1, .LC19
- add x1, x1, :lo12:.LC19
mov x0, x21
+ add x1, x1, :lo12:.LC19
bl sprintf
add x21, x21, x0, sxtw
- bl FtlBbtCalcTotleCnt
- uxth w3, w0
- ldrh w2, [x26,2118]
+ ldrh w2, [x22,-8]
adrp x1, .LC20
mov x0, x21
add x1, x1, :lo12:.LC20
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,-8]
+ ldr w2, [x22,204]
adrp x1, .LC21
mov x0, x21
add x1, x1, :lo12:.LC21
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,204]
+ ldr w2, [x22,208]
adrp x1, .LC22
mov x0, x21
add x1, x1, :lo12:.LC22
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,208]
+ ldr w2, [x22,212]
adrp x1, .LC23
mov x0, x21
add x1, x1, :lo12:.LC23
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,212]
+ ldr w2, [x22,-72]
adrp x1, .LC24
mov x0, x21
add x1, x1, :lo12:.LC24
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,-72]
+ ldr w2, [x22,216]
adrp x1, .LC25
mov x0, x21
add x1, x1, :lo12:.LC25
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,216]
+ ldr w2, [x22,220]
adrp x1, .LC26
mov x0, x21
add x1, x1, :lo12:.LC26
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x22,220]
+ ldrh w2, [x22,254]
adrp x1, .LC27
mov x0, x21
add x1, x1, :lo12:.LC27
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,254]
+ ldrh w2, [x22,252]
adrp x1, .LC28
mov x0, x21
add x1, x1, :lo12:.LC28
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,252]
+ ldr w2, [x25,2068]
adrp x1, .LC29
mov x0, x21
add x1, x1, :lo12:.LC29
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x26,2068]
+ ldr w2, [x25,2060]
adrp x1, .LC30
mov x0, x21
add x1, x1, :lo12:.LC30
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x26,2060]
+ ldr w2, [x25,1948]
adrp x1, .LC31
mov x0, x21
add x1, x1, :lo12:.LC31
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x26,1948]
+ ldrh w2, [x25,2214]
adrp x1, .LC32
mov x0, x21
add x1, x1, :lo12:.LC32
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x26,2214]
+ ldrh w2, [x25,1960]
adrp x1, .LC33
mov x0, x21
add x1, x1, :lo12:.LC33
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x26,1960]
+ ldrh w2, [x22,272]
adrp x1, .LC34
mov x0, x21
add x1, x1, :lo12:.LC34
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,272]
+ ldr w2, [x25,1964]
adrp x1, .LC35
mov x0, x21
add x1, x1, :lo12:.LC35
bl sprintf
add x21, x21, x0, sxtw
- ldr w2, [x26,1964]
+ ldrh w2, [x22,280]
adrp x1, .LC36
mov x0, x21
add x1, x1, :lo12:.LC36
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,280]
+ ldrh w2, [x25,2112]
adrp x1, .LC37
mov x0, x21
add x1, x1, :lo12:.LC37
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x26,2112]
+ ldrh w2, [x22,2]
adrp x1, .LC38
mov x0, x21
add x1, x1, :lo12:.LC38
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,2]
+ ldrb w2, [x22,6]
adrp x1, .LC39
mov x0, x21
add x1, x1, :lo12:.LC39
bl sprintf
add x21, x21, x0, sxtw
- ldrb w2, [x22,6]
+ ldrh w2, [x24,#:lo12:.LANCHOR2]
adrp x1, .LC40
mov x0, x21
add x1, x1, :lo12:.LC40
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x25,#:lo12:.LANCHOR2]
+ ldrb w2, [x22,8]
adrp x1, .LC41
mov x0, x21
add x1, x1, :lo12:.LC41
bl sprintf
add x21, x21, x0, sxtw
- ldrb w2, [x22,8]
+ ldrh w2, [x22,4]
adrp x1, .LC42
mov x0, x21
add x1, x1, :lo12:.LC42
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,4]
+ ldrh w3, [x24,#:lo12:.LANCHOR2]
adrp x1, .LC43
+ ldr x2, [x22,-40]
mov x0, x21
add x1, x1, :lo12:.LC43
+ ldrh w2, [x2,x3,lsl 1]
bl sprintf
add x21, x21, x0, sxtw
- ldrh w3, [x25,#:lo12:.LANCHOR2]
+ ldrh w2, [x22,50]
adrp x1, .LC44
- ldr x2, [x22,-40]
mov x0, x21
add x1, x1, :lo12:.LC44
- ldrh w2, [x2,x3,lsl 1]
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,50]
+ ldrb w2, [x22,54]
adrp x1, .LC45
mov x0, x21
add x1, x1, :lo12:.LC45
bl sprintf
add x21, x21, x0, sxtw
- ldrb w2, [x22,54]
+ ldrh w2, [x22,48]
adrp x1, .LC46
mov x0, x21
add x1, x1, :lo12:.LC46
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,48]
+ ldrb w2, [x22,56]
adrp x1, .LC47
mov x0, x21
add x1, x1, :lo12:.LC47
bl sprintf
add x21, x21, x0, sxtw
- ldrb w2, [x22,56]
+ ldrh w2, [x22,52]
adrp x1, .LC48
mov x0, x21
add x1, x1, :lo12:.LC48
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,52]
+ ldrh w3, [x22,48]
adrp x1, .LC49
+ ldr x2, [x22,-40]
mov x0, x21
add x1, x1, :lo12:.LC49
+ ldrh w2, [x2,x3,lsl 1]
bl sprintf
add x21, x21, x0, sxtw
- ldrh w3, [x22,48]
+ ldrh w2, [x22,98]
adrp x1, .LC50
- ldr x2, [x22,-40]
mov x0, x21
add x1, x1, :lo12:.LC50
- ldrh w2, [x2,x3,lsl 1]
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,98]
+ ldrb w2, [x22,102]
adrp x1, .LC51
mov x0, x21
add x1, x1, :lo12:.LC51
bl sprintf
add x21, x21, x0, sxtw
- ldrb w2, [x22,102]
+ ldrh w2, [x22,96]
adrp x1, .LC52
mov x0, x21
add x1, x1, :lo12:.LC52
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,96]
+ ldrb w2, [x22,104]
adrp x1, .LC53
mov x0, x21
add x1, x1, :lo12:.LC53
bl sprintf
add x21, x21, x0, sxtw
- ldrb w2, [x22,104]
+ ldrh w2, [x22,100]
adrp x1, .LC54
mov x0, x21
add x1, x1, :lo12:.LC54
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,100]
+ ldrh w2, [x22,298]
adrp x1, .LC55
mov x0, x21
add x1, x1, :lo12:.LC55
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,298]
+ ldrb w2, [x22,302]
adrp x1, .LC56
mov x0, x21
add x1, x1, :lo12:.LC56
bl sprintf
add x21, x21, x0, sxtw
- ldrb w2, [x22,302]
+ ldrh w2, [x22,296]
adrp x1, .LC57
mov x0, x21
add x1, x1, :lo12:.LC57
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,296]
+ ldrb w2, [x22,304]
adrp x1, .LC58
mov x0, x21
add x1, x1, :lo12:.LC58
bl sprintf
add x21, x21, x0, sxtw
- ldrb w2, [x22,304]
+ ldrh w2, [x22,300]
adrp x1, .LC59
mov x0, x21
add x1, x1, :lo12:.LC59
bl sprintf
add x21, x21, x0, sxtw
- ldrh w2, [x22,300]
- adrp x1, .LC60
- mov x0, x21
- add x1, x1, :lo12:.LC60
- bl sprintf
- add x21, x21, x0, sxtw
ldr w3, [x22,344]
- adrp x1, .LC61
+ adrp x1, .LC60
ldr w2, [x22,160]
- add x1, x1, :lo12:.LC61
+ add x1, x1, :lo12:.LC60
ldr w4, [x22,436]
mov x0, x21
ldr w5, [x22,428]
bl sprintf
add x19, x21, x0, sxtw
ldr w2, [x22,424]
+ adrp x1, .LC61
+ mov x0, x19
+ add x1, x1, :lo12:.LC61
+ bl sprintf
+ add x19, x19, x0, sxtw
+ ldr w2, [x22,448]
adrp x1, .LC62
mov x0, x19
add x1, x1, :lo12:.LC62
bl sprintf
add x19, x19, x0, sxtw
- ldr w2, [x22,448]
+ ldrh w2, [x22,864]
adrp x1, .LC63
mov x0, x19
add x1, x1, :lo12:.LC63
bl sprintf
add x19, x19, x0, sxtw
- ldrh w2, [x22,864]
+ ldrh w2, [x22,866]
adrp x1, .LC64
mov x0, x19
add x1, x1, :lo12:.LC64
bl sprintf
add x19, x19, x0, sxtw
- ldrh w2, [x22,866]
+ ldr w2, [x22,868]
adrp x1, .LC65
mov x0, x19
add x1, x1, :lo12:.LC65
bl sprintf
add x19, x19, x0, sxtw
- ldr w2, [x22,868]
+ ldrh w2, [x22,872]
adrp x1, .LC66
- mov x0, x19
add x1, x1, :lo12:.LC66
- bl sprintf
- add x19, x19, x0, sxtw
- ldrh w2, [x22,872]
- adrp x1, .LC67
- add x1, x1, :lo12:.LC67
mov x0, x19
bl sprintf
add x19, x19, x0, sxtw
bl GetFreeBlockMinEraseCount
uxth w2, w0
- adrp x1, .LC68
+ adrp x1, .LC67
mov x0, x19
- add x1, x1, :lo12:.LC68
+ add x1, x1, :lo12:.LC67
bl sprintf
add x19, x19, x0, sxtw
ldrh w0, [x22,-8]
bl GetFreeBlockMaxEraseCount
uxth w2, w0
- adrp x1, .LC69
+ adrp x1, .LC68
mov x0, x19
- add x1, x1, :lo12:.LC69
+ add x1, x1, :lo12:.LC68
bl sprintf
add x19, x19, x0, sxtw
ldrh w0, [x22,296]
mov w1, 65535
cmp w0, w1
- beq .L593
+ beq .L585
ubfiz x2, x0, 1, 16
ldr x3, [x22,-40]
- adrp x1, .LC70
+ adrp x1, .LC69
mov x0, x19
- add x1, x1, :lo12:.LC70
+ add x1, x1, :lo12:.LC69
ldrh w2, [x3,x2]
bl sprintf
add x19, x19, x0, sxtw
-.L593:
+.L585:
mov w0, 0
- adrp x22, .LC71
+ adrp x22, .LC70
mov w20, 0
- mov w28, 65535
+ mov w27, 65535
bl List_get_gc_head_node
- mov w27, 6
+ mov w26, 6
uxth w3, w0
- add x22, x22, :lo12:.LC71
-.L595:
- cmp w3, w28
- beq .L594
- add x21, x25, :lo12:.LANCHOR2
+ add x22, x22, :lo12:.LC70
+.L587:
+ cmp w3, w27
+ beq .L586
+ add x21, x24, :lo12:.LANCHOR2
ubfiz x6, x3, 1, 16
- umull x26, w3, w27
+ umull x25, w3, w26
mov x0, x19
mov w2, w20
ldr x5, [x21,-56]
ldr x4, [x21,-40]
add w20, w20, 1
ldr x7, [x21,-80]
- add x5, x5, x26
+ add x5, x5, x25
ldrh w4, [x4,x6]
ldrh w5, [x5,4]
ldrh w6, [x7,x6]
add x19, x19, x0, sxtw
ldr x0, [x21,-56]
cmp w20, 16
- ldrh w3, [x0,x26]
- bne .L595
-.L594:
- add x1, x25, :lo12:.LANCHOR2
- adrp x22, .LC72
+ ldrh w3, [x0,x25]
+ bne .L587
+.L586:
+ add x1, x24, :lo12:.LANCHOR2
+ adrp x22, .LC71
mov w20, 0
- mov w28, 65535
- mov w27, 6
- add x22, x22, :lo12:.LC72
+ mov w27, 65535
+ mov w26, 6
+ add x22, x22, :lo12:.LC71
ldr x0, [x1,-16]
ldr x3, [x1,-56]
sub x3, x0, x3
asr x3, x3, 1
madd x3, x0, x3, x3
uxth w3, w3
-.L597:
- cmp w3, w28
- beq .L596
- add x21, x25, :lo12:.LANCHOR2
+.L589:
+ cmp w3, w27
+ beq .L588
+ add x21, x24, :lo12:.LANCHOR2
ubfiz x5, x3, 1, 16
- umull x26, w3, w27
+ umull x25, w3, w26
mov x0, x19
mov w2, w20
ldr x4, [x21,-56]
mov x1, x22
ldr x6, [x21,-80]
add w20, w20, 1
- add x4, x4, x26
+ add x4, x4, x25
ldrh w5, [x6,x5]
ldrh w4, [x4,4]
bl sprintf
add x19, x19, x0, sxtw
ldr x0, [x21,-56]
cmp w20, 4
- ldrh w3, [x0,x26]
- bne .L597
-.L596:
+ ldrh w3, [x0,x25]
+ bne .L589
+.L588:
sub w0, w19, w23
-.L592:
- ldr x2, [x29,120]
- ldr x1, [x24,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L598
- bl __stack_chk_fail
-.L598:
+.L584:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
- ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 128
+ ldr x27, [sp,80]
+ ldp x29, x30, [sp], 112
ret
.size FtlPrintInfo2buf, .-FtlPrintInfo2buf
.align 2
.type rknand_proc_ftlread, %function
rknand_proc_ftlread:
stp x29, x30, [sp, -32]!
- adrp x1, .LC73
- adrp x2, .LC74
+ adrp x1, .LC72
+ adrp x2, .LC73
add x29, sp, 0
- add x1, x1, :lo12:.LC73
- add x2, x2, :lo12:.LC74
+ add x1, x1, :lo12:.LC72
+ add x2, x2, :lo12:.LC73
stp x19, x20, [sp,16]
mov x20, x0
bl sprintf
ldr w2, [x0,212]
ldr w1, [x0,220]
cmp w2, w1
- bcs .L603
+ bcs .L594
adrp x1, .LANCHOR0
str wzr, [x0,204]
add x2, x1, :lo12:.LANCHOR0
ldr x5, [x0,-80]
mov x0, 0
ldrh w3, [x2,1960]
-.L604:
+.L595:
cmp w3, w0
- bls .L645
+ bls .L636
add x4, x19, :lo12:.LANCHOR2
ldrh w6, [x5,x0,lsl 1]
add x0, x0, 1
ldr w2, [x4,204]
add w2, w6, w2
str w2, [x4,204]
- b .L604
-.L645:
+ b .L595
+.L636:
add x2, x19, :lo12:.LANCHOR2
add x1, x1, :lo12:.LANCHOR0
ldr w0, [x2,204]
sub w0, w0, w3
udiv w0, w0, w1
str w0, [x2,204]
- b .L606
-.L603:
+ b .L597
+.L594:
ldr w1, [x0,216]
cmp w2, w1
- bls .L606
+ bls .L597
add w1, w1, 1
adrp x4, .LANCHOR0
str w1, [x0,216]
mov w0, 0
-.L608:
+.L599:
add x1, x4, :lo12:.LANCHOR0
ldrh w1, [x1,1960]
cmp w0, w1
- bcs .L606
+ bcs .L597
add x1, x19, :lo12:.LANCHOR2
ubfiz x2, x0, 1, 32
add w0, w0, 1
ldrh w1, [x3,x2]
add w1, w1, 1
strh w1, [x3,x2]
- b .L608
-.L606:
+ b .L599
+.L597:
add x0, x19, :lo12:.LANCHOR2
ldr w22, [x0,220]
ldr w23, [x0,212]
add w1, w22, 256
cmp w1, w23
- bls .L611
+ bls .L602
ldr w2, [x0,216]
add w1, w22, 768
cmp w1, w2
- bls .L611
+ bls .L602
ldr w0, [x0,160]
- cbz w0, .L614
+ cbz w0, .L605
cmp w22, 30
- bls .L611
-.L614:
+ bls .L602
+.L605:
mov w0, 65535
- b .L613
-.L611:
+ b .L604
+.L602:
add x0, x19, :lo12:.LANCHOR2
ldrh w0, [x0,-8]
add w0, w0, w0, lsl 1
uxth w6, w0
add w0, w22, 64
cmp w6, w0
- bcs .L625
+ bcs .L616
cmp w22, 30
- bhi .L614
-.L625:
+ bhi .L605
+.L616:
add x0, x19, :lo12:.LANCHOR2
ldr x3, [x0,-48]
- cbz x3, .L614
+ cbz x3, .L605
mov w24, 65535
ldr x5, [x0,-56]
ldr x26, [x0,-80]
mov w7, w24
add x0, x0, 1
mov w8, 6
-.L616:
+.L607:
ldrh w1, [x3]
cmp w1, w7
- beq .L618
+ beq .L609
ldrh w2, [x3,4]
- cbz w2, .L617
+ cbz w2, .L608
sub x4, x3, x5
asr x4, x4, 1
mul x4, x4, x0
and x4, x4, 65535
ldrh w2, [x26,x4,lsl 1]
cmp w2, w22
- bls .L624
+ bls .L615
cmp w2, w24
- bcs .L617
+ bcs .L608
mov w24, w2
mov w20, w3
-.L617:
+.L608:
umull x3, w1, w8
add x3, x5, x3
- b .L616
-.L624:
+ b .L607
+.L615:
mov w20, w3
-.L618:
+.L609:
mov w0, 65535
cmp w20, w0
- beq .L614
+ beq .L605
ubfiz x25, x20, 1, 16
ldrh w21, [x26,x25]
cmp w21, w22
- bls .L620
+ bls .L611
str x6, [x29,88]
bl GetFreeBlockMinEraseCount
ldr x6, [x29,88]
cmp w22, w0, uxth
- bcs .L620
+ bcs .L611
add x0, x19, :lo12:.LANCHOR2
str w24, [x0,220]
-.L620:
+.L611:
cmp w21, 29
- bhi .L621
+ bhi .L612
add x0, x19, :lo12:.LANCHOR2
ldr w0, [x0,160]
- cbz w0, .L621
+ cbz w0, .L612
add w0, w21, 10
cmp w0, w23
- bls .L622
+ bls .L613
adrp x0, .LANCHOR0+2016
ldrh w0, [x0,#:lo12:.LANCHOR0+2016]
cmp w0, w21
- bls .L621
-.L622:
+ bls .L612
+.L613:
add x22, x19, :lo12:.LANCHOR2
ldrh w0, [x22,-24]
cmp w0, 64
- bls .L621
- adrp x0, .LC75
+ bls .L612
+ adrp x0, .LC74
ldrh w2, [x26,x25]
- add x0, x0, :lo12:.LC75
+ add x0, x0, :lo12:.LC74
mov w1, w20
bl printk
mov w0, 1
str w0, [x22,876]
- b .L644
-.L621:
+ b .L635
+.L612:
cmp w21, w23
- bcs .L614
+ bcs .L605
add w0, w21, 128
cmp w6, w0
- ble .L614
+ ble .L605
add w0, w21, 256
cmp w0, w23
- bcc .L623
+ bcc .L614
add x0, x19, :lo12:.LANCHOR2
add w21, w21, 768
ldr w0, [x0,216]
cmp w21, w0
- bcs .L614
-.L623:
+ bcs .L605
+.L614:
add x19, x19, :lo12:.LANCHOR2
- adrp x0, .LC76
+ adrp x0, .LC75
ldrh w5, [x26,x25]
- add x0, x0, :lo12:.LC76
+ add x0, x0, :lo12:.LC75
mov w1, w20
mov w2, w23
ldr x4, [x19,-40]
bl printk
mov w0, 1
str w0, [x19,876]
-.L644:
+.L635:
mov w0, w20
-.L613:
+.L604:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
mov w1, 65535
cmp w0, w1
add x29, sp, 0
- beq .L647
+ beq .L638
adrp x2, .LANCHOR2-40
ubfiz x1, x0, 1, 16
ldr x2, [x2,#:lo12:.LANCHOR2-40]
strh wzr, [x2,x1]
bl INSERT_FREE_LIST
-.L647:
+.L638:
mov w0, 0
ldp x29, x30, [sp], 16
ret
mov w6, 4
mov w13, 56
str wzr, [x0,880]
-.L649:
+.L640:
add x5, x10, :lo12:.LANCHOR0
adrp x9, .LANCHOR0
ldrh w0, [x5,1952]
cmp w1, w0
- bcs .L653
+ bcs .L644
add x2, x3, :lo12:.LANCHOR2
umull x4, w1, w11
ldr x7, [x2,888]
str x2, [x0,8]
ldr x2, [x7,8]
str x2, [x0,16]
- b .L649
-.L653:
+ b .L640
+.L644:
mov w8, 24
mov w5, 4
-.L651:
+.L642:
add x2, x3, :lo12:.LANCHOR2
ldr w1, [x2,920]
cmp w0, w1
- bcs .L654
+ bcs .L645
umull x4, w0, w8
ldr x7, [x2,888]
add x6, x9, :lo12:.LANCHOR0
uxth w0, w0
add x1, x2, x1, sxtw 2
str x1, [x4,8]
- b .L651
-.L654:
+ b .L642
+.L645:
ret
.size FtlGcBufInit, .-FtlGcBufInit
.align 2
mov w9, 24
ldr w8, [x2,920]
ldr x5, [x2,888]
-.L656:
+.L647:
cmp w3, w1
- bcs .L655
+ bcs .L646
umull x4, w3, w7
mov w2, 0
add x4, x0, x4
-.L661:
+.L652:
cmp w2, w8
- bcs .L658
+ bcs .L649
umull x6, w2, w9
add x10, x5, x6
ldr x11, [x5,x6]
ldr x6, [x4,8]
cmp x11, x6
- bne .L657
+ bne .L648
str wzr, [x10,16]
- b .L658
-.L657:
+ b .L649
+.L648:
add w2, w2, 1
uxth w2, w2
- b .L661
-.L658:
+ b .L652
+.L649:
add w3, w3, 1
uxth w3, w3
- b .L656
-.L655:
+ b .L647
+.L646:
ret
.size FtlGcBufFree, .-FtlGcBufFree
.align 2
ldr w5, [x2,920]
ldr x6, [x2,888]
mov w2, 0
-.L663:
+.L654:
cmp w2, w1
- bcs .L669
+ bcs .L660
mov w3, 0
-.L667:
+.L658:
cmp w3, w5
- bcs .L665
+ bcs .L656
umull x4, w3, w7
add x4, x6, x4
ldr w10, [x4,16]
- cbnz w10, .L664
+ cbnz w10, .L655
umull x3, w2, w9
str w8, [x4,16]
add x3, x0, x3
str x10, [x3,8]
ldr x4, [x4,8]
str x4, [x3,16]
- b .L665
-.L664:
+ b .L656
+.L655:
add w3, w3, 1
uxth w3, w3
- b .L667
-.L665:
+ b .L658
+.L656:
add w2, w2, 1
uxth w2, w2
- b .L663
-.L669:
+ b .L654
+.L660:
ret
.size FtlGcBufAlloc, .-FtlGcBufAlloc
.align 2
ldrh w2, [x1,924]
ldr x3, [x1,928]
mov x1, 0
-.L671:
+.L662:
cmp w2, w1, uxth
- bls .L675
+ bls .L666
add x1, x1, 1
add x4, x3, x1, lsl 1
ldrh w4, [x4,-2]
cmp w4, w0
- bne .L671
+ bne .L662
mov w0, 1
- b .L672
-.L675:
+ b .L663
+.L666:
mov w0, 0
-.L672:
+.L663:
ret
.size IsBlkInGcList, .-IsBlkInGcList
.align 2
mov x5, 0
ldrh w7, [x4,924]
ldr x6, [x4,928]
-.L677:
+.L668:
uxth w4, w5
cmp w4, w7
- bcs .L681
+ bcs .L672
add x5, x5, 1
add x9, x6, x5, lsl 1
ldrh w9, [x9,-2]
cmp w9, w8
- bne .L677
-.L681:
+ bne .L668
+.L672:
cmp w4, w7
- bne .L679
+ bne .L670
ubfiz x4, x4, 1, 16
strh w0, [x6,x4]
add x0, x3, :lo12:.LANCHOR2
ldrh w4, [x0,924]
add w4, w4, 1
strh w4, [x0,924]
-.L679:
+.L670:
add x3, x3, :lo12:.LANCHOR2
mov w0, 12
ldrh w4, [x3,936]
add x29, sp, 0
str x19, [sp,16]
uxth w19, w0
- adrp x0, .LC77
+ adrp x0, .LC76
mov w1, w19
- add x0, x0, :lo12:.LC77
+ add x0, x0, :lo12:.LC76
bl printk
adrp x2, .LANCHOR2
mov w0, 65535
add x2, x2, :lo12:.LANCHOR2
ldrh w1, [x2,952]
cmp w1, w0
- bne .L684
+ bne .L675
strh w19, [x2,952]
- b .L685
-.L684:
+ b .L676
+.L675:
ldrh w1, [x2,954]
cmp w1, w0
- bne .L685
+ bne .L676
strh w19, [x2,954]
-.L685:
+.L676:
mov w0, 0
ldr x19, [sp,16]
ldp x29, x30, [sp], 32
bl P2V_block_in_plane
uxth w21, w0
ldrh w1, [x22,956]
- adrp x0, .LC78
+ adrp x0, .LC77
mov w2, w20
- add x0, x0, :lo12:.LC78
+ add x0, x0, :lo12:.LC77
bl printk
mov w0, w21
bl FtlGcRefreshBlock
ldr w0, [x22,160]
- cbz w0, .L687
+ cbz w0, .L678
ubfiz x0, x21, 1, 16
ldr x2, [x22,-80]
ldrh w1, [x2,x0]
cmp w1, 29
- bls .L687
+ bls .L678
sub w1, w1, #30
strh w1, [x2,x0]
-.L687:
+.L678:
add x2, x19, :lo12:.LANCHOR2
mov x0, 0
add x2, x2, 960
ldrh w1, [x2,-4]
-.L688:
+.L679:
cmp w1, w0, uxth
- bls .L694
+ bls .L685
add x0, x0, 1
add x3, x2, x0, lsl 1
ldrh w3, [x3,-2]
cmp w3, w20
- bne .L688
- b .L689
-.L694:
+ bne .L679
+ b .L680
+.L685:
cmp w1, 15
- bhi .L689
+ bhi .L680
add x19, x19, :lo12:.LANCHOR2
add w0, w1, 1
add x19, x19, 960
strh w0, [x19,-4]
strh w20, [x19,w1,sxtw 1]
-.L689:
+.L680:
mov w0, 0
ldr x23, [sp,48]
ldp x19, x20, [sp,16]
adrp x19, .LANCHOR2
add x0, x19, :lo12:.LANCHOR2
ldrh w1, [x0,956]
- cbz w1, .L696
+ cbz w1, .L687
ldrh w3, [x0,952]
mov w2, 65535
cmp w3, w2
- bne .L696
+ bne .L687
ldrh w2, [x0,994]
cmp w2, w1
- bcc .L697
+ bcc .L688
strh wzr, [x0,994]
-.L697:
+.L688:
add x19, x19, :lo12:.LANCHOR2
add x0, x19, 960
ldrh w1, [x19,994]
ldrh w0, [x19,994]
add w0, w0, 1
strh w0, [x19,994]
-.L696:
+.L687:
mov w0, 0
ldr x19, [sp,16]
ldp x29, x30, [sp], 32
add x29, sp, 0
stp x19, x20, [sp,16]
mov w20, w1
- cbnz w0, .L703
+ cbnz w0, .L694
adrp x1, .LANCHOR0
mov x0, 0
add x1, x1, :lo12:.LANCHOR0
-.L704:
+.L695:
add x2, x1, 196
strh w0, [x2,x0,lsl 1]
add x0, x0, 1
cmp x0, 256
- bne .L704
-.L710:
+ bne .L695
+.L701:
adrp x19, .LANCHOR2
mov w1, 255
add x19, x19, :lo12:.LANCHOR2
adrp x1, .LANCHOR0
mov x0, 0
add x1, x1, :lo12:.LANCHOR0
- b .L705
-.L703:
+ b .L696
+.L694:
cmp w0, 1
- bne .L706
+ bne .L697
adrp x3, .LANCHOR0
mov x0, 0
mov w4, 3
mov w5, 2
add x3, x3, :lo12:.LANCHOR0
-.L709:
+.L700:
cmp x0, 3
uxth w1, w0
mov w2, w1
- bls .L707
+ bls .L698
ubfiz w2, w1, 1, 15
and w1, w1, 1
cmp w1, wzr
csel w1, w4, w5, ne
sub w2, w2, w1
uxth w2, w2
-.L707:
+.L698:
add x1, x3, 196
strh w2, [x1,x0,lsl 1]
add x0, x0, 1
cmp x0, 256
- bne .L709
- b .L710
-.L706:
+ bne .L700
+ b .L701
+.L697:
cmp w0, 2
- bne .L711
+ bne .L702
adrp x3, .LANCHOR0
mov w1, 65535
mov x0, 0
add x3, x3, :lo12:.LANCHOR0
-.L713:
+.L704:
add x4, x3, 196
cmp x0, 1
uxth w2, w0
add x0, x0, 1
cmp x0, 256
uxth w1, w1
- bne .L713
- b .L710
-.L711:
+ bne .L704
+ b .L701
+.L702:
cmp w0, 3
- bne .L714
+ bne .L705
adrp x3, .LANCHOR0
mov x0, 0
mov w4, 5
mov w5, 4
add x3, x3, :lo12:.LANCHOR0
-.L717:
+.L708:
cmp x0, 5
uxth w1, w0
mov w2, w1
- bls .L715
+ bls .L706
ubfiz w2, w1, 1, 15
and w1, w1, 1
cmp w1, wzr
csel w1, w4, w5, ne
sub w2, w2, w1
uxth w2, w2
-.L715:
+.L706:
add x1, x3, 196
strh w2, [x1,x0,lsl 1]
add x0, x0, 1
cmp x0, 256
- bne .L717
- b .L710
-.L714:
+ bne .L708
+ b .L701
+.L705:
cmp w0, 4
- bne .L718
+ bne .L709
adrp x1, .LANCHOR0
mov w5, 7
add x1, x1, :lo12:.LANCHOR0
strh w0, [x2,14]
mov w0, 8
strh w1, [x2,6]
-.L720:
+.L711:
and w3, w0, 1
ubfiz w1, w0, 1, 15
add w0, w0, 1
sub w1, w1, w3
cmp w0, 256
strh w1, [x2,14]
- bne .L720
- b .L710
-.L718:
+ bne .L711
+ b .L701
+.L709:
cmp w0, 5
- bne .L721
+ bne .L712
adrp x2, .LANCHOR0
mov x0, 0
add x2, x2, :lo12:.LANCHOR0
-.L722:
+.L713:
add x1, x2, 196
strh w0, [x1,x0,lsl 1]
add x0, x0, 1
cmp x0, 16
- bne .L722
+ bne .L713
mov x0, 0
-.L723:
+.L714:
add x2, x1, x0
add w3, w0, 16
add x0, x0, 2
cmp x0, 480
strh w3, [x2,32]
- bne .L723
- b .L710
-.L721:
+ bne .L714
+ b .L701
+.L712:
cmp w0, 6
- bne .L710
+ bne .L701
adrp x1, .LANCHOR0
mov x2, 0
mov w4, 12
mov w5, 10
add x1, x1, :lo12:.LANCHOR0
-.L726:
+.L717:
cmp x2, 5
uxth w3, w2
mov w0, w3
- bls .L724
+ bls .L715
add w0, w3, w3, lsl 1
and w3, w3, 1
cmp w3, wzr
csel w3, w4, w5, ne
sub w0, w0, w3
uxth w0, w0
-.L724:
+.L715:
add x3, x1, 196
strh w0, [x3,x2,lsl 1]
add x2, x2, 1
cmp x2, 256
- bne .L726
- b .L710
-.L705:
+ bne .L717
+ b .L701
+.L696:
cmp w20, w0, uxth
- bls .L744
+ bls .L735
add x2, x1, 196
ldrh w2, [x2,x0,lsl 1]
add x0, x0, 1
strh w2, [x19,w2,sxtw 1]
- b .L705
-.L744:
+ b .L696
+.L735:
ldp x19, x20, [sp,16]
ldp x29, x30, [sp], 32
ret
ldrh w1, [x1,#:lo12:.LANCHOR1+482]
strb wzr, [x0,1845]
cmp w1, 256
- bls .L746
+ bls .L737
mov w1, 512
- b .L762
-.L746:
+ b .L753
+.L737:
cmp w1, 128
- bls .L762
+ bls .L753
mov w1, 256
-.L762:
+.L753:
add x19, x21, :lo12:.LANCHOR0
str w1, [x0,12]
mov w2, 8
bl ftl_memset
ldr x20, [x19,744]
add x23, x20, 1
-.L750:
+.L741:
ldrb w2, [x20]
mov x0, x23
add x1, x26, x24, lsl 3
bl FlashMemCmp8
- cbnz w0, .L749
+ cbnz w0, .L740
ldrb w1, [x19,1845]
str w0, [x25,w1,sxtw 2]
add w0, w1, 1
add x1, x19, x1, sxtw
strb w0, [x19,1845]
strb w24, [x1,1848]
-.L749:
+.L740:
add x24, x24, 1
cmp x24, 4
- bne .L750
+ bne .L741
add x19, x21, :lo12:.LANCHOR0
add x0, x22, :lo12:.LANCHOR2
ldrb w1, [x19,1845]
strb w1, [x0,2020]
ldrb w0, [x20,8]
cmp w0, 2
- beq .L751
-.L755:
+ beq .L742
+.L746:
add x21, x21, :lo12:.LANCHOR0
ldrb w1, [x20,13]
add x22, x22, :lo12:.LANCHOR2
ldp x21, x22, [sp,32]
ldp x29, x30, [sp], 96
ret
-.L751:
+.L742:
ldr w26, [x19,12]
mov x24, 0
add x27, x19, 1620
add x25, x19, 708
-.L754:
+.L745:
ldrb w2, [x20]
mov x0, x23
add x1, x27, x24, lsl 3
bl FlashMemCmp8
- cbnz w0, .L752
+ cbnz w0, .L743
ldrb w1, [x20,13]
ldrb w3, [x19,1845]
mul w0, w1, w26
mul w1, w0, w1
str w1, [x25,w3,sxtw 2]
ldrb w0, [x20,23]
- cbz w0, .L753
+ cbz w0, .L744
lsl w1, w1, 1
str w1, [x25,w3,sxtw 2]
-.L753:
+.L744:
add x0, x19, x3
add w2, w2, 1
strb w2, [x19,1845]
strb w24, [x0,1848]
-.L752:
+.L743:
add x24, x24, 1
cmp x24, 4
- bne .L754
- b .L755
+ bne .L745
+ b .L746
.size FlashDieInfoInit, .-FlashDieInfoInit
.align 2
.global ReadFlashInfo
strb w0, [x19,9]
mov x0, 0
strb wzr, [x19,10]
-.L764:
+.L755:
cmp w4, w0, uxtb
- bls .L766
+ bls .L757
add x2, x1, 1848
ldrb w3, [x19,10]
ldrb w2, [x0,x2]
lsl w2, w5, w2
orr w2, w2, w3
strb w2, [x19,10]
- b .L764
-.L766:
+ b .L755
+.L757:
ldr x19, [sp,16]
ldp x29, x30, [sp], 32
ret
strh wzr, [x0,994]
str w2, [x0,2040]
cmp w2, w1
- bls .L768
+ bls .L759
str w1, [x0,2040]
-.L768:
+.L759:
add x20, x22, :lo12:.LANCHOR0
add x19, x21, :lo12:.LANCHOR2
mov w24, 56
ldrh w5, [x20,1974]
mov w0, 1
mov w2, w4
-.L769:
+.L760:
cmp w0, w5
add x1, x1, 8
- bcs .L869
+ bcs .L860
ldr x3, [x20,2144]
add w0, w0, 1
add x3, x3, x2, uxtw 2
add w2, w2, w4
str x3, [x1,32]
- b .L769
-.L869:
+ b .L760
+.L860:
add x1, x22, :lo12:.LANCHOR0
-.L771:
+.L762:
cmp w0, 8
- beq .L870
+ beq .L861
add x2, x1, x0, uxtw 3
add w0, w0, 1
str xzr, [x2,2144]
- b .L771
-.L870:
+ b .L762
+.L861:
add x0, x21, :lo12:.LANCHOR2
ldr x1, [x0,2168]
- cbnz x1, .L773
-.L775:
- adrp x0, .LC79
+ cbnz x1, .L764
+.L766:
+ adrp x0, .LC78
adrp x1, .LANCHOR3
- add x0, x0, :lo12:.LC79
+ add x0, x0, :lo12:.LC78
add x1, x1, :lo12:.LANCHOR3
bl printk
mov w0, -1
- b .L774
-.L773:
+ b .L765
+.L764:
ldr x1, [x0,2176]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2208]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2216]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,144]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2224]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,-56]
- cbz x1, .L775
+ cbz x1, .L766
add x22, x22, :lo12:.LANCHOR0
ldr x1, [x22,2144]
- cbz x1, .L775
+ cbz x1, .L766
ldr x0, [x0,-40]
- cbz x0, .L775
+ cbz x0, .L766
add x0, x21, :lo12:.LANCHOR2
ldr x1, [x0,928]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,944]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2048]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2064]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,-88]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,912]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2056]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,-64]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2072]
- cbz x1, .L775
+ cbz x1, .L766
ldr x0, [x0,2080]
- cbz x0, .L775
+ cbz x0, .L766
add x0, x21, :lo12:.LANCHOR2
ldr x1, [x0,896]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2096]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2104]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,888]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2112]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2120]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,904]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,-80]
- cbz x1, .L775
+ cbz x1, .L766
ldr x0, [x0,2144]
- cbz x0, .L775
+ cbz x0, .L766
adrp x0, .LANCHOR0+2080
ldr x0, [x0,#:lo12:.LANCHOR0+2080]
- cbz x0, .L775
+ cbz x0, .L766
adrp x0, .LANCHOR2
add x0, x0, :lo12:.LANCHOR2
ldr x1, [x0,2184]
- cbz x1, .L775
+ cbz x1, .L766
ldr x1, [x0,2192]
- cbz x1, .L775
+ cbz x1, .L766
ldr x0, [x0,2200]
- cbz x0, .L775
+ cbz x0, .L766
mov w0, 0
-.L774:
+.L765:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
mov x3, 0
mov w0, 65535
mov w5, 1
-.L873:
+.L864:
ldrh w2, [x20,x3]
cmp w2, w0
- beq .L871
+ beq .L862
ubfx x4, x2, 5, 11
add x3, x3, 2
lsl x4, x4, 2
ldr w1, [x19,x4]
orr w2, w1, w2
str w2, [x19,x4]
- bne .L873
-.L871:
+ bne .L864
+.L862:
ldp x19, x20, [sp,16]
ldp x29, x30, [sp], 32
ret
mov x0, x21
bl ftl_memset
mov w0, 0
-.L879:
+.L870:
ldrh w1, [x19,6]
cmp w1, w0
- bls .L892
+ bls .L883
ubfiz x1, x0, 2, 16
ldr w2, [x20,x1]
mov w1, 0
ubfx x2, x2, 10, 16
-.L880:
+.L871:
ldrh w3, [x19,10]
cmp w3, w1
- bls .L893
+ bls .L884
ubfiz x3, x1, 1, 16
ldrh w4, [x25,x3]
cmp w4, w2
- bne .L881
+ bne .L872
ldrh w4, [x21,x3]
add w4, w4, 1
strh w4, [x21,x3]
-.L881:
+.L872:
add w1, w1, 1
uxth w1, w1
- b .L880
-.L893:
+ b .L871
+.L884:
add w0, w0, 1
uxth w0, w0
- b .L879
-.L892:
+ b .L870
+.L883:
mov w24, 0
ldrh w26, [x21]
mov w20, w24
adrp x27, .LANCHOR0
-.L884:
+.L875:
ldrh w0, [x19,10]
cmp w0, w20
- bls .L894
+ bls .L885
ldrh w0, [x19]
uxtw x22, w20
cmp w0, w20
- bne .L885
+ bne .L876
add x0, x27, :lo12:.LANCHOR0
ldrh w1, [x19,2]
ldrh w0, [x0,2028]
cmp w1, w0
- bcs .L885
+ bcs .L876
strh w0, [x21,x22,lsl 1]
-.L885:
+.L876:
lsl x22, x22, 1
ldrh w23, [x21,x22]
cmp w26, w23
- bls .L886
+ bls .L877
mov w24, w20
mov w26, w23
-.L886:
- cbnz w23, .L887
+.L877:
+ cbnz w23, .L878
ldrh w0, [x25,x22]
- cbz w0, .L887
+ cbz w0, .L878
mov w1, 1
bl FtlFreeSysBlkQueueIn
strh w23, [x25,x22]
ldrh w0, [x19,8]
sub w0, w0, #1
strh w0, [x19,8]
-.L887:
+.L878:
add w20, w20, 1
uxth w20, w20
- b .L884
-.L894:
+ b .L875
+.L885:
mov w0, w24
ldr x27, [sp,80]
ldp x19, x20, [sp,16]
bl ftl_memset
mov w1, 0
mov w5, -1
-.L896:
+.L887:
add x3, x20, :lo12:.LANCHOR0
ldrh w0, [x3,2066]
cmp w0, w1
- bls .L898
+ bls .L889
add x4, x19, :lo12:.LANCHOR2
ubfiz x0, x1, 4, 16
ldr x2, [x4,144]
and x0, x0, -4
add x0, x3, x0
str x0, [x2,8]
- b .L896
-.L898:
+ b .L887
+.L889:
add x0, x19, :lo12:.LANCHOR2
mov w2, -1
add x1, x0, 2240
str xzr, [x20,-32]
strh wzr, [x20,-24]
strh wzr, [x20,-8]
-.L901:
+.L892:
add x0, x24, :lo12:.LANCHOR0
ldrh w1, [x0,1960]
cmp w1, w19
- bls .L907
+ bls .L898
mov x28, 0
ldrh w3, [x0,1952]
ldrh w2, [x0,2026]
mov w20, w28
mov x27, x0
-.L908:
+.L899:
cmp w3, w28, uxth
- bls .L912
+ bls .L903
add x0, x27, 1984
mov w1, w19
str x2, [x29,96]
bl FtlBbmIsBadBlock
ldr x3, [x29,104]
ldr x2, [x29,96]
- cbnz w0, .L902
+ cbnz w0, .L893
add w20, w20, w2
uxth w20, w20
-.L902:
+.L893:
add x28, x28, 1
- b .L908
-.L912:
- cbz w20, .L904
+ b .L899
+.L903:
+ cbz w20, .L895
mov w0, 32768
sdiv w20, w0, w20
-.L904:
+.L895:
ldr x1, [x21,-56]
umull x0, w19, w26
add x0, x1, x0
strh w20, [x0,4]
ldrh w0, [x21]
cmp w0, w19
- beq .L905
+ beq .L896
ldrh w0, [x21,48]
cmp w0, w19
- beq .L905
+ beq .L896
ldrh w0, [x21,96]
cmp w0, w19
- beq .L905
+ beq .L896
ubfiz x0, x19, 1, 16
ldr x1, [x21,-40]
ldrh w0, [x1,x0]
- cbnz w0, .L906
+ cbnz w0, .L897
add w4, w25, 1
mov w0, w19
uxth w25, w4
bl INSERT_FREE_LIST
- b .L905
-.L906:
+ b .L896
+.L897:
add w23, w23, 1
mov w0, w19
uxth w23, w23
bl INSERT_DATA_LIST
-.L905:
+.L896:
add w19, w19, 1
uxth w19, w19
- b .L901
-.L907:
+ b .L892
+.L898:
add x22, x22, :lo12:.LANCHOR2
mov w0, 0
ldp x19, x20, [sp,16]
stp x29, x30, [sp, -16]!
mov w1, w0
add x29, sp, 0
- cbz w0, .L915
+ cbz w0, .L906
sub w2, w0, #1
cmp w2, 5
- bhi .L917
+ bhi .L908
bl HynixGetReadRetryDefault
- b .L915
-.L917:
+ b .L906
+.L908:
cmp w0, 49
- bne .L918
+ bne .L909
adrp x0, .LANCHOR0
mov w2, 64
add x0, x0, :lo12:.LANCHOR0
adrp x1, .LANCHOR1
add x1, x1, :lo12:.LANCHOR1
add x1, x1, 408
- b .L933
-.L918:
+ b .L924
+.L909:
sub w0, w0, #65
cmp w0, 1
- bls .L924
+ bls .L915
cmp w1, 33
- bne .L919
-.L924:
+ bne .L910
+.L915:
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
strb w1, [x0,760]
mov w1, 4
- b .L934
-.L919:
+ b .L925
+.L910:
cmp w1, 67
- beq .L925
+ beq .L916
cmp w1, 34
- bne .L921
-.L925:
+ bne .L912
+.L916:
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
strb w1, [x0,760]
mov w1, 5
-.L934:
+.L925:
strb w1, [x0,761]
mov w1, 7
strb w1, [x0,762]
add x0, x0, 764
add x1, x1, 256
mov w2, 45
- b .L933
-.L921:
+ b .L924
+.L912:
cmp w1, 68
- beq .L926
+ beq .L917
cmp w1, 35
- bne .L915
-.L926:
+ bne .L906
+.L917:
adrp x0, .LANCHOR0
mov w2, 95
add x0, x0, :lo12:.LANCHOR0
adrp x1, .LANCHOR1
add x1, x1, :lo12:.LANCHOR1
add x1, x1, 304
-.L933:
+.L924:
bl ftl_memcpy
-.L915:
+.L906:
ldp x29, x30, [sp], 16
ret
.size FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
add x21, x21, 536
mov w19, 0
add x22, x22, 1620
-.L940:
+.L931:
ldrb w2, [x21]
add x0, x21, 1
mov x1, x22
bl FlashMemCmp8
mov w23, w0
- cbnz w0, .L937
+ cbnz w0, .L928
add x0, x20, :lo12:.LANCHOR1
ubfiz x19, x19, 5, 32
add x1, x0, 536
adds x19, x1, x19
- beq .L943
+ beq .L934
ldrb w3, [x19,22]
mov x2, 0
mov x1, x0
- b .L942
-.L937:
+ b .L933
+.L928:
add w19, w19, 1
add x21, x21, 32
cmp w19, 72
- bne .L940
- b .L943
-.L942:
+ bne .L931
+ b .L934
+.L933:
add x4, x1, x2, lsl 5
mov w0, w2
ldrb w4, [x4,2840]
cmp w4, w3
- beq .L941
+ beq .L932
add x2, x2, 1
cmp x2, 4
- bne .L942
+ bne .L933
mov w0, w2
-.L941:
+.L932:
add x20, x20, :lo12:.LANCHOR1
ubfiz x1, x0, 5, 32
adrp x0, .LANCHOR0
mov x1, x19
mov w2, 32
bl ftl_memcpy
- b .L938
-.L943:
+ b .L929
+.L934:
mov w23, -1
-.L938:
+.L929:
mov w0, w23
ldr x23, [sp,48]
ldp x19, x20, [sp,16]
add x4, x0, 4096
add x21, x0, 512
add x2, x4, x2
- bne .L948
- cbz x3, .L949
+ bne .L939
+ cbz x3, .L940
mov x0, x2
mov x1, x3
mov w2, 1024
bl ftl_memcpy
-.L949:
- cbz x20, .L947
+.L940:
+ cbz x20, .L938
mov w0, 48
lsr w19, w19, 1
ldrb w1, [x20,1]
ldrb w1, [x20,3]
orr w0, w0, w1, lsl 24
str w0, [x21,w19,sxtw 2]
- b .L947
-.L948:
- cbz x3, .L952
+ b .L938
+.L939:
+ cbz x3, .L943
mov x1, x2
mov x0, x3
mov w2, 1024
bl ftl_memcpy
-.L952:
- cbz x20, .L947
+.L943:
+ cbz x20, .L938
mov w0, 48
lsr w19, w19, 1
mul w19, w19, w0
lsr w0, w0, 24
strb w1, [x20,2]
strb w0, [x20,3]
-.L947:
+.L938:
ldp x19, x20, [sp,16]
ldr x21, [sp,32]
ldp x29, x30, [sp], 48
add x29, sp, 0
ldr x4, [x4,#:lo12:.LANCHOR4+32]
add x4, x4, 4096
- cbnz w2, .L965
+ cbnz w2, .L956
add x1, x4, x1
- b .L967
-.L965:
+ b .L958
+.L956:
add x0, x4, x1
mov x1, x6
-.L967:
+.L958:
mov w2, w3
bl ftl_memcpy
ldp x29, x30, [sp], 16
stp x21, x22, [sp,32]
stp x23, x24, [sp,48]
mov x19, 0
- adrp x23, .LC80
- adrp x21, .LC81
- adrp x24, .LC73
+ adrp x23, .LC79
+ adrp x21, .LC80
+ adrp x24, .LC72
stp x25, x26, [sp,64]
str x27, [sp,80]
mov x22, x1
mov w25, w2
uxtw x26, w3
mov w20, w19
- add x23, x23, :lo12:.LC80
- add x21, x21, :lo12:.LC81
- add x24, x24, :lo12:.LC73
-.L974:
+ add x23, x23, :lo12:.LC79
+ add x21, x21, :lo12:.LC80
+ add x24, x24, :lo12:.LC72
+.L965:
cmp x19, x26
- beq .L982
- cbnz w20, .L975
+ beq .L973
+ cbnz w20, .L966
mov x0, x23
mov x1, x27
mov w2, w19
bl printk
-.L975:
+.L966:
cmp w25, 4
mov x0, x21
- bne .L976
+ bne .L967
ldr w1, [x22,x19,lsl 2]
- b .L981
-.L976:
+ b .L972
+.L967:
cmp w25, 2
- bne .L978
+ bne .L969
ldrsh w1, [x22,x19,lsl 1]
- b .L981
-.L978:
+ b .L972
+.L969:
ldrb w1, [x22,x19]
-.L981:
+.L972:
bl printk
add w20, w20, 1
cmp w20, 15
- bls .L979
- adrp x1, .LC82
+ bls .L970
+ adrp x1, .LC81
mov x0, x24
- add x1, x1, :lo12:.LC82
+ add x1, x1, :lo12:.LC81
mov w20, 0
bl printk
-.L979:
+.L970:
add x19, x19, 1
- b .L974
-.L982:
- adrp x0, .LC73
- adrp x1, .LC82
- add x1, x1, :lo12:.LC82
- add x0, x0, :lo12:.LC73
+ b .L965
+.L973:
+ adrp x0, .LC72
+ adrp x1, .LC81
+ add x1, x1, :lo12:.LC81
+ add x0, x0, :lo12:.LC72
bl printk
ldr x27, [sp,80]
ldp x19, x20, [sp,16]
ldr x19, [x2,x0]
ldr w0, [x1,20]
cmp w0, 3
- bls .L1014
+ bls .L1005
ldr w0, [x19,16]
- tbz x0, 2, .L1014
+ tbz x0, 2, .L1005
mov x0, x19
bl wait_for_nandc_xfer_completed
ldr w21, [x19,16]
ldr w0, [x19,8]
ubfx x21, x21, 1, 1
str w0, [x29,64]
- cbz w21, .L985
- adrp x22, .LC83
- adrp x23, .LC84
+ cbz w21, .L976
+ adrp x22, .LC82
+ adrp x23, .LC83
mov w21, 0
- add x22, x22, :lo12:.LC83
- add x23, x23, :lo12:.LC84
-.L986:
+ add x22, x22, :lo12:.LC82
+ add x23, x23, :lo12:.LC83
+.L977:
ldr w2, [x19,28]
ldr w1, [x29,64]
ubfx x2, x2, 16, 5
ubfx x1, x1, 22, 6
cmp w2, w1
- bge .L994
+ bge .L985
add x0, x20, :lo12:.LANCHOR0
ldr w0, [x0,20]
cmp w0, 5
- bhi .L987
-.L990:
+ bhi .L978
+.L981:
add w21, w21, 1
and w0, w21, 16777215
- cbnz w0, .L986
+ cbnz w0, .L977
ldr w2, [x19,28]
mov w1, w21
ldr w3, [x29,64]
mov w2, 4
mov w3, 512
bl rknand_print_hex
- b .L986
-.L987:
+ b .L977
+.L978:
ldr w0, [x19]
str w0, [x29,72]
ldr w0, [x29,72]
- tbz x0, 13, .L990
+ tbz x0, 13, .L981
ldr w0, [x29,72]
- tbz x0, 17, .L990
-.L994:
+ tbz x0, 17, .L981
+.L985:
add x19, x20, :lo12:.LANCHOR0
add x19, x19, 1888
ldr w0, [x19,40]
- cbz w0, .L995
+ cbz w0, .L986
ldr w1, [x29,64]
mov w2, 0
ldr w0, [x19,32]
ubfx x1, x1, 22, 5
lsl w1, w1, 7
bl rknand_dma_unmap_single
- b .L995
-.L985:
- adrp x22, .LC85
- adrp x23, .LC84
- add x22, x22, :lo12:.LC85
- add x23, x23, :lo12:.LC84
-.L996:
+ b .L986
+.L976:
+ adrp x22, .LC84
+ adrp x23, .LC83
+ add x22, x22, :lo12:.LC84
+ add x23, x23, :lo12:.LC83
+.L987:
ldr w0, [x29,64]
- tbnz x0, 20, .L1022
+ tbnz x0, 20, .L1013
ldr w0, [x19,8]
add w21, w21, 1
str w0, [x29,64]
and w0, w21, 16777215
- cbnz w0, .L996
+ cbnz w0, .L987
ldr w2, [x29,64]
mov w1, w21
ldr w3, [x19,28]
mov w2, 4
mov w3, 512
bl rknand_print_hex
- b .L996
-.L1022:
+ b .L987
+.L1013:
add x0, x20, :lo12:.LANCHOR0
ldr w0, [x0,1936]
- cbz w0, .L999
+ cbz w0, .L990
mov x0, x19
bl NandcSendDumpDataStart
-.L999:
+.L990:
add x21, x20, :lo12:.LANCHOR0
add x21, x21, 1888
ldr w0, [x21,40]
- cbz w0, .L1000
+ cbz w0, .L991
ldr w1, [x29,64]
mov w2, 1
ldr w0, [x21,32]
ubfx x1, x1, 22, 5
lsl w1, w1, 7
bl rknand_dma_unmap_single
-.L1000:
+.L991:
add x0, x20, :lo12:.LANCHOR0
ldr w0, [x0,1936]
- cbz w0, .L995
+ cbz w0, .L986
mov x0, x19
bl NandcSendDumpDataDone
-.L995:
+.L986:
add x20, x20, :lo12:.LANCHOR0
str wzr, [x20,1928]
- b .L983
-.L1014:
+ b .L974
+.L1005:
ldr w0, [x19,8]
str w0, [x29,64]
ldr w0, [x29,64]
- tbz x0, 20, .L1014
-.L983:
+ tbz x0, 20, .L1005
+.L974:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldr x23, [sp,48]
.global NandcXferData
.type NandcXferData, %function
NandcXferData:
- stp x29, x30, [sp, -192]!
+ stp x29, x30, [sp, -176]!
add x29, sp, 0
stp x21, x22, [sp,32]
- adrp x22, __stack_chk_guard
- uxtb w21, w1
stp x25, x26, [sp,64]
stp x19, x20, [sp,16]
stp x23, x24, [sp,48]
stp x27, x28, [sp,80]
- uxtb w26, w0
adrp x19, .LANCHOR0
- ldr x0, [x22,#:lo12:__stack_chk_guard]
- uxtb w25, w2
- str x0, [x29,184]
+ uxtb w25, w0
add x0, x19, :lo12:.LANCHOR0
- add x0, x0, x26, sxtw 4
- str x22, [x29,104]
+ add x0, x0, x25, sxtw 4
ldr x20, [x0,24]
and x0, x3, 63
- mov x27, x3
- mov x23, x4
- cbnz x0, .L1024
- cbnz x4, .L1025
- add x0, x29, 120
+ uxtb w21, w1
+ uxtb w24, w2
+ mov x26, x3
+ mov x22, x4
+ cbnz x0, .L1015
+ cbnz x4, .L1016
+ add x0, x29, 112
mov w1, 255
mov w2, 64
- add x23, x29, 120
+ add x22, x29, 112
bl ftl_memset
-.L1025:
- mov w0, w26
+.L1016:
+ mov w0, w25
mov w1, w21
- mov w2, w25
+ mov w2, w24
mov w3, 0
- mov x4, x27
- mov x5, x23
- mov w24, 0
+ mov x4, x26
+ mov x5, x22
+ mov w23, 0
bl NandcXferStart
- mov w0, w26
+ mov w0, w25
bl NandcXferComp
- cbnz w21, .L1026
+ cbnz w21, .L1017
add x1, x19, :lo12:.LANCHOR0
- ubfx x2, x25, 1, 7
+ ubfx x2, x24, 1, 7
mov w3, 128
- add x2, x23, x2, lsl 2
+ add x2, x22, x2, lsl 2
ldr w0, [x1,1940]
cmp w0, 25
mov w0, 64
csel w3, w0, w3, cc
mov w0, w21
-.L1028:
- cmp x23, x2
+.L1019:
+ cmp x22, x2
add w4, w0, w3
- beq .L1072
+ beq .L1061
ldr x5, [x1,1896]
and x0, x0, 4294967292
- add x23, x23, 4
+ add x22, x22, 4
ldr w0, [x5,x0]
- strb w0, [x23,-4]
+ strb w0, [x22,-4]
lsr w5, w0, 8
- strb w5, [x23,-3]
+ strb w5, [x22,-3]
lsr w5, w0, 16
- strb w5, [x23,-2]
+ strb w5, [x22,-2]
lsr w0, w0, 24
- strb w0, [x23,-1]
+ strb w0, [x22,-1]
mov w0, w4
- b .L1028
-.L1072:
+ b .L1019
+.L1061:
add x0, x19, :lo12:.LANCHOR0
- lsr w25, w25, 2
+ lsr w24, w24, 2
ldr w5, [x0,1940]
ldr w4, [x0,20]
mov w0, 0
- mov w24, w0
-.L1030:
- cmp w0, w25
- bcs .L1026
- cbz w5, .L1026
+ mov w23, w0
+.L1021:
+ cmp w0, w24
+ bcs .L1017
+ cbz w5, .L1017
uxtw x1, w0
add x1, x1, 8
ldr w1, [x20,x1,lsl 2]
- str w1, [x29,112]
- ldr w1, [x29,112]
- tbnz x1, 2, .L1055
- ldr w3, [x29,112]
+ str w1, [x29,104]
+ ldr w1, [x29,104]
+ tbnz x1, 2, .L1045
+ ldr w3, [x29,104]
ubfx x3, x3, 15, 1
- cbnz w3, .L1055
+ cbnz w3, .L1045
cmp w4, 5
- bls .L1032
- ldr w2, [x29,112]
+ bls .L1023
+ ldr w2, [x29,104]
ubfx x6, x2, 3, 5
- ldr w2, [x29,112]
- ldr w1, [x29,112]
+ ldr w2, [x29,104]
+ ldr w1, [x29,104]
ubfx x2, x2, 27, 1
ubfx x3, x1, 16, 5
- ldr w1, [x29,112]
+ ldr w1, [x29,104]
orr w2, w6, w2, lsl 5
ubfx x1, x1, 29, 1
orr w1, w3, w1, lsl 5
- ldr w3, [x29,112]
+ ldr w3, [x29,104]
cmp w2, w1
- bls .L1033
- ldr w1, [x29,112]
+ bls .L1024
+ ldr w1, [x29,104]
ubfx x3, x3, 3, 5
ubfx x1, x1, 27, 1
- b .L1070
-.L1033:
- ldr w1, [x29,112]
- ubfx x3, x3, 16, 5
- ubfx x1, x1, 29, 1
-.L1070:
orr w3, w3, w1, lsl 5
- b .L1034
-.L1032:
+ b .L1025
+.L1024:
+ ubfx x1, x3, 16, 5
+ ldr w3, [x29,104]
+ ubfx x3, x3, 29, 1
+ b .L1060
+.L1023:
cmp w4, 3
- bls .L1034
- ldr w2, [x29,112]
+ bls .L1025
+ ldr w2, [x29,104]
ubfx x6, x2, 3, 5
- ldr w2, [x29,112]
- ldr w1, [x29,112]
+ ldr w2, [x29,104]
+ ldr w1, [x29,104]
ubfx x2, x2, 28, 1
ubfx x3, x1, 16, 5
- ldr w1, [x29,112]
+ ldr w1, [x29,104]
orr w2, w6, w2, lsl 5
ubfx x1, x1, 30, 1
orr w1, w3, w1, lsl 5
- ldr w3, [x29,112]
+ ldr w3, [x29,104]
cmp w2, w1
- bls .L1035
+ bls .L1026
ubfx x1, x3, 3, 5
- ldr w3, [x29,112]
+ ldr w3, [x29,104]
ubfx x3, x3, 28, 1
- b .L1071
-.L1035:
+ b .L1060
+.L1026:
ubfx x1, x3, 16, 5
- ldr w3, [x29,112]
+ ldr w3, [x29,104]
ubfx x3, x3, 30, 1
-.L1071:
+.L1060:
orr w3, w1, w3, lsl 5
-.L1034:
- cmp w24, w3
- csel w24, w24, w3, cs
- b .L1031
-.L1055:
- mov w24, -1
-.L1031:
+.L1025:
+ cmp w23, w3
+ csel w23, w23, w3, cs
+ b .L1022
+.L1045:
+ mov w23, -1
+.L1022:
add w0, w0, 1
- b .L1030
-.L1026:
+ b .L1021
+.L1017:
str wzr, [x20,16]
- b .L1037
-.L1024:
+ b .L1028
+.L1015:
cmp w21, 1
- bne .L1069
- mov w24, 0
- mov w22, 2
-.L1038:
- cmp w24, w25
- bcs .L1073
- and w28, w24, 3
- mov x3, x27
- cbz x27, .L1040
- ubfiz x0, x24, 9, 23
- add x3, x27, x0
-.L1040:
- cmp x23, xzr
+ bne .L1059
+ mov w23, 0
+ mov w28, 2
+.L1029:
+ cmp w23, w24
+ bcs .L1062
+ and w27, w23, 3
+ mov x3, x26
+ cbz x26, .L1031
+ ubfiz x0, x23, 9, 23
+ add x3, x26, x0
+.L1031:
+ cmp x22, xzr
mov x0, x20
- csel w4, w22, wzr, ne
+ csel w4, w28, wzr, ne
mov w1, 1
- mov w2, w28
- mul w4, w4, w24
- add w24, w24, 2
- add x4, x23, x4
+ mov w2, w27
+ mul w4, w4, w23
+ add w23, w23, 2
+ add x4, x22, x4
bl NandcCopy1KB
mov x4, 0
- mov w0, w26
+ mov w0, w25
mov w1, 1
mov w2, 2
- mov w3, w28
+ mov w3, w27
mov x5, x4
bl NandcXferStart
- mov w0, w26
+ mov w0, w25
bl NandcXferComp
- b .L1038
-.L1073:
- mov w24, 0
- b .L1037
-.L1069:
+ b .L1029
+.L1062:
+ mov w23, 0
+ b .L1028
+.L1059:
mov w1, 0
mov x4, 0
- mov w22, 0
- mov w0, w26
+ mov w27, 0
+ mov w0, w25
mov w2, 2
mov w3, w1
mov x5, x4
- mov w24, w22
+ mov w23, w27
bl NandcXferStart
-.L1043:
- cmp w22, w25
- bcs .L1037
- mov w0, w26
- add w28, w22, 2
+.L1034:
+ cmp w27, w24
+ bcs .L1028
+ mov w0, w25
+ add w28, w27, 2
bl NandcXferComp
ldr w0, [x20,32]
- cmp w28, w25
- str w0, [x29,112]
- bcs .L1044
+ cmp w28, w24
+ str w0, [x29,104]
+ bcs .L1035
mov x4, 0
- mov w0, w26
+ mov w0, w25
mov w1, 0
mov w2, 2
and w3, w28, 3
mov x5, x4
bl NandcXferStart
-.L1044:
- ldr w0, [x29,112]
- tbnz x0, 2, .L1060
- ldr w0, [x29,112]
+.L1035:
+ ldr w0, [x29,104]
+ tbnz x0, 2, .L1050
+ ldr w0, [x29,104]
ubfx x1, x0, 3, 5
- ldr w0, [x29,112]
+ ldr w0, [x29,104]
ubfx x0, x0, 27, 1
orr w0, w1, w0, lsl 5
- cmp w24, w0
- csel w24, w24, w0, cs
- b .L1045
-.L1060:
- mov w24, -1
-.L1045:
- and w2, w22, 3
- mov x3, x27
- cbz x27, .L1046
- ubfiz x3, x22, 9, 23
- add x3, x27, x3
-.L1046:
- cmp x23, xzr
+ cmp w23, w0
+ csel w23, w23, w0, cs
+ b .L1036
+.L1050:
+ mov w23, -1
+.L1036:
+ and w2, w27, 3
+ mov x3, x26
+ cbz x26, .L1037
+ ubfiz x3, x27, 9, 23
+ add x3, x26, x3
+.L1037:
+ cmp x22, xzr
mov w0, 2
csel w4, w0, wzr, ne
mov w1, 0
mov x0, x20
- mul w4, w4, w22
- mov w22, w28
- add x4, x23, x4
+ mul w4, w4, w27
+ mov w27, w28
+ add x4, x22, x4
bl NandcCopy1KB
- b .L1043
-.L1037:
- cbnz w21, .L1049
+ b .L1034
+.L1028:
+ cbnz w21, .L1040
add x19, x19, :lo12:.LANCHOR0
ldr w0, [x19,20]
cmp w0, 5
- bls .L1049
+ bls .L1040
ldr w0, [x20]
mov w1, 8192
movk w1, 0x2, lsl 16
and w1, w0, w1
cmp w1, 139264
- bne .L1049
+ bne .L1040
orr w0, w0, 131072
- mov w24, -1
+ mov w23, -1
str w0, [x20]
-.L1049:
- ldr x1, [x29,104]
- mov w0, w24
- ldr x2, [x29,184]
- ldr x1, [x1,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1051
- bl __stack_chk_fail
-.L1051:
+.L1040:
+ mov w0, w23
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 192
+ ldp x29, x30, [sp], 176
ret
.size NandcXferData, .-NandcXferData
.align 2
str x21, [sp,32]
mov x21, x2
ldrb w20, [x0,#:lo12:.LANCHOR1+481]
- cbnz w19, .L1075
+ cbnz w19, .L1064
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
ldrb w5, [x0,9]
cmp w1, w0
mov w0, 4
csel w20, w20, w0, cs
-.L1075:
+.L1064:
mov w0, w19
str x4, [x29,48]
str x1, [x29,56]
cmp w0, 8
mov w0, 12
csel w22, w22, w0, cc
- cbz w4, .L1078
+ cbz w4, .L1067
mov w0, 1
bl FlashSetInterfaceMode
mov w0, 1
ldrb w0, [x19,1844]
bl NandcSetMode
cmn w21, #1
- bne .L1079
-.L1088:
+ bne .L1068
+.L1077:
mov w21, -1
- b .L1080
-.L1079:
- adrp x0, .LC86
+ b .L1069
+.L1068:
+ adrp x0, .LC85
mov w1, w24
- add x0, x0, :lo12:.LC86
+ add x0, x0, :lo12:.LC85
mov w2, w21
bl printk
cmp w21, 9
- bhi .L1081
+ bhi .L1070
add x19, x19, x23, sxtw 4
ldr x0, [x19,24]
ldr w1, [x0,3840]
ldr w1, [x0]
orr w1, w1, 131072
str w1, [x0]
-.L1081:
+.L1070:
adrp x0, .LANCHOR4
add x0, x0, :lo12:.LANCHOR4
ldr w1, [x0,40]
add w1, w1, 1
str w1, [x0,40]
cmp w1, 2047
- bls .L1080
+ bls .L1069
mov x27, 0
str wzr, [x0,40]
mov x28, x27
-.L1078:
+.L1067:
mov w19, 0
mov w26, -1
mov w5, w19
mov w6, w19
mov w20, w19
-.L1086:
+.L1075:
mov w0, w22
str x5, [x29,104]
str x6, [x29,112]
ldr x6, [x29,112]
cmp w0, w1
ldr x5, [x29,104]
- bhi .L1082
+ bhi .L1071
cmp w0, 2
- bhi .L1092
+ bhi .L1081
add w20, w20, 1
cmp w20, 9
- bls .L1092
+ bls .L1081
sub w19, w22, w20
mov w21, w0
mov w26, 0
- b .L1084
-.L1082:
+ b .L1073
+.L1071:
cmp w6, w20
- bcs .L1093
+ bcs .L1082
cmp w20, 7
sub w5, w19, w20
- bhi .L1094
+ bhi .L1083
mov w6, w20
- b .L1093
-.L1092:
+ b .L1082
+.L1081:
mov x27, 0
mov w19, w22
mov w21, w0
mov w26, 0
mov x28, x27
- b .L1083
-.L1093:
+ b .L1072
+.L1082:
mov w20, 0
-.L1083:
+.L1072:
add w22, w22, 2
cmp w22, 69
- bls .L1086
-.L1084:
+ bls .L1075
+.L1073:
cmp w6, w20
csel w19, w19, w5, cc
- b .L1085
-.L1094:
+ b .L1074
+.L1083:
mov w19, w5
-.L1085:
- cbz w19, .L1087
- adrp x0, .LC87
+.L1074:
+ cbz w19, .L1076
+ adrp x0, .LC86
mov w1, w19
- add x0, x0, :lo12:.LC87
+ add x0, x0, :lo12:.LC86
bl printk
mov w0, w19
bl NandcSetDdrPara
-.L1087:
- cbz w26, .L1080
- adrp x0, .LC88
+.L1076:
+ cbz w26, .L1069
+ adrp x0, .LC87
mov w1, w23
- add x0, x0, :lo12:.LC88
+ add x0, x0, :lo12:.LC87
mov w2, w24
bl printk
- cbz w25, .L1088
+ cbz w25, .L1077
ldr w0, [x29,124]
lsr w0, w0, 8
bl NandcSetDdrPara
-.L1080:
+.L1069:
mov w0, w21
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
bl FlashReadRawPage
cmn w0, #1
mov w19, w0
- bne .L1104
+ bne .L1093
adrp x20, .LANCHOR0
add x25, x20, :lo12:.LANCHOR0
ldrb w26, [x25,16]
- cbnz w26, .L1105
-.L1107:
+ cbnz w26, .L1094
+.L1096:
add x20, x20, :lo12:.LANCHOR0
ldrb w0, [x20,1864]
- cbz w0, .L1104
- b .L1122
-.L1105:
+ cbz w0, .L1093
+ b .L1111
+.L1094:
mov w0, w21
mov w1, w22
mov x2, x24
bl FlashReadRawPage
strb w26, [x25,16]
cmn w0, #1
- beq .L1107
+ beq .L1096
mov w19, w0
- b .L1104
-.L1122:
+ b .L1093
+.L1111:
ldr x0, [x20,128]
mov w1, w22
mov x2, x24
bl FlashDdrTunningRead
cmn w0, #1
mov w19, w0
- beq .L1108
+ beq .L1097
ldrb w0, [x20,1944]
cmp w19, w0, lsr 1
- bls .L1104
-.L1108:
+ bls .L1093
+.L1097:
lsr w0, w25, 8
bl NandcSetDdrPara
-.L1104:
+.L1093:
adrp x0, .LANCHOR4+48
cmn w19, #1
ldr x4, [x0,#:lo12:.LANCHOR4+48]
- bne .L1109
- cbz x4, .L1109
+ bne .L1098
+ cbz x4, .L1098
mov w1, w22
mov x2, x24
mov x3, x23
mov w0, w21
blr x4
mov w19, w0
- adrp x0, .LC89
+ adrp x0, .LC88
mov w1, w19
- add x0, x0, :lo12:.LC89
+ add x0, x0, :lo12:.LC88
mov w2, w21
mov w3, w22
bl printk
-.L1109:
+.L1098:
mov w0, w19
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
mov x3, x2
bl FlashReadRawPage
cmn w0, #1
- beq .L1127
+ beq .L1116
cmn w22, #1
- bne .L1124
-.L1127:
+ bne .L1113
+.L1116:
add x20, x19, :lo12:.LANCHOR0
ldrb w0, [x20,1844]
- tbz x0, 0, .L1124
+ tbz x0, 0, .L1113
mov w0, 1
bl FlashSetInterfaceMode
mov w0, 1
bl NandcSetMode
strb wzr, [x20,1864]
- b .L1126
-.L1124:
+ b .L1115
+.L1113:
add x19, x19, :lo12:.LANCHOR0
mov w0, 1
strb w0, [x19,1864]
-.L1126:
+.L1115:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
.type FlashLoadPhyInfo, %function
FlashLoadPhyInfo:
stp x29, x30, [sp, -128]!
+ mov w0, 60
add x29, sp, 0
- stp x27, x28, [sp,80]
- adrp x27, __stack_chk_guard
stp x23, x24, [sp,48]
adrp x24, .LANCHOR0
adrp x23, .LANCHOR4
- ldr x0, [x27,#:lo12:__stack_chk_guard]
- add x1, x24, :lo12:.LANCHOR0
- str x0, [x29,120]
- mov w0, 60
- strb w0, [x29,112]
+ strb w0, [x29,120]
mov w0, 40
- strb w0, [x29,113]
+ strb w0, [x29,121]
mov w0, 24
- strb w0, [x29,114]
+ add x1, x24, :lo12:.LANCHOR0
+ strb w0, [x29,122]
mov w0, 16
+ strb w0, [x29,123]
stp x21, x22, [sp,32]
stp x25, x26, [sp,64]
stp x19, x20, [sp,16]
- strb w0, [x29,115]
- adrp x22, .LANCHOR1
+ stp x27, x28, [sp,80]
add x0, x23, :lo12:.LANCHOR4
+ adrp x22, .LANCHOR1
add x21, x22, :lo12:.LANCHOR1
ldr x1, [x1,1856]
add x21, x21, 472
mov w20, 0
- mov w26, 4
str x1, [x0,56]
- mov w25, -1
+ mov w26, 4
str wzr, [x0,64]
+ mov w25, -1
mov w0, 0
- ldrh w28, [x21,10]
+ ldrh w27, [x21,10]
bl flash_enter_slc_mode
-.L1135:
- add w0, w20, 1
+.L1124:
+ add w28, w20, 1
mov x19, 0
- str w0, [x29,104]
-.L1137:
- add x0, x29, 112
+.L1126:
+ add x0, x29, 120
ldrb w0, [x19,x0]
bl FlashBchSel
- add x5, x24, :lo12:.LANCHOR0
+ add x4, x24, :lo12:.LANCHOR0
mov w0, 0
mov w1, w20
mov x3, 0
- str x5, [x29,96]
- ldr x2, [x5,1856]
+ str x4, [x29,104]
+ ldr x2, [x4,1856]
bl FlashReadRawPage
cmn w0, #1
- bne .L1136
- ldr x5, [x29,96]
+ bne .L1125
+ ldr x4, [x29,104]
mov w0, 0
- ldr w1, [x29,104]
+ mov w1, w28
mov x3, 0
- ldr x2, [x5,1856]
+ ldr x2, [x4,1856]
bl FlashReadRawPage
cmn w0, #1
- bne .L1136
+ bne .L1125
add x19, x19, 1
cmp x19, 4
- beq .L1138
- b .L1137
-.L1139:
- add x0, x2, 12
+ beq .L1127
+ b .L1126
+.L1128:
mov w1, 2036
- str x2, [x29,104]
+ add x0, x28, 12
mov w25, -1
bl JSHash
- ldr x2, [x29,104]
- ldr w1, [x2,8]
+ ldr w1, [x28,8]
cmp w1, w0
- beq .L1149
-.L1138:
+ beq .L1137
+.L1127:
subs w26, w26, #1
- add w20, w20, w28
- bne .L1135
+ add w20, w20, w27
+ bne .L1124
mov w0, w26
bl flash_exit_slc_mode
-.L1140:
- ldr x2, [x29,120]
- mov w0, w25
- ldr x1, [x27,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1145
- bl __stack_chk_fail
-.L1136:
+ b .L1136
+.L1125:
add x19, x23, :lo12:.LANCHOR4
mov w0, 20036
movk w0, 0x4e41, lsl 16
- ldr x2, [x19,56]
- ldr w1, [x2]
+ ldr x28, [x19,56]
+ ldr w1, [x28]
cmp w1, w0
- bne .L1138
- cbnz w25, .L1139
+ bne .L1127
+ cbnz w25, .L1128
add x22, x22, :lo12:.LANCHOR1
ldrh w0, [x22,482]
udiv w20, w20, w0
add w20, w20, 1
str w20, [x19,68]
- b .L1140
-.L1149:
- add x1, x2, 160
- mov x0, x21
+ b .L1136
+.L1137:
+ add x1, x28, 160
mov w2, 32
+ mov x0, x21
add x25, x24, :lo12:.LANCHOR0
bl ftl_memcpy
ldr x1, [x19,56]
ldrh w0, [x21,10]
udiv w0, w20, w0
add w2, w0, 1
- cbz w0, .L1141
+ cbz w0, .L1130
str w2, [x19,68]
- b .L1142
-.L1141:
+ b .L1131
+.L1130:
mov w0, 2
str w0, [x19,68]
-.L1142:
+.L1131:
add x0, x23, :lo12:.LANCHOR4
ldrh w1, [x1,14]
mov w25, 0
strb w1, [x0,72]
- b .L1138
-.L1145:
+ b .L1127
+.L1136:
+ mov w0, w25
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
sub w0, w0, #67
uxtb w0, w0
cmp w0, 1
- bls .L1151
+ bls .L1139
ldrb w0, [x2,1864]
- cbz w0, .L1152
+ cbz w0, .L1140
mov w0, w22
mov w22, 1
bl NandcSetDdrMode
-.L1152:
+.L1140:
ubfiz x0, x28, 8, 8
mov w2, 92
add x0, x24, x0
str w2, [x0,2056]
mov w2, 197
str w2, [x0,2056]
-.L1151:
+.L1139:
ldr x0, [x29,120]
mov w21, 1
mov w25, -1
str x0, [x29,104]
ubfiz x0, x28, 8, 8
str x0, [x29,96]
-.L1153:
+.L1141:
adrp x0, .LANCHOR4
add x0, x0, :lo12:.LANCHOR4
ldrb w0, [x0,73]
add w0, w0, 1
cmp w21, w0
- bcs .L1178
+ bcs .L1166
add x0, x19, :lo12:.LANCHOR0
mov w1, w21
ldrb w0, [x0,752]
uxtb w0, w0
cmp w0, 1
mov x0, x20
- bhi .L1154
+ bhi .L1142
bl SandiskSetRRPara
- b .L1155
-.L1154:
+ b .L1143
+.L1142:
bl ToshibaSetRRPara
-.L1155:
+.L1143:
add x0, x19, :lo12:.LANCHOR0
ldrb w0, [x0,752]
cmp w0, 34
- bne .L1156
+ bne .L1144
adrp x0, .LANCHOR4
add x0, x0, :lo12:.LANCHOR4
ldrb w0, [x0,73]
sub w0, w0, #3
cmp w21, w0
- bne .L1156
+ bne .L1144
ldr x0, [x29,104]
mov w1, 179
add x0, x24, x0
str w1, [x0,8]
-.L1156:
+.L1144:
ldr x0, [x29,96]
mov w1, 38
add x0, x24, x0
str w1, [x0,2056]
mov w1, 93
str w1, [x0,2056]
- cbz w22, .L1157
+ cbz w22, .L1145
mov w0, 4
bl NandcSetDdrMode
ldr w1, [x29,116]
mov w28, w0
mov w0, 0
bl NandcSetDdrMode
- b .L1158
-.L1157:
+ b .L1146
+.L1145:
ldr w1, [x29,116]
mov w0, w23
mov x2, x27
mov x3, x26
bl FlashReadRawPage
mov w28, w0
-.L1158:
+.L1146:
cmn w28, #1
- beq .L1159
+ beq .L1147
add x0, x19, :lo12:.LANCHOR0
cmn w25, #1
csel w25, w25, w28, ne
ldrb w0, [x0,1944]
add w0, w0, w0, lsl 1
cmp w28, w0, lsr 2
- bcc .L1161
+ bcc .L1149
mov x26, 0
mov x27, x26
-.L1159:
+.L1147:
add w21, w21, 1
- b .L1153
-.L1178:
+ b .L1141
+.L1166:
mov w28, w25
-.L1161:
+.L1149:
add x0, x19, :lo12:.LANCHOR0
mov w1, 0
ldrb w0, [x0,752]
uxtb w0, w0
cmp w0, 1
mov x0, x20
- bhi .L1163
+ bhi .L1151
bl SandiskSetRRPara
- b .L1164
-.L1163:
+ b .L1152
+.L1151:
bl ToshibaSetRRPara
-.L1164:
+.L1152:
ldr x0, [x29,120]
add x19, x19, :lo12:.LANCHOR0
add x0, x0, 8
ldrb w0, [x19,1944]
add w0, w0, w0, lsl 1
cmp w28, w0, lsr 2
- bcc .L1165
+ bcc .L1153
cmn w28, #1
mov w0, 256
csel w28, w28, w0, eq
-.L1165:
+.L1153:
mov w0, w23
bl NandcWaitFlashReady
- cbz w22, .L1166
+ cbz w22, .L1154
mov w0, 4
bl NandcSetDdrMode
-.L1166:
+.L1154:
mov w0, w28
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldrb w21, [x2,8]
add x21, x21, 8
add x21, x0, x21, lsl 8
-.L1180:
+.L1168:
add x0, x27, :lo12:.LANCHOR4
ldrb w0, [x0,73]
add w0, w0, 1
cmp w26, w0
- bcs .L1183
+ bcs .L1171
mov x0, x21
mov w1, w26
bl SamsungSetRRPara
mov x3, x23
bl FlashReadRawPage
cmn w0, #1
- beq .L1181
+ beq .L1169
add x1, x20, :lo12:.LANCHOR0
cmn w19, #1
csel w19, w19, w0, ne
ldrb w1, [x1,1944]
add w1, w1, w1, lsl 1
cmp w0, w1, lsr 2
- bcc .L1186
+ bcc .L1174
mov x23, 0
mov x24, x23
-.L1181:
+.L1169:
add w26, w26, 1
- b .L1180
-.L1186:
+ b .L1168
+.L1174:
mov w19, w0
-.L1183:
+.L1171:
mov x0, x21
mov w1, 0
add x20, x20, :lo12:.LANCHOR0
ldrb w0, [x20,1944]
add w0, w0, w0, lsl 1
cmp w19, w0, lsr 2
- bcc .L1185
+ bcc .L1173
cmn w19, #1
mov w0, 256
csel w19, w19, w0, eq
-.L1185:
+.L1173:
mov w0, w19
ldr x27, [sp,80]
ldp x19, x20, [sp,16]
ldr x28, [x0,x1]
ldrb w20, [x2,8]
lsl x5, x20, 8
-.L1193:
+.L1181:
add x0, x4, :lo12:.LANCHOR4
ldrb w0, [x0,73]
cmp w23, w0
- bcs .L1196
+ bcs .L1184
add x22, x28, x5
mov w0, 200
str x4, [x29,96]
ldr x6, [x29,112]
ldr x5, [x29,104]
ldr x4, [x29,96]
- beq .L1193
+ beq .L1181
add x1, x21, :lo12:.LANCHOR0
cmn w19, #1
csel w19, w19, w0, ne
ldrb w2, [x1,1944]
add w2, w2, w2, lsl 1
cmp w0, w2, lsr 2
- bcc .L1199
+ bcc .L1187
mov x26, 0
mov x27, x26
- b .L1193
-.L1199:
+ b .L1181
+.L1187:
mov w19, w0
-.L1196:
+.L1184:
add x20, x28, x20, lsl 8
mov w0, 239
add x21, x21, :lo12:.LANCHOR0
add w0, w0, w0, lsl 1
str wzr, [x20,2048]
cmp w19, w0, lsr 2
- bcc .L1198
+ bcc .L1186
cmn w19, #1
mov w0, 256
csel w19, w19, w0, eq
-.L1198:
+.L1186:
mov w0, w19
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
mov w4, 0
mov w19, -1
add x5, x28, 764
-.L1206:
+.L1194:
cmp w4, w25
- bcs .L1210
+ bcs .L1198
add w20, w20, 1
ldrb w1, [x28,761]
mov x2, x5
cmn w0, #1
ldr x5, [x29,104]
ldr x4, [x29,96]
- beq .L1208
+ beq .L1196
ldrb w1, [x28,1944]
cmn w19, #1
csel w19, w19, w0, ne
add w1, w1, w1, lsl 1
cmp w0, w1, lsr 2
- bcc .L1213
+ bcc .L1201
mov x24, 0
mov x26, x24
-.L1208:
+.L1196:
add w4, w4, 1
- b .L1206
-.L1213:
+ b .L1194
+.L1201:
mov w19, w0
-.L1210:
+.L1198:
add x21, x21, :lo12:.LANCHOR0
add x22, x21, x22
ldrb w0, [x21,1944]
strb w20, [x22,772]
add w0, w0, w0, lsl 1
cmp w19, w0, lsr 2
- bcc .L1212
+ bcc .L1200
cmn w19, #1
mov w0, 256
csel w19, w19, w0, eq
-.L1212:
+.L1200:
mov w0, w19
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
mov w20, w1
mov x22, x2
ldrb w21, [x0,#:lo12:.LANCHOR1+481]
- cbnz w19, .L1220
+ cbnz w19, .L1208
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
ldrb w1, [x0,9]
ldr w2, [x0,12]
mul w1, w1, w2
cmp w20, w1
- bcs .L1220
+ bcs .L1208
ldrb w0, [x0,8]
- cbnz w0, .L1221
+ cbnz w0, .L1209
sub w21, w21, #2
- b .L1220
-.L1221:
+ b .L1208
+.L1209:
mov w21, 4
-.L1220:
+.L1208:
mov w0, w19
str x4, [x29,56]
bl NandcWaitFlashReady
mov w0, 0
mov w19, w21
bl flash_enter_slc_mode
-.L1225:
+.L1213:
add x20, x23, :lo12:.LANCHOR0
mov w2, 0
mov w0, 0
mul w1, w19, w1
bl FlashReadRawPage
cmn w0, #1
- beq .L1223
+ beq .L1211
ldr x25, [x24,56]
mov w0, 20036
movk w0, 0x4e41, lsl 16
ldr w1, [x25]
cmp w1, w0
- bne .L1223
+ bne .L1211
mov w1, 2036
add x0, x25, 12
bl JSHash
ldr w1, [x25,8]
cmp w1, w0
- bne .L1223
+ bne .L1211
ldr w0, [x20,12]
cmp w21, 1
str w26, [x24,68]
mul w19, w19, w0
str w19, [x24,64]
- beq .L1226
+ beq .L1214
mov w21, 1
-.L1223:
+.L1211:
cmp w26, 4
mov w19, w26
- bne .L1225
- b .L1224
-.L1226:
+ bne .L1213
+ b .L1212
+.L1214:
mov w21, 2
-.L1224:
+.L1212:
mov w0, 0
bl flash_exit_slc_mode
cmp w21, wzr
.global FlashReadIdbDataRaw
.type FlashReadIdbDataRaw, %function
FlashReadIdbDataRaw:
- stp x29, x30, [sp, -128]!
+ stp x29, x30, [sp, -112]!
add x29, sp, 0
- stp x21, x22, [sp,32]
- adrp x22, __stack_chk_guard
stp x25, x26, [sp,64]
mov x26, x0
- ldr x0, [x22,#:lo12:__stack_chk_guard]
- str x0, [x29,120]
mov w0, 60
- strb w0, [x29,112]
+ strb w0, [x29,104]
mov w0, 40
- strb w0, [x29,113]
+ strb w0, [x29,105]
mov w0, 24
stp x19, x20, [sp,16]
- strb w0, [x29,114]
+ strb w0, [x29,106]
adrp x19, .LANCHOR0
mov w0, 16
- strb w0, [x29,115]
+ strb w0, [x29,107]
add x0, x19, :lo12:.LANCHOR0
+ stp x21, x22, [sp,32]
stp x23, x24, [sp,48]
stp x27, x28, [sp,80]
ldr w1, [x0,1872]
mov w0, 12336
movk w0, 0x5638, lsl 16
cmp w1, w0
- bne .L1232
+ bne .L1220
mov w0, 0
bl flash_enter_slc_mode
-.L1232:
- adrp x24, .LC90
+.L1220:
+ adrp x24, .LC89
mov x0, x26
mov w1, 0
mov w2, 2048
- mov w25, -1
+ mov w23, -1
mov w20, 2
- add x24, x24, :lo12:.LC90
+ add x24, x24, :lo12:.LC89
adrp x28, .LANCHOR4
bl ftl_memset
-.L1233:
+.L1221:
add x0, x19, :lo12:.LANCHOR0
ldrb w0, [x0,9]
cmp w20, w0
- bcs .L1237
- mov x23, 0
-.L1235:
- add x0, x29, 112
+ bcs .L1225
+ mov x22, 0
+.L1223:
+ add x0, x29, 104
add x21, x19, :lo12:.LANCHOR0
- ldrb w4, [x23,x0]
- str x4, [x29,104]
- mov w0, w4
+ ldrb w25, [x22,x0]
+ mov w0, w25
bl FlashBchSel
ldr w1, [x21,12]
mov w0, 0
mul w1, w20, w1
bl FlashReadRawPage
cmn w0, #1
- ldr x4, [x29,104]
- bne .L1234
- add x23, x23, 1
- cmp x23, 4
- bne .L1235
- b .L1236
-.L1234:
+ bne .L1222
+ add x22, x22, 1
+ cmp x22, 4
+ bne .L1223
+ b .L1224
+.L1222:
ldr x0, [x21,1856]
ldr w1, [x0]
mov w0, 35899
movk w0, 0xfcdc, lsl 16
cmp w1, w0
- bne .L1236
- mov w1, w4
+ bne .L1224
+ mov w1, w25
mov x0, x24
bl printk
ldr x1, [x21,1856]
add x0, x28, :lo12:.LANCHOR4
ldr w1, [x0,68]
cmp w1, w20
- bls .L1241
- mov w25, 0
+ bls .L1228
+ mov w23, 0
str w20, [x0,68]
bl FlashSavePhyInfo
-.L1236:
+.L1224:
add w20, w20, 1
- b .L1233
-.L1241:
- mov w25, 0
-.L1237:
+ b .L1221
+.L1228:
+ mov w23, 0
+.L1225:
mov w0, w27
add x19, x19, :lo12:.LANCHOR0
bl FlashBchSel
mov w0, 12336
movk w0, 0x5638, lsl 16
cmp w1, w0
- bne .L1238
+ bne .L1230
mov w0, 0
bl flash_exit_slc_mode
-.L1238:
- ldr x2, [x29,120]
- mov w0, w25
- ldr x1, [x22,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1240
- bl __stack_chk_fail
-.L1240:
+.L1230:
+ mov w0, w23
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 128
+ ldp x29, x30, [sp], 112
ret
.size FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
.align 2
str x0, [x20,1856]
mov w0, 32768
add x24, x20, 24
- adrp x25, .LC91
+ adrp x25, .LC90
mov w28, 0
bl ftl_malloc
str x0, [x21,80]
str wzr, [x21,68]
str wzr, [x21,40]
bl NandcInit
- add x0, x25, :lo12:.LC91
+ add x0, x25, :lo12:.LC90
str x0, [x29,104]
-.L1249:
+.L1236:
uxtb w25, w28
mov w0, w25
bl FlashReset
sub w0, w2, #1
uxtb w0, w0
cmp w0, 253
- bhi .L1246
+ bhi .L1233
ldr x0, [x29,104]
add w1, w28, 1
ldrb w3, [x20,1]
ldrb w6, [x20,4]
ldrb w7, [x20,5]
bl printk
-.L1246:
- cbnz w28, .L1247
+.L1233:
+ cbnz w28, .L1234
ldrb w0, [x26]
sub w0, w0, #1
uxtb w0, w0
cmp w0, 253
- bhi .L1287
+ bhi .L1276
ldrb w0, [x26,1]
cmp w0, 255
- beq .L1287
-.L1247:
+ beq .L1276
+.L1234:
add w28, w28, 1
add x24, x24, 16
cmp w28, 4
add x20, x20, 8
- bne .L1249
+ bne .L1236
add x0, x19, :lo12:.LANCHOR0
ldrb w1, [x0,1620]
cmp w1, 173
- beq .L1250
+ beq .L1237
ldr w0, [x0,1868]
bl NandcSetDdrMode
-.L1250:
+.L1237:
add x20, x19, :lo12:.LANCHOR0
mov w1, 0
add x0, x20, 760
cset w3, eq
str x0, [x20,744]
add x20, x20, 1620
- cbnz w3, .L1251
+ cbnz w3, .L1238
cmp w2, 241
- beq .L1251
+ beq .L1238
cmp w2, 220
- bne .L1252
+ bne .L1239
ldrb w0, [x20,3]
cmp w0, 149
- bne .L1252
-.L1251:
+ bne .L1239
+.L1238:
add x0, x19, :lo12:.LANCHOR0
mov w4, 1
mov w5, 16
add x5, x1, :lo12:.LANCHOR1
cmp w0, 152
strb w0, [x5,2969]
- bne .L1253
+ bne .L1240
mov w0, 24
strb w0, [x4,74]
-.L1253:
- cbz w3, .L1254
+.L1240:
+ cbz w3, .L1241
add x0, x1, :lo12:.LANCHOR1
mov w2, 2048
strh w2, [x0,2982]
mov w2, -38
- b .L1312
-.L1254:
+ b .L1307
+.L1241:
cmp w2, 220
- bne .L1255
+ bne .L1242
add x0, x1, :lo12:.LANCHOR1
mov w2, 4096
strh w2, [x0,2982]
mov w2, -36
-.L1312:
+.L1307:
strb w2, [x0,2970]
-.L1255:
+.L1242:
add x20, x1, :lo12:.LANCHOR1
add x0, x19, :lo12:.LANCHOR0
add x1, x20, 2872
add x1, x20, 2968
mov w2, 32
bl ftl_memcpy
-.L1252:
+.L1239:
add x20, x19, :lo12:.LANCHOR0
ldrb w0, [x20,8]
- cbnz w0, .L1256
+ cbnz w0, .L1243
bl FlashLoadPhyInfoInRam
- cbnz w0, .L1258
+ cbnz w0, .L1245
ldr x0, [x20,744]
ldrb w1, [x0,17]
and w0, w1, 7
strb w0, [x20,1844]
- tbnz x1, 0, .L1258
+ tbnz x1, 0, .L1245
mov w1, 1
strb w1, [x20,1864]
bl FlashSetInterfaceMode
ldrb w0, [x20,1844]
bl NandcSetMode
-.L1258:
+.L1245:
add x20, x19, :lo12:.LANCHOR0
ldr x0, [x20,744]
ldrb w0, [x0,26]
strb w0, [x20,120]
bl FlashLoadPhyInfo
- cbz w0, .L1256
+ cbz w0, .L1243
ldr w0, [x20,1868]
- cbz w0, .L1261
+ cbz w0, .L1248
mov w0, 1
bl FlashSetInterfaceMode
mov w0, 1
- b .L1313
-.L1261:
+ b .L1308
+.L1248:
ldrb w0, [x20,1844]
bl FlashSetInterfaceMode
ldrb w0, [x20,1844]
-.L1313:
+.L1308:
bl NandcSetMode
bl FlashLoadPhyInfo
- cbz w0, .L1256
+ cbz w0, .L1243
mov w0, 1
add x20, x19, :lo12:.LANCHOR0
bl FlashSetInterfaceMode
mov w0, 1
bl NandcSetMode
ldr x1, [x20,744]
- adrp x0, .LC92
- add x0, x0, :lo12:.LC92
+ adrp x0, .LC91
+ add x0, x0, :lo12:.LC91
ldrh w1, [x1,14]
bl printk
bl FlashLoadPhyInfoInRam
cmn w0, #1
- beq .L1248
+ beq .L1235
bl FlashDieInfoInit
ldr x0, [x20,744]
ldrb w0, [x0,19]
ldrb w2, [x0,9]
add w1, w1, 4095
cmp w2, w1, lsr 12
- blt .L1263
+ blt .L1250
ldrh w1, [x0,14]
add w1, w1, 255
cmp w2, w1, lsr 8
- bge .L1264
-.L1263:
+ bge .L1251
+.L1250:
ldrh w1, [x0,14]
and w1, w1, -256
strh w1, [x0,14]
-.L1264:
+.L1251:
add x0, x19, :lo12:.LANCHOR0
ldrb w0, [x0,1844]
tst w0, 6
- beq .L1265
+ beq .L1252
bl FlashSavePhyInfo
add x1, x23, :lo12:.LANCHOR4
mov w0, 0
ldr w1, [x1,64]
bl FlashDdrParaScan
-.L1265:
+.L1252:
bl FlashSavePhyInfo
-.L1256:
+.L1243:
add x1, x19, :lo12:.LANCHOR0
ldr x3, [x1,744]
- ldrb w0, [x3,26]
- strb w0, [x1,120]
ldrh w0, [x3,16]
+ ldrb w4, [x3,26]
ubfx x2, x0, 7, 1
strb w2, [x1,16]
add x2, x23, :lo12:.LANCHOR4
- ubfx x4, x0, 3, 1
- strb w4, [x2,112]
- ubfx x4, x0, 4, 1
+ ubfx x5, x0, 3, 1
+ strb w4, [x1,120]
+ strb w5, [x2,112]
+ ubfx x5, x0, 4, 1
str xzr, [x2,48]
- strb w4, [x1,1945]
- ubfx x4, x0, 8, 3
- strb w4, [x1,1844]
- tbz x0, 6, .L1267
+ strb w5, [x1,1945]
+ ubfx x5, x0, 8, 3
+ strb w5, [x1,1844]
+ tbz x0, 6, .L1254
ldrb w0, [x3,19]
- ldrb w4, [x1,762]
- strb w4, [x2,73]
- sub w4, w0, #1
- ldrb w5, [x1,761]
- uxtb w4, w4
+ ldrb w5, [x1,762]
+ strb w5, [x2,73]
+ sub w5, w0, #1
+ ldrb w6, [x1,761]
+ uxtb w5, w5
strb w0, [x1,752]
- strb w5, [x1,753]
- cmp w4, 5
- bhi .L1268
+ strb w6, [x1,753]
+ cmp w5, 5
+ bhi .L1255
sub w0, w0, #5
- adrp x4, HynixReadRetrial
- add x4, x4, :lo12:HynixReadRetrial
- str x4, [x2,48]
+ adrp x5, HynixReadRetrial
+ add x5, x5, :lo12:HynixReadRetrial
+ str x5, [x2,48]
uxtb w0, w0
cmp w0, 1
- bhi .L1267
+ bhi .L1254
mov w0, 1
str w0, [x1,1936]
- b .L1267
-.L1268:
+ b .L1254
+.L1255:
sub w1, w0, #17
uxtb w1, w1
cmp w1, 2
- bhi .L1270
+ bhi .L1257
adrp x1, MicronReadRetrial
cmp w0, 19
add x1, x1, :lo12:MicronReadRetrial
str x1, [x2,48]
- beq .L1271
+ beq .L1258
mov w0, 7
- b .L1314
-.L1271:
+ b .L1309
+.L1258:
mov w0, 15
-.L1314:
+.L1309:
strb w0, [x2,73]
- b .L1267
-.L1270:
+ b .L1254
+.L1257:
sub w1, w0, #65
uxtb w1, w1
cmp w1, 1
- bls .L1288
+ bls .L1277
cmp w0, 33
- bne .L1272
-.L1288:
+ bne .L1259
+.L1277:
add x0, x23, :lo12:.LANCHOR4
adrp x1, ToshibaReadRetrial
add x1, x1, :lo12:ToshibaReadRetrial
strb w2, [x1,753]
mov w1, 7
strb w1, [x0,73]
- b .L1267
-.L1272:
+ b .L1254
+.L1259:
sub w1, w0, #67
uxtb w1, w1
cmp w1, 1
sub w1, w0, #34
- cset w4, ls
+ cset w5, ls
uxtb w1, w1
cmp w1, 1
- bls .L1289
- cbz w4, .L1274
-.L1289:
+ bls .L1278
+ cbz w5, .L1261
+.L1278:
add x2, x23, :lo12:.LANCHOR4
adrp x1, ToshibaReadRetrial
add x1, x1, :lo12:ToshibaReadRetrial
cmp w0, 35
str x1, [x2,48]
- beq .L1276
+ beq .L1263
cmp w0, 68
- beq .L1276
+ beq .L1263
mov w0, 7
strb w0, [x2,73]
- b .L1277
-.L1276:
+ b .L1264
+.L1263:
add x0, x23, :lo12:.LANCHOR4
mov w1, 17
strb w1, [x0,73]
-.L1277:
+.L1264:
add x0, x19, :lo12:.LANCHOR0
mov w1, 4
- cbnz w4, .L1315
+ cbnz w5, .L1310
mov w1, 5
-.L1315:
+.L1310:
strb w1, [x0,753]
- b .L1267
-.L1274:
+ b .L1254
+.L1261:
cmp w0, 49
- bne .L1267
+ bne .L1254
adrp x0, SamsungReadRetrial
add x0, x0, :lo12:SamsungReadRetrial
str x0, [x2,48]
-.L1267:
+.L1254:
+ add x0, x19, :lo12:.LANCHOR0
+ ldr w1, [x0,1872]
+ mov w0, 12336
+ movk w0, 0x5638, lsl 16
+ cmp w1, w0
+ bne .L1266
+ cbz w4, .L1266
+ strb wzr, [x3,18]
+.L1266:
ldrh w2, [x3,10]
ldrb w1, [x3,12]
ldrb w0, [x3,18]
add x0, x19, :lo12:.LANCHOR0
ldrb w1, [x0,1620]
cmp w1, 44
- bne .L1279
+ bne .L1267
ldrb w1, [x0,1864]
- cbz w1, .L1279
+ cbz w1, .L1267
+ ldr w2, [x0,1872]
+ mov w1, 12336
+ movk w1, 0x5638, lsl 16
+ cmp w2, w1
+ bne .L1268
+ ldrb w0, [x0,120]
+ cbnz w0, .L1267
+.L1268:
+ add x0, x19, :lo12:.LANCHOR0
strb wzr, [x0,1864]
mov w0, 1
bl FlashSetInterfaceMode
mov w0, 1
bl NandcSetMode
-.L1279:
+.L1267:
mov w0, 0
bl flash_enter_slc_mode
add x1, x19, :lo12:.LANCHOR0
ldrb w0, [x1,1844]
tst w0, 6
- beq .L1280
+ beq .L1269
ldrb w1, [x1,1864]
- cbnz w1, .L1281
- tbnz x0, 0, .L1280
-.L1281:
+ cbnz w1, .L1270
+ tbnz x0, 0, .L1269
+.L1270:
add x1, x23, :lo12:.LANCHOR4
mov w0, 0
ldr w1, [x1,64]
bl FlashDdrParaScan
-.L1280:
+.L1269:
mov w0, 0
add x20, x19, :lo12:.LANCHOR0
bl flash_exit_slc_mode
add x0, x0, :lo12:.LANCHOR2
add x0, x0, 2336
bl FlashReadIdbDataRaw
- cbnz w0, .L1282
+ cbnz w0, .L1271
add x23, x23, :lo12:.LANCHOR4
ldrb w1, [x20,9]
ldrb w0, [x23,72]
cmp w1, w0
- bls .L1283
+ bls .L1272
strb w0, [x20,9]
-.L1283:
+.L1272:
add x0, x19, :lo12:.LANCHOR0
ldrb w0, [x0,9]
cmp w0, 15
- bhi .L1284
-.L1282:
+ bhi .L1273
+.L1271:
add x0, x19, :lo12:.LANCHOR0
mov w1, 16
strb w1, [x0,9]
-.L1284:
+.L1273:
mov w0, 18928
add x19, x19, :lo12:.LANCHOR0
movk w0, 0x2, lsl 16
ldrb w5, [x19,8]
strh w2, [x19,190]
cmp w5, 1
- bne .L1285
+ bne .L1274
lsl w2, w2, 1
mov w5, 16
lsr w4, w4, 1
strh w4, [x19,182]
strh w3, [x19,188]
strh w2, [x19,194]
-.L1285:
+.L1274:
ldrb w0, [x1,20]
bl FlashBchSel
bl FlashSuspend
mov w0, 0
- b .L1248
-.L1287:
+ b .L1235
+.L1276:
mov w0, -2
-.L1248:
+.L1235:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldr x2, [x0,744]
ldrb w24, [x2,19]
ldrb w2, [x0,120]
- cbz w2, .L1317
+ cbz w2, .L1312
ldr w2, [x0,1872]
mov w0, 12336
movk w0, 0x5638, lsl 16
cmp w2, w0
- beq .L1316
-.L1317:
+ beq .L1311
+.L1312:
sub w0, w24, #5
uxtb w0, w0
cmp w0, 1
- bls .L1319
+ bls .L1314
cmp w24, 68
- beq .L1319
+ beq .L1314
cmp w24, 35
- beq .L1319
+ beq .L1314
sub w0, w24, #17
uxtb w0, w0
cmp w0, 2
- bhi .L1316
-.L1319:
+ bhi .L1311
+.L1314:
mov w27, w1
sub w24, w24, #17
add x23, x23, :lo12:.LANCHOR0
add x26, x23, 24
add x26, x26, x21, sxtw 4
-.L1322:
+.L1317:
ldr x0, [x23,744]
ldrh w0, [x0,10]
cmp w0, w22
- bls .L1316
+ bls .L1311
adrp x0, .LANCHOR2
add x0, x0, :lo12:.LANCHOR2
add x0, x0, 996
ldrh w1, [x0,w22,sxtw 1]
mov w0, 65535
cmp w1, w0
- bne .L1316
+ bne .L1311
adrp x25, .LANCHOR4
mov w1, 255
add x19, x25, :lo12:.LANCHOR4
bl ftl_memset
uxtb w0, w24
cmp w0, 1
- bhi .L1323
+ bhi .L1318
adrp x28, .LANCHOR1
add x28, x28, :lo12:.LANCHOR1
ldr w1, [x28,3000]
- cbz w1, .L1324
+ cbz w1, .L1319
ldrb w20, [x26,8]
mov w0, w21
ldr x19, [x26]
bl NandcFlashDeCs
ldr x1, [x29,104]
cmp w1, 1
- bne .L1325
+ bne .L1320
mov w0, w21
bl NandcFlashCs
mov w0, 238
mov w0, w21
uxtb w20, w20
bl NandcFlashDeCs
- cbnz w20, .L1326
+ cbnz w20, .L1321
mov w0, 2
str w0, [x28,3000]
- b .L1325
-.L1326:
+ b .L1320
+.L1321:
str wzr, [x28,3000]
- b .L1316
-.L1325:
+ b .L1311
+.L1320:
add x25, x25, :lo12:.LANCHOR4
add w1, w22, w27
mov x3, 0
str wzr, [x19,2048]
str wzr, [x19,2048]
bl NandcFlashDeCs
- b .L1324
-.L1323:
+ b .L1319
+.L1318:
ldr x2, [x19,80]
mov w0, w21
add w1, w22, w27
mov x3, 0
bl FlashProgPage
-.L1324:
+.L1319:
add w22, w22, 1
uxth w22, w22
- b .L1322
-.L1316:
+ b .L1317
+.L1311:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
.global FlashReadSlc2KPages
.type FlashReadSlc2KPages, %function
FlashReadSlc2KPages:
- stp x29, x30, [sp, -144]!
+ stp x29, x30, [sp, -128]!
add x29, sp, 0
- stp x21, x22, [sp,32]
- adrp x21, __stack_chk_guard
- mov w22, 0
stp x25, x26, [sp,64]
mov w25, w1
- ldr x1, [x21,#:lo12:__stack_chk_guard]
- str x1, [x29,136]
adrp x1, .LANCHOR1+481
- stp x19, x20, [sp,16]
+ stp x21, x22, [sp,32]
stp x23, x24, [sp,48]
- adrp x20, .LANCHOR0
- adrp x23, .LC93
- adrp x24, .LC95
+ adrp x21, .LANCHOR0
+ adrp x23, .LC92
+ adrp x24, .LC94
ldrb w26, [x1,#:lo12:.LANCHOR1+481]
+ stp x19, x20, [sp,16]
stp x27, x28, [sp,80]
mov x19, x0
mov w27, w2
- add x20, x20, :lo12:.LANCHOR0
- add x23, x23, :lo12:.LC93
- add x24, x24, :lo12:.LC95
-.L1338:
+ mov w22, 0
+ add x21, x21, :lo12:.LANCHOR0
+ add x23, x23, :lo12:.LC92
+ add x24, x24, :lo12:.LC94
+.L1333:
cmp w22, w25
- beq .L1373
+ beq .L1367
mov w1, w27
sub w4, w25, w22
mov x0, x19
- add x2, x29, 132
- add x3, x29, 128
+ add x2, x29, 124
+ add x3, x29, 120
bl LogAddr2PhyAddr
- ldr w0, [x29,128]
+ ldr w0, [x29,120]
adrp x5, .LANCHOR0
- ldrb w1, [x20,1845]
+ ldrb w1, [x21,1845]
cmp w0, w1
- bcc .L1339
+ bcc .L1334
mov w0, -1
str w0, [x19]
- b .L1340
-.L1339:
- add x0, x20, x0, uxtw
+ b .L1335
+.L1334:
+ add x0, x21, x0, uxtw
ldrb w28, [x0,1848]
- str x5, [x29,104]
+ str x5, [x29,96]
mov w0, w28
bl NandcWaitFlashReady
mov w0, w28
bl NandcFlashCs
- ldr w1, [x29,132]
+ ldr w1, [x29,124]
mov w0, w28
bl FlashReadCmd
mov w0, w28
mov w0, w28
bl NandcXferData
mov w6, w0
- ldr w2, [x20,12]
+ ldr w2, [x21,12]
mov w0, w28
- ldr w1, [x29,132]
- str x6, [x29,112]
+ ldr w1, [x29,124]
+ str x6, [x29,104]
add w1, w2, w1
bl FlashReadCmd
ldr x0, [x19,8]
csel x4, x4, xzr, ne
mov w0, w28
bl NandcXferData
- mov w1, w0
+ mov w20, w0
mov w0, w28
- str x1, [x29,120]
bl NandcFlashDeCs
- ldr x5, [x29,104]
- ldr x1, [x29,120]
+ ldr x5, [x29,96]
+ ldr x6, [x29,104]
add x0, x5, :lo12:.LANCHOR0
- ldr x6, [x29,112]
- cmp w1, w6
+ cmp w20, w6
+ csel w3, w20, w6, cs
ldrb w0, [x0,1944]
- csel w3, w1, w6, cs
add w0, w0, w0, lsl 1
cmp w3, w0, lsr 2
- bls .L1343
+ bls .L1338
cmn w3, #1
mov w0, 256
csel w3, w3, w0, eq
-.L1343:
+.L1338:
cmp w3, 256
- beq .L1355
+ beq .L1349
cmn w3, #1
- bne .L1344
-.L1355:
+ bne .L1339
+.L1349:
str w3, [x19]
- b .L1346
-.L1344:
+ b .L1341
+.L1339:
str wzr, [x19]
-.L1346:
+.L1341:
ldr x0, [x19,16]
- cbz x0, .L1347
+ cbz x0, .L1342
ldr w1, [x0,8]
cmn w1, #1
- bne .L1347
+ bne .L1342
ldr w0, [x0]
cmn w0, #1
- beq .L1347
+ beq .L1342
str w1, [x19]
-.L1347:
+.L1342:
ldr w3, [x19]
cmn w3, #1
- bne .L1340
+ bne .L1335
add x5, x5, :lo12:.LANCHOR0
ldr w1, [x19,4]
mov x0, x23
ldrb w2, [x5,1944]
bl printk
ldr x1, [x19,8]
- cbz x1, .L1349
- adrp x0, .LC94
+ cbz x1, .L1344
+ adrp x0, .LC93
mov w2, 4
- add x0, x0, :lo12:.LC94
+ add x0, x0, :lo12:.LC93
mov w3, 8
bl rknand_print_hex
-.L1349:
+.L1344:
ldr x1, [x19,16]
- cbz x1, .L1340
+ cbz x1, .L1335
mov w2, 4
mov x0, x24
mov w3, w2
bl rknand_print_hex
-.L1340:
+.L1335:
add w22, w22, 1
add x19, x19, 56
- b .L1338
-.L1373:
- ldr x2, [x29,136]
+ b .L1333
+.L1367:
mov w0, 0
- ldr x1, [x21,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1352
- bl __stack_chk_fail
-.L1352:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 144
+ ldp x29, x30, [sp], 128
ret
.size FlashReadSlc2KPages, .-FlashReadSlc2KPages
.align 2
.type FlashReadPages, %function
FlashReadPages:
stp x29, x30, [sp, -176]!
- adrp x3, __stack_chk_guard
+ adrp x3, .LANCHOR1+481
add x29, sp, 0
stp x21, x22, [sp,32]
- ldr x4, [x3,#:lo12:__stack_chk_guard]
+ ldrb w3, [x3,#:lo12:.LANCHOR1+481]
adrp x22, .LANCHOR0
- str x4, [x29,168]
- adrp x4, .LANCHOR1+481
+ str w3, [x29,156]
+ add x3, x22, :lo12:.LANCHOR0
stp x25, x26, [sp,64]
stp x19, x20, [sp,16]
- ldrb w4, [x4,#:lo12:.LANCHOR1+481]
- mov x25, x0
- str w4, [x29,156]
- add x4, x22, :lo12:.LANCHOR0
stp x23, x24, [sp,48]
stp x27, x28, [sp,80]
str w1, [x29,152]
- ldrb w5, [x4,16]
- ldrb w23, [x4,8]
+ mov x25, x0
+ ldrb w4, [x3,16]
+ ldrb w23, [x3,8]
str w2, [x29,140]
- str w5, [x29,136]
- str x3, [x29,128]
- cbz w23, .L1411
+ str w4, [x29,136]
+ cbz w23, .L1404
bl FlashReadSlc2KPages
- b .L1376
-.L1411:
- adrp x0, .LC93
+ b .L1450
+.L1404:
+ adrp x0, .LC92
mov w24, w23
- add x0, x0, :lo12:.LC93
+ add x0, x0, :lo12:.LC92
+ str x0, [x29,128]
+ adrp x0, .LC94
+ add x0, x0, :lo12:.LC94
str x0, [x29,120]
adrp x0, .LC95
add x0, x0, :lo12:.LC95
str x0, [x29,112]
- adrp x0, .LC96
- add x0, x0, :lo12:.LC96
- str x0, [x29,104]
-.L1375:
+.L1369:
ldr w0, [x29,152]
cmp w24, w0
- bcs .L1459
+ bcs .L1452
mov w27, 56
ldr w0, [x29,152]
ldr w1, [x29,140]
- add x2, x29, 164
+ add x2, x29, 172
umull x27, w24, w27
sub w4, w0, w24
- add x3, x29, 160
+ add x3, x29, 168
add x21, x25, x27
mov x0, x21
ldr w28, [x21,4]
bl LogAddr2PhyAddr
add x2, x22, :lo12:.LANCHOR0
mov w19, w0
- ldr w0, [x29,160]
+ ldr w0, [x29,168]
ldrb w1, [x2,1845]
cmp w0, w1
- bcc .L1377
+ bcc .L1371
mov w0, -1
str w0, [x25,x27]
- b .L1378
-.L1377:
+ b .L1372
+.L1371:
add x0, x2, x0, uxtw
adrp x26, .LANCHOR4
ldrb w20, [x0,1848]
sub w0, w0, #1
uxtb w0, w0
cmp w0, 5
- bhi .L1380
+ bhi .L1374
sxtw x0, w20
add x1, x2, 760
add x3, x1, x0
ldrb w3, [x3,12]
ldrb w0, [x0,1616]
cmp w0, w3
- beq .L1380
+ beq .L1374
ldrb w1, [x2,761]
mov w0, w20
add x2, x2, 764
bl HynixSetRRPara
-.L1380:
+.L1374:
mov w0, w20
bl NandcFlashCs
ldr w0, [x29,140]
cset w0, eq
orr w0, w0, w28, lsr 31
str w0, [x29,144]
- cbz w0, .L1387
+ cbz w0, .L1381
add x0, x22, :lo12:.LANCHOR0
ldrb w0, [x0,120]
- cbz w0, .L1387
+ cbz w0, .L1381
mov w0, w20
bl flash_enter_slc_mode
-.L1387:
+.L1381:
cmp w20, 255
- ldr w1, [x29,164]
- bne .L1416
+ ldr w1, [x29,172]
+ bne .L1409
cmn w1, #1
cset w0, ne
- cbz w0, .L1412
-.L1416:
- cbz w19, .L1384
+ cbz w0, .L1405
+.L1409:
+ cbz w19, .L1378
add x0, x22, :lo12:.LANCHOR0
ldr w2, [x0,12]
mov w0, w20
add w2, w1, w2
bl FlashReadDpCmd
- b .L1385
-.L1384:
+ b .L1379
+.L1378:
mov w0, w20
bl FlashReadCmd
- b .L1385
-.L1412:
+ b .L1379
+.L1405:
mov w19, w0
-.L1382:
+.L1376:
ldrb w2, [x29,156]
mov w0, w20
ldr x3, [x21,8]
bl NandcXferData
cmn w0, #1
mov w28, w0
- bne .L1386
+ bne .L1380
add x0, x22, :lo12:.LANCHOR0
ldrb w1, [x0,16]
- cbz w1, .L1386
+ cbz w1, .L1380
strb wzr, [x0,16]
mov w19, 0
- b .L1387
-.L1386:
- cbz w19, .L1388
+ b .L1381
+.L1380:
+ cbz w19, .L1382
add x0, x22, :lo12:.LANCHOR0
- ldr w1, [x29,164]
+ ldr w1, [x29,172]
ldr w2, [x0,12]
mov w0, w20
add w1, w2, w1
cmn w0, #1
mov w23, w0
csel w19, w19, wzr, ne
-.L1388:
+.L1382:
mov w0, w20
bl NandcFlashDeCs
add x6, x22, :lo12:.LANCHOR0
ldrb w0, [x29,136]
cmn w28, #1
strb w0, [x6,16]
- bne .L1395
+ bne .L1389
ldrb w0, [x6,1864]
- cbnz w0, .L1390
-.L1394:
+ cbnz w0, .L1384
+.L1388:
add x0, x26, :lo12:.LANCHOR4
ldr x19, [x0,48]
- cbnz x19, .L1391
- b .L1460
-.L1390:
+ cbnz x19, .L1385
+ b .L1453
+.L1384:
ldr x0, [x6,128]
mov w4, 1
- ldr w1, [x29,164]
+ ldr w1, [x29,172]
ldr x2, [x21,8]
ldr x3, [x21,16]
ldr w19, [x0,304]
mov w0, w20
- str x6, [x29,96]
+ str x6, [x29,104]
bl FlashDdrTunningRead
cmn w0, #1
mov w28, w0
- beq .L1393
- ldr x6, [x29,96]
+ beq .L1387
+ ldr x6, [x29,104]
ldrb w0, [x6,1944]
cmp w28, w0, lsr 1
- bls .L1414
-.L1393:
+ bls .L1407
+.L1387:
lsr w0, w19, 8
bl NandcSetDdrPara
cmn w28, #1
- beq .L1394
- b .L1414
-.L1391:
- ldr w1, [x29,164]
+ beq .L1388
+ b .L1407
+.L1385:
+ ldr w1, [x29,172]
mov w0, w20
ldr x2, [x21,8]
ldr x3, [x21,16]
cmn w0, #1
mov w28, w0
mov w19, 0
- bne .L1396
+ bne .L1390
add x2, x22, :lo12:.LANCHOR0
ldr x0, [x2,744]
ldrb w0, [x0,19]
sub w0, w0, #1
uxtb w0, w0
cmp w0, 5
- bhi .L1397
+ bhi .L1391
ldrb w1, [x2,761]
mov w0, w20
add x2, x2, 764
mov w3, w19
bl HynixSetRRPara
-.L1397:
- ldr w1, [x29,164]
+.L1391:
+ ldr w1, [x29,172]
mov w0, w20
ldr x2, [x21,8]
mov w19, 0
bl FlashReadRawPage
mov w28, w0
add x2, x22, :lo12:.LANCHOR0
- ldr x0, [x29,104]
+ ldr x0, [x29,112]
ldr w1, [x21,4]
mov w3, w28
ldrb w2, [x2,1944]
bl printk
- b .L1396
-.L1460:
- ldr w1, [x29,164]
+ b .L1390
+.L1453:
+ ldr w1, [x29,172]
mov w0, w20
ldr x2, [x21,8]
ldr x3, [x21,16]
bl FlashReadRawPage
mov w28, w0
- b .L1396
-.L1414:
+ b .L1390
+.L1407:
mov w19, 0
-.L1395:
+.L1389:
add x0, x22, :lo12:.LANCHOR0
ldrb w0, [x0,1944]
add w0, w0, w0, lsl 1
cmp w28, w0, lsr 2
- bls .L1396
+ bls .L1390
add x0, x26, :lo12:.LANCHOR4
ldr x0, [x0,48]
cmp x0, xzr
mov w0, 256
csel w28, w28, w0, ne
-.L1396:
+.L1390:
cmp w28, 256
- beq .L1417
+ beq .L1410
cmn w28, #1
- bne .L1398
-.L1417:
+ bne .L1392
+.L1410:
str w28, [x25,x27]
- b .L1400
-.L1398:
+ b .L1394
+.L1392:
str wzr, [x25,x27]
-.L1400:
+.L1394:
ldr w3, [x25,x27]
cmn w3, #1
- bne .L1402
+ bne .L1396
add x2, x22, :lo12:.LANCHOR0
ldr w1, [x21,4]
- ldr x0, [x29,120]
+ ldr x0, [x29,128]
ldrb w2, [x2,1944]
bl printk
ldr x1, [x21,16]
- cbz x1, .L1402
+ cbz x1, .L1396
mov w2, 4
- ldr x0, [x29,112]
+ ldr x0, [x29,120]
mov w3, w2
bl rknand_print_hex
-.L1402:
- cbz w19, .L1404
+.L1396:
+ cbz w19, .L1398
add x0, x22, :lo12:.LANCHOR0
ldrb w0, [x0,1944]
add w0, w0, w0, lsl 1
cmp w23, w0, lsr 2
- bls .L1405
+ bls .L1399
add x26, x26, :lo12:.LANCHOR4
ldr x0, [x26,48]
cmp x0, xzr
mov w0, 256
csel w23, w23, w0, ne
-.L1405:
+.L1399:
add w0, w24, 1
mov w1, 56
cmp w23, 256
umull x0, w0, w1
- beq .L1418
+ beq .L1411
cmn w23, #1
- bne .L1406
-.L1418:
+ bne .L1400
+.L1411:
str w23, [x25,x0]
- b .L1404
-.L1406:
+ b .L1398
+.L1400:
str wzr, [x25,x0]
-.L1404:
+.L1398:
ldr w0, [x29,144]
add w24, w24, w19
- cbz w0, .L1378
+ cbz w0, .L1372
add x0, x22, :lo12:.LANCHOR0
ldrb w0, [x0,120]
- cbz w0, .L1378
+ cbz w0, .L1372
mov w0, w20
bl flash_exit_slc_mode
-.L1378:
+.L1372:
add w24, w24, 1
- b .L1375
-.L1459:
+ b .L1369
+.L1452:
mov w0, 0
-.L1376:
- ldr x1, [x29,128]
- ldr x2, [x29,168]
- ldr x1, [x1,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1410
- bl __stack_chk_fail
-.L1385:
+ b .L1450
+.L1379:
mov w0, w20
bl NandcWaitFlashReady
- cbz w19, .L1382
- ldr w1, [x29,164]
+ cbz w19, .L1376
+ ldr w1, [x29,172]
mov w0, w20
bl FlashReadDpDataOutCmd
- b .L1382
-.L1410:
+ b .L1376
+.L1450:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
stp x29, x30, [sp, -192]!
mov w2, 16
add x29, sp, 0
- stp x23, x24, [sp,48]
- adrp x23, __stack_chk_guard
- adrp x24, .LANCHOR4
stp x21, x22, [sp,32]
adrp x22, .LANCHOR0
- ldr x0, [x23,#:lo12:__stack_chk_guard]
- str x0, [x29,184]
add x0, x22, :lo12:.LANCHOR0
stp x25, x26, [sp,64]
- stp x19, x20, [sp,16]
stp x27, x28, [sp,80]
- add x19, x24, :lo12:.LANCHOR4
+ stp x19, x20, [sp,16]
+ stp x23, x24, [sp,48]
+ adrp x23, .LANCHOR4
mov w27, -1
ldrh w1, [x0,180]
- adrp x26, .LC97
+ add x19, x23, :lo12:.LANCHOR4
ldrh w21, [x0,182]
add x0, x19, 120
- add x26, x26, :lo12:.LC97
+ mov w28, 0
+ adrp x26, .LC96
+ add x26, x26, :lo12:.LC96
mul w21, w1, w21
mov w1, 0
uxth w21, w21
bl ftl_memset
add w25, w21, w27
ldr x0, [x19,88]
- mov w3, 0
- str x0, [x29,144]
- str xzr, [x29,136]
+ str x0, [x29,152]
+ mov w19, w28
sub w0, w21, #8
- mov w19, w3
+ str xzr, [x29,144]
uxth w25, w25
str w0, [x29,124]
-.L1462:
+.L1455:
add x1, x22, :lo12:.LANCHOR0
ldrb w1, [x1,1845]
cmp w1, w19
- bls .L1473
- mul w5, w19, w21
+ bls .L1465
+ mul w3, w19, w21
mov w20, w25
- mov w6, 61664
-.L1463:
+ mov w4, 61664
+.L1456:
ldr w0, [x29,124]
cmp w20, w0
- ble .L1465
- add w1, w5, w20
- add x0, x29, 128
+ ble .L1458
+ add w1, w3, w20
+ add x0, x29, 136
lsl w1, w1, 10
- str w1, [x29,132]
+ str w1, [x29,140]
mov w1, 1
- str x6, [x29,96]
+ str x4, [x29,104]
mov w2, w1
- str x3, [x29,104]
- str x5, [x29,112]
+ str x3, [x29,112]
bl FlashReadPages
- ldr w0, [x29,128]
- ldr x5, [x29,112]
+ ldr w0, [x29,136]
+ ldr x3, [x29,112]
cmn w0, #1
- ldr x3, [x29,104]
- ldr x6, [x29,96]
- beq .L1464
- add x28, x24, :lo12:.LANCHOR4
- ldr x0, [x28,88]
+ ldr x4, [x29,104]
+ beq .L1457
+ add x24, x23, :lo12:.LANCHOR4
+ ldr x0, [x24,88]
ldrh w0, [x0]
- cmp w0, w6
- bne .L1464
+ cmp w0, w4
+ bne .L1457
+ add x24, x24, 120
mov x0, x26
mov w1, w19
mov w2, w20
- str x3, [x29,112]
- add x28, x28, 120
+ add w28, w28, 1
bl printk
- ldr x3, [x29,112]
- strh w20, [x28,w19,sxtw 1]
- add w3, w3, 1
- uxth w3, w3
- b .L1465
-.L1464:
+ strh w20, [x24,w19,sxtw 1]
+ uxth w28, w28
+ b .L1458
+.L1457:
sub w20, w20, #1
uxth w20, w20
- b .L1463
-.L1465:
- add x0, x22, :lo12:.LANCHOR0
+ b .L1456
+.L1458:
+ add x1, x22, :lo12:.LANCHOR0
add w19, w19, 1
uxtb w19, w19
- ldrb w0, [x0,1845]
- cmp w0, w3
+ ldrb w1, [x1,1845]
+ cmp w1, w28
csel w27, w27, wzr, ne
- b .L1462
-.L1473:
- ldr x2, [x29,184]
+ b .L1455
+.L1465:
mov w0, w27
- ldr x1, [x23,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1469
- bl __stack_chk_fail
-.L1469:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
.global FlashProgSlc2KPages
.type FlashProgSlc2KPages, %function
FlashProgSlc2KPages:
- stp x29, x30, [sp, -192]!
+ stp x29, x30, [sp, -160]!
add x29, sp, 0
- stp x21, x22, [sp,32]
- adrp x22, __stack_chk_guard
- adrp x21, .LANCHOR0
stp x23, x24, [sp,48]
mov w23, w1
- str w3, [x29,108]
- ldr x1, [x22,#:lo12:__stack_chk_guard]
- mov w24, 0
- str x1, [x29,184]
adrp x1, .LANCHOR1+481
+ stp x21, x22, [sp,32]
stp x25, x26, [sp,64]
- stp x27, x28, [sp,80]
+ adrp x22, .LANCHOR0
ldrb w26, [x1,#:lo12:.LANCHOR1+481]
- mov w25, w2
+ stp x27, x28, [sp,80]
stp x19, x20, [sp,16]
- mov x28, x0
+ mov w24, w2
+ mov w27, w3
mov x19, x0
- add x21, x21, :lo12:.LANCHOR0
- mov w27, -1
-.L1475:
- cmp w24, w23
- beq .L1505
- mov w1, w25
- sub w4, w23, w24
- mov x0, x28
- add x2, x29, 120
- add x3, x29, 124
+ mov x21, x0
+ mov w25, 0
+ add x22, x22, :lo12:.LANCHOR0
+ mov w28, -1
+.L1467:
+ cmp w25, w23
+ beq .L1496
+ mov w1, w24
+ sub w4, w23, w25
+ mov x0, x21
+ add x2, x29, 96
+ add x3, x29, 100
bl LogAddr2PhyAddr
- ldr w0, [x29,124]
- ldrb w1, [x21,1845]
+ ldr w0, [x29,100]
+ ldrb w1, [x22,1845]
cmp w0, w1
- bcc .L1476
- str w27, [x28]
- b .L1477
-.L1476:
- add x0, x21, x0, uxtw
+ bcc .L1468
+ str w28, [x21]
+ b .L1469
+.L1468:
+ add x0, x22, x0, uxtw
ldrb w20, [x0,1848]
mov w0, w20
bl NandcWaitFlashReady
mov w0, w20
bl NandcFlashCs
- ldr w1, [x29,120]
+ ldr w1, [x29,96]
mov w0, w20
bl FlashProgFirstCmd
- ldr x3, [x28,8]
+ ldr x3, [x21,8]
mov w2, w26
- ldr x4, [x28,16]
+ ldr x4, [x21,16]
mov w1, 1
mov w0, w20
bl NandcXferData
- ldr w1, [x29,120]
+ ldr w1, [x29,96]
mov w0, w20
bl FlashProgSecondCmd
mov w0, w20
bl NandcWaitFlashReady
- ldr w1, [x29,120]
+ ldr w1, [x29,96]
mov w0, w20
bl FlashReadStatus
sbfx x0, x0, 0, 1
- str w0, [x28]
+ str w0, [x21]
mov w0, w20
- ldr w1, [x29,120]
- ldr w2, [x21,12]
+ ldr w1, [x29,96]
+ ldr w2, [x22,12]
add w1, w2, w1
bl FlashProgFirstCmd
- ldr x0, [x28,8]
+ ldr x0, [x21,8]
mov w1, 1
mov w2, w26
cmp x0, xzr
add x3, x0, 2048
- ldr x0, [x28,16]
+ ldr x0, [x21,16]
csel x3, x3, xzr, ne
add x4, x0, 8
cmp x0, xzr
mov w0, w20
bl NandcXferData
adrp x0, .LANCHOR0
- ldr w1, [x29,120]
+ ldr w1, [x29,96]
add x0, x0, :lo12:.LANCHOR0
ldr w2, [x0,12]
mov w0, w20
bl FlashProgSecondCmd
mov w0, w20
bl NandcWaitFlashReady
- ldr w1, [x29,120]
+ ldr w1, [x29,96]
mov w0, w20
bl FlashReadStatus
- tbz x0, 0, .L1480
- str w27, [x28]
-.L1480:
+ tbz x0, 0, .L1472
+ str w28, [x21]
+.L1472:
mov w0, w20
bl NandcFlashDeCs
-.L1477:
- add w24, w24, 1
- add x28, x28, 56
- b .L1475
-.L1505:
- ldr w0, [x29,108]
+.L1469:
+ add w25, w25, 1
+ add x21, x21, 56
+ b .L1467
+.L1496:
mov w21, 0
- cbnz w0, .L1482
-.L1489:
- ldr x2, [x29,184]
- mov w0, 0
- ldr x1, [x22,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1490
- bl __stack_chk_fail
-.L1482:
- adrp x24, .LC101
- adrp x26, .LC100
- adrp x27, .LC99
- add x24, x24, :lo12:.LC101
- add x26, x26, :lo12:.LC100
- add x27, x27, :lo12:.LC99
-.L1504:
+ cbz w27, .L1494
+ adrp x25, .LC100
+ adrp x26, .LC99
+ adrp x27, .LC98
+ add x25, x25, :lo12:.LC100
+ add x26, x26, :lo12:.LC99
+ add x27, x27, :lo12:.LC98
+.L1495:
cmp w21, w23
- beq .L1489
+ beq .L1494
ldr w0, [x19]
cmn w0, #1
- bne .L1483
- adrp x0, .LC98
+ bne .L1475
+ adrp x0, .LC97
ldr w1, [x19,4]
- add x0, x0, :lo12:.LC98
+ add x0, x0, :lo12:.LC97
bl printk
- b .L1484
-.L1483:
+ b .L1476
+.L1475:
adrp x20, .LANCHOR4
sub w4, w23, w21
- add x28, x20, :lo12:.LANCHOR4
- add x3, x29, 124
- mov w1, w25
- add x2, x29, 120
+ add x22, x20, :lo12:.LANCHOR4
+ add x3, x29, 100
+ mov w1, w24
+ add x2, x29, 96
mov x0, x19
bl LogAddr2PhyAddr
- ldr x0, [x28,96]
+ ldr x0, [x22,96]
mov x1, x19
mov x2, 56
str wzr, [x0]
- ldr x0, [x28,104]
+ ldr x0, [x22,104]
str wzr, [x0]
- add x0, x29, 128
+ add x0, x29, 104
bl memcpy
- ldr x0, [x28,96]
+ ldr x0, [x22,96]
mov w1, 1
- str x0, [x29,136]
- mov w2, w25
- ldr x0, [x28,104]
- str x0, [x29,144]
- add x0, x29, 128
+ str x0, [x29,112]
+ mov w2, w24
+ ldr x0, [x22,104]
+ str x0, [x29,120]
+ add x0, x29, 104
bl FlashReadPages
- ldr w28, [x29,128]
- cmn w28, #1
- bne .L1485
+ ldr w22, [x29,104]
+ cmn w22, #1
+ bne .L1477
ldr w1, [x19,4]
mov x0, x27
bl printk
- str w28, [x19]
-.L1485:
+ str w22, [x19]
+.L1477:
ldr x0, [x19,16]
- cbz x0, .L1486
+ cbz x0, .L1478
ldr w2, [x0]
add x0, x20, :lo12:.LANCHOR4
ldr x0, [x0,104]
ldr w3, [x0]
cmp w2, w3
- beq .L1486
+ beq .L1478
ldr w1, [x19,4]
mov x0, x26
bl printk
mov w0, -1
str w0, [x19]
-.L1486:
+.L1478:
ldr x0, [x19,8]
- cbz x0, .L1484
+ cbz x0, .L1476
add x20, x20, :lo12:.LANCHOR4
ldr w2, [x0]
ldr x0, [x20,96]
ldr w3, [x0]
cmp w2, w3
- beq .L1484
+ beq .L1476
ldr w1, [x19,4]
- mov x0, x24
+ mov x0, x25
bl printk
mov w0, -1
str w0, [x19]
-.L1484:
+.L1476:
add w21, w21, 1
add x19, x19, 56
- b .L1504
-.L1490:
+ b .L1495
+.L1494:
+ mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 192
+ ldp x29, x30, [sp], 160
ret
.size FlashProgSlc2KPages, .-FlashProgSlc2KPages
.align 2
str x24, [x19,16]
mov w25, -1
mov w26, 61664
-.L1507:
+.L1498:
add x0, x22, :lo12:.LANCHOR0
ldrh w1, [x0,1974]
cmp w23, w1
- bcs .L1516
+ bcs .L1507
ldrh w20, [x0,2022]
strh w25, [x21,12]
-.L1509:
+.L1500:
add x0, x22, :lo12:.LANCHOR0
sub w20, w20, #1
uxth w20, w20
ldrh w0, [x0,2022]
sub w1, w0, #16
cmp w20, w1
- ble .L1510
+ ble .L1501
madd w0, w23, w0, w20
mov w1, 1
lsl w0, w0, 10
bl FlashReadPages
ldr w0, [x19]
cmn w0, #1
- beq .L1509
+ beq .L1500
ldrh w0, [x24]
cmp w0, w26
- bne .L1509
+ bne .L1500
strh w20, [x21,12]
-.L1510:
+.L1501:
add w23, w23, 1
add x21, x21, 2
- b .L1507
-.L1516:
+ b .L1498
+.L1507:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
.type FtlGetLastWrittenPage, %function
FtlGetLastWrittenPage:
stp x29, x30, [sp, -208]!
+ cmp w1, 1
adrp x3, .LANCHOR0
add x29, sp, 0
- stp x21, x22, [sp,32]
- adrp x21, __stack_chk_guard
- add x3, x3, :lo12:.LANCHOR0
stp x23, x24, [sp,48]
- mov w24, w1
- ldr x1, [x21,#:lo12:__stack_chk_guard]
- cmp w24, 1
stp x19, x20, [sp,16]
- stp x25, x26, [sp,64]
- str x1, [x29,200]
- bne .L1518
+ stp x21, x22, [sp,32]
+ str x25, [sp,64]
+ mov w23, w1
+ add x3, x3, :lo12:.LANCHOR0
+ bne .L1509
ldrh w19, [x3,2028]
- b .L1519
-.L1518:
+ b .L1510
+.L1509:
ldrh w19, [x3,2026]
-.L1519:
+.L1510:
sub w19, w19, #1
- lsl w22, w0, 10
+ lsl w21, w0, 10
mov w1, 1
- mov w2, w24
+ mov w2, w23
sxth w19, w19
- str xzr, [x29,88]
- orr w0, w19, w22
- str w0, [x29,84]
- add x0, x29, 80
- add x25, x29, 136
- str x25, [x29,96]
+ str xzr, [x29,96]
+ orr w0, w19, w21
+ str w0, [x29,92]
+ add x0, x29, 88
+ add x24, x29, 144
+ str x24, [x29,104]
bl FlashReadPages
- ldr w0, [x29,136]
+ ldr w0, [x29,144]
cmn w0, #1
- bne .L1520
- mov w23, 0
- mov w26, 2
-.L1521:
- cmp w23, w19
- bgt .L1520
- add w3, w23, w19
+ bne .L1511
+ mov w22, 0
+ mov w25, 2
+.L1512:
+ cmp w22, w19
+ bgt .L1511
+ add w3, w22, w19
mov w1, 1
- mov w2, w24
- sdiv w20, w3, w26
+ mov w2, w23
+ sdiv w20, w3, w25
sxth w0, w20
- orr w0, w0, w22
- str w0, [x29,84]
- add x0, x29, 80
+ orr w0, w0, w21
+ str w0, [x29,92]
+ add x0, x29, 88
bl FlashReadPages
- ldr w0, [x25]
+ ldr w0, [x24]
cmn w0, #1
- bne .L1522
- ldr w0, [x25,4]
+ bne .L1513
+ ldr w0, [x24,4]
cmn w0, #1
- bne .L1522
- ldr w0, [x29,80]
+ bne .L1513
+ ldr w0, [x29,88]
cmn w0, #1
- beq .L1522
+ beq .L1513
sub w19, w20, #1
sxth w19, w19
- b .L1521
-.L1522:
+ b .L1512
+.L1513:
add w20, w20, 1
- sxth w23, w20
- b .L1521
-.L1520:
- ldr x2, [x29,200]
+ sxth w22, w20
+ b .L1512
+.L1511:
mov w0, w19
- ldr x1, [x21,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1525
- bl __stack_chk_fail
-.L1525:
+ ldr x25, [sp,64]
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
- ldp x25, x26, [sp,64]
ldp x29, x30, [sp], 208
ret
.size FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
ldrh w21, [x0,2022]
sub w21, w21, #1
uxth w21, w21
-.L1530:
+.L1520:
add x0, x20, :lo12:.LANCHOR0
ldrh w0, [x0,2022]
sub w0, w0, #48
cmp w21, w0
- ble .L1533
+ ble .L1523
lsl w0, w21, 10
mov w1, 1
str w0, [x19,4]
bl FlashReadPages
ldr w0, [x19]
cmn w0, #1
- bne .L1531
+ bne .L1521
ldr w0, [x19,4]
mov w1, 1
mov w2, w1
str w0, [x19,4]
mov x0, x19
bl FlashReadPages
-.L1531:
+.L1521:
ldr w0, [x19]
cmn w0, #1
- beq .L1532
+ beq .L1522
ldrh w0, [x22]
cmp w0, w25
- bne .L1532
+ bne .L1522
add x1, x20, :lo12:.LANCHOR0
add x0, x1, 2112
strh w21, [x1,2112]
str w1, [x0,8]
ldrh w1, [x22,8]
strh w1, [x0,4]
- b .L1533
-.L1532:
+ b .L1523
+.L1522:
sub w21, w21, #1
uxth w21, w21
- b .L1530
-.L1533:
+ b .L1520
+.L1523:
add x21, x20, :lo12:.LANCHOR0
mov w2, 65535
mov w0, -1
ldrh w1, [x21,2112]
cmp w1, w2
- beq .L1535
+ beq .L1525
ldrh w1, [x21,2116]
cmp w1, w2
- beq .L1537
+ beq .L1527
add x25, x23, :lo12:.LANCHOR4
lsl w1, w1, 10
add x0, x25, 136
bl FlashReadPages
ldr w0, [x25,136]
cmn w0, #1
- beq .L1537
+ beq .L1527
ldrh w1, [x22]
mov w0, 61649
cmp w1, w0
- bne .L1537
+ bne .L1527
ldr w0, [x22,4]
ldr w1, [x21,2120]
cmp w0, w1
- bls .L1537
+ bls .L1527
str w0, [x21,2120]
ldrh w1, [x21,2116]
ldrh w0, [x22,8]
strh w1, [x21,2112]
strh w0, [x21,2116]
-.L1537:
+.L1527:
add x25, x20, :lo12:.LANCHOR0
mov w1, 1
add x21, x23, :lo12:.LANCHOR4
sxth w19, w0
add w0, w0, 1
strh w0, [x25,2114]
-.L1539:
- tbnz w19, #31, .L1544
+.L1529:
+ tbnz w19, #31, .L1534
ldrh w0, [x25,2112]
mov w1, 1
mov w2, w1
bl FlashReadPages
ldr w0, [x21]
cmn w0, #1
- beq .L1540
-.L1544:
+ beq .L1530
+.L1534:
add x1, x20, :lo12:.LANCHOR0
ldrh w0, [x22,10]
mov w2, 65535
strh w0, [x1,2118]
ldrh w0, [x22,12]
cmp w0, w2
- bne .L1541
- b .L1542
-.L1540:
+ bne .L1531
+ b .L1532
+.L1530:
sub w19, w19, #1
sxth w19, w19
- b .L1539
-.L1541:
+ b .L1529
+.L1531:
ldr w2, [x1,1948]
cmp w0, w2
- beq .L1542
+ beq .L1532
ldrh w1, [x1,1962]
lsr w1, w1, 2
cmp w0, w1
- bcs .L1542
+ bcs .L1532
cmp w2, w1
- bcs .L1542
+ bcs .L1532
bl FtlSysBlkNumInit
-.L1542:
+.L1532:
add x20, x20, :lo12:.LANCHOR0
mov x19, 0
add x21, x20, 2112
add x23, x23, :lo12:.LANCHOR4
-.L1545:
+.L1535:
ldrh w0, [x20,1974]
mov w1, w19
add x19, x19, 1
cmp w1, w0
- bcs .L1560
+ bcs .L1550
add x0, x24, :lo12:.LANCHOR2
ldr x3, [x23,144]
ldrh w2, [x0,2232]
lsl w2, w2, 2
add x1, x3, x1, lsl 2
bl ftl_memcpy
- b .L1545
-.L1560:
+ b .L1535
+.L1550:
mov w0, 0
-.L1535:
+.L1525:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ubfiz x0, x21, 2, 16
ldr x2, [x20,2208]
ldr w22, [x2,x0]
- cbnz w22, .L1562
+ cbnz w22, .L1552
ldr x0, [x20,144]
lsl x19, x1, 4
adrp x2, .LANCHOR0+2036
ldr x1, [x20,144]
add x19, x1, x19
str w22, [x19,4]
- b .L1563
-.L1562:
+ b .L1553
+.L1552:
lsl x19, x1, 4
ldr x1, [x20,144]
adrp x0, .LANCHOR4
str wzr, [x0,4]
ldr x0, [x20,144]
strh w21, [x0,x19]
-.L1563:
+.L1553:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
FtlVendorPartRead:
stp x29, x30, [sp, -176]!
add x29, sp, 0
- stp x23, x24, [sp,48]
- adrp x23, __stack_chk_guard
- mov x24, x2
- stp x21, x22, [sp,32]
stp x25, x26, [sp,64]
- mov w22, w0
adrp x25, .LANCHOR0
- ldr x0, [x23,#:lo12:__stack_chk_guard]
- mov w21, w1
- str x0, [x29,168]
+ stp x21, x22, [sp,32]
+ mov w22, w0
add x0, x25, :lo12:.LANCHOR0
stp x19, x20, [sp,16]
+ stp x23, x24, [sp,48]
stp x27, x28, [sp,80]
+ mov w21, w1
add w1, w22, w1
- str x23, [x29,104]
- ldrh w3, [x0,2034]
- mov w20, -1
+ ldrh w28, [x0,2034]
+ mov x24, x2
ldrh w0, [x0,2020]
+ mov w20, -1
cmp w1, w0
- bhi .L1565
- lsr w23, w22, w3
+ bhi .L1555
+ lsr w28, w22, w28
mov w20, 0
adrp x26, .LANCHOR2
-.L1566:
- cbz w21, .L1565
- add x4, x26, :lo12:.LANCHOR2
- ldr x0, [x4,2200]
- ldr w1, [x0,w23,uxtw 2]
+.L1556:
+ cbz w21, .L1555
+ add x3, x26, :lo12:.LANCHOR2
+ ldr x0, [x3,2200]
+ ldr w1, [x0,w28,uxtw 2]
add x0, x25, :lo12:.LANCHOR0
ldrh w19, [x0,2032]
uxth w0, w21
- udiv w27, w22, w19
- msub w27, w27, w19, w22
- sub w19, w19, w27
+ udiv w23, w22, w19
+ msub w23, w23, w19, w22
+ sub w19, w19, w23
uxth w19, w19
cmp w19, w21
csel w19, w0, w19, hi
- lsl w28, w19, 9
- cbz w1, .L1568
- ldr x0, [x4,2080]
- ubfiz x27, x27, 9, 16
- str w1, [x29,116]
+ lsl w27, w19, 9
+ cbz w1, .L1558
+ ldr x0, [x3,2080]
+ ubfiz x23, x23, 9, 16
+ str w1, [x29,124]
mov w1, 1
- str x0, [x29,120]
+ str x0, [x29,128]
mov w2, w1
- add x0, x29, 112
- str x4, [x29,96]
- str xzr, [x29,128]
+ add x0, x29, 120
+ str x3, [x29,104]
+ str xzr, [x29,136]
bl FlashReadPages
- ldr x4, [x29,96]
- mov w2, w28
- ldr w0, [x29,112]
- ldr x1, [x4,2080]
+ ldr x3, [x29,104]
+ mov w2, w27
+ ldr w0, [x29,120]
+ ldr x1, [x3,2080]
cmn w0, #1
mov x0, x24
csinv w20, w20, wzr, ne
- add x1, x1, x27
+ add x1, x1, x23
bl ftl_memcpy
- b .L1570
-.L1568:
+ b .L1560
+.L1558:
mov x0, x24
- mov w2, w28
+ mov w2, w27
bl ftl_memset
-.L1570:
- add w23, w23, 1
+.L1560:
+ add w28, w28, 1
sub w21, w21, w19
add w22, w22, w19
- add x24, x24, x28, sxtw
- b .L1566
-.L1565:
- ldr x1, [x29,104]
+ add x24, x24, x27, sxtw
+ b .L1556
+.L1555:
mov w0, w20
- ldr x2, [x29,168]
- ldr x1, [x1,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1572
- bl __stack_chk_fail
-.L1572:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
mov w0, 17221
movk w0, 0x4254, lsl 16
cmp w1, w0
- beq .L1575
- adrp x0, .LC73
- adrp x1, .LC102
- add x1, x1, :lo12:.LC102
- add x0, x0, :lo12:.LC73
+ beq .L1564
+ adrp x0, .LC72
+ adrp x1, .LC101
+ add x1, x1, :lo12:.LC101
+ add x0, x0, :lo12:.LC72
bl printk
ldrh w2, [x19,2136]
mov w1, 0
ldr x0, [x19,2152]
lsl w2, w2, 9
bl ftl_memset
-.L1575:
+.L1564:
mov w0, 0
ldr x19, [sp,16]
ldp x29, x30, [sp], 32
mov w0, 19539
movk w0, 0x4654, lsl 16
cmp w1, w0
- beq .L1577
+ beq .L1566
mov x0, x21
mov w1, 0
mov w2, 512
mov w0, 19539
movk w0, 0x4654, lsl 16
str w0, [x20,352]
-.L1577:
+.L1566:
add x0, x19, :lo12:.LANCHOR2
mov w2, 19539
movk w2, 0x4654, lsl 16
ldr w3, [x0,352]
cmp w3, w2
- bne .L1578
+ bne .L1567
ldr w2, [x0,440]
str w2, [x0,188]
ldr w2, [x0,444]
ldr w2, [x0,400]
str w2, [x0,220]
str w1, [x0,344]
-.L1578:
+.L1567:
add x0, x19, :lo12:.LANCHOR2
mov w1, 34661
movk w1, 0x1234, lsl 16
ldr w2, [x0,420]
str wzr, [x0,2024]
cmp w2, w1
- bne .L1579
+ bne .L1568
mov w1, 1
str w1, [x0,160]
- adrp x0, .LC73
- adrp x1, .LC103
- add x0, x0, :lo12:.LC73
- add x1, x1, :lo12:.LC103
+ adrp x0, .LC72
+ adrp x1, .LC102
+ add x0, x0, :lo12:.LC72
+ add x1, x1, :lo12:.LC102
bl printk
-.L1579:
+.L1568:
adrp x2, .LANCHOR0
add x19, x19, :lo12:.LANCHOR2
add x2, x2, :lo12:.LANCHOR0
mov w2, 12
bl ftl_memset
ldrh w21, [x20,1960]
-.L1582:
+.L1571:
add x1, x19, :lo12:.LANCHOR0
ldrh w0, [x1,1962]
cmp w0, w21
- bls .L1625
+ bls .L1614
mov x27, 0
ldrh w5, [x1,1952]
ldrh w4, [x1,2038]
mov w20, w27
mov x23, x1
-.L1626:
+.L1615:
cmp w5, w27, uxth
- bls .L1657
+ bls .L1646
add x0, x23, 1984
mov w1, w21
str x4, [x29,112]
bl FtlBbmIsBadBlock
ldr x5, [x29,120]
ldr x4, [x29,112]
- cbnz w0, .L1583
+ cbnz w0, .L1572
add x2, x24, :lo12:.LANCHOR2
mov w0, 56
lsl w28, w28, 10
uxth w20, w20
add x1, x2, x1, sxtw 2
str x1, [x0,16]
-.L1583:
+.L1572:
add x27, x27, 1
- b .L1626
-.L1657:
+ b .L1615
+.L1646:
add x0, x24, :lo12:.LANCHOR2
mov w1, w20
mov w2, 1
mov w28, 61574
ldr x0, [x0,2048]
bl FlashReadPages
-.L1585:
+.L1574:
cmp w20, w23, uxth
- bls .L1658
+ bls .L1647
add x7, x24, :lo12:.LANCHOR2
mov x0, 56
mul x6, x23, x0
cmn w8, #1
ldr x26, [x1,16]
ubfx x25, x0, 10, 16
- bne .L1587
+ bne .L1576
add w0, w0, 1
str w0, [x1,4]
mov w1, 1
cmp w0, w22
ldr x7, [x29,112]
ldr x8, [x29,104]
- bne .L1587
+ bne .L1576
ldr x0, [x7,2048]
str w8, [x0,x6]
-.L1587:
+.L1576:
add x0, x24, :lo12:.LANCHOR2
ldr x1, [x0,2048]
ldr w1, [x1,x6]
cmn w1, #1
- beq .L1589
+ beq .L1578
ldr w0, [x0,196]
cmn w0, #1
- beq .L1590
+ beq .L1579
ldr w1, [x26,4]
cmp w0, w1
- bhi .L1591
-.L1590:
+ bhi .L1580
+.L1579:
ldr w0, [x26,4]
cmn w0, #1
- beq .L1591
+ beq .L1580
add x1, x24, :lo12:.LANCHOR2
add w0, w0, 1
str w0, [x1,196]
-.L1591:
+.L1580:
ldrh w0, [x26]
mov w1, 61604
cmp w0, w1
- beq .L1593
- bhi .L1594
+ beq .L1582
+ bhi .L1583
cmp w0, w28
- bne .L1592
+ bne .L1581
add x0, x19, :lo12:.LANCHOR0
add x7, x24, :lo12:.LANCHOR2
ldrh w6, [x0,2048]
ldr x7, [x7,2192]
sxth w2, w1
sub w1, w1, w0
- b .L1610
-.L1594:
+ b .L1599
+.L1583:
cmp w0, w27
- beq .L1596
+ beq .L1585
cmp w0, w22
- bne .L1592
+ bne .L1581
mov w0, w25
mov w1, 0
- b .L1655
-.L1596:
+ b .L1644
+.L1585:
add x0, x19, :lo12:.LANCHOR0
add x7, x24, :lo12:.LANCHOR2
ldr w6, [x0,2056]
sub w1, w1, #1
sxth w2, w2
sxth w1, w1
-.L1598:
+.L1587:
cmp w2, w1
- ble .L1659
+ ble .L1648
sbfiz x8, x2, 2, 32
ldr w11, [x26,4]
sxth x9, w2
ldr w10, [x7,x8]
cmp w11, w10
- bls .L1599
+ bls .L1588
ldr w1, [x7]
- cbnz w1, .L1600
+ cbnz w1, .L1589
cmp w0, w6
- bne .L1601
-.L1600:
+ bne .L1590
+.L1589:
add x0, x24, :lo12:.LANCHOR2
mov w1, 1
str x9, [x29,104]
ldr x8, [x29,120]
ldr x2, [x29,112]
ldr x9, [x29,104]
- b .L1602
-.L1601:
+ b .L1591
+.L1590:
add x1, x24, :lo12:.LANCHOR2
add w0, w0, 1
strh w0, [x1,2304]
-.L1602:
+.L1591:
mov w0, 0
-.L1603:
+.L1592:
cmp w0, w2
- beq .L1660
+ beq .L1649
add x6, x24, :lo12:.LANCHOR2
sxtw x1, w0
lsl x7, x1, 2
add x7, x6, x1
ldrh w7, [x7,2]
strh w7, [x6,x1]
- b .L1603
-.L1660:
+ b .L1592
+.L1649:
add x0, x24, :lo12:.LANCHOR2
ldr w6, [x26,4]
ldr x1, [x0,2216]
str w6, [x1,x8]
ldr x1, [x0,2168]
strh w25, [x1,x9,lsl 1]
- tbz w2, #31, .L1654
- b .L1589
-.L1599:
+ tbz w2, #31, .L1643
+ b .L1578
+.L1588:
sub w2, w2, #1
sxth w2, w2
- b .L1598
-.L1659:
- tbz w2, #31, .L1609
- b .L1589
-.L1654:
+ b .L1587
+.L1648:
+ tbz w2, #31, .L1598
+ b .L1578
+.L1643:
add x1, x19, :lo12:.LANCHOR0
ldrh w0, [x0,2304]
ldr w1, [x1,2056]
sub w1, w1, w0
sub w1, w1, #1
cmp w2, w1, sxth
- bgt .L1592
-.L1609:
+ bgt .L1581
+.L1598:
add x1, x24, :lo12:.LANCHOR2
add w0, w0, 1
sxtw x2, w2
ldr x0, [x1,2216]
str w4, [x0,x2,lsl 2]
ldr x0, [x1,2168]
- b .L1656
-.L1618:
+ b .L1645
+.L1607:
sbfiz x8, x2, 2, 32
ldr w11, [x26,4]
sxth x9, w2
ldr w10, [x7,x8]
cmp w11, w10
- bhi .L1661
+ bhi .L1650
sub w2, w2, #1
sxth w2, w2
-.L1610:
+.L1599:
cmp w2, w1
- bgt .L1618
- b .L1617
-.L1661:
+ bgt .L1607
+ b .L1606
+.L1650:
ldr w1, [x7]
- cbnz w1, .L1612
+ cbnz w1, .L1601
cmp w0, w6
- bne .L1613
-.L1612:
+ bne .L1602
+.L1601:
add x0, x19, :lo12:.LANCHOR0
mov w1, 1
str x9, [x29,104]
ldr x2, [x29,120]
ldr x8, [x29,112]
ldr x9, [x29,104]
- b .L1614
-.L1613:
+ b .L1603
+.L1602:
add x1, x19, :lo12:.LANCHOR0
add w0, w0, 1
strh w0, [x1,2072]
-.L1614:
+.L1603:
mov w0, 0
-.L1615:
+.L1604:
cmp w0, w2
- beq .L1662
+ beq .L1651
add x1, x24, :lo12:.LANCHOR2
ldr x7, [x1,2192]
sxtw x1, w0
add x7, x6, x1
ldrh w7, [x7,2]
strh w7, [x6,x1]
- b .L1615
-.L1662:
+ b .L1604
+.L1651:
add x0, x24, :lo12:.LANCHOR2
ldr w1, [x26,4]
ldr x0, [x0,2192]
add x0, x19, :lo12:.LANCHOR0
ldr x0, [x0,2080]
strh w25, [x0,x9,lsl 1]
-.L1617:
- tbnz w2, #31, .L1589
+.L1606:
+ tbnz w2, #31, .L1578
add x1, x19, :lo12:.LANCHOR0
ldrh w0, [x1,2048]
ldrh w6, [x1,2072]
sub w0, w0, #1
sub w0, w0, w6
cmp w2, w0, sxth
- bgt .L1592
+ bgt .L1581
add x0, x24, :lo12:.LANCHOR2
sxtw x2, w2
add w6, w6, 1
ldr x0, [x0,2192]
str w4, [x0,x2,lsl 2]
ldr x0, [x1,2080]
-.L1656:
+.L1645:
strh w25, [x0,x2,lsl 1]
- b .L1592
-.L1593:
+ b .L1581
+.L1582:
add x0, x24, :lo12:.LANCHOR2
add x1, x0, 280
ldrh w2, [x0,280]
cmp w2, w22
- bne .L1621
+ bne .L1610
strh w25, [x0,280]
ldr w0, [x26,4]
str w0, [x1,8]
- b .L1592
-.L1621:
+ b .L1581
+.L1610:
ldrh w0, [x1,4]
cmp w0, w22
- beq .L1622
+ beq .L1611
mov w1, 1
bl FtlFreeSysBlkQueueIn
-.L1622:
+.L1611:
add x1, x24, :lo12:.LANCHOR2
ldr w2, [x26,4]
add x0, x1, 280
ldr w6, [x0,8]
cmp w6, w2
- bcs .L1623
+ bcs .L1612
ldrh w2, [x1,280]
strh w2, [x0,4]
strh w25, [x1,280]
ldr w1, [x26,4]
str w1, [x0,8]
- b .L1592
-.L1623:
+ b .L1581
+.L1612:
strh w25, [x0,4]
- b .L1592
-.L1589:
+ b .L1581
+.L1578:
mov w0, w25
mov w1, 1
-.L1655:
+.L1644:
bl FtlFreeSysBlkQueueIn
-.L1592:
+.L1581:
add x23, x23, 1
- b .L1585
-.L1658:
+ b .L1574
+.L1647:
add w21, w21, 1
uxth w21, w21
- b .L1582
-.L1625:
+ b .L1571
+.L1614:
add x4, x24, :lo12:.LANCHOR2
ldr x2, [x4,2168]
ldrh w0, [x2]
- cbz w0, .L1627
-.L1630:
+ cbz w0, .L1616
+.L1619:
add x1, x19, :lo12:.LANCHOR0
ldr x2, [x1,2080]
ldrh w0, [x2]
- cbz w0, .L1628
- b .L1649
-.L1627:
+ cbz w0, .L1617
+ b .L1638
+.L1616:
ldrh w4, [x4,2304]
- cbz w4, .L1630
+ cbz w4, .L1619
ldr w1, [x1,2056]
-.L1631:
+.L1620:
cmp w0, w1
- bcs .L1630
+ bcs .L1619
ldrh w4, [x2,w0,sxtw 1]
- cbz w4, .L1632
+ cbz w4, .L1621
mov w7, w0
-.L1633:
+.L1622:
add x1, x19, :lo12:.LANCHOR0
ldr w1, [x1,2056]
cmp w0, w1
- bcs .L1630
+ bcs .L1619
add x2, x24, :lo12:.LANCHOR2
sxtw x6, w0
sub w1, w0, w7
str w6, [x5,x1,lsl 2]
ldr x1, [x2,2168]
strh wzr, [x1,x4]
- b .L1633
-.L1632:
+ b .L1622
+.L1621:
add w0, w0, 1
sxth w0, w0
- b .L1631
-.L1628:
+ b .L1620
+.L1617:
ldrh w4, [x1,2072]
- cbz w4, .L1649
+ cbz w4, .L1638
ldrh w1, [x1,2048]
-.L1636:
+.L1625:
cmp w0, w1
mov w7, w0
- bge .L1649
+ bge .L1638
ldrh w4, [x2,w0,sxtw 1]
- cbz w4, .L1637
-.L1638:
+ cbz w4, .L1626
+.L1627:
add x2, x19, :lo12:.LANCHOR0
ldrh w1, [x2,2048]
cmp w0, w1
- bge .L1649
+ bge .L1638
sxtw x6, w0
sub w1, w0, w7
ldr x5, [x2,2080]
str w6, [x5,x1,lsl 2]
ldr x1, [x2,2080]
strh wzr, [x1,x4]
- b .L1638
-.L1637:
+ b .L1627
+.L1626:
add w0, w0, 1
sxth w0, w0
- b .L1636
-.L1649:
+ b .L1625
+.L1638:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldrh w0, [x20,280]
mov w1, 65535
cmp w0, w1
- bne .L1664
-.L1668:
+ bne .L1653
+.L1657:
mov w19, -1
- b .L1665
-.L1664:
+ b .L1654
+.L1653:
mov w1, 1
bl FtlGetLastWrittenPage
sxth w24, w0
add w0, w0, 1
strh w0, [x25,2]
-.L1666:
- tbnz w24, #31, .L1671
+.L1655:
+ tbnz w24, #31, .L1660
ldrh w0, [x20,280]
mov w1, 1
mov w2, w1
bl FlashReadPages
ldr w0, [x19]
cmn w0, #1
- beq .L1667
-.L1671:
+ beq .L1656
+.L1660:
add x24, x22, :lo12:.LANCHOR4
add x19, x21, :lo12:.LANCHOR2
add x20, x19, 224
mov w0, 19539
movk w0, 0x4654, lsl 16
cmp w1, w0
- beq .L1678
- b .L1668
-.L1667:
- sub w24, w24, #1
+ beq .L1667
+ b .L1657
+.L1656:
+ sub w24, w24, #1
sxth w24, w24
- b .L1666
-.L1678:
+ b .L1655
+.L1667:
ldrb w1, [x20,10]
ldrh w0, [x22,1974]
ldrh w2, [x20,8]
strh w2, [x19,286]
cmp w1, w0
- bne .L1668
+ bne .L1657
ldrh w1, [x22,2026]
ldrh w0, [x22,2032]
str w2, [x24,192]
str wzr, [x19,208]
str wzr, [x19,216]
str wzr, [x19,176]
- bls .L1672
+ bls .L1661
str w0, [x19,196]
-.L1672:
+.L1661:
add x0, x21, :lo12:.LANCHOR2
ldr w1, [x0,260]
ldr w3, [x0,200]
cmp w1, w3
- bls .L1673
+ bls .L1662
str w1, [x0,200]
-.L1673:
+.L1662:
mov w0, 65535
cmp w2, w0
- beq .L1674
+ beq .L1663
add x0, x21, :lo12:.LANCHOR2
bl make_superblock
-.L1674:
+.L1663:
add x1, x21, :lo12:.LANCHOR2
add x0, x1, 48
ldrh w2, [x1,48]
mov w1, 65535
cmp w2, w1
- beq .L1675
+ beq .L1664
bl make_superblock
-.L1675:
+.L1664:
add x1, x21, :lo12:.LANCHOR2
add x0, x1, 96
ldrh w2, [x1,96]
mov w1, 65535
cmp w2, w1
- beq .L1676
+ beq .L1665
bl make_superblock
-.L1676:
+.L1665:
add x21, x21, :lo12:.LANCHOR2
mov w1, 65535
add x0, x21, 296
mov w19, 0
ldrh w2, [x21,296]
cmp w2, w1
- beq .L1665
+ beq .L1654
bl make_superblock
-.L1665:
+.L1654:
mov w0, w19
ldr x25, [sp,64]
ldp x19, x20, [sp,16]
ldrh w28, [x0,3004]
mov w0, 65535
cmp w28, w0
- beq .L1699
- cbnz w28, .L1680
- b .L1681
-.L1699:
+ beq .L1688
+ cbnz w28, .L1669
+ b .L1670
+.L1688:
mov w28, 0
-.L1680:
+.L1669:
adrp x0, .LANCHOR0+2026
ldrh w0, [x0,#:lo12:.LANCHOR0+2026]
cmp w25, w0
- bne .L1682
-.L1681:
+ bne .L1671
+.L1670:
bl FtlGcPageVarInit
-.L1682:
+.L1671:
mov w23, -1
mov w20, 0
mov w21, 65535
adrp x26, .LANCHOR0
adrp x27, .LANCHOR2
-.L1693:
+.L1682:
ldrh w0, [x24]
strb wzr, [x24,8]
cmp w0, w21
- beq .L1700
-.L1684:
-.L1696:
+ beq .L1689
+.L1673:
+.L1685:
add x0, x26, :lo12:.LANCHOR0
mov x2, x24
mov w19, 0
ldrh w6, [x0,1952]
ldrh w9, [x0,2038]
add x6, x24, x6, lsl 1
-.L1685:
+.L1674:
cmp x2, x6
- beq .L1710
+ beq .L1699
ldrh w1, [x2,16]
cmp w1, w21
- beq .L1686
+ beq .L1675
add x7, x27, :lo12:.LANCHOR2
mov w0, 56
orr w1, w28, w1, lsl 10
sdiv w1, w1, w10
add x1, x7, x1, sxtw 2
str x1, [x0,16]
-.L1686:
+.L1675:
add x2, x2, 2
- b .L1685
-.L1710:
+ b .L1674
+.L1699:
add x0, x27, :lo12:.LANCHOR2
mov w1, w19
mov w2, 0
mov x22, 0
ldr x0, [x0,2048]
bl FlashReadPages
-.L1688:
+.L1677:
cmp w19, w22, uxth
- bls .L1711
+ bls .L1700
adrp x0, .LANCHOR2
add x7, x0, :lo12:.LANCHOR2
mov x0, 56
ldr x1, [x29,128]
ldr x7, [x29,96]
ldr w0, [x10,x8]
- cbnz w0, .L1689
+ cbnz w0, .L1678
ldr x9, [x29,120]
add x22, x22, 1
ldr x8, [x9,16]
ldrh w0, [x8]
cmp w0, w21
- bne .L1690
+ bne .L1679
mov w0, 1
str w0, [x7,2328]
- b .L1683
-.L1690:
+ b .L1672
+.L1679:
ldr w0, [x8,12]
ldr w2, [x8,8]
bl FtlGcUpdatePage
- b .L1688
-.L1689:
+ b .L1677
+.L1678:
ldr w2, [x7,160]
- cbz w2, .L1691
+ cbz w2, .L1680
ldrh w3, [x24]
ldr x2, [x7,-80]
ldrh w2, [x2,x3,lsl 1]
cmp w2, 119
- bls .L1692
-.L1691:
+ bls .L1681
+.L1680:
cmn w0, #1
csel w1, w1, w23, eq
-.L1692:
+.L1681:
adrp x0, .LANCHOR2
ldrh w2, [x24]
add x22, x0, :lo12:.LANCHOR2
bl FtlGcPageVarInit
ldr x1, [x29,128]
mov w23, w1
- b .L1693
-.L1711:
+ b .L1682
+.L1700:
add w20, w20, 1
add w3, w28, 1
cmp w20, w25
uxth w28, w3
- bcs .L1695
-.L1697:
+ bcs .L1684
+.L1686:
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
ldrh w0, [x0,2026]
cmp w0, w28
- bhi .L1696
- b .L1700
-.L1695:
+ bhi .L1685
+ b .L1689
+.L1684:
ldr x0, [x29,136]
add x1, x0, :lo12:.LANCHOR1
ldrh w0, [x1,3004]
cmp w0, w21
- beq .L1697
+ beq .L1686
add w0, w0, w20
strh w0, [x1,3004]
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
ldrh w0, [x0,2026]
cmp w0, w28
- bls .L1697
- b .L1698
-.L1700:
+ bls .L1686
+ b .L1687
+.L1689:
mov w2, 0
-.L1683:
+.L1672:
ldr x0, [x29,136]
mov w1, w28
strh w28, [x24,2]
strh w0, [x19,3004]
mov x0, x24
bl ftl_sb_update_avl_pages
-.L1698:
+.L1687:
mov w0, w23
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
.global FlashProgPages
.type FlashProgPages, %function
FlashProgPages:
- stp x29, x30, [sp, -208]!
- adrp x4, __stack_chk_guard
- adrp x7, .LANCHOR1+481
+ stp x29, x30, [sp, -192]!
+ adrp x6, .LANCHOR1+481
add x29, sp, 0
stp x19, x20, [sp,16]
- ldr x5, [x4,#:lo12:__stack_chk_guard]
adrp x20, .LANCHOR0
- str x5, [x29,200]
- add x5, x20, :lo12:.LANCHOR0
+ ldrb w6, [x6,#:lo12:.LANCHOR1+481]
+ add x4, x20, :lo12:.LANCHOR0
+ str w3, [x29,120]
stp x21, x22, [sp,32]
stp x23, x24, [sp,48]
stp x25, x26, [sp,64]
stp x27, x28, [sp,80]
- ldrb w7, [x7,#:lo12:.LANCHOR1+481]
+ str w6, [x29,124]
mov x19, x0
- ldr x6, [x5,744]
+ ldr x5, [x4,744]
mov w25, w1
- ldrb w5, [x5,8]
+ ldrb w4, [x4,8]
mov w23, w2
- str w3, [x29,120]
mov w22, 0
- str w7, [x29,124]
- str x4, [x29,112]
- ldrb w6, [x6,19]
- cbz w5, .L1713
+ ldrb w5, [x5,19]
+ cbz w4, .L1702
bl FlashProgSlc2KPages
- b .L1714
-.L1713:
- sub w0, w6, #1
+ b .L1703
+.L1702:
+ sub w0, w5, #1
mov w27, 56
mov x28, 24
- str w0, [x29,108]
-.L1765:
+ str w0, [x29,116]
+.L1753:
cmp w22, w25
- bcs .L1766
+ bcs .L1754
umull x21, w22, w27
sub w4, w25, w22
- add x2, x29, 136
+ add x2, x29, 128
add x26, x19, x21
mov w1, w23
mov x0, x26
- add x3, x29, 140
+ add x3, x29, 132
bl LogAddr2PhyAddr
mov w24, w0
add x2, x20, :lo12:.LANCHOR0
- ldr w0, [x29,140]
+ ldr w0, [x29,132]
ldrb w4, [x2,1845]
cmp w0, w4
- bcc .L1715
+ bcc .L1704
mov w0, -1
str w0, [x19,x21]
- b .L1716
-.L1715:
+ b .L1705
+.L1704:
ldrb w1, [x2,1945]
add x3, x2, 1652
cmp w1, wzr
csel w24, w24, wzr, ne
madd x0, x1, x28, x3
ldr x0, [x0,8]
- cbz x0, .L1718
+ cbz x0, .L1707
cmp w4, 1
- bne .L1719
+ bne .L1708
ldr x0, [x2,128]
bl NandcIqrWaitFlashReady
-.L1719:
- ldrb w0, [x29,140]
+.L1708:
+ ldrb w0, [x29,132]
bl FlashWaitCmdDone
-.L1718:
+.L1707:
add x0, x20, :lo12:.LANCHOR0
- ldr w2, [x29,140]
+ ldr w2, [x29,132]
add x0, x0, 1652
- ldr w1, [x29,136]
+ ldr w1, [x29,128]
madd x0, x2, x28, x0
str x26, [x0,8]
str xzr, [x0,16]
str w1, [x0,4]
- cbz w24, .L1720
+ cbz w24, .L1709
add w1, w22, 1
umull x1, w1, w27
add x1, x19, x1
str x1, [x0,16]
-.L1720:
+.L1709:
add x1, x20, :lo12:.LANCHOR0
add x0, x1, x2
madd x2, x2, x28, x1
ldrb w0, [x1,1845]
strb w21, [x2,1652]
cmp w0, 1
- bne .L1721
+ bne .L1710
mov w0, w21
bl NandcWaitFlashReady
- b .L1722
-.L1721:
+ b .L1711
+.L1710:
mov w0, w21
- str x1, [x29,96]
+ str x1, [x29,104]
bl NandcFlashCs
- ldr x1, [x29,96]
- ldr w0, [x29,140]
+ ldr x1, [x29,104]
+ ldr w0, [x29,132]
add x1, x1, 708
ldr w0, [x1,x0,lsl 2]
- ldr w1, [x29,136]
+ ldr w1, [x29,128]
cmp w0, wzr
mov w0, w21
cset w2, ne
bl FlashWaitReadyEN
mov w0, w21
bl NandcFlashDeCs
-.L1722:
- ldr w0, [x29,108]
+.L1711:
+ ldr w0, [x29,116]
cmp w0, 5
- bhi .L1723
+ bhi .L1712
add x2, x20, :lo12:.LANCHOR0
add x0, x2, x21, sxtw
ldrb w0, [x0,1616]
- cbz w0, .L1723
+ cbz w0, .L1712
ldrb w1, [x2,761]
mov w0, w21
add x2, x2, 764
mov w3, 0
bl HynixSetRRPara
-.L1723:
+.L1712:
mov w0, w21
bl NandcFlashCs
cmp w23, 1
- bne .L1724
+ bne .L1713
add x0, x20, :lo12:.LANCHOR0
ldrb w0, [x0,120]
- cbz w0, .L1724
+ cbz w0, .L1713
mov w0, w21
bl flash_enter_slc_mode
-.L1724:
- ldr w1, [x29,136]
+.L1713:
+ ldr w1, [x29,128]
mov w0, w21
bl FlashProgFirstCmd
ldrb w2, [x29,124]
mov w1, 1
ldr x4, [x26,16]
bl NandcXferData
- cbz w24, .L1725
- ldr w1, [x29,136]
+ cbz w24, .L1714
+ ldr w1, [x29,128]
mov w0, w21
add x26, x20, :lo12:.LANCHOR0
bl FlashProgDpFirstCmd
- ldr w1, [x29,140]
+ ldr w1, [x29,132]
add x0, x26, 708
ldr w0, [x0,x1,lsl 2]
- ldr w1, [x29,136]
+ ldr w1, [x29,128]
cmp w0, wzr
mov w0, w21
cset w2, ne
bl FlashWaitReadyEN
ldr w2, [x26,12]
mov w0, w21
- ldr w1, [x29,136]
+ ldr w1, [x29,128]
add w1, w2, w1
bl FlashProgDpSecondCmd
add w4, w22, 1
ldr x3, [x4,8]
ldr x4, [x4,16]
bl NandcXferData
-.L1725:
- ldr w1, [x29,136]
+.L1714:
+ ldr w1, [x29,128]
mov w0, w21
add w22, w22, w24
bl FlashProgSecondCmd
mov w0, w21
bl NandcFlashDeCs
-.L1716:
+.L1705:
add w22, w22, 1
- b .L1765
-.L1766:
+ b .L1753
+.L1754:
add x20, x20, :lo12:.LANCHOR0
mov x21, 0
add x22, x20, 1652
mov x24, 24
ldr x0, [x20,128]
bl NandcIqrWaitFlashReady
-.L1727:
+.L1716:
ldrb w0, [x20,1845]
cmp w0, w21
- bls .L1767
+ bls .L1755
mov w0, w21
bl FlashWaitCmdDone
cmp w23, 1
- bne .L1728
+ bne .L1717
ldrb w0, [x20,120]
- cbz w0, .L1728
+ cbz w0, .L1717
mul x0, x21, x24
ldrb w0, [x0,x22]
bl flash_exit_slc_mode
-.L1728:
+.L1717:
add x21, x21, 1
- b .L1727
-.L1767:
+ b .L1716
+.L1755:
ldr w0, [x29,120]
- cbnz w0, .L1730
-.L1738:
+ cbnz w0, .L1719
+.L1727:
mov w0, 0
- b .L1714
-.L1730:
- adrp x22, .LC101
+ b .L1703
+.L1719:
adrp x24, .LC100
adrp x26, .LC99
+ adrp x27, .LC98
mov w21, 0
- add x22, x22, :lo12:.LC101
add x24, x24, :lo12:.LC100
add x26, x26, :lo12:.LC99
-.L1731:
+ add x27, x27, :lo12:.LC98
+.L1720:
cmp w21, w25
- beq .L1738
+ beq .L1727
ldr w0, [x19]
cmn w0, #1
- bne .L1732
- adrp x0, .LC98
+ bne .L1721
+ adrp x0, .LC97
ldr w1, [x19,4]
- add x0, x0, :lo12:.LC98
+ add x0, x0, :lo12:.LC97
bl printk
- b .L1733
-.L1732:
+ b .L1722
+.L1721:
adrp x20, .LANCHOR4
sub w4, w25, w21
- add x27, x20, :lo12:.LANCHOR4
- add x3, x29, 140
+ add x22, x20, :lo12:.LANCHOR4
+ add x3, x29, 132
mov w1, w23
- add x2, x29, 136
+ add x2, x29, 128
mov x0, x19
bl LogAddr2PhyAddr
- ldr x0, [x27,96]
+ ldr x0, [x22,96]
mov x1, x19
mov x2, 56
str wzr, [x0]
- ldr x0, [x27,104]
+ ldr x0, [x22,104]
str wzr, [x0]
- add x0, x29, 144
+ add x0, x29, 136
bl memcpy
- ldr x0, [x27,96]
+ ldr x0, [x22,96]
mov w1, 1
- str x0, [x29,152]
+ str x0, [x29,144]
mov w2, w23
- ldr x0, [x27,104]
- str x0, [x29,160]
- add x0, x29, 144
+ ldr x0, [x22,104]
+ str x0, [x29,152]
+ add x0, x29, 136
bl FlashReadPages
- ldr w27, [x29,144]
- cmn w27, #1
- bne .L1734
+ ldr w22, [x29,136]
+ cmn w22, #1
+ bne .L1723
ldr w1, [x19,4]
- mov x0, x26
+ mov x0, x27
bl printk
- str w27, [x19]
-.L1734:
+ str w22, [x19]
+.L1723:
ldr x0, [x19,16]
- cbz x0, .L1735
+ cbz x0, .L1724
ldr w2, [x0]
add x0, x20, :lo12:.LANCHOR4
ldr x0, [x0,104]
ldr w3, [x0]
cmp w2, w3
- beq .L1735
+ beq .L1724
ldr w1, [x19,4]
- mov x0, x24
+ mov x0, x26
bl printk
mov w0, -1
str w0, [x19]
-.L1735:
+.L1724:
ldr x0, [x19,8]
- cbz x0, .L1733
+ cbz x0, .L1722
add x20, x20, :lo12:.LANCHOR4
ldr w2, [x0]
ldr x0, [x20,96]
ldr w3, [x0]
cmp w2, w3
- beq .L1733
+ beq .L1722
ldr w1, [x19,4]
- mov x0, x22
+ mov x0, x24
bl printk
mov w0, -1
str w0, [x19]
-.L1733:
+.L1722:
add w21, w21, 1
add x19, x19, 56
- b .L1731
-.L1714:
- ldr x1, [x29,112]
- ldr x2, [x29,200]
- ldr x1, [x1,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1739
- bl __stack_chk_fail
-.L1739:
+ b .L1720
+.L1703:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 208
+ ldp x29, x30, [sp], 192
ret
.size FlashProgPages, .-FlashProgPages
.align 2
.type FlashTestBlk.part.17, %function
FlashTestBlk.part.17:
- stp x29, x30, [sp, -176]!
+ stp x29, x30, [sp, -160]!
mov w1, 165
mov w2, 32
add x29, sp, 0
stp x19, x20, [sp,16]
- str x21, [sp,32]
adrp x19, .LANCHOR4
- adrp x21, __stack_chk_guard
- add x19, x19, :lo12:.LANCHOR4
uxth w20, w0
+ add x19, x19, :lo12:.LANCHOR4
lsl w20, w20, 10
- ldr x0, [x21,#:lo12:__stack_chk_guard]
- str x0, [x29,168]
ldr x0, [x19,80]
+ str x0, [x29,48]
+ add x0, x29, 96
str x0, [x29,56]
- add x0, x29, 104
- str x0, [x29,64]
bl ftl_memset
ldr x0, [x19,80]
mov w1, 90
mov w2, 8
bl ftl_memset
- str w20, [x29,52]
+ str w20, [x29,44]
mov w1, 1
- add x0, x29, 48
+ add x0, x29, 40
mov w2, w1
bl FlashEraseBlocks
mov w1, 1
- add x0, x29, 48
- mov w2, w1
+ add x0, x29, 40
mov w3, w1
+ mov w2, w1
bl FlashProgPages
- ldr w0, [x29,48]
+ ldr w0, [x29,40]
mov w1, 0
mov w2, 1
cmn w0, #1
- add x0, x29, 48
+ add x0, x29, 40
csetm w19, eq
bl FlashEraseBlocks
- ldr x2, [x29,168]
mov w0, w19
- ldr x1, [x21,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L1769
- bl __stack_chk_fail
-.L1769:
ldp x19, x20, [sp,16]
- ldr x21, [sp,32]
- ldp x29, x30, [sp], 176
+ ldp x29, x30, [sp], 160
ret
.size FlashTestBlk.part.17, .-FlashTestBlk.part.17
.align 2
ldr w2, [x0,#:lo12:.LANCHOR4+68]
mov w0, 0
cmp w1, w2
- bcc .L1771
+ bcc .L1758
mov w0, w1
bl FlashTestBlk.part.17
-.L1771:
+.L1758:
ldp x29, x30, [sp], 16
ret
.size FlashTestBlk, .-FlashTestBlk
.global FlashMakeFactorBbt
.type FlashMakeFactorBbt, %function
FlashMakeFactorBbt:
- stp x29, x30, [sp, -256]!
- adrp x2, __stack_chk_guard
+ stp x29, x30, [sp, -240]!
adrp x4, .LANCHOR0
add x29, sp, 0
stp x21, x22, [sp,32]
- ldr x0, [x2,#:lo12:__stack_chk_guard]
adrp x22, .LANCHOR4
- str x0, [x29,248]
add x0, x22, :lo12:.LANCHOR4
stp x19, x20, [sp,16]
stp x25, x26, [sp,64]
stp x27, x28, [sp,80]
stp x23, x24, [sp,48]
mov x20, x4
- str x2, [x29,112]
+ mov w19, 0
ldr x0, [x0,88]
add x25, x20, :lo12:.LANCHOR0
str x0, [x29,160]
add x0, x4, :lo12:.LANCHOR0
- mov w19, 0
add x28, x25, 708
ldrh w1, [x0,180]
ldrh w21, [x0,182]
ldr w0, [x29,172]
csel w0, w1, w0, eq
str w0, [x29,172]
- adrp x0, .LC104
+ adrp x0, .LC103
mov w1, 1
- add x0, x0, :lo12:.LC104
+ add x0, x0, :lo12:.LC103
bl printk
add x0, x22, :lo12:.LANCHOR4
mov w1, 0
str w0, [x29,168]
ldr w0, [x29,128]
and w0, w0, 1
- str w0, [x29,108]
+ str w0, [x29,116]
sub w0, w21, #1
uxth w0, w0
str w0, [x29,124]
-.L1775:
+.L1762:
ldrb w0, [x25,1845]
cmp w0, w19
- bls .L1827
+ bls .L1813
add x0, x22, :lo12:.LANCHOR4
sxtw x24, w19
add x0, x0, 120
ldrh w20, [x0,w19,sxtw 1]
- cbnz w20, .L1806
+ cbnz w20, .L1792
ldrh w2, [x25,188]
mov w1, w20
ldr x0, [x25,1856]
and w0, w0, 2
uxtb w0, w0
str w0, [x29,120]
-.L1777:
+.L1764:
uxth w0, w26
str w0, [x29,144]
cmp w0, w21
- bcs .L1787
+ bcs .L1774
mov w0, -1
- strb w0, [x29,190]
- strb w0, [x29,191]
- ldr w0, [x29,108]
- cbz w0, .L1779
+ strb w0, [x29,182]
+ strb w0, [x29,183]
+ ldr w0, [x29,116]
+ cbz w0, .L1766
ldr w3, [x28,x24,lsl 2]
mov w0, w27
- add x2, x29, 190
+ add x2, x29, 182
add w3, w20, w3
- str x3, [x29,96]
+ str x3, [x29,104]
mov w1, w3
bl FlashReadSpare
ldrb w0, [x25,8]
- ldr x3, [x29,96]
+ ldr x3, [x29,104]
cmp w0, 1
- bne .L1779
+ bne .L1766
ldr w1, [x25,12]
mov w0, w27
- add x2, x29, 191
+ add x2, x29, 183
add w1, w3, w1
bl FlashReadSpare
- ldrb w0, [x29,190]
- ldrb w1, [x29,191]
+ ldrb w0, [x29,182]
+ ldrb w1, [x29,183]
and w0, w1, w0
- strb w0, [x29,190]
-.L1779:
+ strb w0, [x29,182]
+.L1766:
ldr w0, [x29,120]
- cbz w0, .L1781
+ cbz w0, .L1768
ldr x0, [x25,744]
- add x2, x29, 191
+ add x2, x29, 183
ldrh w1, [x0,10]
ldr w0, [x28,x24,lsl 2]
sub w1, w1, #1
mov w0, w27
add w1, w1, w20
bl FlashReadSpare
-.L1781:
+.L1768:
ldr x0, [x25,744]
- ldrb w1, [x29,190]
+ ldrb w1, [x29,182]
ldrb w0, [x0,7]
cmp w0, 8
- beq .L1807
+ beq .L1793
cmp w0, 1
- bne .L1782
-.L1807:
+ bne .L1769
+.L1793:
mov w0, 1
- cbz w1, .L1784
- ldrb w0, [x29,191]
+ cbz w1, .L1771
+ ldrb w0, [x29,183]
cmp w0, wzr
cset w0, eq
- b .L1784
-.L1782:
+ b .L1771
+.L1769:
cmp w1, 255
mov w0, 1
- bne .L1784
- ldrb w0, [x29,191]
+ bne .L1771
+ ldrb w0, [x29,183]
cmp w0, 255
cset w0, ne
-.L1784:
+.L1771:
ldr x1, [x29,128]
- tbz x1, 2, .L1785
+ tbz x1, 2, .L1772
ldr w1, [x28,x24,lsl 2]
mov w0, w27
add w1, w20, w1
bl SandiskProgTestBadBlock
-.L1785:
- cbz w0, .L1786
- adrp x0, .LC105
+.L1772:
+ cbz w0, .L1773
+ adrp x0, .LC104
mov w1, w19
mov w2, w26
- add x0, x0, :lo12:.LC105
+ add x0, x0, :lo12:.LC104
add w23, w23, 1
bl printk
ldr x0, [x29,144]
ldrb w0, [x25,1845]
mul w0, w1, w0
cmp w23, w0
- bgt .L1787
-.L1786:
+ bgt .L1774
+.L1773:
ldr w0, [x29,172]
add w26, w26, 1
add w20, w20, w0
- b .L1777
-.L1787:
- adrp x0, .LC106
+ b .L1764
+.L1774:
+ adrp x0, .LC105
mov w1, w19
- add x0, x0, :lo12:.LC106
+ add x0, x0, :lo12:.LC105
mov w2, w23
bl printk
ldrb w0, [x25,1845]
ldr w1, [x29,168]
mul w0, w1, w0
cmp w23, w0
- blt .L1789
+ blt .L1776
ldrh w2, [x25,188]
mov w1, 0
ldr x0, [x25,1856]
lsl w2, w2, 9
bl ftl_memset
-.L1789:
- cbnz w19, .L1791
+.L1776:
+ cbnz w19, .L1778
add x0, x22, :lo12:.LANCHOR4
- adrp x26, .LC107
+ adrp x26, .LC106
mov w20, w19
- add x26, x26, :lo12:.LC107
+ add x26, x26, :lo12:.LC106
mov w23, 1
ldrh w27, [x0,68]
-.L1792:
+.L1779:
ldrb w0, [x25,9]
cmp w0, w27
- bls .L1828
+ bls .L1814
mov w0, w27
bl FlashTestBlk
- cbz w0, .L1793
+ cbz w0, .L1780
mov w1, w27
mov x0, x26
add w20, w20, 1
ldr w3, [x2,x1]
orr w0, w3, w0
str w0, [x2,x1]
-.L1793:
+.L1780:
add w27, w27, 1
uxth w27, w27
- b .L1792
-.L1828:
- adrp x26, .LC107
+ b .L1779
+.L1814:
+ adrp x26, .LC106
ldr w23, [x29,124]
sub w27, w21, #50
- add x26, x26, :lo12:.LC107
-.L1795:
+ add x26, x26, :lo12:.LC106
+.L1782:
cmp w23, w27
- ble .L1829
+ ble .L1815
mov w0, w23
bl FlashTestBlk
- cbz w0, .L1796
+ cbz w0, .L1783
mov w1, w23
mov x0, x26
bl printk
ldr w5, [x3,x1]
orr w0, w5, w0
str w0, [x3,x1]
-.L1796:
+.L1783:
sub w2, w23, #1
uxth w23, w2
- b .L1795
-.L1829:
+ b .L1782
+.L1815:
add x1, x22, :lo12:.LANCHOR4
ldrb w0, [x25,9]
ldr w1, [x1,68]
sub w0, w0, w1
cmp w20, w0
- bcc .L1791
+ bcc .L1778
ldrh w2, [x25,188]
mov w1, 0
ldr x0, [x25,1856]
lsl w2, w2, 9
bl ftl_memset
-.L1791:
- adrp x23, .LC108
+.L1778:
+ adrp x23, .LC107
ldr w27, [x29,124]
mul w26, w19, w21
- add x23, x23, :lo12:.LC108
+ add x23, x23, :lo12:.LC107
add x20, x22, :lo12:.LANCHOR4
-.L1799:
+.L1786:
mov w2, w27
mov x0, x23
mov w1, w19
bl printk
ldr x2, [x25,1856]
-.L1800:
+.L1787:
ubfx x0, x27, 5, 11
ldr w0, [x2,x0,lsl 2]
lsr w0, w0, w27
and w1, w0, 1
- tbz x0, 0, .L1830
+ tbz x0, 0, .L1816
sub w27, w27, #1
uxth w27, w27
- b .L1800
-.L1830:
+ b .L1787
+.L1816:
add x0, x20, 120
mov w2, -3872
strh w27, [x0,x24,lsl 1]
mov w1, 1
ldr x0, [x25,1856]
mov w2, w1
- str x0, [x29,200]
+ str x0, [x29,192]
ldr x0, [x20,88]
- str x0, [x29,208]
+ str x0, [x29,200]
add w0, w27, w26
lsl w0, w0, 10
- str w0, [x29,196]
- add x0, x29, 192
+ str w0, [x29,188]
+ add x0, x29, 184
bl FlashEraseBlocks
mov w1, 1
- add x0, x29, 192
+ add x0, x29, 184
mov w2, w1
mov w3, w1
bl FlashProgPages
- ldr w0, [x29,192]
- cbz w0, .L1806
+ ldr w0, [x29,184]
+ cbz w0, .L1792
sub w27, w27, #1
uxth w27, w27
- b .L1799
-.L1806:
+ b .L1786
+.L1792:
add w19, w19, 1
uxtb w19, w19
- b .L1775
-.L1827:
- ldr x0, [x29,112]
- ldr x1, [x29,248]
- ldr x0, [x0,#:lo12:__stack_chk_guard]
- cmp x1, x0
- beq .L1803
- bl __stack_chk_fail
-.L1803:
+ b .L1762
+.L1813:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 256
+ ldp x29, x30, [sp], 240
ret
.size FlashMakeFactorBbt, .-FlashMakeFactorBbt
.align 2
mov w19, w28
adrp x24, .LANCHOR2
mov w27, 56
-.L1832:
+.L1818:
ldrh w0, [x20,1952]
cmp w0, w28
- bls .L1865
+ bls .L1851
add x1, x24, :lo12:.LANCHOR2
umull x0, w28, w27
ldr x1, [x1,-88]
bl V2P_block
uxth w23, w0
mov w1, w23
- cbz w26, .L1833
+ cbz w26, .L1819
str x1, [x29,112]
bl IsBlkInVendorPart
ldr x1, [x29,112]
- cbnz w0, .L1834
-.L1833:
+ cbnz w0, .L1820
+.L1819:
mov w0, w1
bl FtlBbmIsBadBlock
- cbnz w0, .L1835
+ cbnz w0, .L1821
adrp x1, .LANCHOR2
lsl w23, w23, 10
add x3, x1, :lo12:.LANCHOR2
uxth w21, w21
add x0, x3, x0, sxtw 2
str x0, [x1,16]
- b .L1834
-.L1835:
+ b .L1820
+.L1821:
add w19, w19, 1
uxth w19, w19
-.L1834:
+.L1820:
add w2, w28, 1
uxth w28, w2
- b .L1832
-.L1865:
- cbz w21, .L1838
+ b .L1818
+.L1851:
+ cbz w21, .L1824
ldr w0, [x29,124]
adrp x20, .LANCHOR2
mov w2, w21
mov w1, w23
ldr x0, [x0,-88]
bl FlashEraseBlocks
-.L1839:
+.L1825:
cmp w21, w24, uxth
- bls .L1866
+ bls .L1852
add x1, x20, :lo12:.LANCHOR2
mul x0, x24, x27
ldr x1, [x1,-88]
add x2, x1, x0
ldr w0, [x1,x0]
cmn w0, #1
- bne .L1840
+ bne .L1826
ldr w0, [x2,4]
add w19, w19, 1
lsr w0, w0, 10
uxth w19, w19
bl FtlBbmMapBadBlock
-.L1840:
+.L1826:
add x24, x24, 1
- b .L1839
-.L1866:
- cbnz w26, .L1842
+ b .L1825
+.L1852:
+ cbnz w26, .L1828
mov w0, 6
uxth w23, w23
str w0, [x29,124]
mov w27, 1
- b .L1843
-.L1842:
+ b .L1829
+.L1828:
add x0, x22, :lo12:.LANCHOR0
mov w23, 1
ldrh w27, [x0,2028]
lsr w0, w27, 2
str w0, [x29,124]
-.L1843:
+.L1829:
mov w24, 0
add x22, x22, :lo12:.LANCHOR0
-.L1853:
+.L1839:
mov w28, 0
mov w21, w28
-.L1844:
+.L1830:
ldrh w0, [x22,1952]
cmp w0, w28
- bls .L1867
+ bls .L1853
add x1, x20, :lo12:.LANCHOR2
mov w0, 56
umull x0, w28, w0
uxth w2, w0
str w2, [x29,112]
mov w1, w2
- cbz w26, .L1845
+ cbz w26, .L1831
str x1, [x29,104]
bl IsBlkInVendorPart
ldr x1, [x29,104]
- cbnz w0, .L1846
-.L1845:
+ cbnz w0, .L1832
+.L1831:
mov w0, w1
bl FtlBbmIsBadBlock
- cbnz w0, .L1846
+ cbnz w0, .L1832
add x3, x20, :lo12:.LANCHOR2
mov w0, 56
ldr w2, [x29,112]
uxth w21, w21
add x0, x3, x0, sxtw 2
str x0, [x1,16]
-.L1846:
+.L1832:
add w2, w28, 1
uxth w28, w2
- b .L1844
-.L1867:
- cbz w21, .L1838
+ b .L1830
+.L1853:
+ cbz w21, .L1824
add x0, x20, :lo12:.LANCHOR2
mov w1, w21
mov w2, w23
mov x28, 0
ldr x0, [x0,-88]
bl FlashProgPages
-.L1849:
+.L1835:
cmp w21, w28, uxth
- bls .L1868
+ bls .L1854
add x1, x20, :lo12:.LANCHOR2
mov x0, 56
mul x0, x28, x0
add x1, x3, x0
ldr w0, [x3,x0]
cmn w0, #1
- bne .L1850
+ bne .L1836
ldr w0, [x1,4]
add w19, w19, 1
lsr w0, w0, 10
uxth w19, w19
bl FtlBbmMapBadBlock
- b .L1851
-.L1850:
- cbz w26, .L1851
+ b .L1837
+.L1836:
+ cbz w26, .L1837
ldr w0, [x1,4]
mov w1, 1
lsr w0, w0, 10
bl FtlFreeSysBlkQueueIn
-.L1851:
+.L1837:
add x28, x28, 1
- b .L1849
-.L1868:
+ b .L1835
+.L1854:
ldr w0, [x29,124]
add w24, w24, w0
uxth w24, w24
cmp w24, w27
- bcc .L1853
+ bcc .L1839
cmp w25, 63
- bhi .L1838
+ bhi .L1824
add x20, x20, :lo12:.LANCHOR2
mov w1, w23
mov w2, w21
ldr x0, [x20,-88]
bl FlashEraseBlocks
-.L1838:
+.L1824:
mov w0, w19
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldrh w2, [x20,2036]
str x0, [x24,144]
bl ftl_memset
-.L1870:
+.L1856:
ldrh w1, [x20,1974]
mov w0, w21
add x21, x21, 1
cmp w0, w1
- bge .L1877
+ bge .L1863
add x1, x22, :lo12:.LANCHOR2
ldr x3, [x24,144]
ldrh w2, [x1,2232]
add x0, x3, x0, sxtw 2
lsl w2, w2, 2
bl ftl_memcpy
- b .L1870
-.L1877:
+ b .L1856
+.L1863:
add x19, x19, :lo12:.LANCHOR4
mov w1, 255
add x19, x19, 136
mov w2, 16
- adrp x25, .LC109
- adrp x26, .LC110
+ adrp x25, .LC108
+ adrp x26, .LC109
ldr x21, [x19,16]
mov w24, 0
- add x25, x25, :lo12:.LC109
- add x26, x26, :lo12:.LC110
+ add x25, x25, :lo12:.LC108
+ add x26, x26, :lo12:.LC109
mov x0, x21
bl ftl_memset
mov w0, -3887
strh w0, [x21,10]
ldr w0, [x20,1948]
strh w0, [x21,12]
-.L1872:
+.L1858:
add x27, x22, :lo12:.LANCHOR2
ldrh w1, [x20,2112]
ldrh w2, [x20,2114]
ldrh w1, [x20,2114]
sub w0, w0, #1
cmp w1, w0
- blt .L1873
+ blt .L1859
ldr w0, [x20,2120]
strh wzr, [x20,2114]
add w0, w0, 1
mov w2, w1
mov w3, w1
bl FlashProgPages
-.L1873:
+.L1859:
ldrh w0, [x20,2114]
add w0, w0, 1
strh w0, [x20,2114]
ldr w0, [x19]
cmn w0, #1
- bne .L1874
+ bne .L1860
ldr w1, [x19,4]
mov x0, x26
bl printk
- b .L1872
-.L1874:
- cbnz w24, .L1878
+ b .L1858
+.L1860:
+ cbnz w24, .L1864
mov w24, 1
- b .L1872
-.L1878:
+ b .L1858
+.L1864:
mov w0, 0
ldr x27, [sp,80]
ldp x19, x20, [sp,16]
add x23, x21, 96
mov x19, x21
sub x24, x21, #16
-.L1880:
+.L1866:
cmp x20, x23
- bne .L1881
+ bne .L1867
ldrh w0, [x21,-8]
ldr w3, [x21,876]
lsr w2, w0, 1
add w1, w4, w1, lsr 2
ldr w4, [x21,160]
uxth w1, w1
- cbz w4, .L1882
+ cbz w4, .L1868
ldr w4, [x21,220]
cmp w4, 29
- bhi .L1882
+ bhi .L1868
cmp w4, 2
mov w1, 0
- bls .L1883
- tbz x0, 0, .L1908
- cbz w3, .L1883
-.L1908:
+ bls .L1869
+ tbz x0, 0, .L1894
+ cbz w3, .L1869
+.L1894:
mov w1, w2
- b .L1882
-.L1881:
+ b .L1868
+.L1867:
ldrb w0, [x20,8]
mov w1, 0
cmp w0, 1
- bne .L1883
+ bne .L1869
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
ldrh w2, [x0,1972]
cmp w2, 1
- beq .L1883
+ beq .L1869
ldrb w0, [x0,120]
- cbnz w0, .L1883
+ cbnz w0, .L1869
ldr w2, [x21,160]
ldrh w0, [x21,-8]
lsr w1, w0, 3
- cbz w2, .L1882
+ cbz w2, .L1868
ldr w2, [x21,220]
cmp w2, 1
- bhi .L1882
+ bhi .L1868
mov w1, 7
mul w1, w0, w1
lsr w1, w1, 3
-.L1882:
- cbz w1, .L1883
+.L1868:
+ cbz w1, .L1869
sub w1, w1, #1
uxth w1, w1
-.L1883:
+.L1869:
mov x0, x24
bl List_pop_index_node
uxth w22, w0
mov x0, x20
bl make_superblock
ldrb w0, [x20,7]
- cbz w0, .L1885
+ cbz w0, .L1871
adrp x25, .LANCHOR0
mov x3, 56
add x0, x25, :lo12:.LANCHOR0
ldrh w5, [x0,1952]
mov x0, 0
mov w26, w0
- b .L1886
-.L1885:
+ b .L1872
+.L1871:
ubfiz x0, x22, 1, 16
ldr x1, [x19,-40]
mov w2, -1
strh w2, [x1,x0]
- b .L1930
-.L1889:
+ b .L1916
+.L1875:
ldr x4, [x19,-88]
madd x1, x0, x3, x4
str xzr, [x1,16]
add x1, x20, x0, lsl 1
ldrh w1, [x1,16]
cmp w1, w6
- beq .L1888
+ beq .L1874
umull x2, w26, w3
add w26, w26, 1
lsl w1, w1, 10
add x2, x4, x2
uxth w26, w26
str w1, [x2,4]
-.L1888:
+.L1874:
add x0, x0, 1
-.L1886:
+.L1872:
cmp w5, w0, uxth
- bhi .L1889
+ bhi .L1875
cmp x20, x19
uxtw x27, w22
- bne .L1890
+ bne .L1876
ldr w0, [x19,160]
- cbz w0, .L1890
+ cbz w0, .L1876
ldr x0, [x19,-80]
ldrh w0, [x0,x27,lsl 1]
cmp w0, 30
- bls .L1890
+ bls .L1876
strb wzr, [x19,8]
-.L1890:
+.L1876:
ldrb w0, [x20,8]
- cbnz w0, .L1891
+ cbnz w0, .L1877
lsl x0, x27, 1
ldr x1, [x19,-80]
mov w2, 2
ldrh w3, [x1,x0]
- cbz w3, .L1931
+ cbz w3, .L1917
add x2, x25, :lo12:.LANCHOR0
ldrh w2, [x2,2016]
add w2, w3, w2
-.L1931:
+.L1917:
strh w2, [x1,x0]
mov w1, 0
ldr w0, [x19,204]
str w0, [x19,204]
mov w0, w22
bl ftl_set_blk_mode
- b .L1894
-.L1891:
+ b .L1880
+.L1877:
lsl x0, x27, 1
ldr x2, [x19,-80]
ldrh w1, [x2,x0]
str w0, [x19,208]
mov w0, w22
bl ftl_set_blk_mode.part.8
-.L1894:
+.L1880:
lsl x27, x27, 1
ldr x0, [x19,-80]
ldr w1, [x19,216]
ldrh w0, [x0,x27]
cmp w0, w1
- bls .L1895
+ bls .L1881
str w0, [x19,216]
-.L1895:
+.L1881:
add x2, x25, :lo12:.LANCHOR0
ldr w3, [x19,204]
ldr w0, [x19,208]
add w0, w0, 1
str w0, [x1,16]
mov x0, 0
-.L1896:
+.L1882:
cmp w26, w0, uxth
- bls .L1932
+ bls .L1918
ldr x1, [x19,-88]
madd x1, x0, x3, x1
add x0, x0, 1
ldr w2, [x1,4]
and w2, w2, -1024
str w2, [x1,4]
- b .L1896
-.L1932:
+ b .L1882
+.L1918:
ldrb w1, [x20,8]
mov w2, w26
ldr x0, [x19,-88]
bl FlashEraseBlocks
mov w1, w28
mov x3, 56
-.L1898:
+.L1884:
cmp w26, w28, uxth
- bls .L1933
+ bls .L1919
mul x0, x28, x3
ldr x2, [x19,-88]
add x4, x2, x0
ldr w2, [x2,x0]
cmn w2, #1
- bne .L1899
+ bne .L1885
ldr w0, [x4,4]
add w1, w1, 1
str x3, [x29,96]
ldrb w0, [x20,7]
sub w0, w0, #1
strb w0, [x20,7]
-.L1899:
+.L1885:
add x28, x28, 1
- b .L1898
-.L1933:
- cbz w1, .L1901
+ b .L1884
+.L1919:
+ cbz w1, .L1887
mov w0, w22
bl update_multiplier_value
bl FtlBbmTblFlush
-.L1901:
+.L1887:
ldrb w0, [x20,7]
- cbnz w0, .L1902
+ cbnz w0, .L1888
ldr x0, [x19,-40]
mov w1, -1
strh w1, [x0,x27]
-.L1930:
+.L1916:
mov w0, w22
bl INSERT_DATA_LIST
- b .L1880
-.L1902:
+ b .L1866
+.L1888:
add x25, x25, :lo12:.LANCHOR0
strh wzr, [x20,2]
strb wzr, [x20,6]
ldrh w0, [x19,956]
stp x21, x22, [sp,32]
mov w21, 0
- cbz w0, .L1936
+ cbz w0, .L1922
adrp x22, .LANCHOR0
- adrp x24, .LC111
+ adrp x24, .LC110
add x22, x22, :lo12:.LANCHOR0
- add x24, x24, :lo12:.LC111
-.L1944:
+ add x24, x24, :lo12:.LC110
+.L1930:
ldrh w0, [x22,1952]
cmp w0, w21
- bls .L1945
+ bls .L1931
add x0, x22, 1984
mov w1, w23
mov w20, 0
ldrb w0, [x0,w21,sxtw]
bl V2P_block
uxth w25, w0
-.L1937:
+.L1923:
ldrh w0, [x19,956]
cmp w0, w20
- bls .L1946
+ bls .L1932
add x0, x19, 960
ldrh w0, [x0,w20,sxtw 1]
cmp w0, w25
- bne .L1938
+ bne .L1924
mov w1, w25
mov x0, x24
bl printk
bl FtlBbmTblFlush
ldrh w2, [x19,956]
mov w3, w20
-.L1939:
+.L1925:
cmp w3, w2
- bcs .L1947
+ bcs .L1933
add x4, x19, 960
add w0, w3, 1
ldrh w1, [x4,w0,sxtw 1]
strh w1, [x4,w3,sxtw 1]
uxth w3, w0
- b .L1939
-.L1947:
+ b .L1925
+.L1933:
sub w2, w2, #1
strh w2, [x19,956]
-.L1938:
+.L1924:
add w20, w20, 1
uxth w20, w20
- b .L1937
-.L1946:
+ b .L1923
+.L1932:
add w21, w21, 1
uxth w21, w21
- b .L1944
-.L1945:
+ b .L1930
+.L1931:
bl FtlGcReFreshBadBlk
-.L1936:
+.L1922:
mov w0, 0
ldr x25, [sp,64]
ldp x19, x20, [sp,16]
mov x20, x0
ldr x3, [x1,-40]
ldrh w2, [x3,x2]
- cbnz w2, .L1949
+ cbnz w2, .L1935
ldrh w3, [x1,296]
cmp w3, w19
- bne .L1950
+ bne .L1936
mov w0, -1
strh w0, [x1,296]
- b .L1951
-.L1950:
+ b .L1937
+.L1936:
ldrh w3, [x0,#:lo12:.LANCHOR2]
mov w0, w2
cmp w3, w19
- beq .L1952
+ beq .L1938
ldrh w3, [x1,48]
cmp w3, w19
- beq .L1952
+ beq .L1938
ldrh w1, [x1,96]
cmp w1, w19
- beq .L1952
-.L1951:
+ beq .L1938
+.L1937:
add x20, x20, :lo12:.LANCHOR2
mov w1, w19
sub x0, x20, #48
mov w0, w19
bl FtlGcFreeBadSuperBlk
mov w0, 1
- b .L1952
-.L1949:
+ b .L1938
+.L1935:
mov w0, w19
bl List_update_data_list
mov w0, 0
-.L1952:
+.L1938:
ldp x19, x20, [sp,16]
ldp x29, x30, [sp], 32
ret
str x19, [sp,16]
cmp w1, w0
adrp x2, .LANCHOR2
- beq .L1957
+ beq .L1943
add x0, x2, :lo12:.LANCHOR2
ubfiz x3, x1, 1, 16
ldr x0, [x0,-40]
ldrh w19, [x0,x3]
- cbnz w19, .L1958
- adrp x0, .LC112
+ cbnz w19, .L1944
+ adrp x0, .LC111
mov w2, w19
- add x0, x0, :lo12:.LC112
+ add x0, x0, :lo12:.LC111
bl printk
- b .L1962
-.L1958:
+ b .L1948
+.L1944:
sub w19, w19, #1
strh w19, [x0,x3]
-.L1957:
+.L1943:
add x19, x2, :lo12:.LANCHOR2
mov w0, 65535
ldrh w2, [x19,2320]
cmp w2, w0
- bne .L1960
+ bne .L1946
strh w1, [x19,2320]
-.L1962:
+.L1948:
mov w0, 0
- b .L1959
-.L1960:
+ b .L1945
+.L1946:
cmp w2, w1
str x1, [x29,40]
mov w0, 0
- beq .L1959
+ beq .L1945
mov w0, w2
bl update_vpc_list
cmp w0, wzr
ldr x1, [x29,40]
cset w0, ne
strh w1, [x19,2320]
-.L1959:
+.L1945:
ldr x19, [sp,16]
ldp x29, x30, [sp], 48
ret
stp x19, x20, [sp,16]
stp x21, x22, [sp,32]
ldrh w1, [x0,4]
- cbz w1, .L1963
+ cbz w1, .L1949
mov x19, x0
ldrb w0, [x0,6]
adrp x20, .LANCHOR2
adrp x22, .LANCHOR0
add x20, x20, 996
ldrh w0, [x19,x0,lsl 1]
-.L1966:
+.L1952:
cmp w0, w21
- bne .L1974
-.L1968:
+ bne .L1960
+.L1954:
ldrb w0, [x19,6]
add x1, x22, :lo12:.LANCHOR0
add w0, w0, 1
uxtb w0, w0
strb w0, [x19,6]
cmp w1, w0
- bne .L1967
+ bne .L1953
ldrh w0, [x19,2]
strb wzr, [x19,6]
add w0, w0, 1
strh w0, [x19,2]
-.L1967:
+.L1953:
ldrb w0, [x19,6]
add x0, x0, 8
ldrh w0, [x19,x0,lsl 1]
- b .L1966
-.L1974:
+ b .L1952
+.L1960:
ldrb w1, [x19,8]
cmp w1, 1
- bne .L1969
+ bne .L1955
add x0, x22, :lo12:.LANCHOR0
ldrb w0, [x0,120]
- cbnz w0, .L1969
+ cbnz w0, .L1955
ldrh w0, [x19,2]
ldrh w0, [x20,w0,sxtw 1]
cmp w0, w21
- bne .L1969
+ bne .L1955
ldrh w0, [x19,4]
sub w0, w0, #1
strh w0, [x19,4]
ldrh w0, [x19]
bl decrement_vpc_count
ldrh w1, [x19,4]
- cbnz w1, .L1968
+ cbnz w1, .L1954
ldrh w0, [x19,2]
strb w1, [x19,6]
add w0, w0, 1
strh w0, [x19,2]
- b .L1963
-.L1969:
+ b .L1949
+.L1955:
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
ldrb w2, [x0,120]
- cbz w2, .L1963
+ cbz w2, .L1949
cmp w1, 1
- bne .L1963
+ bne .L1949
ldrh w2, [x19,2]
ldrh w1, [x0,2028]
cmp w2, w1
- bcc .L1963
+ bcc .L1949
adrp x2, .LANCHOR2-40
ldrh w1, [x19]
ldrh w4, [x19,4]
ldrh w0, [x0,2026]
strh w0, [x19,2]
strb wzr, [x19,6]
-.L1963:
+.L1949:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x29, x30, [sp], 48
adrp x23, .LANCHOR0
add x21, x21, 996
ldrh w0, [x19,x0,lsl 1]
-.L1976:
+.L1962:
cmp w0, w22
adrp x20, .LANCHOR0
- bne .L1991
-.L1977:
+ bne .L1977
+.L1963:
ldrb w0, [x19,6]
add x1, x23, :lo12:.LANCHOR0
add w0, w0, 1
uxtb w0, w0
strb w0, [x19,6]
cmp w1, w0
- bne .L1978
+ bne .L1964
ldrh w0, [x19,2]
strb wzr, [x19,6]
add w0, w0, 1
strh w0, [x19,2]
-.L1978:
+.L1964:
ldrb w0, [x19,6]
add x0, x0, 8
ldrh w0, [x19,x0,lsl 1]
- b .L1976
-.L1991:
+ b .L1962
+.L1977:
ldrb w1, [x19,8]
cmp w1, 1
- bne .L1979
+ bne .L1965
add x1, x23, :lo12:.LANCHOR0
ldrb w1, [x1,120]
- cbnz w1, .L1979
+ cbnz w1, .L1965
ldrh w1, [x19,2]
ldrh w1, [x21,w1,sxtw 1]
cmp w1, w22
- bne .L1979
+ bne .L1965
ldrh w0, [x19,4]
sub w0, w0, #1
strh w0, [x19,4]
ldrh w0, [x19]
bl decrement_vpc_count
- b .L1977
-.L1979:
+ b .L1963
+.L1965:
ldrh w1, [x19,4]
adrp x21, .LANCHOR2
ldrh w22, [x19,2]
strh w1, [x19,4]
mov w24, w23
add x21, x21, 996
-.L1980:
+.L1966:
add x0, x20, :lo12:.LANCHOR0
ldrb w1, [x19,6]
ldrh w2, [x0,1952]
-.L1982:
+.L1968:
add w1, w1, 1
uxtb w1, w1
cmp w1, w2
- bne .L1981
+ bne .L1967
ldrh w1, [x19,2]
add w1, w1, 1
strh w1, [x19,2]
mov w1, 0
-.L1981:
+.L1967:
add x0, x19, x1, sxtw 1
ldrh w0, [x0,16]
cmp w0, w23
- beq .L1982
+ beq .L1968
ldrb w0, [x19,8]
strb w1, [x19,6]
cmp w0, 1
- bne .L1987
+ bne .L1973
add x0, x20, :lo12:.LANCHOR0
ldrb w0, [x0,120]
- cbnz w0, .L1984
+ cbnz w0, .L1970
ldrh w0, [x19,2]
ldrh w0, [x21,w0,sxtw 1]
cmp w0, w24
- bne .L1984
+ bne .L1970
ldrh w1, [x19,4]
- cbz w1, .L1984
+ cbz w1, .L1970
ldrh w0, [x19]
sub w1, w1, #1
strh w1, [x19,4]
bl decrement_vpc_count
- b .L1980
-.L1984:
+ b .L1966
+.L1970:
add x20, x20, :lo12:.LANCHOR0
ldrb w0, [x20,120]
- cbz w0, .L1987
+ cbz w0, .L1973
ldrh w1, [x19,2]
ldrh w0, [x20,2028]
cmp w1, w0
- bcc .L1987
+ bcc .L1973
adrp x0, .LANCHOR2-40
ldrh w1, [x19]
ldrh w3, [x19,4]
ldrh w0, [x20,2026]
strh w0, [x19,2]
strb wzr, [x19,6]
-.L1987:
+.L1973:
mov w0, w22
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
bl ftl_memcpy
mov w0, 0
bl FtlUpdateVaildLpn
-.L1993:
+.L1979:
ldr x0, [x19,-64]
str x0, [x20,8]
ldrh w1, [x19,280]
ldrh w1, [x1,2028]
sub w1, w1, #1
cmp w0, w1
- blt .L1994
+ blt .L1980
ldrh w0, [x19,280]
ldrh w25, [x19,284]
strh wzr, [x19,282]
mov w3, w1
mov x0, x20
bl FlashProgPages
-.L1994:
+.L1980:
ldrh w1, [x19,282]
ldr w0, [x20]
add w1, w1, 1
cmn w0, #1
uxth w1, w1
strh w1, [x19,282]
- bne .L1995
+ bne .L1981
cmp w1, 1
- bne .L1993
+ bne .L1979
add x0, x21, :lo12:.LANCHOR0
ldrh w1, [x0,2028]
sub w1, w1, #1
strh w1, [x19,282]
- b .L1993
-.L1995:
+ b .L1979
+.L1981:
cmp w1, 1
- beq .L1993
+ beq .L1979
mov w0, 65535
cmp w25, w0
- beq .L1997
+ beq .L1983
mov w0, w25
mov w1, 1
bl FtlFreeSysBlkQueueIn
-.L1997:
+.L1983:
mov w0, 0
ldr x25, [sp,64]
ldp x19, x20, [sp,16]
.type FtlSuperblockPowerLostFix, %function
FtlSuperblockPowerLostFix:
stp x29, x30, [sp, -144]!
- adrp x1, __stack_chk_guard
add x29, sp, 0
stp x19, x20, [sp,16]
- mov x19, x0
adrp x20, .LANCHOR2
- ldr x0, [x1,#:lo12:__stack_chk_guard]
- str x0, [x29,136]
+ mov x19, x0
add x0, x20, :lo12:.LANCHOR2
+ str x25, [sp,64]
stp x21, x22, [sp,32]
stp x23, x24, [sp,48]
- stp x25, x26, [sp,64]
mov w23, 0
- mov x26, x1
- ldr x22, [x0,904]
+ ldr x22, [x0,2112]
adrp x0, .LANCHOR0
- add x2, x0, :lo12:.LANCHOR0
+ add x1, x0, :lo12:.LANCHOR0
mov x21, x0
- ldrb w2, [x2,120]
- cbz w2, .L2002
+ ldrb w1, [x1,120]
+ cbz w1, .L1988
ldrb w0, [x19,8]
cmp w0, 1
cset w23, eq
-.L2002:
+.L1988:
mov w24, 7
mov w25, -1
-.L2003:
+.L1989:
subs w24, w24, #1
- beq .L2004
+ beq .L1990
ldrh w0, [x19,4]
- cbz w0, .L2004
+ cbz w0, .L1990
mov x0, x19
bl get_new_active_ppa
- str w0, [x29,84]
+ str w0, [x29,92]
add x1, x20, :lo12:.LANCHOR2
- str w25, [x29,104]
+ str w25, [x29,112]
mov w2, w23
mov w3, 0
ldr x0, [x1,-64]
- str x0, [x29,88]
- ldr x0, [x1,2112]
str x0, [x29,96]
+ ldr x0, [x1,2112]
+ str x0, [x29,104]
str w25, [x22,8]
str w25, [x22,12]
ldrh w0, [x19]
cmn w0, #1
csel w0, w0, wzr, ne
str w0, [x1,200]
- add x0, x29, 80
+ add x0, x29, 88
mov w1, 1
bl FlashProgPages
ldrh w0, [x19]
bl decrement_vpc_count
- b .L2003
-.L2004:
+ b .L1989
+.L1990:
add x20, x20, :lo12:.LANCHOR2
ldrh w0, [x19]
ldrh w3, [x19,4]
add x0, x21, :lo12:.LANCHOR0
strb wzr, [x19,6]
strh wzr, [x19,4]
- ldr x1, [x29,136]
+ ldp x21, x22, [sp,32]
ldrh w0, [x0,2026]
strh w0, [x19,2]
- ldr x0, [x26,#:lo12:__stack_chk_guard]
- cmp x1, x0
- beq .L2008
- bl __stack_chk_fail
-.L2008:
- ldp x19, x20, [sp,16]
- ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
- ldp x25, x26, [sp,64]
+ ldp x19, x20, [sp,16]
+ ldr x25, [sp,64]
ldp x29, x30, [sp], 144
ret
.size FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
ldrh w2, [x19,8]
sub w1, w1, #1
cmp w2, w1
- blt .L2015
+ blt .L2000
ubfiz x1, x0, 1, 16
ldrh w24, [x20,x1]
- cbz w24, .L2015
+ cbz w24, .L2000
ldr w0, [x19,52]
- cbnz w0, .L2015
+ cbnz w0, .L2000
mov w2, 1
str w2, [x19,52]
strh w0, [x20,x1]
add x0, x22, :lo12:.LANCHOR0
ldrh w0, [x0,2028]
cmp w1, w0
- bcc .L2016
+ bcc .L2001
mov x0, x19
bl ftl_map_blk_alloc_new_blk
-.L2016:
+.L2001:
adrp x20, .LANCHOR4
mov w21, 0
add x20, x20, :lo12:.LANCHOR4
adrp x26, .LANCHOR2
add x20, x20, 136
-.L2017:
+.L2002:
ldrh w0, [x19,6]
cmp w0, w21
- bls .L2025
+ bls .L2010
ubfiz x25, x21, 2, 16
ldr w0, [x23,x25]
cmp w24, w0, lsr 10
- bne .L2018
+ bne .L2003
add x0, x26, :lo12:.LANCHOR2
ldr x1, [x0,2072]
ldr x0, [x0,2112]
bl FlashReadPages
ldr w0, [x20]
cmn w0, #1
- bne .L2019
+ bne .L2004
str wzr, [x23,x25]
- b .L2018
-.L2019:
+ b .L2003
+.L2004:
ldr x2, [x20,8]
mov x0, x19
mov w1, w21
bl FtlMapWritePage
-.L2018:
+.L2003:
add w21, w21, 1
uxth w21, w21
- b .L2017
-.L2025:
+ b .L2002
+.L2010:
mov w0, w24
mov w1, 1
bl FtlFreeSysBlkQueueIn
str wzr, [x19,52]
-.L2015:
+.L2000:
add x22, x22, :lo12:.LANCHOR0
ldrh w1, [x19,2]
ldrh w0, [x22,2028]
cmp w1, w0
- bcc .L2021
+ bcc .L2006
mov x0, x19
bl ftl_map_blk_alloc_new_blk
-.L2021:
+.L2006:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldr x23, [x0,40]
ldrh w0, [x0]
cmp w0, w1
- bne .L2027
+ bne .L2012
ldrh w0, [x19,8]
add w0, w0, 1
strh w0, [x19,8]
strh wzr, [x19]
add w0, w0, 1
str w0, [x19,48]
- b .L2028
-.L2027:
+ b .L2013
+.L2012:
ubfiz x0, x0, 1, 16
adrp x21, .LANCHOR2
add x3, x21, :lo12:.LANCHOR2
bl ftl_memset
mov w0, 0
mov w1, w0
-.L2029:
+.L2014:
ldrh w2, [x19,6]
cmp w2, w1
- bls .L2032
+ bls .L2017
ubfiz x4, x1, 2, 16
ldr w2, [x23,x4]
cmp w22, w2, lsr 10
- bne .L2030
+ bne .L2015
add x3, x21, :lo12:.LANCHOR2
add w0, w0, 1
uxth w0, w0
ldr w4, [x23,x4]
add x2, x3, x2
str w4, [x2,4]
-.L2030:
+.L2015:
add w1, w1, 1
uxth w1, w1
- b .L2029
-.L2032:
+ b .L2014
+.L2017:
mov w1, 1
add x0, x20, :lo12:.LANCHOR4
add x0, x0, 136
strh w0, [x19,2]
mov x0, x19
bl ftl_map_blk_gc
-.L2028:
+.L2013:
mov w0, 0
ldr x23, [sp,48]
ldp x19, x20, [sp,16]
mov x25, x22
mov w26, 65535
add x20, x20, 136
-.L2039:
+.L2024:
add x1, x22, :lo12:.LANCHOR2
ldr w0, [x1,180]
add w0, w0, 1
ldrh w0, [x0,2028]
sub w0, w0, #1
cmp w1, w0
- bge .L2034
+ bge .L2019
ldrh w0, [x19]
cmp w0, w26
- bne .L2035
-.L2034:
+ bne .L2020
+.L2019:
mov x0, x19
bl Ftl_write_map_blk_to_last_page
-.L2035:
+.L2020:
ldrh w1, [x19]
mov w2, 16
ldr x0, [x19,16]
uxth w0, w0
strh w0, [x19,2]
cmp w0, 1
- beq .L2039
+ beq .L2024
ldr w0, [x20]
cmn w0, #1
- beq .L2039
+ beq .L2024
ldr x0, [x19,40]
ldr w1, [x20,4]
str w1, [x0,w21,uxtw 2]
uxth w20, w20
uxth x24, w0
ldrh w0, [x5,2066]
-.L2044:
+.L2029:
uxth x19, w4
cmp w19, w0
- bcs .L2056
+ bcs .L2041
add x4, x4, 1
add x1, x25, x4, lsl 4
ldrh w1, [x1,-16]
cmp w1, w20
- bne .L2044
-.L2045:
- cbnz w22, .L2046
+ bne .L2029
+.L2030:
+ cbnz w22, .L2031
add x0, x23, :lo12:.LANCHOR2
ldr x1, [x0,144]
add x1, x1, x19, lsl 4
ldr x0, [x1,8]
ldr w0, [x0,x24,lsl 2]
str w0, [x21]
- b .L2047
-.L2046:
+ b .L2032
+.L2031:
add x1, x23, :lo12:.LANCHOR2
lsl x0, x19, 4
ldr w3, [x21]
ldr w2, [x0,4]
orr w2, w2, -2147483648
str w2, [x0,4]
-.L2047:
+.L2032:
add x23, x23, :lo12:.LANCHOR2
ldr x0, [x23,144]
add x19, x0, x19, lsl 4
ldr w0, [x19,4]
cmn w0, #1
- beq .L2053
+ beq .L2038
add w0, w0, 1
str w0, [x19,4]
- b .L2053
-.L2056:
+ b .L2038
+.L2041:
bl select_l2p_ram_region
uxth x19, w0
ubfiz x2, x19, 4, 16
ldrh w4, [x25,x2]
mov w2, 65535
cmp w4, w2
- beq .L2050
+ beq .L2035
ldr w2, [x3,4]
- tbz w2, #31, .L2050
+ tbz w2, #31, .L2035
str x1, [x29,88]
bl flush_l2p_region
ldr x1, [x29,88]
-.L2050:
+.L2035:
mov w0, w20
bl load_l2p_region
- b .L2045
-.L2053:
+ b .L2030
+.L2038:
mov w0, 0
ldr x25, [sp,64]
ldp x19, x20, [sp,16]
ubfiz x22, x0, 1, 16
ldr x3, [x2,-40]
ldrh w1, [x3,x22]
- cbnz w1, .L2058
+ cbnz w1, .L2043
ldr x19, [x2,-16]
- cbz x19, .L2059
+ cbz x19, .L2044
ldrh w3, [x2,-8]
mov x4, -6148914691236517206
ldr x2, [x2,-56]
madd x19, x4, x19, x19
mov w4, 6
uxth w19, w19
-.L2060:
+.L2045:
cmp w1, w3
- beq .L2059
+ beq .L2044
cmp w19, w0
- bne .L2061
+ bne .L2046
add x21, x21, :lo12:.LANCHOR2
mov w1, w19
sub x0, x21, #16
ldrh w0, [x1,x22]
add w0, w0, 1
strh w0, [x1,x22]
- b .L2059
-.L2061:
+ b .L2044
+.L2046:
umull x19, w19, w4
ldrh w19, [x2,x19]
cmp w19, w5
- beq .L2059
+ beq .L2044
add w1, w1, 1
uxth w1, w1
- b .L2060
-.L2058:
+ b .L2045
+.L2043:
add w1, w1, 1
strh w1, [x3,x22]
-.L2059:
+.L2044:
add x1, x29, 60
mov w0, w20
mov w2, 1
str wzr, [x27,48]
str w1, [x27,56]
str w0, [x29,116]
-.L2067:
+.L2052:
cmp w25, w23
- bge .L2084
+ bge .L2069
ldr w0, [x29,116]
sxtw x28, w25
cmp w25, w0
- bne .L2068
+ bne .L2053
lsl x0, x28, 1
mov w1, 1
add x23, x21, x0
add x19, x0, :lo12:.LANCHOR4
add x19, x19, 136
str xzr, [x19,8]
-.L2069:
+.L2054:
cmp w21, w24
- bge .L2084
+ bge .L2069
ldrh w0, [x23]
mov w1, 1
mov w2, w1
bl FlashReadPages
ldr w0, [x19]
cmn w0, #1
- beq .L2070
+ beq .L2055
ldrh w0, [x26,8]
cmp w0, w22
- bcs .L2070
+ bcs .L2055
ldrh w2, [x26]
ldrh w1, [x27,4]
cmp w2, w1
- bne .L2070
+ bne .L2055
ubfiz x0, x0, 2, 16
ldr w1, [x19,4]
str w1, [x20,x0]
-.L2070:
+.L2055:
add w21, w21, 1
sxth w21, w21
- b .L2069
-.L2084:
+ b .L2054
+.L2069:
mov x0, x27
bl ftl_free_no_use_map_blk
adrp x0, .LANCHOR0+2028
ldrh w1, [x27,2]
ldrh w0, [x0,#:lo12:.LANCHOR0+2028]
cmp w1, w0
- bne .L2073
+ bne .L2058
mov x0, x27
bl ftl_map_blk_alloc_new_blk
- b .L2073
-.L2068:
+ b .L2058
+.L2053:
ldr x0, [x29,136]
add x0, x0, :lo12:.LANCHOR2
ldr x0, [x0,-64]
bl FlashReadPages
ldr w0, [x19]
cmn w0, #1
- beq .L2074
+ beq .L2059
ldrh w1, [x26]
ldrh w0, [x27,4]
cmp w1, w0
- bne .L2074
+ bne .L2059
ldrh w1, [x26,8]
mov w0, 64245
cmp w1, w0
- bne .L2074
+ bne .L2059
mov w0, 0
-.L2075:
+.L2060:
adrp x1, .LANCHOR0
add x1, x1, :lo12:.LANCHOR0
ldrh w1, [x1,2028]
sub w1, w1, #1
cmp w0, w1
- bge .L2078
+ bge .L2063
ldr x1, [x29,136]
sbfiz x2, x0, 3, 32
add x1, x1, :lo12:.LANCHOR2
ldr x5, [x1,-64]
ldrh w1, [x5,x2]
cmp w1, w22
- bcs .L2076
+ bcs .L2061
add x2, x5, x2
ubfiz x1, x1, 2, 16
ldr w2, [x2,4]
str w2, [x20,x1]
-.L2076:
+.L2061:
add w0, w0, 1
sxth w0, w0
- b .L2075
-.L2074:
+ b .L2060
+.L2059:
str xzr, [x19,8]
mov w5, 0
-.L2079:
+.L2064:
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
ldrh w0, [x0,2028]
cmp w5, w0
- bge .L2078
+ bge .L2063
ldrh w0, [x28]
mov w1, 1
mov w2, w1
ldr w0, [x19]
ldr x5, [x29,104]
cmn w0, #1
- beq .L2080
+ beq .L2065
ldrh w0, [x26,8]
cmp w0, w22
- bcs .L2080
+ bcs .L2065
ldrh w2, [x26]
ldrh w1, [x27,4]
cmp w2, w1
- bne .L2080
+ bne .L2065
ubfiz x0, x0, 2, 16
ldr w1, [x19,4]
str w1, [x20,x0]
-.L2080:
+.L2065:
add w5, w5, 1
sxth w5, w5
- b .L2079
-.L2078:
+ b .L2064
+.L2063:
add w6, w25, 1
sxth w25, w6
- b .L2067
-.L2073:
+ b .L2052
+.L2058:
ldrh w1, [x27,8]
ldrh w0, [x27,10]
cmp w1, w0
- bcc .L2085
+ bcc .L2070
mov x0, x27
bl ftl_map_blk_gc
-.L2085:
+.L2070:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
.global FtlReadRefresh
.type FtlReadRefresh, %function
FtlReadRefresh:
- stp x29, x30, [sp, -144]!
+ stp x29, x30, [sp, -112]!
adrp x1, .LANCHOR2
+ add x0, x1, :lo12:.LANCHOR2
add x29, sp, 0
- stp x21, x22, [sp,32]
- adrp x21, __stack_chk_guard
- str x23, [sp,48]
+ add x2, x0, 352
stp x19, x20, [sp,16]
+ stp x21, x22, [sp,32]
adrp x20, .LANCHOR0
- ldr x0, [x21,#:lo12:__stack_chk_guard]
- str x0, [x29,136]
- add x0, x1, :lo12:.LANCHOR2
- add x2, x0, 352
ldr w3, [x2,80]
- cbz w3, .L2099
+ cbz w3, .L2084
add x1, x20, :lo12:.LANCHOR0
ldr w3, [x2,84]
ldr w1, [x1,2104]
cmp w3, w1
- bcs .L2100
- mov w22, 2048
+ bcs .L2085
+ mov w21, 2048
mov x19, x0
-.L2105:
+.L2090:
add x1, x20, :lo12:.LANCHOR0
ldr w0, [x19,436]
ldr w1, [x1,2104]
cmp w0, w1
- bcs .L2102
- add x1, x29, 76
+ bcs .L2087
+ add x1, x29, 52
mov w2, 0
bl log2phys
ldr w0, [x19,436]
- ldr w1, [x29,76]
+ ldr w1, [x29,52]
add w0, w0, 1
str w0, [x19,436]
cmn w1, #1
- beq .L2103
- str w1, [x29,84]
+ beq .L2088
+ str w1, [x29,60]
mov w2, 0
- str w0, [x29,104]
+ str w0, [x29,80]
mov w1, 1
- add x0, x29, 80
- str xzr, [x29,88]
- str xzr, [x29,96]
- str wzr, [x29,80]
+ add x0, x29, 56
+ str xzr, [x29,64]
+ str xzr, [x29,72]
+ str wzr, [x29,56]
bl FlashReadPages
- ldr w0, [x29,80]
+ ldr w0, [x29,56]
cmp w0, 256
- bne .L2102
- ldr w0, [x29,76]
+ bne .L2087
+ ldr w0, [x29,52]
lsr x0, x0, 10
bl P2V_block_in_plane
bl FtlGcRefreshBlock
- b .L2102
-.L2103:
- subs w22, w22, #1
- bne .L2105
-.L2102:
+ b .L2087
+.L2088:
+ subs w21, w21, #1
+ bne .L2090
+.L2087:
mov w0, -1
- b .L2107
-.L2100:
+ b .L2092
+.L2085:
ldr w0, [x0,164]
str wzr, [x2,80]
str wzr, [x2,84]
str w0, [x2,76]
- b .L2114
-.L2099:
+ b .L2098
+.L2084:
add x20, x20, :lo12:.LANCHOR0
ldr w3, [x0,216]
mov w2, 1048576
ldr w0, [x0,160]
ldrb w4, [x20,120]
- cbnz w4, .L2108
+ cbnz w4, .L2093
add w2, w0, w3, lsr 10
mov w0, 33554432
asr w2, w0, w2
-.L2108:
+.L2093:
add x3, x1, :lo12:.LANCHOR2
ldr w0, [x3,428]
ldr w3, [x3,164]
add w4, w3, 1048576
cmp w0, w4
- bhi .L2109
+ bhi .L2094
add w2, w2, w0
mov w0, 0
cmp w2, w3
- bcs .L2107
-.L2109:
+ bcs .L2092
+.L2094:
add x0, x1, :lo12:.LANCHOR2
mov w1, 1
str wzr, [x0,436]
str w1, [x0,432]
str w3, [x0,428]
-.L2114:
+.L2098:
mov w0, 0
-.L2107:
- ldr x2, [x29,136]
- ldr x1, [x21,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2110
- bl __stack_chk_fail
-.L2110:
+.L2092:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
- ldr x23, [sp,48]
- ldp x29, x30, [sp], 144
+ ldp x29, x30, [sp], 112
ret
.size FtlReadRefresh, .-FtlReadRefresh
.align 2
.global FtlVendorPartWrite
.type FtlVendorPartWrite, %function
FtlVendorPartWrite:
- stp x29, x30, [sp, -192]!
+ stp x29, x30, [sp, -176]!
add x29, sp, 0
- stp x25, x26, [sp,64]
- adrp x25, __stack_chk_guard
- mov x26, x2
- stp x27, x28, [sp,80]
stp x23, x24, [sp,48]
- mov w28, w0
adrp x23, .LANCHOR0
- ldr x0, [x25,#:lo12:__stack_chk_guard]
- mov w27, w1
- str x0, [x29,184]
+ stp x25, x26, [sp,64]
+ mov w26, w0
add x0, x23, :lo12:.LANCHOR0
stp x19, x20, [sp,16]
+ stp x27, x28, [sp,80]
stp x21, x22, [sp,32]
- add w1, w28, w1
- str x25, [x29,120]
+ mov w28, w1
+ add w1, w26, w1
ldrh w21, [x0,2034]
- mov w20, -1
+ mov x25, x2
ldrh w0, [x0,2020]
+ mov w20, -1
cmp w1, w0
- bhi .L2116
+ bhi .L2100
adrp x24, .LANCHOR4
- lsr w21, w28, w21
+ lsr w21, w26, w21
add x24, x24, :lo12:.LANCHOR4
mov w20, 0
- adrp x25, .LANCHOR2
+ adrp x27, .LANCHOR2
add x24, x24, 200
-.L2117:
- cbz w27, .L2116
- add x2, x25, :lo12:.LANCHOR2
+.L2101:
+ cbz w28, .L2100
+ adrp x0, .LANCHOR2
+ add x2, x0, :lo12:.LANCHOR2
ldr x0, [x2,2200]
- ldr w5, [x0,w21,uxtw 2]
+ ldr w4, [x0,w21,uxtw 2]
add x0, x23, :lo12:.LANCHOR0
ldrh w1, [x0,2032]
- uxth w0, w27
- udiv w22, w28, w1
- msub w22, w22, w1, w28
+ uxth w0, w28
+ udiv w22, w26, w1
+ msub w22, w22, w1, w26
sub w19, w1, w22
uxth w19, w19
- cmp w19, w27
+ cmp w19, w28
csel w19, w0, w19, hi
cmp w19, w1
- beq .L2119
- cbz w5, .L2119
+ beq .L2103
+ cbz w4, .L2103
ldr x0, [x2,2080]
mov w1, 1
- str x0, [x29,136]
+ str x0, [x29,128]
mov w2, w1
- add x0, x29, 128
- str w5, [x29,132]
- str xzr, [x29,144]
+ add x0, x29, 120
+ str w4, [x29,124]
+ str xzr, [x29,136]
bl FlashReadPages
- b .L2120
-.L2119:
- adrp x0, .LANCHOR2
+ b .L2104
+.L2103:
+ add x0, x27, :lo12:.LANCHOR2
add x2, x23, :lo12:.LANCHOR0
- add x0, x0, :lo12:.LANCHOR2
mov w1, 0
- ldrh w2, [x2,2036]
ldr x0, [x0,2080]
+ ldrh w2, [x2,2036]
bl ftl_memset
-.L2120:
- adrp x0, .LANCHOR2
- lsl w5, w19, 9
- add x6, x0, :lo12:.LANCHOR2
+.L2104:
+ add x5, x27, :lo12:.LANCHOR2
+ lsl w4, w19, 9
ubfiz x22, x22, 9, 16
- mov w2, w5
- mov x1, x26
- str x5, [x29,112]
- sub w27, w27, w19
- ldr x0, [x6,2080]
- add w28, w28, w19
- str x6, [x29,104]
+ mov w2, w4
+ mov x1, x25
+ str x4, [x29,104]
+ ldr x0, [x5,2080]
+ sub w28, w28, w19
+ str x5, [x29,96]
+ add w26, w26, w19
add x0, x0, x22
bl ftl_memcpy
- ldr x6, [x29,104]
+ ldr x5, [x29,96]
mov w1, w21
mov x0, x24
add w21, w21, 1
- ldr x2, [x6,2080]
+ ldr x2, [x5,2080]
bl FtlMapWritePage
cmn w0, #1
- ldr x5, [x29,112]
+ ldr x4, [x29,104]
csinv w20, w20, wzr, ne
- add x26, x26, x5, sxtw
- b .L2117
-.L2116:
- ldr x1, [x29,120]
+ add x25, x25, x4, sxtw
+ b .L2101
+.L2100:
mov w0, w20
- ldr x2, [x29,184]
- ldr x1, [x1,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2123
- bl __stack_chk_fail
-.L2123:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 192
+ ldp x29, x30, [sp], 176
ret
.size FtlVendorPartWrite, .-FtlVendorPartWrite
.align 2
add x29, sp, 0
ldr w3, [x0,352]
cmp w3, w1
- bne .L2131
+ bne .L2114
mov w1, 54
movk w1, 0x5000, lsl 16
str w1, [x2,4]
str w0, [x2,64]
mov w0, 0
bl FtlVendorPartWrite
-.L2131:
+.L2114:
ldp x29, x30, [sp], 16
ret
.size Ftl_save_ext_data, .-Ftl_save_ext_data
stp x29, x30, [sp, -16]!
add x29, sp, 0
ldr w4, [x3,160]
- cbz w4, .L2134
+ cbz w4, .L2117
ldr w3, [x3,220]
cmp w3, 29
mov w3, 4
csel w1, w1, w3, hi
-.L2134:
+.L2117:
adrp x3, .LANCHOR4
add x3, x3, :lo12:.LANCHOR4
ldrh w4, [x3,264]
cmp w4, 31
- bhi .L2135
+ bhi .L2118
add w4, w4, 1
mov w1, 1
strh w4, [x3,264]
-.L2135:
- cbnz w0, .L2136
+.L2118:
+ cbnz w0, .L2119
add x0, x2, :lo12:.LANCHOR2
ldr x3, [x0,2152]
ldr w0, [x3,20]
add w1, w1, w0
ldr w0, [x3,16]
cmp w0, w1
- bcc .L2137
-.L2136:
+ bcc .L2120
+.L2119:
add x2, x2, :lo12:.LANCHOR2
ldr x0, [x2,2152]
ldr w1, [x0,16]
mov w0, 64
bl FtlVendorPartWrite
bl Ftl_save_ext_data
-.L2137:
+.L2120:
mov w0, 0
ldp x29, x30, [sp], 16
ret
ldr w1, [x0,56]
ldrh w20, [x0,6]
ldr x4, [x0,40]
- cbz w1, .L2142
+ cbz w1, .L2125
adrp x3, .LANCHOR2
adrp x2, .LANCHOR4
add x3, x3, :lo12:.LANCHOR2
str x0, [x1,8]
ldr w3, [x4,x3]
str w3, [x1,4]
- cbz w3, .L2144
+ cbz w3, .L2127
mov x0, x1
mov w1, 1
mov w2, w1
bl FlashReadPages
- b .L2145
-.L2144:
+ b .L2128
+.L2127:
adrp x2, .LANCHOR0+2036
mov w1, 255
ldrh w2, [x2,#:lo12:.LANCHOR0+2036]
bl ftl_memset
-.L2145:
+.L2128:
add x2, x19, :lo12:.LANCHOR4
mov x0, x21
mov w1, w20
ldr x2, [x2,144]
bl FtlMapWritePage
-.L2142:
+.L2125:
ldp x19, x20, [sp,16]
ldr x21, [sp,32]
ldp x29, x30, [sp], 48
.global FtlRecoverySuperblock
.type FtlRecoverySuperblock, %function
FtlRecoverySuperblock:
- stp x29, x30, [sp, -224]!
+ stp x29, x30, [sp, -208]!
add x29, sp, 0
stp x19, x20, [sp,16]
- mov x19, x0
- adrp x0, __stack_chk_guard
stp x23, x24, [sp,48]
- adrp x23, .LANCHOR0
- str x0, [x29,136]
- ldr x1, [x0,#:lo12:__stack_chk_guard]
- str x1, [x29,216]
- ldrh w1, [x19,2]
- str w1, [x29,188]
- add x1, x23, :lo12:.LANCHOR0
stp x27, x28, [sp,80]
stp x21, x22, [sp,32]
stp x25, x26, [sp,64]
- ldr w2, [x29,188]
- ldrh w1, [x1,2026]
+ mov x19, x0
+ adrp x23, .LANCHOR0
+ ldrh w0, [x0,2]
+ str w0, [x29,188]
+ add x0, x23, :lo12:.LANCHOR0
ldrb w27, [x19,6]
- cmp w1, w2
- bne .L2150
+ ldr w1, [x29,188]
+ ldrh w0, [x0,2026]
+ cmp w0, w1
+ bne .L2133
strh wzr, [x19,4]
- b .L2302
-.L2150:
+ b .L2284
+.L2133:
ldrh w0, [x19,16]
mov w1, 0
mov w2, 65535
-.L2152:
+.L2135:
cmp w0, w2
- bne .L2305
+ bne .L2287
add w1, w1, 1
uxth w1, w1
add x0, x19, x1, sxtw 1
ldrh w0, [x0,16]
- b .L2152
-.L2305:
+ b .L2135
+.L2287:
ldrb w1, [x19,8]
cmp w1, 1
- bne .L2154
+ bne .L2137
bl FtlGetLastWrittenPage
cmn w0, #1
mov w21, w0
- beq .L2155
+ beq .L2138
add x0, x23, :lo12:.LANCHOR0
mov w24, w21
ldrb w1, [x0,120]
- cbnz w1, .L2224
+ cbnz w1, .L2207
add x0, x0, 196
ldrh w24, [x0,w21,sxtw 1]
- b .L2224
-.L2154:
+ b .L2207
+.L2137:
mov w1, 0
bl FtlGetLastWrittenPage
cmn w0, #1
mov w21, w0
- beq .L2155
+ beq .L2138
mov w24, w0
-.L2224:
+.L2207:
add x0, x23, :lo12:.LANCHOR0
mov x2, x19
mov w28, 0
mov w10, 4
ldrh w6, [x0,2038]
add x3, x19, x3, lsl 1
- b .L2157
-.L2155:
+ b .L2140
+.L2138:
strh wzr, [x19,2]
-.L2302:
+.L2284:
strb wzr, [x19,6]
- b .L2151
-.L2159:
+ b .L2278
+.L2142:
ldrh w1, [x2,16]
cmp w1, w7
- beq .L2158
+ beq .L2141
add x4, x9, :lo12:.LANCHOR2
orr w1, w24, w1, lsl 10
umull x0, w28, w8
uxth w28, w28
add x1, x4, x1, sxtw 2
str x1, [x0,16]
-.L2158:
+.L2141:
add x2, x2, 2
-.L2157:
+.L2140:
cmp x2, x3
- bne .L2159
+ bne .L2142
ldrb w0, [x19,8]
str wzr, [x29,184]
cmp w0, 1
- bne .L2160
+ bne .L2143
add x0, x23, :lo12:.LANCHOR0
ldrb w0, [x0,120]
cmp w0, wzr
cset w0, ne
str w0, [x29,184]
-.L2160:
+.L2143:
adrp x20, .LANCHOR2
ldr w2, [x29,184]
add x25, x20, :lo12:.LANCHOR2
ldr x3, [x25,2048]
uxth w6, w24
mov w25, 65535
-.L2161:
+.L2144:
cmp w26, w28
- beq .L2306
+ beq .L2288
ldr w0, [x3]
- cbnz w0, .L2162
+ cbnz w0, .L2145
ldr x4, [x3,16]
ldr w2, [x4,4]
cmn w2, #1
- beq .L2163
+ beq .L2146
add x5, x20, :lo12:.LANCHOR2
mov w0, w2
str x6, [x29,144]
ldr x3, [x29,160]
ldr x4, [x29,152]
ldr x6, [x29,144]
- cbz w0, .L2163
+ cbz w0, .L2146
add w2, w2, 1
str w2, [x5,200]
-.L2163:
+.L2146:
ldr w0, [x4]
cmn w0, #1
- bne .L2164
+ bne .L2147
add x0, x20, :lo12:.LANCHOR2
mov w1, 56
uxth w21, w21
ldr x0, [x0,2048]
add x26, x0, x26
ldr w0, [x26,4]
- b .L2298
-.L2162:
+ b .L2280
+.L2145:
mov w25, w6
-.L2164:
+.L2147:
add w26, w26, 1
add x3, x3, 56
uxth w26, w26
- b .L2161
-.L2306:
+ b .L2144
+.L2288:
add x0, x20, :lo12:.LANCHOR2
add w21, w21, 1
uxth w21, w21
ldr x0, [x0,2048]
ldr w0, [x0,4]
-.L2298:
+.L2280:
lsr x0, x0, 10
bl P2V_plane
uxth w26, w0
ldrb w1, [x19,8]
cmp w1, 1
- bne .L2168
+ bne .L2151
add x0, x23, :lo12:.LANCHOR0
ldrb w2, [x0,120]
- cbnz w2, .L2168
+ cbnz w2, .L2151
add x0, x0, 196
ldrh w21, [x0,w21,sxtw 1]
-.L2168:
+.L2151:
add x0, x23, :lo12:.LANCHOR0
ldrh w0, [x0,2026]
cmp w0, w21
- bne .L2169
+ bne .L2152
strh w21, [x19,2]
strb wzr, [x19,6]
strh wzr, [x19,4]
-.L2169:
+.L2152:
uxth w0, w27
str w0, [x29,152]
ldr w0, [x29,188]
cmp w21, w0
- beq .L2307
-.L2170:
+ bne .L2153
+ ldr w0, [x29,152]
+ cmp w26, w0
+ beq .L2285
+.L2153:
mov w0, 65535
sub w22, w22, #1
cmp w25, w0
- bne .L2171
- cbz w1, .L2171
-.L2172:
- adrp x25, .LANCHOR4
- mov w1, 1
- add x0, x25, :lo12:.LANCHOR4
- strh w1, [x0,266]
- add x0, x20, :lo12:.LANCHOR2
- add x0, x0, 2240
- bl FtlMapBlkWriteDumpData
- ldr w24, [x29,188]
- adrp x0, .LC113
- str x25, [x29,128]
- add x0, x0, :lo12:.LC113
- str x0, [x29,120]
-.L2190:
- add x0, x23, :lo12:.LANCHOR0
- mov x1, x19
- str wzr, [x29,176]
- mov w7, 65535
- mov w8, 56
- ldrh w3, [x0,1952]
- ldrb w6, [x0,120]
- add x3, x19, x3, lsl 1
-.L2191:
- cmp x1, x3
- bne .L2194
- add x0, x20, :lo12:.LANCHOR2
- ldr w1, [x29,176]
- ldr w2, [x29,184]
- ldr x0, [x0,2048]
- bl FlashReadPages
- str xzr, [x29,160]
-.L2195:
- ldrh w0, [x29,160]
- ldr w1, [x29,176]
- cmp w1, w0, uxth
- bhi .L2221
- add x0, x23, :lo12:.LANCHOR0
- add w24, w24, 1
- uxth w24, w24
- ldrh w1, [x0,2026]
- cmp w24, w1
- bne .L2190
- ldrh w2, [x0,1952]
- mov w3, 65535
- strh w24, [x19,2]
- mov x0, 0
- strh wzr, [x19,4]
-.L2222:
- uxth w1, w0
- cmp w1, w2
- bcs .L2151
- add x0, x0, 1
- add x4, x19, x0, lsl 1
- ldrh w4, [x4,14]
- cmp w4, w3
- beq .L2222
- strb w1, [x19,6]
-.L2151:
- ldr x1, [x29,136]
- mov w0, 0
- ldr x2, [x29,216]
- ldr x1, [x1,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2225
- bl __stack_chk_fail
-.L2307:
- ldr w0, [x29,152]
- cmp w26, w0
- bne .L2170
- b .L2303
-.L2171:
+ bne .L2154
+ cbnz w1, .L2155
+.L2154:
add x0, x20, :lo12:.LANCHOR2
uxth w5, w24
ldr w1, [x0,2332]
cmn w1, #1
- bne .L2173
+ bne .L2156
str w22, [x0,2332]
-.L2173:
+.L2156:
add x0, x20, :lo12:.LANCHOR2
ldr w25, [x29,188]
ldr w6, [x0,2332]
ldr w0, [x29,188]
add w0, w0, 7
cmp w0, w24, uxth
- bge .L2174
+ bge .L2157
sub w25, w5, #7
uxth w25, w25
-.L2174:
+.L2157:
mov w3, -1
add x28, x20, :lo12:.LANCHOR2
mov w27, w3
mov w4, 65535
mov w7, 56
add x8, x28, 996
-.L2175:
+.L2158:
cmp w25, w5
- bhi .L2188
+ bhi .L2171
add x0, x23, :lo12:.LANCHOR0
mov w24, 0
ldrh w2, [x0,1952]
mov x0, x19
add x2, x19, x2, lsl 1
-.L2189:
+.L2172:
cmp x0, x2
- beq .L2308
+ beq .L2289
ldrh w1, [x0,16]
cmp w1, w4
- beq .L2176
+ beq .L2159
umull x9, w24, w7
ldr x10, [x28,2048]
add w24, w24, 1
add x9, x10, x9
uxth w24, w24
str w1, [x9,4]
-.L2176:
+.L2159:
add x0, x0, 2
- b .L2189
-.L2308:
+ b .L2172
+.L2289:
ldr x0, [x28,2048]
mov w1, w24
ldr w2, [x29,184]
- str x8, [x29,120]
- str x7, [x29,128]
+ str x8, [x29,128]
+ str x7, [x29,136]
str x4, [x29,144]
str x6, [x29,160]
str x5, [x29,168]
ldrb w9, [x0,120]
ldr x0, [x28,2048]
ldr x4, [x29,144]
- ldr x7, [x29,128]
+ ldr x7, [x29,136]
add x0, x0, 16
- ldr x8, [x29,120]
-.L2178:
+ ldr x8, [x29,128]
+.L2161:
cmp w1, w24
- beq .L2309
+ beq .L2290
ldr w2, [x0,-16]
- cbnz w2, .L2179
+ cbnz w2, .L2162
ldr x2, [x0]
ldrh w11, [x2]
cmp w11, w4
- beq .L2180
+ beq .L2163
ldr w2, [x2,4]
cmn w2, #1
- beq .L2180
+ beq .L2163
ldr w27, [x28,2332]
cmn w3, #1
str w2, [x28,2332]
- bne .L2180
+ bne .L2163
ldrh w2, [x8,x10,lsl 1]
cmp w2, w4
- bne .L2181
- cbz w9, .L2180
-.L2181:
+ bne .L2164
+ cbz w9, .L2163
+.L2164:
cmp w27, w22
csinv w3, w27, wzr, ne
- b .L2180
-.L2179:
+ b .L2163
+.L2162:
ldrb w0, [x19,8]
- cbnz w0, .L2172
+ cbnz w0, .L2155
add x0, x20, :lo12:.LANCHOR2
add x1, x0, 996
ldrh w2, [x1,w25,sxtw 1]
mov w1, 65535
cmp w2, w1
- bne .L2183
+ bne .L2166
cmn w3, #1
- beq .L2184
+ beq .L2167
str w3, [x0,2332]
- b .L2172
-.L2184:
+ b .L2155
+.L2167:
cmp w6, w22
- beq .L2185
+ beq .L2168
str w6, [x0,2332]
- b .L2172
-.L2185:
+ b .L2155
+.L2168:
ldr w1, [x0,2332]
- b .L2304
-.L2183:
+ b .L2286
+.L2166:
cmp w27, w22
- beq .L2186
+ beq .L2169
cmn w27, #1
- beq .L2172
+ beq .L2155
str w27, [x0,2332]
- b .L2172
-.L2186:
+ b .L2155
+.L2169:
ldr w1, [x0,2332]
cmp w1, w22
- beq .L2172
-.L2304:
+ beq .L2155
+.L2286:
sub w1, w1, #1
- b .L2299
-.L2180:
+ b .L2281
+.L2163:
add w1, w1, 1
add x0, x0, 56
uxth w1, w1
- b .L2178
-.L2309:
+ b .L2161
+.L2290:
add w25, w25, 1
uxth w25, w25
- b .L2175
-.L2188:
+ b .L2158
+.L2171:
add x0, x20, :lo12:.LANCHOR2
mov w1, -1
-.L2299:
+.L2281:
str w1, [x0,2332]
- b .L2172
-.L2194:
+.L2155:
+ adrp x25, .LANCHOR4
+ mov w1, 1
+ add x0, x25, :lo12:.LANCHOR4
+ strh w1, [x0,266]
+ add x0, x20, :lo12:.LANCHOR2
+ add x0, x0, 2240
+ bl FtlMapBlkWriteDumpData
+ ldr w24, [x29,188]
+ adrp x0, .LC112
+ str x25, [x29,136]
+ add x0, x0, :lo12:.LC112
+ str x0, [x29,128]
+.L2173:
+ add x0, x23, :lo12:.LANCHOR0
+ mov x1, x19
+ str wzr, [x29,176]
+ mov w7, 65535
+ mov w8, 56
+ ldrh w3, [x0,1952]
+ ldrb w6, [x0,120]
+ add x3, x19, x3, lsl 1
+.L2174:
+ cmp x1, x3
+ beq .L2291
ldrh w2, [x1,16]
cmp w2, w7
- beq .L2192
+ beq .L2175
ldr w0, [x29,176]
add x5, x20, :lo12:.LANCHOR2
orr w2, w24, w2, lsl 10
str w2, [x4,4]
ldrb w2, [x19,8]
cmp w2, 1
- bne .L2193
- cbz w6, .L2193
+ bne .L2176
+ cbz w6, .L2176
ldr x2, [x5,2048]
add x0, x2, x0
ldr w2, [x0,4]
orr w2, w2, -2147483648
str w2, [x0,4]
-.L2193:
+.L2176:
ldr w0, [x29,176]
add w0, w0, 1
uxth w0, w0
str w0, [x29,176]
-.L2192:
+.L2175:
add x1, x1, 2
- b .L2191
-.L2221:
+ b .L2174
+.L2291:
+ add x0, x20, :lo12:.LANCHOR2
+ ldr w1, [x29,176]
+ ldr w2, [x29,184]
+ ldr x0, [x0,2048]
+ bl FlashReadPages
+ str xzr, [x29,160]
+.L2178:
+ ldrh w0, [x29,160]
+ ldr w1, [x29,176]
+ cmp w1, w0, uxth
+ bls .L2292
ldr x0, [x29,160]
mov x1, 56
mul x25, x0, x1
str x1, [x29,168]
add x28, x1, x25
ldr w27, [x28,4]
- str w27, [x29,212]
+ str w27, [x29,204]
lsr x0, x27, 10
bl P2V_plane
uxth w0, w0
ldr w1, [x29,188]
cmp w24, w1
ldr x1, [x29,168]
- bcc .L2196
+ bcc .L2179
ldr w2, [x29,152]
cmp w0, w2
- bcs .L2229
+ bcs .L2211
ldr w2, [x29,188]
cmp w24, w2
- beq .L2196
-.L2229:
+ beq .L2179
+.L2211:
cmp w0, w26
- bne .L2230
+ bne .L2212
cmp w24, w21
- beq .L2198
-.L2230:
+ beq .L2181
+.L2212:
ldr w0, [x1,x25]
cmn w0, #1
- beq .L2200
+ beq .L2183
ldr x28, [x28,16]
mov w0, 61589
ldrh w1, [x28]
cmp w1, w0
- bne .L2207
+ bne .L2190
ldr w22, [x28,4]
cmn w22, #1
- beq .L2202
+ beq .L2185
add x27, x20, :lo12:.LANCHOR2
mov w0, w22
ldr w1, [x27,200]
bl ftl_cmp_data_ver
- cbz w0, .L2202
+ cbz w0, .L2185
add w0, w22, 1
str w0, [x27,200]
-.L2202:
+.L2185:
ldr w27, [x28,8]
- add x1, x29, 208
+ add x1, x29, 200
ldr w0, [x28,12]
mov w2, 0
- str w0, [x29,204]
+ str w0, [x29,196]
mov w0, w27
bl log2phys
add x3, x20, :lo12:.LANCHOR2
str x3, [x29,168]
ldr w1, [x3,2332]
cmn w1, #1
- beq .L2203
+ beq .L2186
mov w0, w22
bl ftl_cmp_data_ver
ldr x3, [x29,168]
- cbz w0, .L2203
- ldr w1, [x29,204]
+ cbz w0, .L2186
+ ldr w1, [x29,196]
cmn w1, #1
- beq .L2204
+ beq .L2187
ldr x0, [x3,2048]
- str x3, [x29,112]
+ str x3, [x29,120]
add x0, x0, x25
str w1, [x0,4]
mov w1, 1
mov w2, 0
add x0, x0, x25
bl FlashReadPages
- ldr x3, [x29,112]
+ ldr x3, [x29,120]
ldr x0, [x29,168]
ldr x2, [x3,2048]
ldr w0, [x0,4]
add x4, x2, x25
ldr w0, [x2,x25]
cmn w0, #1
- bne .L2205
- b .L2206
-.L2204:
- ldr w0, [x29,212]
- ldr w1, [x29,208]
+ bne .L2188
+ b .L2189
+.L2187:
+ ldr w0, [x29,204]
+ ldr w1, [x29,200]
cmp w1, w0
- bne .L2207
+ bne .L2190
mov w0, w27
- add x1, x29, 204
+ add x1, x29, 196
mov w2, 1
bl log2phys
-.L2207:
+.L2190:
ldrh w0, [x19]
- b .L2301
-.L2205:
+ b .L2283
+.L2188:
ldr x0, [x29,168]
ldr w28, [x0,8]
cmp w28, w27
- bne .L2206
+ bne .L2189
ldr w0, [x3,2332]
ldr w1, [x29,144]
- str x2, [x29,96]
- str x4, [x29,104]
- str x3, [x29,112]
+ str x2, [x29,104]
+ str x4, [x29,112]
+ str x3, [x29,120]
bl ftl_cmp_data_ver
- ldr x3, [x29,112]
- ldr x4, [x29,104]
- ldr x2, [x29,96]
- cbz w0, .L2206
- ldr w0, [x29,208]
- ldr w1, [x29,212]
- cmp w0, w1
- beq .L2212
+ ldr x3, [x29,120]
+ ldr x4, [x29,112]
+ ldr x2, [x29,104]
+ cbz w0, .L2189
+ ldr w0, [x29,200]
ldr w1, [x29,204]
cmp w0, w1
- beq .L2206
+ beq .L2195
+ ldr w1, [x29,196]
+ cmp w0, w1
+ beq .L2189
cmn w0, #1
- beq .L2210
+ beq .L2193
str w0, [x4,4]
mov w2, 0
ldr x1, [x4,16]
mov w1, 1
add x0, x0, x25
bl FlashReadPages
- b .L2211
-.L2210:
+ b .L2194
+.L2193:
str w0, [x2,x25]
-.L2211:
+.L2194:
add x0, x20, :lo12:.LANCHOR2
ldr x1, [x0,2048]
ldr w1, [x1,x25]
cmn w1, #1
- beq .L2212
+ beq .L2195
ldr x1, [x29,168]
ldr w0, [x0,2332]
ldr w25, [x1,4]
mov w1, w25
bl ftl_cmp_data_ver
- cbz w0, .L2212
+ cbz w0, .L2195
ldr w0, [x29,144]
mov w1, w25
bl ftl_cmp_data_ver
- cbz w0, .L2206
-.L2212:
- ldr w1, [x29,204]
+ cbz w0, .L2189
+.L2195:
+ ldr w1, [x29,196]
mov w0, w28
bl FtlReUsePrevPpa
-.L2206:
+.L2189:
mov w0, -1
- str w0, [x29,204]
+ str w0, [x29,196]
ldrh w0, [x19]
bl decrement_vpc_count
- b .L2214
-.L2203:
- ldr w0, [x29,212]
- ldr w1, [x29,208]
+ b .L2197
+.L2186:
+ ldr w0, [x29,204]
+ ldr w1, [x29,200]
cmp w1, w0
- beq .L2214
+ beq .L2197
mov w0, w27
- add x1, x29, 212
+ add x1, x29, 204
mov w2, 1
bl log2phys
- ldr w25, [x29,208]
+ ldr w25, [x29,200]
cmn w25, #1
- beq .L2214
- ldr w0, [x29,204]
+ beq .L2197
+ ldr w0, [x29,196]
cmp w25, w0
- beq .L2214
+ beq .L2197
lsr x0, x25, 10
bl P2V_block_in_plane
uxth w0, w0
ldrh w2, [x20,#:lo12:.LANCHOR2]
add x1, x20, :lo12:.LANCHOR2
cmp w2, w0
- beq .L2217
+ beq .L2200
ldrh w2, [x1,48]
cmp w2, w0
- beq .L2217
+ beq .L2200
ldrh w1, [x1,96]
cmp w1, w0
- bne .L2214
-.L2217:
+ bne .L2197
+.L2200:
add x28, x20, :lo12:.LANCHOR2
mov w1, 1
mov w2, 0
ldr w0, [x0]
ldr w1, [x3,4]
cmn w0, #1
- beq .L2214
+ beq .L2197
mov w0, w22
bl ftl_cmp_data_ver
- cbnz w0, .L2214
+ cbnz w0, .L2197
mov w0, w27
- add x1, x29, 208
+ add x1, x29, 200
mov w2, 1
bl log2phys
-.L2214:
- ldr w0, [x29,204]
+.L2197:
+ ldr w0, [x29,196]
cmn w0, #1
- beq .L2196
+ beq .L2179
lsr x0, x0, 10
bl P2V_block_in_plane
uxth w1, w0
ubfiz x3, x1, 1, 16
ldr x2, [x2,-40]
ldrh w2, [x2,x3]
- cbz w2, .L2218
-.L2301:
+ cbz w2, .L2201
+.L2283:
bl decrement_vpc_count
- b .L2196
-.L2218:
- ldr x0, [x29,120]
- bl printk
- b .L2196
-.L2200:
+ b .L2179
+.L2201:
ldr x0, [x29,128]
+ bl printk
+ b .L2179
+.L2183:
+ ldr x0, [x29,136]
add x1, x0, :lo12:.LANCHOR4
ldr w0, [x1,268]
cmp w0, 31
- bhi .L2219
+ bhi .L2202
add x2, x1, 272
str w27, [x2,w0,uxtw 2]
add w0, w0, 1
str w0, [x1,268]
-.L2219:
+.L2202:
ldrh w0, [x19]
bl decrement_vpc_count
add x0, x20, :lo12:.LANCHOR2
ldr w1, [x0,2332]
cmn w1, #1
- beq .L2300
+ beq .L2282
cmp w1, w22
- bls .L2196
-.L2300:
+ bls .L2179
+.L2282:
str w22, [x0,2332]
-.L2196:
+.L2179:
ldr x0, [x29,160]
add x0, x0, 1
str x0, [x29,160]
- b .L2195
-.L2198:
+ b .L2178
+.L2292:
+ add x0, x23, :lo12:.LANCHOR0
+ add w24, w24, 1
+ uxth w24, w24
+ ldrh w1, [x0,2026]
+ cmp w24, w1
+ bne .L2173
+ ldrh w2, [x0,1952]
+ mov w3, 65535
+ strh w24, [x19,2]
+ mov x0, 0
+ strh wzr, [x19,4]
+.L2205:
+ uxth w1, w0
+ cmp w1, w2
+ bcs .L2278
+ add x0, x0, 1
+ add x4, x19, x0, lsl 1
+ ldrh w4, [x4,14]
+ cmp w4, w3
+ beq .L2205
+ strb w1, [x19,6]
+ b .L2278
+.L2181:
strb w26, [x19,6]
strh w21, [x19,2]
-.L2303:
+.L2285:
mov x0, x19
mov w1, w21
mov w2, w26
bl ftl_sb_update_avl_pages
- b .L2151
-.L2225:
+.L2278:
+ mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 224
+ ldp x29, x30, [sp], 208
ret
.size FtlRecoverySuperblock, .-FtlRecoverySuperblock
.align 2
.global FtlWriteDumpData
.type FtlWriteDumpData, %function
FtlWriteDumpData:
- stp x29, x30, [sp, -160]!
+ stp x29, x30, [sp, -144]!
add x29, sp, 0
stp x19, x20, [sp,16]
adrp x19, .LANCHOR2
+ str x25, [sp,64]
stp x21, x22, [sp,32]
- stp x23, x24, [sp,48]
add x21, x19, :lo12:.LANCHOR2
- adrp x23, __stack_chk_guard
- stp x25, x26, [sp,64]
- ldr x0, [x23,#:lo12:__stack_chk_guard]
+ stp x23, x24, [sp,48]
ldrh w1, [x21,4]
- str x0, [x29,152]
- cbz w1, .L2311
+ cbz w1, .L2294
ldrb w0, [x21,8]
- cbnz w0, .L2311
+ cbnz w0, .L2294
adrp x22, .LANCHOR0
ldrb w0, [x21,7]
add x22, x22, :lo12:.LANCHOR0
ldrh w2, [x22,2026]
mul w0, w0, w2
cmp w1, w0
- beq .L2311
- ldrb w25, [x21,10]
- ldr w24, [x22,2104]
- ldrh w26, [x22,1952]
- cbnz w25, .L2310
- sub w24, w24, #1
- add x1, x29, 92
- mov w0, w24
- mov w2, w25
+ beq .L2294
+ ldrb w24, [x21,10]
+ ldr w23, [x22,2104]
+ ldrh w25, [x22,1952]
+ cbnz w24, .L2293
+ sub w23, w23, #1
+ add x1, x29, 84
+ mov w0, w23
+ mov w2, w24
bl log2phys
ldr x20, [x21,2112]
- ldr w0, [x29,92]
+ ldr w0, [x29,84]
ldr x1, [x21,-64]
- str w0, [x29,100]
+ str w0, [x29,92]
cmn w0, #1
- str w24, [x29,120]
- str x1, [x29,104]
- str x20, [x29,112]
- str w25, [x20,4]
- beq .L2313
- add x0, x29, 96
+ str w23, [x29,112]
+ str x1, [x29,96]
+ str x20, [x29,104]
+ str w24, [x20,4]
+ beq .L2296
+ add x0, x29, 88
mov w1, 1
- mov w2, w25
+ mov w2, w24
bl FlashReadPages
- b .L2314
-.L2313:
+ b .L2297
+.L2296:
ldr x0, [x21,-64]
mov w1, 255
ldrh w2, [x22,2036]
bl ftl_memset
-.L2314:
+.L2297:
mov w0, -3947
- lsl w26, w26, 2
+ lsl w25, w25, 2
strh w0, [x20]
mov w22, 0
add x21, x19, :lo12:.LANCHOR2
-.L2315:
- cmp w22, w26
- beq .L2316
+.L2298:
+ cmp w22, w25
+ beq .L2299
ldrh w0, [x21,4]
- cbz w0, .L2316
- ldr w0, [x29,100]
+ cbz w0, .L2299
+ ldr w0, [x29,92]
add w22, w22, 1
str w0, [x20,12]
ldrh w0, [x21]
strh w0, [x20,2]
mov x0, x21
- str w24, [x20,8]
+ str w23, [x20,8]
bl get_new_active_ppa
- str w0, [x29,100]
+ str w0, [x29,92]
ldr w1, [x21,200]
mov w2, 0
str w1, [x20,4]
mov w3, w2
add w1, w1, 1
- add x0, x29, 96
+ add x0, x29, 88
cmn w1, #1
csel w1, w1, wzr, ne
str w1, [x21,200]
bl FlashProgPages
ldrh w0, [x21]
bl decrement_vpc_count
- b .L2315
-.L2316:
+ b .L2298
+.L2299:
add x19, x19, :lo12:.LANCHOR2
mov w0, 1
strb w0, [x19,10]
- b .L2310
-.L2311:
+ b .L2293
+.L2294:
add x19, x19, :lo12:.LANCHOR2
strb wzr, [x19,10]
-.L2310:
- ldr x1, [x29,152]
- ldr x0, [x23,#:lo12:__stack_chk_guard]
- cmp x1, x0
- beq .L2321
- bl __stack_chk_fail
-.L2321:
+.L2293:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
- ldp x25, x26, [sp,64]
- ldp x29, x30, [sp], 160
+ ldr x25, [sp,64]
+ ldp x29, x30, [sp], 144
ret
.size FtlWriteDumpData, .-FtlWriteDumpData
.align 2
adrp x20, .LANCHOR0
adrp x21, .LANCHOR2
bl FtlWriteDumpData
-.L2329:
+.L2311:
add x0, x20, :lo12:.LANCHOR0
ldrh w0, [x0,2066]
cmp w0, w19
- bls .L2332
+ bls .L2314
add x1, x21, :lo12:.LANCHOR2
ubfiz x0, x19, 4, 16
ldr x1, [x1,144]
add x0, x1, x0
ldr w0, [x0,4]
- tbz w0, #31, .L2330
+ tbz w0, #31, .L2312
mov w0, w19
bl flush_l2p_region
-.L2330:
+.L2312:
add w19, w19, 1
uxth w19, w19
- b .L2329
-.L2332:
+ b .L2311
+.L2314:
mov w0, 0
ldr x21, [sp,32]
ldp x19, x20, [sp,16]
.global FtlVpcCheckAndModify
.type FtlVpcCheckAndModify, %function
FtlVpcCheckAndModify:
- stp x29, x30, [sp, -96]!
+ stp x29, x30, [sp, -80]!
adrp x1, .LANCHOR3
- add x29, sp, 0
- stp x21, x22, [sp,32]
- adrp x22, __stack_chk_guard
+ adrp x0, .LC113
add x1, x1, :lo12:.LANCHOR3
+ add x29, sp, 0
add x1, x1, 16
- str x25, [sp,64]
+ add x0, x0, :lo12:.LC113
stp x19, x20, [sp,16]
- ldr x0, [x22,#:lo12:__stack_chk_guard]
- adrp x21, .LANCHOR0
- str x0, [x29,88]
- adrp x0, .LC114
- add x0, x0, :lo12:.LC114
- adrp x20, .LANCHOR2
+ stp x21, x22, [sp,32]
stp x23, x24, [sp,48]
+ adrp x21, .LANCHOR0
bl printk
- mov w19, 0
add x1, x21, :lo12:.LANCHOR0
+ adrp x20, .LANCHOR2
add x0, x20, :lo12:.LANCHOR2
+ mov w19, 0
ldrh w2, [x1,1962]
mov w1, 0
ldr x0, [x0,2160]
lsl w2, w2, 1
bl ftl_memset
-.L2334:
+.L2316:
add x0, x21, :lo12:.LANCHOR0
ldr w0, [x0,2104]
cmp w19, w0
- bcs .L2350
+ bcs .L2331
mov w0, w19
- add x1, x29, 84
+ add x1, x29, 76
mov w2, 0
bl log2phys
- ldr w0, [x29,84]
+ ldr w0, [x29,76]
cmn w0, #1
- beq .L2335
+ beq .L2317
lsr x0, x0, 10
bl P2V_block_in_plane
ubfiz x0, x0, 1, 16
ldrh w1, [x2,x0]
add w1, w1, 1
strh w1, [x2,x0]
-.L2335:
+.L2317:
add w19, w19, 1
- b .L2334
-.L2350:
- adrp x24, .LC115
+ b .L2316
+.L2331:
+ adrp x23, .LC114
mov w19, 0
add x20, x20, :lo12:.LANCHOR2
- mov w25, 65535
- add x24, x24, :lo12:.LC115
-.L2337:
+ mov w24, 65535
+ add x23, x23, :lo12:.LC114
+.L2319:
add x0, x21, :lo12:.LANCHOR0
ldrh w0, [x0,1960]
cmp w0, w19
- bls .L2351
- ubfiz x23, x19, 1, 16
+ bls .L2332
+ ubfiz x22, x19, 1, 16
ldr x0, [x20,-40]
- ldrh w2, [x0,x23]
+ ldrh w2, [x0,x22]
ldr x0, [x20,2160]
- ldrh w3, [x0,x23]
+ ldrh w3, [x0,x22]
cmp w2, w3
- beq .L2340
- cmp w2, w25
- beq .L2340
- mov x0, x24
+ beq .L2322
+ cmp w2, w24
+ beq .L2322
+ mov x0, x23
mov w1, w19
bl printk
ldrh w0, [x20]
cmp w0, w19
- beq .L2340
+ beq .L2322
ldrh w0, [x20,96]
cmp w0, w19
- beq .L2340
+ beq .L2322
ldrh w0, [x20,48]
cmp w0, w19
- beq .L2340
+ beq .L2322
ldr x0, [x20,2160]
- ldrh w1, [x0,x23]
+ ldrh w1, [x0,x22]
ldr x0, [x20,-40]
- strh w1, [x0,x23]
+ strh w1, [x0,x22]
mov w0, w19
bl update_vpc_list
bl l2p_flush
bl FtlVpcTblFlush
-.L2340:
+.L2322:
add w19, w19, 1
uxth w19, w19
- b .L2337
-.L2351:
- ldr x1, [x29,88]
- ldr x0, [x22,#:lo12:__stack_chk_guard]
- cmp x1, x0
- beq .L2343
- bl __stack_chk_fail
-.L2343:
+ b .L2319
+.L2332:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
- ldr x25, [sp,64]
- ldp x29, x30, [sp], 96
+ ldp x29, x30, [sp], 80
ret
.size FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
.align 2
ldrh w21, [x0]
mov w0, 65535
cmp w21, w0
- beq .L2353
+ beq .L2334
add x1, x19, :lo12:.LANCHOR2
ubfiz x0, x21, 1, 16
ldr x1, [x1,-40]
ldrh w0, [x1,x0]
- cbz w0, .L2354
+ cbz w0, .L2335
mov w0, w21
bl INSERT_DATA_LIST
- b .L2353
-.L2354:
+ b .L2334
+.L2335:
mov w0, w21
bl INSERT_FREE_LIST
-.L2353:
+.L2334:
add x2, x19, :lo12:.LANCHOR2
strb wzr, [x20,8]
add x0, x2, 48
cmp x20, x0
- beq .L2355
+ beq .L2336
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
ldrh w1, [x0,1972]
cmp w1, 1
- beq .L2355
+ beq .L2336
ldrb w0, [x0,120]
- cbz w0, .L2356
-.L2355:
+ cbz w0, .L2337
+.L2336:
mov w0, 1
strb w0, [x20,8]
- b .L2357
-.L2356:
+ b .L2338
+.L2337:
cmp x20, x2
- bne .L2357
+ bne .L2338
cmp w1, 3
- beq .L2359
+ beq .L2340
ldr w0, [x20,344]
cmp w0, 1
- bne .L2360
-.L2359:
+ bne .L2341
+.L2340:
add x0, x19, :lo12:.LANCHOR2
mov w1, 1
strb w1, [x0,8]
-.L2360:
+.L2341:
add x0, x19, :lo12:.LANCHOR2
ldr w1, [x0,160]
- cbz w1, .L2357
+ cbz w1, .L2338
ldr w1, [x0,220]
cmp w1, 29
- bhi .L2357
+ bhi .L2338
mov w1, 1
strb w1, [x0,8]
-.L2357:
+.L2338:
add x2, x19, :lo12:.LANCHOR2
mov w1, 65535
ldrh w0, [x2,2320]
cmp w0, w1
- beq .L2362
+ beq .L2343
cmp w21, w0
- bne .L2363
+ bne .L2344
ubfiz x1, x0, 1, 16
ldr x2, [x2,-40]
ldrh w1, [x2,x1]
- cbz w1, .L2364
-.L2363:
+ cbz w1, .L2345
+.L2344:
bl update_vpc_list
-.L2364:
+.L2345:
add x19, x19, :lo12:.LANCHOR2
mov w0, -1
strh w0, [x19,2320]
-.L2362:
+.L2343:
mov x0, x20
bl allocate_data_superblock
bl l2p_flush
stp x29, x30, [sp, -144]!
mov w2, 0
add x29, sp, 0
- stp x21, x22, [sp,32]
- mov w22, w1
- adrp x1, __stack_chk_guard
stp x19, x20, [sp,16]
- stp x23, x24, [sp,48]
adrp x19, .LANCHOR2
- mov w24, w0
- ldr x0, [x1,#:lo12:__stack_chk_guard]
- str x0, [x29,136]
- add x0, x19, :lo12:.LANCHOR2
+ add x3, x19, :lo12:.LANCHOR2
+ stp x21, x22, [sp,32]
+ stp x23, x24, [sp,48]
stp x25, x26, [sp,64]
stp x27, x28, [sp,80]
- str x1, [x29,120]
- ldr w3, [x0,2028]
- cbnz w3, .L2378
- ldrh w1, [x0,-24]
- cmp w1, 47
- bls .L2378
- adrp x1, .LANCHOR1+3004
- ldrh w2, [x1,#:lo12:.LANCHOR1+3004]
- mov w1, 65535
- cmp w2, w1
- bne .L2379
-.L2382:
+ ldr w4, [x3,2028]
+ cbnz w4, .L2495
+ ldrh w4, [x3,-24]
+ cmp w4, 47
+ bls .L2495
+ mov w24, w0
+ adrp x0, .LANCHOR1+3004
+ mov w22, w1
+ ldrh w1, [x0,#:lo12:.LANCHOR1+3004]
+ mov w0, 65535
+ cmp w1, w0
+ bne .L2360
+.L2363:
add x0, x19, :lo12:.LANCHOR2
mov w2, 65535
ldrh w1, [x0,954]
cmp w1, w2
- bne .L2380
- b .L2381
-.L2379:
- ldrh w0, [x0,96]
- cmp w0, w1
- beq .L2382
+ bne .L2361
+ b .L2362
+.L2360:
+ ldrh w1, [x3,96]
+ cmp w1, w0
+ beq .L2363
mov w0, 1
bl FtlGcFreeTempBlock
mov w2, 1
- cbz w0, .L2382
- b .L2378
-.L2380:
+ cbz w0, .L2363
+ b .L2495
+.L2361:
ldrh w3, [x0,952]
cmp w3, w2
- bne .L2381
+ bne .L2362
strh w1, [x0,952]
mov w1, -1
strh w1, [x0,954]
-.L2381:
+.L2362:
add x20, x19, :lo12:.LANCHOR2
cmp w24, 1
ldr w0, [x20,868]
add w0, w0, 1
add w0, w0, w24, lsl 7
str w0, [x20,868]
- beq .L2383
-.L2385:
+ beq .L2364
+.L2366:
mov w21, 65535
- b .L2384
-.L2383:
+ b .L2365
+.L2364:
ldr w1, [x20,160]
- cbz w1, .L2385
+ cbz w1, .L2366
ldr w1, [x20,220]
cmp w1, 29
- bhi .L2385
+ bhi .L2366
adrp x23, .LANCHOR4
add x21, x23, :lo12:.LANCHOR4
ldrh w1, [x21,400]
ldrh w0, [x20,296]
mov w1, 65535
cmp w0, w1
- bne .L2385
+ bne .L2366
ldrh w1, [x20,952]
cmp w1, w0
- bne .L2385
+ bne .L2366
ldr w0, [x20,868]
cmp w0, 1024
- bls .L2385
+ bls .L2366
ldr w0, [x20,220]
str wzr, [x20,868]
strh wzr, [x21,400]
- cbnz w0, .L2386
+ cbnz w0, .L2367
mov w0, 6
- b .L2537
-.L2386:
+ b .L2517
+.L2367:
cmp w0, 5
- bhi .L2387
+ bhi .L2368
mov w0, 18
-.L2537:
+.L2517:
strh w0, [x21,400]
-.L2387:
+.L2368:
mov w0, 32
mov w27, 65535
bl List_get_gc_head_node
uxth w25, w0
cmp w25, w27
- beq .L2391
+ beq .L2372
add x20, x19, :lo12:.LANCHOR2
ldrh w0, [x20,872]
- cbz w0, .L2389
+ cbz w0, .L2370
adrp x2, .LANCHOR0
ldr x26, [x20,-40]
add x2, x2, :lo12:.LANCHOR0
mul w1, w1, w2
add w1, w1, 1
cmp w3, w1
- bgt .L2391
+ bgt .L2372
add w1, w0, 1
str wzr, [x20,876]
uxth w1, w1
strh w1, [x20,872]
- str x1, [x29,112]
+ str x1, [x29,120]
bl List_get_gc_head_node
uxth w21, w0
cmp w21, w27
- ldr x1, [x29,112]
- beq .L2391
+ ldr x1, [x29,120]
+ beq .L2372
ubfiz x27, x21, 1, 16
- adrp x0, .LC116
+ adrp x0, .LC115
ldrh w4, [x26,x25]
- add x0, x0, :lo12:.LC116
+ add x0, x0, :lo12:.LC115
mov w2, w21
ldrh w3, [x26,x27]
bl printk
ldrh w0, [x20,872]
cmp w0, 40
- bls .L2390
+ bls .L2371
ldr x0, [x20,-40]
ldrh w0, [x0,x27]
cmp w0, 32
- bls .L2390
+ bls .L2371
strh wzr, [x20,872]
-.L2390:
+.L2371:
add x23, x23, :lo12:.LANCHOR4
mov w0, 6
strh w0, [x23,400]
- b .L2384
-.L2389:
+ b .L2365
+.L2370:
mov w0, 1
strh w0, [x20,872]
-.L2391:
+.L2372:
bl GetSwlReplaceBlock
uxth w21, w0
mov w0, 65535
cmp w21, w0
- bne .L2384
+ bne .L2365
add x23, x23, :lo12:.LANCHOR4
strh wzr, [x23,400]
-.L2384:
+.L2365:
add x20, x19, :lo12:.LANCHOR2
mov w0, 65535
ldrh w1, [x20,296]
cmp w1, w0
- bne .L2392
+ bne .L2373
ldrh w0, [x20,96]
cmp w0, w1
- bne .L2392
+ bne .L2373
ldrh w25, [x20,952]
cmp w25, w0
- bne .L2392
+ bne .L2373
ldrh w0, [x20,-8]
mov w2, 1024
ldr w1, [x20,868]
mov w0, 5120
csel w0, w0, w2, cc
cmp w1, w0
- bls .L2392
+ bls .L2373
adrp x0, .LANCHOR4+400
str wzr, [x20,868]
mov x23, x20
bl GetSwlReplaceBlock
uxth w21, w0
cmp w21, w25
- bne .L2394
+ bne .L2375
ldrh w1, [x20,-8]
ldrh w0, [x20,866]
cmp w1, w0
- bcs .L2395
+ bcs .L2376
mov w0, 64
bl List_get_gc_head_node
uxth w0, w0
cmp w0, w21
- beq .L2404
+ beq .L2385
ldr w2, [x20,2024]
uxtw x1, w0
adrp x20, .LANCHOR0
- cbnz w2, .L2397
+ cbnz w2, .L2378
add x0, x20, :lo12:.LANCHOR0
ldrh w2, [x0,1972]
cmp w2, 3
- beq .L2397
+ beq .L2378
ldr w2, [x23,344]
- cbnz w2, .L2397
+ cbnz w2, .L2378
ldr w2, [x23,160]
- cbnz w2, .L2397
+ cbnz w2, .L2378
ldrb w0, [x0,120]
- cbz w0, .L2398
-.L2397:
+ cbz w0, .L2379
+.L2378:
add x0, x19, :lo12:.LANCHOR2
add x3, x20, :lo12:.LANCHOR0
ldr x0, [x0,-40]
csel w0, w1, w0, eq
add w0, w2, w0
cmp w4, w0
- bgt .L2400
+ bgt .L2381
mov w0, 0
add x20, x20, :lo12:.LANCHOR0
bl List_get_gc_head_node
ldr w2, [x1,156]
add w0, w0, w0, lsl 1
cmp w2, w0, lsr 2
- bls .L2401
+ bls .L2382
mov w0, 128
- b .L2538
-.L2401:
+ b .L2518
+.L2382:
mov w0, 160
-.L2538:
+.L2518:
strh w0, [x1,866]
- b .L2402
-.L2400:
+ b .L2383
+.L2381:
add x0, x19, :lo12:.LANCHOR2
mov w1, 128
- b .L2539
-.L2398:
+ b .L2519
+.L2379:
ldr x2, [x23,-40]
ldrh w1, [x2,x1,lsl 1]
cmp w1, 7
- bhi .L2403
+ bhi .L2384
bl List_get_gc_head_node
uxth w21, w0
add x0, x19, :lo12:.LANCHOR2
mov w1, 128
strh w1, [x0,866]
- b .L2402
-.L2403:
+ b .L2383
+.L2384:
add x0, x19, :lo12:.LANCHOR2
mov w1, 64
-.L2539:
+.L2519:
strh w1, [x0,866]
- b .L2404
-.L2395:
+ b .L2385
+.L2376:
mov w0, 80
strh w0, [x20,866]
- b .L2404
-.L2402:
+ b .L2385
+.L2383:
mov w0, 65535
cmp w21, w0
- beq .L2404
-.L2394:
+ beq .L2385
+.L2375:
add x5, x19, :lo12:.LANCHOR2
ubfiz x4, x21, 1, 16
- adrp x0, .LC117
+ adrp x0, .LC116
mov w1, w21
- add x0, x0, :lo12:.LC117
+ add x0, x0, :lo12:.LC116
ldr x3, [x5,-40]
ldr x6, [x5,-80]
ldrh w2, [x5,-8]
ldrh w5, [x5,864]
ldrh w4, [x6,x4]
bl printk
-.L2404:
+.L2385:
bl FtlGcReFreshBadBlk
-.L2392:
+.L2373:
mov w0, 65535
cmp w21, w0
cset w1, eq
- cbz w1, .L2405
- cbnz w24, .L2405
+ cbz w1, .L2386
+ cbnz w24, .L2386
add x0, x19, :lo12:.LANCHOR2
mov w20, 1
ldrh w1, [x0,-8]
cmp w1, 24
- bhi .L2406
+ bhi .L2387
adrp x0, .LANCHOR0
cmp w1, 16
add x0, x0, :lo12:.LANCHOR0
ldrh w20, [x0,2026]
- bls .L2407
+ bls .L2388
lsr w20, w20, 5
- b .L2406
-.L2407:
+ b .L2387
+.L2388:
cmp w1, 12
- bls .L2408
+ bls .L2389
lsr w20, w20, 4
- b .L2406
-.L2408:
+ b .L2387
+.L2389:
cmp w1, 8
- bls .L2406
+ bls .L2387
lsr w20, w20, 2
-.L2406:
+.L2387:
add x0, x19, :lo12:.LANCHOR2
ldrh w2, [x0,864]
cmp w2, w1
- bcs .L2410
+ bcs .L2391
ldrh w1, [x0,96]
mov w2, 65535
cmp w1, w2
- bne .L2411
+ bne .L2392
ldrh w2, [x0,952]
cmp w2, w1
- bne .L2411
+ bne .L2392
adrp x1, .LANCHOR4+400
ldrh w2, [x1,#:lo12:.LANCHOR4+400]
- cbnz w2, .L2412
+ cbnz w2, .L2393
adrp x1, .LANCHOR0+2104
ldr w3, [x0,156]
ldr w1, [x1,#:lo12:.LANCHOR0+2104]
add w1, w1, w1, lsl 1
cmp w3, w1, lsr 2
- bcs .L2413
-.L2412:
+ bcs .L2394
+.L2393:
add x1, x19, :lo12:.LANCHOR2
ldrh w0, [x1,272]
add w0, w0, w0, lsl 1
asr w0, w0, 2
strh w0, [x1,864]
- b .L2414
-.L2413:
+ b .L2395
+.L2394:
mov w1, 18
strh w1, [x0,864]
-.L2414:
+.L2395:
add x19, x19, :lo12:.LANCHOR2
str wzr, [x19,876]
- b .L2378
-.L2411:
+ b .L2495
+.L2392:
add x1, x19, :lo12:.LANCHOR2
ldrh w0, [x1,272]
add w0, w0, w0, lsl 1
asr w0, w0, 2
strh w0, [x1,864]
-.L2410:
+.L2391:
cmp w22, 2
- bhi .L2470
+ bhi .L2450
add x0, x19, :lo12:.LANCHOR2
ldr w0, [x0,160]
- cbz w0, .L2470
+ cbz w0, .L2450
add w20, w20, 1
uxth w20, w20
- b .L2470
-.L2405:
+ b .L2450
+.L2386:
add x20, x19, :lo12:.LANCHOR2
mov w2, 65535
ldrh w0, [x20,96]
cmp w0, w2
- bne .L2417
- cbz w1, .L2417
+ bne .L2398
+ cbz w1, .L2398
ldrh w1, [x20,952]
cmp w1, w0
- bne .L2417
+ bne .L2398
ldrh w1, [x20,296]
cmp w1, w0
- beq .L2418
-.L2423:
+ beq .L2399
+.L2404:
mov w21, 65535
- b .L2417
-.L2418:
+ b .L2398
+.L2399:
ldrh w23, [x20,-8]
adrp x21, .LANCHOR4
ldrh w0, [x20,864]
str wzr, [x20,876]
cmp w0, w23
- bcs .L2419
+ bcs .L2400
add x0, x21, :lo12:.LANCHOR4
ldrh w0, [x0,400]
- cbnz w0, .L2420
+ cbnz w0, .L2401
adrp x0, .LANCHOR0+2104
ldr w1, [x20,156]
ldr w0, [x0,#:lo12:.LANCHOR0+2104]
add w0, w0, w0, lsl 1
cmp w1, w0, lsr 2
- bcs .L2421
-.L2420:
+ bcs .L2402
+.L2401:
add x19, x19, :lo12:.LANCHOR2
ldrh w0, [x19,272]
add w0, w0, w0, lsl 1
asr w0, w0, 2
strh w0, [x19,864]
- b .L2422
-.L2421:
+ b .L2403
+.L2402:
mov w0, 18
strh w0, [x20,864]
-.L2422:
+.L2403:
add x21, x21, :lo12:.LANCHOR4
bl FtlReadRefresh
ldrh w2, [x21,400]
- b .L2378
-.L2419:
+ b .L2495
+.L2400:
add x22, x21, :lo12:.LANCHOR4
ldrh w0, [x22,400]
- cbnz w0, .L2423
+ cbnz w0, .L2404
ldrh w21, [x20,272]
add w1, w21, w21, lsl 1
asr w1, w1, 2
mov w1, 2
sdiv w0, w0, w1
cmp w2, w0
- ble .L2424
+ ble .L2405
sub w21, w21, #1
cmp w23, w21
- blt .L2424
+ blt .L2405
bl FtlReadRefresh
ldrh w2, [x22,400]
- b .L2378
-.L2424:
- cbnz w2, .L2423
+ b .L2495
+.L2405:
+ cbnz w2, .L2404
mov w0, -1
add x19, x19, :lo12:.LANCHOR2
bl decrement_vpc_count
ldrh w2, [x19,-8]
add w2, w2, 1
- b .L2378
-.L2417:
+ b .L2495
+.L2398:
add x0, x19, :lo12:.LANCHOR2
mov w20, 2
ldr w0, [x0,160]
cmp w0, wzr
csinc w20, w20, wzr, ne
- b .L2416
-.L2470:
+ b .L2397
+.L2450:
mov w21, 65535
-.L2416:
+.L2397:
add x0, x19, :lo12:.LANCHOR2
mov w2, 65535
ldrh w1, [x0,296]
cmp w1, w2
- bne .L2426
+ bne .L2407
cmp w21, w1
- beq .L2427
+ beq .L2408
strh w21, [x0,296]
- b .L2428
-.L2427:
+ b .L2409
+.L2408:
ldrh w1, [x0,952]
cmp w1, w21
- beq .L2428
+ beq .L2409
strh w1, [x0,296]
mov w1, -1
strh w1, [x0,952]
-.L2428:
+.L2409:
adrp x1, .LANCHOR0+120
add x0, x19, :lo12:.LANCHOR2
add x22, x0, 296
ldrb w1, [x1,#:lo12:.LANCHOR0+120]
strb wzr, [x0,304]
- cbz w1, .L2429
+ cbz w1, .L2410
ldrh w0, [x0,296]
bl ftl_get_blk_mode
strb w0, [x22,8]
-.L2429:
+.L2410:
add x22, x19, :lo12:.LANCHOR2
ldrh w0, [x22,296]
bl IsBlkInGcList
- cbz w0, .L2430
+ cbz w0, .L2411
mov w0, -1
strh w0, [x22,296]
-.L2430:
+.L2411:
add x22, x19, :lo12:.LANCHOR2
mov w0, 65535
add x23, x22, 296
ldrh w1, [x22,296]
cmp w1, w0
- beq .L2426
+ beq .L2407
mov x0, x23
bl make_superblock
strh wzr, [x22,298]
strh wzr, [x0,402]
ldrh w1, [x1,x2,lsl 1]
strh w1, [x0,404]
-.L2426:
+.L2407:
add x3, x19, :lo12:.LANCHOR2
ldrh w1, [x19,#:lo12:.LANCHOR2]
ldrh w0, [x3,296]
cmp w1, w0
- beq .L2432
+ beq .L2413
ldrh w1, [x3,48]
cmp w1, w0
- beq .L2432
-.L2433:
+ beq .L2413
+.L2414:
mov x28, x3
mov w24, 65535
- b .L2434
-.L2432:
+ b .L2415
+.L2413:
add x19, x19, :lo12:.LANCHOR2
mov w0, -1
strh w0, [x19,296]
- b .L2540
-.L2454:
+ b .L2520
+.L2435:
ldrh w0, [x28,298]
add w20, w20, w0
uxth w20, w20
strh w20, [x28,298]
cmp w20, w25
adrp x20, .LANCHOR4
- bcs .L2456
+ bcs .L2437
add x0, x20, :lo12:.LANCHOR4
ldrh w1, [x0,402]
ldrh w0, [x0,404]
cmp w1, w0
- beq .L2456
-.L2457:
+ beq .L2437
+.L2438:
ldrh w0, [x28,-8]
cmp w0, 2
- bhi .L2460
+ bhi .L2441
add x23, x23, :lo12:.LANCHOR0
ldrh w20, [x23,2026]
-.L2434:
+.L2415:
ldrh w0, [x28,296]
cmp w0, w24
- bne .L2435
+ bne .L2416
str wzr, [x28,876]
-.L2436:
+.L2417:
ldrh w22, [x28,872]
mov w0, w22
bl List_get_gc_head_node
uxth w23, w0
cmp w23, w24
strh w23, [x28,296]
- bne .L2437
+ bne .L2418
strh wzr, [x28,872]
mov w2, 8
- b .L2378
-.L2437:
+ b .L2495
+.L2418:
mov w0, w23
add w22, w22, 1
bl IsBlkInGcList
- cbz w0, .L2438
+ cbz w0, .L2419
strh w22, [x28,872]
- b .L2436
-.L2438:
+ b .L2417
+.L2419:
adrp x0, .LANCHOR0
ubfiz x1, x23, 1, 16
add x5, x0, :lo12:.LANCHOR0
mul w0, w0, w5
sdiv w5, w0, w3
cmp w4, w5
- bgt .L2440
+ bgt .L2421
cmp w4, 8
- bls .L2441
+ bls .L2422
cmp w22, 48
- bls .L2441
+ bls .L2422
ldrh w4, [x28,924]
cmp w4, 35
- bhi .L2441
-.L2440:
+ bhi .L2422
+.L2421:
strh wzr, [x28,872]
-.L2441:
+.L2422:
ldrh w1, [x2,x1]
cmp w1, w0
- blt .L2442
+ blt .L2423
cmp w21, w24
- bne .L2442
+ bne .L2423
add x19, x19, :lo12:.LANCHOR2
mov w0, -1
strh wzr, [x19,872]
strh w0, [x19,296]
-.L2540:
+.L2520:
adrp x0, .LANCHOR4+400
ldrh w2, [x0,#:lo12:.LANCHOR4+400]
- b .L2378
-.L2442:
- cbnz w1, .L2443
+ b .L2495
+.L2423:
+ cbnz w1, .L2424
mov w0, -1
bl decrement_vpc_count
ldrh w0, [x28,872]
add w0, w0, 1
strh w0, [x28,872]
- b .L2436
-.L2443:
+ b .L2417
+.L2424:
adrp x0, .LANCHOR0
strb wzr, [x28,304]
add x0, x0, :lo12:.LANCHOR0
ldrb w0, [x0,120]
- cbz w0, .L2444
+ cbz w0, .L2425
mov w0, w23
bl ftl_get_blk_mode
strb w0, [x28,304]
-.L2444:
+.L2425:
add x22, x28, 296
mov x0, x22
bl make_superblock
strh w0, [x1,404]
strh wzr, [x28,298]
strb wzr, [x28,302]
-.L2435:
+.L2416:
bl FtlReadRefresh
adrp x23, .LANCHOR0
mov w0, 1
add x0, x0, :lo12:.LANCHOR0
ldrb w1, [x0,120]
ldrh w25, [x0,2026]
- cbz w1, .L2445
+ cbz w1, .L2426
ldrb w1, [x28,304]
cmp w1, 1
- bne .L2445
+ bne .L2426
ldrh w25, [x0,2028]
-.L2445:
+.L2426:
ldrh w0, [x28,298]
add w1, w0, w20
cmp w1, w25
- ble .L2446
+ ble .L2427
sub w20, w25, w0
uxth w20, w20
-.L2446:
+.L2427:
mov w26, 0
-.L2447:
+.L2428:
cmp w20, w26, uxth
- bls .L2454
+ bls .L2435
add x1, x28, 296
add x0, x23, :lo12:.LANCHOR0
ldrh w4, [x1,2]
mov x0, 0
add w4, w4, w26
mov w22, w0
-.L2455:
+.L2436:
cmp w6, w0, uxth
- bls .L2541
+ bls .L2521
add x2, x1, x0, lsl 1
ldrh w2, [x2,16]
cmp w2, w24
- beq .L2448
+ beq .L2429
mov w3, 56
ldr x7, [x28,912]
orr w2, w4, w2, lsl 10
add x5, x7, x5
uxth w22, w22
str w2, [x5,4]
-.L2448:
+.L2429:
add x0, x0, 1
- b .L2455
-.L2541:
+ b .L2436
+.L2521:
ldr x0, [x28,912]
mov w1, w22
ldrb w2, [x28,304]
mov x27, 0
bl FlashReadPages
-.L2450:
+.L2431:
cmp w22, w27, uxth
- bls .L2542
+ bls .L2522
mov x0, 56
- mul x4, x27, x0
+ mul x5, x27, x0
ldr x0, [x28,912]
- add x1, x0, x4
- ldr w0, [x0,x4]
+ add x1, x0, x5
+ ldr w0, [x0,x5]
cmn w0, #1
- ldr x5, [x1,16]
- beq .L2472
- ldrh w0, [x5]
+ ldr x4, [x1,16]
+ beq .L2452
+ ldrh w0, [x4]
mov w1, 61589
cmp w0, w1
- bne .L2472
- ldr w0, [x5,8]
- add x1, x29, 132
+ bne .L2452
+ ldr w0, [x4,8]
+ add x1, x29, 140
mov w2, 0
- str x4, [x29,104]
str x5, [x29,112]
+ str x4, [x29,120]
bl log2phys
ldr x2, [x28,912]
- ldr x4, [x29,104]
- ldr w0, [x29,132]
- add x2, x2, x4
ldr x5, [x29,112]
+ ldr w0, [x29,140]
+ add x2, x2, x5
+ ldr x4, [x29,120]
and w0, w0, 2147483647
ldr w1, [x2,4]
cmp w0, w1
- bne .L2472
+ bne .L2452
adrp x0, .LANCHOR4
mov x3, 56
add x1, x0, :lo12:.LANCHOR4
- str x4, [x29,96]
str x5, [x29,104]
+ str x4, [x29,112]
ldrh w0, [x1,402]
add w0, w0, 1
strh w0, [x1,402]
ldr x1, [x28,2056]
madd x1, x0, x3, x1
ldr w0, [x2,24]
- str x1, [x29,112]
+ str x1, [x29,120]
str w0, [x1,24]
bl Ftl_get_new_temp_ppa
- ldr x1, [x29,112]
+ ldr x1, [x29,120]
mov x2, 56
- ldr x4, [x29,96]
ldr x5, [x29,104]
+ ldr x4, [x29,112]
str w0, [x1,4]
ldr w0, [x28,880]
ldr x1, [x28,2056]
madd x0, x0, x2, x1
ldr x1, [x28,912]
- add x1, x1, x4
+ add x1, x1, x5
ldr x2, [x1,8]
str x2, [x0,8]
add x2, x28, 96
- str x2, [x29,112]
+ str x2, [x29,120]
ldr x1, [x1,16]
str x1, [x0,16]
mov w1, 1
- ldr w0, [x29,132]
- str w0, [x5,12]
+ ldr w0, [x29,140]
+ str w0, [x4,12]
ldrh w0, [x28,96]
- strh w0, [x5,2]
+ strh w0, [x4,2]
ldr w0, [x28,200]
- str w0, [x5,4]
+ str w0, [x4,4]
ldr w0, [x28,880]
add w0, w0, 1
str w0, [x28,880]
ldr x0, [x28,912]
- add x0, x0, x4
+ add x0, x0, x5
bl FtlGcBufAlloc
add x0, x23, :lo12:.LANCHOR0
ldrb w0, [x0,120]
- cbnz w0, .L2452
- ldr x2, [x29,112]
+ cbnz w0, .L2433
+ ldr x2, [x29,120]
ldr w1, [x28,880]
ldrb w0, [x2,7]
cmp w1, w0
- beq .L2452
+ beq .L2433
ldrh w0, [x2,4]
- cbnz w0, .L2472
-.L2452:
+ cbnz w0, .L2452
+.L2433:
bl Ftl_gc_temp_data_write_back
- cbz w0, .L2472
+ cbz w0, .L2452
adrp x0, .LANCHOR4
add x19, x19, :lo12:.LANCHOR2
add x0, x0, :lo12:.LANCHOR4
str wzr, [x19,2028]
ldrh w2, [x0,400]
- b .L2378
-.L2472:
+ b .L2495
+.L2452:
add x27, x27, 1
- b .L2450
-.L2542:
+ b .L2431
+.L2522:
add w26, w26, 1
- b .L2447
-.L2456:
+ b .L2428
+.L2437:
ldr w0, [x28,880]
- cbz w0, .L2458
+ cbz w0, .L2439
bl Ftl_gc_temp_data_write_back
- cbz w0, .L2458
+ cbz w0, .L2439
add x20, x20, :lo12:.LANCHOR4
str wzr, [x28,2028]
ldrh w2, [x20,400]
- b .L2378
-.L2458:
+ b .L2495
+.L2439:
add x0, x20, :lo12:.LANCHOR4
ldrh w2, [x0,402]
- cbnz w2, .L2459
+ cbnz w2, .L2440
ldrh w0, [x28,296]
ldr x1, [x28,-40]
lsl x0, x0, 1
ldrh w4, [x1,x0]
- cbz w4, .L2459
+ cbz w4, .L2440
strh w2, [x1,x0]
ldrh w0, [x28,296]
bl update_vpc_list
bl FtlCacheWriteBack
bl l2p_flush
bl FtlVpcTblFlush
-.L2459:
+.L2440:
mov w0, -1
strh w0, [x28,296]
- b .L2457
-.L2460:
+ b .L2438
+.L2441:
add x20, x20, :lo12:.LANCHOR4
str wzr, [x28,2028]
ldrh w2, [x20,400]
cmp w2, wzr
csinc w2, w2, w0, ne
-.L2378:
- ldr x1, [x29,120]
+.L2495:
mov w0, w2
- ldr x2, [x29,136]
- ldr x1, [x1,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2463
- bl __stack_chk_fail
-.L2463:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
.type FtlCacheWriteBack, %function
FtlCacheWriteBack:
stp x29, x30, [sp, -112]!
+ adrp x0, .LANCHOR4+408
add x29, sp, 0
- stp x23, x24, [sp,48]
- adrp x24, __stack_chk_guard
stp x19, x20, [sp,16]
adrp x19, .LANCHOR0
- ldr x0, [x24,#:lo12:__stack_chk_guard]
- str x0, [x29,104]
- adrp x0, .LANCHOR4+408
- stp x21, x22, [sp,32]
- stp x25, x26, [sp,64]
ldr x20, [x0,#:lo12:.LANCHOR4+408]
add x0, x19, :lo12:.LANCHOR0
- stp x27, x28, [sp,80]
+ str x27, [sp,80]
+ stp x21, x22, [sp,32]
+ stp x23, x24, [sp,48]
+ stp x25, x26, [sp,64]
ldr w1, [x0,2088]
- cbz w1, .L2544
+ cbz w1, .L2524
ldrb w0, [x0,120]
mov w22, 0
- cbz w0, .L2545
+ cbz w0, .L2525
ldrb w0, [x20,8]
cmp w0, 1
cset w22, eq
-.L2545:
+.L2525:
add x0, x19, :lo12:.LANCHOR0
ldrb w3, [x20,9]
- adrp x25, .LC118
+ adrp x24, .LC117
mov w2, w22
mov w23, 0
- mov w26, 56
+ mov w25, 56
ldr x0, [x0,2096]
- adrp x27, .LANCHOR2
- add x25, x25, :lo12:.LC118
+ adrp x26, .LANCHOR2
+ add x24, x24, :lo12:.LC117
bl FlashProgPages
-.L2546:
+.L2526:
add x0, x19, :lo12:.LANCHOR0
ldr w1, [x0,2088]
cmp w23, w1
- bcs .L2563
- umull x21, w23, w26
- ldr x0, [x0,2096]
- add x1, x0, x21
- ldr w0, [x0,x21]
- cmn w0, #1
- beq .L2567
- ldr w0, [x1,4]
- cbz w22, .L2581
- orr w0, w0, -2147483648
-.L2581:
- str w0, [x29,100]
- mov w2, 1
- ldr w0, [x1,24]
- add x1, x29, 100
- bl log2phys
- add x0, x19, :lo12:.LANCHOR0
+ bcs .L2543
+ umull x21, w23, w25
+ ldr x1, [x0,2096]
+ add x0, x1, x21
+ ldr w1, [x1,x21]
+ cmn w1, #1
+ beq .L2546
+ ldr w1, [x0,4]
+ cbz w22, .L2560
+ orr w1, w1, -2147483648
+.L2560:
+ ldr w0, [x0,24]
+ mov w2, 1
+ str w1, [x29,108]
+ add x1, x29, 108
+ bl log2phys
+ add x0, x19, :lo12:.LANCHOR0
ldr x0, [x0,2096]
add x21, x0, x21
ldr x0, [x21,16]
ldr w0, [x0,12]
cmn w0, #1
- beq .L2550
+ beq .L2530
lsr x0, x0, 10
bl P2V_block_in_plane
uxth w1, w0
- add x2, x27, :lo12:.LANCHOR2
+ add x2, x26, :lo12:.LANCHOR2
ubfiz x0, x1, 1, 16
mov w21, w1
ldr x2, [x2,-40]
ldrh w2, [x2,x0]
- cbnz w2, .L2551
- mov x0, x25
+ cbnz w2, .L2531
+ mov x0, x24
bl printk
-.L2551:
+.L2531:
mov w0, w21
bl decrement_vpc_count
-.L2550:
+.L2530:
add w23, w23, 1
- b .L2546
-.L2583:
+ b .L2526
+.L2562:
mov w20, 16386
adrp x21, .LANCHOR2
-.L2562:
+.L2542:
add x0, x21, :lo12:.LANCHOR2
ldrh w0, [x0,956]
- cbz w0, .L2563
+ cbz w0, .L2543
mov w0, 1
mov w1, w0
bl rk_ftl_garbage_collect
subs w20, w20, #1
- bne .L2562
-.L2563:
+ bne .L2542
+.L2543:
add x19, x19, :lo12:.LANCHOR0
str wzr, [x19,2088]
- b .L2544
-.L2567:
+ b .L2524
+.L2546:
adrp x23, .LANCHOR2
- adrp x26, .LC118
- mov w25, 0
- mov w27, 56
+ adrp x25, .LC117
+ mov w24, 0
+ mov w26, 56
add x23, x23, :lo12:.LANCHOR2
- add x26, x26, :lo12:.LC118
-.L2547:
+ add x25, x25, :lo12:.LC117
+.L2527:
add x0, x19, :lo12:.LANCHOR0
ldr w1, [x0,2088]
- cmp w25, w1
- bcs .L2583
- umull x21, w25, w27
+ cmp w24, w1
+ bcs .L2562
+ umull x21, w24, w26
ldr x0, [x0,2096]
mov w1, -1
str w1, [x0,x21]
-.L2553:
- add x28, x19, :lo12:.LANCHOR0
- ldr x0, [x28,2096]
+.L2533:
+ add x27, x19, :lo12:.LANCHOR0
+ ldr x0, [x27,2096]
add x1, x0, x21
ldr w0, [x0,x21]
cmn w0, #1
ldr w0, [x1,4]
- bne .L2584
+ bne .L2563
lsr x0, x0, 10
bl P2V_block_in_plane
ldrh w1, [x20]
cmp w1, w0, uxth
- bne .L2554
+ bne .L2534
ldr x2, [x23,-40]
ubfiz x1, x1, 1, 16
ldrh w3, [x20,4]
sub w0, w0, w3
strh w0, [x2,x1]
strb wzr, [x20,6]
- ldrh w0, [x28,2026]
+ ldrh w0, [x27,2026]
strh w0, [x20,2]
strh wzr, [x20,4]
-.L2554:
+.L2534:
ldrh w0, [x20,4]
- cbnz w0, .L2555
+ cbnz w0, .L2535
mov x0, x20
bl allocate_new_data_superblock
-.L2555:
+.L2535:
ldr w0, [x23,448]
- add x28, x19, :lo12:.LANCHOR0
+ add x27, x19, :lo12:.LANCHOR0
add w0, w0, 1
str w0, [x23,448]
- ldr x0, [x28,2096]
+ ldr x0, [x27,2096]
add x0, x0, x21
ldr w0, [x0,4]
lsr x0, x0, 10
bl FtlGcMarkBadPhyBlk
mov x0, x20
bl get_new_active_ppa
- str w0, [x29,100]
- ldr x1, [x28,2096]
+ str w0, [x29,108]
+ ldr x1, [x27,2096]
mov w2, w22
add x1, x1, x21
str w0, [x1,4]
mov w1, 1
- ldr x0, [x28,2096]
+ ldr x0, [x27,2096]
ldrb w3, [x20,9]
add x0, x0, x21
bl FlashProgPages
- b .L2553
-.L2584:
- cbz w22, .L2582
+ b .L2533
+.L2563:
+ cbz w22, .L2561
orr w0, w0, -2147483648
-.L2582:
- str w0, [x29,100]
+.L2561:
+ str w0, [x29,108]
mov w2, 1
ldr w0, [x1,24]
- add x1, x29, 100
+ add x1, x29, 108
bl log2phys
add x0, x19, :lo12:.LANCHOR0
ldr x0, [x0,2096]
ldr x0, [x21,16]
ldr w0, [x0,12]
cmn w0, #1
- beq .L2559
+ beq .L2539
lsr x0, x0, 10
bl P2V_block_in_plane
uxth w1, w0
ldr x2, [x23,-40]
mov w21, w1
ldrh w2, [x2,x0]
- cbnz w2, .L2560
- mov x0, x26
+ cbnz w2, .L2540
+ mov x0, x25
bl printk
-.L2560:
+.L2540:
mov w0, w21
bl decrement_vpc_count
-.L2559:
- add w25, w25, 1
- b .L2547
-.L2544:
- ldr x2, [x29,104]
+.L2539:
+ add w24, w24, 1
+ b .L2527
+.L2524:
mov w0, 0
- ldr x1, [x24,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2565
- bl __stack_chk_fail
-.L2565:
+ ldr x27, [sp,80]
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
- ldp x27, x28, [sp,80]
ldp x29, x30, [sp], 112
ret
.size FtlCacheWriteBack, .-FtlCacheWriteBack
add x29, sp, 0
ldr w0, [x0,#:lo12:.LANCHOR1+532]
cmp w0, 1
- bne .L2587
+ bne .L2566
bl FtlSysFlush
-.L2587:
+.L2566:
mov w0, 0
ldp x29, x30, [sp], 16
ret
.type FtlDiscard, %function
FtlDiscard:
stp x29, x30, [sp, -80]!
+ add w2, w0, w1
add x29, sp, 0
stp x21, x22, [sp,32]
adrp x22, .LANCHOR0
+ str x23, [sp,48]
add x21, x22, :lo12:.LANCHOR0
stp x19, x20, [sp,16]
- stp x23, x24, [sp,48]
- adrp x23, __stack_chk_guard
- mov w20, w0
- add w2, w20, w1
mov w19, w1
+ mov w20, w0
ldr w1, [x21,2068]
- ldr x0, [x23,#:lo12:__stack_chk_guard]
- str x0, [x29,72]
- cmp w2, w1
mov w0, -1
- bhi .L2590
+ cmp w2, w1
+ bhi .L2569
cmp w19, 31
- bls .L2605
+ bls .L2583
bl FtlCacheWriteBack
ldrh w1, [x21,2032]
udiv w21, w20, w1
msub w20, w1, w21, w20
uxth w20, w20
- cbz w20, .L2592
+ cbz w20, .L2571
sub w1, w1, w20
add w21, w21, 1
cmp w1, w19
csel w1, w1, w19, ls
sub w19, w19, w1, uxth
-.L2592:
+.L2571:
mov w0, -1
adrp x20, .LANCHOR4
- str w0, [x29,68]
- adrp x24, .LANCHOR2
-.L2593:
+ str w0, [x29,76]
+ adrp x23, .LANCHOR2
+.L2572:
add x0, x22, :lo12:.LANCHOR0
ldrh w0, [x0,2032]
cmp w19, w0
- bcc .L2606
+ bcc .L2584
mov w0, w21
- add x1, x29, 64
+ add x1, x29, 72
mov w2, 0
bl log2phys
- ldr w0, [x29,64]
+ ldr w0, [x29,72]
cmn w0, #1
- beq .L2594
+ beq .L2573
add x1, x20, :lo12:.LANCHOR4
mov w2, 1
ldr w0, [x1,416]
add w0, w0, 1
str w0, [x1,416]
- add x1, x24, :lo12:.LANCHOR2
+ add x1, x23, :lo12:.LANCHOR2
ldr w0, [x1,168]
add w0, w0, 1
str w0, [x1,168]
- add x1, x29, 68
+ add x1, x29, 76
mov w0, w21
bl log2phys
- ldr w0, [x29,64]
+ ldr w0, [x29,72]
lsr x0, x0, 10
bl P2V_block_in_plane
bl decrement_vpc_count
-.L2594:
+.L2573:
add x0, x22, :lo12:.LANCHOR0
add w21, w21, 1
ldrh w0, [x0,2032]
sub w19, w19, w0
- b .L2593
-.L2606:
+ b .L2572
+.L2584:
adrp x0, .LANCHOR4
add x0, x0, :lo12:.LANCHOR4
ldr w1, [x0,416]
cmp w1, 32
- bls .L2605
+ bls .L2583
str wzr, [x0,416]
bl l2p_flush
bl FtlVpcTblFlush
-.L2605:
+.L2583:
mov w0, 0
-.L2590:
- ldr x2, [x29,72]
- ldr x1, [x23,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2597
- bl __stack_chk_fail
-.L2597:
+.L2569:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
- ldp x23, x24, [sp,48]
+ ldr x23, [sp,48]
ldp x29, x30, [sp], 80
ret
.size FtlDiscard, .-FtlDiscard
add x29, sp, 0
stp x19, x20, [sp,16]
adrp x19, .LANCHOR2
- stp x21, x22, [sp,32]
+ str x25, [sp,64]
add x2, x19, :lo12:.LANCHOR2
- adrp x22, __stack_chk_guard
+ stp x21, x22, [sp,32]
stp x23, x24, [sp,48]
- stp x25, x26, [sp,64]
- ldr x1, [x22,#:lo12:__stack_chk_guard]
adrp x21, .LANCHOR0
ldrh w20, [x2,96]
- str x1, [x29,88]
add x1, x21, :lo12:.LANCHOR0
cmp w20, w3
ldrh w1, [x1,2026]
- bne .L2608
-.L2618:
+ bne .L2586
+.L2596:
add x20, x19, :lo12:.LANCHOR2
mov w0, 65535
- add x23, x20, 96
+ add x22, x20, 96
ldrh w1, [x20,96]
str wzr, [x20,2328]
cmp w1, w0
- beq .L2637
+ beq .L2614
add x21, x21, :lo12:.LANCHOR0
bl FtlCacheWriteBack
- ldrb w0, [x23,7]
- mov w26, 12
+ ldrb w0, [x22,7]
+ mov w25, 12
ldr x1, [x20,-40]
ldrh w3, [x21,2026]
mov w21, 0
ldrh w1, [x20,936]
add w0, w1, w0
str w0, [x20,184]
- b .L2619
-.L2608:
- cbz w0, .L2611
+ b .L2597
+.L2586:
+ cbz w0, .L2589
adrp x0, .LANCHOR1
add x0, x0, :lo12:.LANCHOR1
ldrh w4, [x0,3004]
cmp w4, w3
- beq .L2612
-.L2613:
+ beq .L2590
+.L2591:
mov w1, 2
- b .L2611
-.L2612:
+ b .L2589
+.L2590:
strh wzr, [x0,3004]
ldrh w0, [x2,-8]
cmp w0, 17
- bhi .L2613
-.L2611:
- add x23, x19, :lo12:.LANCHOR2
- add x0, x23, 96
+ bhi .L2591
+.L2589:
+ add x22, x19, :lo12:.LANCHOR2
+ add x0, x22, 96
bl FtlGcScanTempBlk
- str w0, [x29,84]
+ str w0, [x29,92]
cmn w0, #1
- beq .L2614
+ beq .L2592
ubfiz x20, x20, 1, 16
- ldr x1, [x23,-80]
+ ldr x1, [x22,-80]
ldrh w0, [x1,x20]
cmp w0, 4
- bls .L2615
+ bls .L2593
sub w0, w0, #5
strh w0, [x1,x20]
mov w0, 1
bl FtlEctTblFlush
-.L2615:
+.L2593:
add x0, x19, :lo12:.LANCHOR2
ldr w1, [x0,2328]
- cbnz w1, .L2616
+ cbnz w1, .L2594
ldr w1, [x0,448]
add w1, w1, 1
str w1, [x0,448]
- ldr w0, [x29,84]
+ ldr w0, [x29,92]
lsr w0, w0, 10
bl FtlBbmMapBadBlock
bl FtlBbmTblFlush
-.L2616:
+.L2594:
add x19, x19, :lo12:.LANCHOR2
mov w0, 1
str wzr, [x19,2328]
- b .L2617
-.L2614:
+ b .L2595
+.L2592:
adrp x0, .LANCHOR1+3004
mov w1, 65535
ldrh w2, [x0,#:lo12:.LANCHOR1+3004]
mov w0, 1
cmp w2, w1
- bne .L2617
- b .L2618
-.L2622:
- ldr x25, [x20,944]
- add x1, x29, 84
- umull x24, w21, w26
+ bne .L2595
+ b .L2596
+.L2600:
+ ldr x24, [x20,944]
+ add x1, x29, 92
+ umull x23, w21, w25
mov w2, 0
- add x23, x25, x24
- ldr w0, [x23,8]
+ add x22, x24, x23
+ ldr w0, [x22,8]
bl log2phys
- ldr w0, [x29,84]
- ldr w1, [x25,x24]
+ ldr w0, [x29,92]
+ ldr w1, [x24,x23]
cmp w0, w1
- bne .L2620
+ bne .L2598
lsr x0, x0, 10
bl P2V_block_in_plane
- mov w24, w0
- ldr w0, [x23,8]
- add x1, x23, 4
+ mov w23, w0
+ ldr w0, [x22,8]
+ add x1, x22, 4
mov w2, 1
bl log2phys
- mov w0, w24
-.L2636:
+ mov w0, w23
+.L2613:
bl decrement_vpc_count
-.L2621:
+.L2599:
add w21, w21, 1
uxth w21, w21
-.L2619:
+.L2597:
ldrh w0, [x20,936]
cmp w0, w21
- bhi .L2622
- b .L2638
-.L2620:
- ldr w1, [x23,4]
+ bhi .L2600
+ b .L2615
+.L2598:
+ ldr w1, [x22,4]
cmp w0, w1
- beq .L2621
+ beq .L2599
ldrh w0, [x20,96]
- b .L2636
-.L2638:
+ b .L2613
+.L2615:
mov w0, -1
bl decrement_vpc_count
ldrh w0, [x20,96]
ldr x2, [x20,-40]
ubfiz x1, x0, 1, 16
ldrh w1, [x2,x1]
- cbz w1, .L2623
+ cbz w1, .L2601
bl INSERT_DATA_LIST
- b .L2624
-.L2623:
+ b .L2602
+.L2601:
bl INSERT_FREE_LIST
-.L2624:
+.L2602:
add x20, x19, :lo12:.LANCHOR2
mov w0, -1
strh wzr, [x20,936]
bl l2p_flush
bl FtlVpcTblFlush
ldr w0, [x20,160]
- cbz w0, .L2625
+ cbz w0, .L2603
ldr w0, [x20,220]
cmp w0, 29
- bhi .L2625
+ bhi .L2603
ldrh w0, [x20,272]
ldrh w1, [x20,-8]
cmp w1, w0
- bcs .L2626
+ bcs .L2604
lsl w0, w0, 1
strh w0, [x20,864]
-.L2626:
+.L2604:
add x19, x19, :lo12:.LANCHOR2
mov w0, -1
strh w0, [x19,296]
- b .L2637
-.L2625:
+ b .L2614
+.L2603:
add x19, x19, :lo12:.LANCHOR2
ldrh w0, [x19,272]
ldrh w1, [x19,-8]
add w0, w0, w0, lsl 1
cmp w1, w0, lsr 2
- ble .L2637
+ ble .L2614
mov w0, -1
strh w0, [x19,296]
mov w0, 20
strh w0, [x19,864]
-.L2637:
+.L2614:
mov w0, 0
-.L2617:
- ldr x2, [x29,88]
- ldr x1, [x22,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2627
- bl __stack_chk_fail
-.L2627:
+.L2595:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
- ldp x25, x26, [sp,64]
+ ldr x25, [sp,64]
ldp x29, x30, [sp], 96
ret
.size FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
stp x21, x22, [sp,32]
stp x19, x20, [sp,16]
adrp x21, .LANCHOR2
- cbz w0, .L2640
+ cbz w0, .L2617
add x0, x21, :lo12:.LANCHOR2
ldr w1, [x0,880]
- tbz x1, 0, .L2640
+ tbz x1, 0, .L2617
ldrh w0, [x0,100]
- cbz w0, .L2640
-.L2645:
+ cbz w0, .L2617
+.L2622:
mov w0, 0
- b .L2641
-.L2640:
+ b .L2618
+.L2617:
add x1, x21, :lo12:.LANCHOR2
mov w2, 0
mov w3, w2
ldr x0, [x1,2056]
ldr w1, [x1,880]
bl FlashProgPages
-.L2642:
+.L2619:
add x19, x21, :lo12:.LANCHOR2
ldr w1, [x19,880]
cmp w20, w1
- bcs .L2656
+ bcs .L2633
umull x0, w20, w22
ldr x2, [x19,2056]
add x1, x2, x0
ldr w2, [x2,x0]
cmn w2, #1
- bne .L2643
+ bne .L2620
ldrh w3, [x19,96]
ldr x1, [x19,-40]
strh wzr, [x1,x3,lsl 1]
bl FtlBbmMapBadBlock
bl FtlBbmTblFlush
bl FtlGcPageVarInit
- b .L2655
-.L2643:
+ b .L2632
+.L2620:
ldr x2, [x1,16]
add w20, w20, 1
ldr w1, [x1,4]
ldr w0, [x2,12]
ldr w2, [x2,8]
bl FtlGcUpdatePage
- b .L2642
-.L2656:
+ b .L2619
+.L2633:
ldr x0, [x19,2056]
bl FtlGcBufFree
str wzr, [x19,880]
ldrh w0, [x19,100]
- cbnz w0, .L2645
+ cbnz w0, .L2622
mov w0, 1
bl FtlGcFreeTempBlock
-.L2655:
+.L2632:
mov w0, 1
-.L2641:
+.L2618:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x29, x30, [sp], 48
ldrh w1, [x19,98]
ldrh w0, [x20,2026]
cmp w1, w0
- bcc .L2657
+ bcc .L2634
add x0, x19, 2240
bl FtlMapBlkWriteDumpData
mov w0, 0
bl FtlGcFreeTempBlock
str wzr, [x19,2328]
-.L2657:
+.L2634:
ldp x19, x20, [sp,16]
ldr x21, [sp,32]
ldp x29, x30, [sp], 48
FtlSysBlkInit:
stp x29, x30, [sp, -64]!
add x29, sp, 0
- stp x19, x20, [sp,16]
- adrp x20, .LANCHOR0
- str x23, [sp,48]
- add x20, x20, :lo12:.LANCHOR0
- adrp x19, .LANCHOR2
+ stp x23, x24, [sp,48]
+ adrp x23, .LANCHOR0
stp x21, x22, [sp,32]
- add x21, x19, :lo12:.LANCHOR2
- ldrh w0, [x20,1956]
+ add x21, x23, :lo12:.LANCHOR0
+ stp x19, x20, [sp,16]
+ adrp x20, .LANCHOR2
+ ldrh w0, [x21,1956]
+ add x19, x20, :lo12:.LANCHOR2
bl FtlFreeSysBlkQueueInit
bl FtlScanSysBlk
- ldrh w1, [x21,280]
+ ldrh w1, [x19,280]
mov w0, 65535
cmp w1, w0
- bne .L2661
-.L2663:
+ bne .L2638
+.L2640:
mov w22, -1
- b .L2662
-.L2661:
+ b .L2639
+.L2638:
bl FtlLoadSysInfo
mov w22, w0
- cbnz w0, .L2663
+ cbnz w0, .L2640
bl FtlLoadMapInfo
bl FtlLoadVonderInfo
bl Ftl_load_ext_data
bl FtlFreeSysBLkSort
bl SupperBlkListInit
bl FtlPowerLostRecovery
- ldrh w2, [x20,2066]
+ ldrh w2, [x21,2066]
mov x1, 0
- ldr x0, [x21,144]
-.L2664:
+ ldr x0, [x19,144]
+.L2641:
cmp w1, w2
mov w3, w1
- bge .L2668
+ bge .L2645
add x4, x0, x1, lsl 4
add x1, x1, 1
ldr w4, [x4,4]
- tbz w4, #31, .L2664
-.L2668:
- add x1, x19, :lo12:.LANCHOR2
+ tbz w4, #31, .L2641
+.L2645:
+ add x0, x20, :lo12:.LANCHOR2
cmp w3, w2
- adrp x21, .LANCHOR4
- ldrh w0, [x1,252]
- add w0, w0, 1
- strh w0, [x1,252]
- blt .L2665
- add x0, x21, :lo12:.LANCHOR4
+ adrp x24, .LANCHOR4
+ ldrh w1, [x0,252]
+ add w1, w1, 1
+ strh w1, [x0,252]
+ blt .L2642
+ add x0, x24, :lo12:.LANCHOR4
ldrh w0, [x0,266]
- cbz w0, .L2669
-.L2665:
- add x20, x19, :lo12:.LANCHOR2
- mov x0, x20
+ cbz w0, .L2646
+.L2642:
+ add x19, x20, :lo12:.LANCHOR2
+ mov x0, x19
+ add x21, x19, 48
bl FtlSuperblockPowerLostFix
- add x0, x20, 48
+ mov x0, x21
bl FtlSuperblockPowerLostFix
- add x0, x20, 2240
+ ldrh w0, [x20,#:lo12:.LANCHOR2]
+ ldr x2, [x19,-40]
+ lsl x0, x0, 1
+ ldrh w3, [x19,4]
+ ldrh w1, [x2,x0]
+ sub w1, w1, w3
+ strh w1, [x2,x0]
+ add x2, x23, :lo12:.LANCHOR0
+ strb wzr, [x19,6]
+ ldr x3, [x19,-40]
+ strh wzr, [x19,4]
+ ldrh w0, [x2,2026]
+ strh w0, [x19,2]
+ ldrh w0, [x19,48]
+ ldrh w4, [x19,52]
+ lsl x0, x0, 1
+ ldrh w1, [x3,x0]
+ sub w1, w1, w4
+ strh w1, [x3,x0]
+ strb wzr, [x19,54]
+ ldrh w0, [x2,2026]
+ strh w0, [x19,50]
+ add x0, x19, 2240
+ strh wzr, [x19,52]
bl FtlMapBlkWriteDumpData
- add x0, x21, :lo12:.LANCHOR4
+ add x0, x24, :lo12:.LANCHOR4
add x0, x0, 200
bl FtlMapBlkWriteDumpData
- ldrh w0, [x20,254]
+ ldrh w0, [x19,254]
add w0, w0, 1
- strh w0, [x20,254]
+ strh w0, [x19,254]
bl l2p_flush
bl FtlVpcTblFlush
bl FtlVpcTblFlush
-.L2669:
+.L2646:
mov w0, 1
- add x20, x19, :lo12:.LANCHOR2
+ add x19, x20, :lo12:.LANCHOR2
bl FtlUpdateVaildLpn
- ldrh w0, [x19,#:lo12:.LANCHOR2]
+ ldrh w0, [x20,#:lo12:.LANCHOR2]
mov w1, 65535
cmp w0, w1
- beq .L2670
- ldrh w1, [x20,4]
- cbnz w1, .L2670
- ldrh w1, [x20,52]
- add x23, x20, 48
- cbnz w1, .L2670
+ beq .L2647
+ ldrh w1, [x19,4]
+ cbnz w1, .L2647
+ ldrh w1, [x19,52]
+ add x21, x19, 48
+ cbnz w1, .L2647
bl FtlGcRefreshBlock
- ldrh w0, [x20,48]
+ ldrh w0, [x19,48]
bl FtlGcRefreshBlock
- mov x0, x20
+ mov x0, x19
bl allocate_new_data_superblock
- mov x0, x23
+ mov x0, x21
bl allocate_new_data_superblock
- add x0, x21, :lo12:.LANCHOR4
+ add x0, x24, :lo12:.LANCHOR4
add x0, x0, 200
bl FtlMapBlkWriteDumpData
-.L2670:
- add x19, x19, :lo12:.LANCHOR2
- ldrh w0, [x19,252]
+.L2647:
+ add x20, x20, :lo12:.LANCHOR2
+ ldrh w0, [x20,252]
and w0, w0, 31
- cbnz w0, .L2662
+ cbnz w0, .L2639
bl FtlVpcCheckAndModify
-.L2662:
+.L2639:
mov w0, w22
- ldr x23, [sp,48]
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
+ ldp x23, x24, [sp,48]
ldp x29, x30, [sp], 64
ret
.size FtlSysBlkInit, .-FtlSysBlkInit
.type FtlInit, %function
FtlInit:
stp x29, x30, [sp, -32]!
- adrp x1, .LC74
+ adrp x1, .LC73
add x29, sp, 0
stp x19, x20, [sp,16]
adrp x19, .LANCHOR1
mov x20, x0
add x19, x19, :lo12:.LANCHOR1
mov w0, -1
- add x1, x1, :lo12:.LC74
+ add x1, x1, :lo12:.LC73
str w0, [x19,532]
adrp x0, .LANCHOR4+420
str wzr, [x0,#:lo12:.LANCHOR4+420]
- adrp x0, .LC73
- add x0, x0, :lo12:.LC73
+ adrp x0, .LC72
+ add x0, x0, :lo12:.LC72
bl printk
mov x0, x20
bl FtlConstantsInit
ldrh w0, [x0,#:lo12:.LANCHOR0+1956]
bl FtlFreeSysBlkQueueInit
bl FtlLoadBbt
- cbnz w0, .L2678
+ cbnz w0, .L2655
bl FtlSysBlkInit
- cbnz w0, .L2678
+ cbnz w0, .L2655
mov w0, 1
str w0, [x19,532]
-.L2678:
+.L2655:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x29, x30, [sp], 32
bl rknand_get_reg_addr
ldr x1, [x19,32]
mov w0, -1
- cbz x1, .L2681
+ cbz x1, .L2658
bl rk_nandc_irq_init
mov w1, 0
ldr x0, [x19,424]
ldr x0, [x19,32]
bl FlashInit
mov w19, w0
- cbnz w0, .L2682
+ cbnz w0, .L2659
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
add x0, x0, 168
bl FtlInit
-.L2682:
- adrp x0, .LC119
+.L2659:
+ adrp x0, .LC118
mov w1, w19
- add x0, x0, :lo12:.LC119
+ add x0, x0, :lo12:.LC118
bl printk
mov w0, w19
-.L2681:
+.L2658:
ldr x19, [sp,16]
ldp x29, x30, [sp], 32
ret
ldrh w2, [x0,96]
mov w0, 65535
cmp w2, w0
- beq .L2686
+ beq .L2663
ldrh w0, [x1,4]
- cbnz w0, .L2687
-.L2686:
+ cbnz w0, .L2664
+.L2663:
bl FtlCacheWriteBack
add x20, x19, :lo12:.LANCHOR2
mov w0, 0
bl FtlVpcTblFlush
mov w0, 0
bl FtlEctTblFlush
-.L2687:
+.L2664:
add x0, x19, :lo12:.LANCHOR2
add x0, x0, 96
bl get_new_active_ppa
.global FtlRead
.type FtlRead, %function
FtlRead:
- stp x29, x30, [sp, -192]!
+ stp x29, x30, [sp, -176]!
uxtb w0, w0
add x29, sp, 0
stp x19, x20, [sp,16]
- mov w20, w1
- adrp x1, __stack_chk_guard
- stp x27, x28, [sp,80]
- mov w28, w2
- cmp w0, 16
- ldr x2, [x1,#:lo12:__stack_chk_guard]
stp x25, x26, [sp,64]
+ stp x27, x28, [sp,80]
stp x21, x22, [sp,32]
stp x23, x24, [sp,48]
- str x2, [x29,184]
+ cmp w0, 16
+ mov w20, w1
+ mov w28, w2
mov x26, x3
- str x1, [x29,112]
- bne .L2690
- add w0, w20, 256
- mov w1, w28
+ bne .L2667
+ add w0, w1, 256
+ mov w1, w2
mov x2, x3
bl FtlVendorPartRead
- b .L2691
-.L2690:
+ b .L2668
+.L2667:
adrp x21, .LANCHOR0
- add w0, w20, w28
+ add w0, w1, w2
add x1, x21, :lo12:.LANCHOR0
- str w0, [x29,168]
+ str w0, [x29,152]
mov w0, -1
- ldr w3, [x29,168]
+ ldr w3, [x29,152]
ldr w2, [x1,2068]
cmp w3, w2
- bhi .L2691
+ bhi .L2668
ldrh w0, [x1,2032]
sub w25, w3, #1
adrp x19, .LANCHOR2
udiv w1, w20, w0
- str w1, [x29,172]
+ str w1, [x29,156]
udiv w25, w25, w0
- ldr w0, [x29,172]
+ ldr w0, [x29,156]
sub w24, w25, w0
add x0, x19, :lo12:.LANCHOR2
add w24, w24, 1
ldr w1, [x0,164]
add w1, w24, w1
str w1, [x0,164]
- ldr w0, [x29,172]
+ ldr w0, [x29,156]
mov w1, w25
bl FtlCacheMetchLpa
- cbz w0, .L2692
+ cbz w0, .L2669
bl FtlCacheWriteBack
-.L2692:
+.L2669:
mov w27, 0
- ldr w22, [x29,172]
- str w27, [x29,156]
+ ldr w22, [x29,156]
+ str w27, [x29,140]
mov w23, w27
- str w27, [x29,152]
-.L2693:
- cbz w24, .L2736
+ str w27, [x29,136]
+.L2670:
+ cbz w24, .L2712
mov w0, w22
- add x1, x29, 180
+ add x1, x29, 172
mov w2, 0
bl log2phys
- ldr w3, [x29,180]
+ ldr w3, [x29,172]
cmn w3, #1
- bne .L2733
+ bne .L2709
mov w3, 0
-.L2694:
+.L2671:
add x0, x21, :lo12:.LANCHOR0
ldrh w0, [x0,2032]
cmp w3, w0
- bcs .L2698
+ bcs .L2675
madd w0, w22, w0, w3
cmp w0, w20
- bcc .L2696
- ldr w1, [x29,168]
+ bcc .L2673
+ ldr w1, [x29,152]
cmp w0, w1
- bcs .L2696
+ bcs .L2673
sub w0, w0, w20
mov w1, 0
ubfiz x0, x0, 9, 23
mov w2, 512
add x0, x26, x0
- str x3, [x29,160]
+ str x3, [x29,144]
bl ftl_memset
- ldr x3, [x29,160]
-.L2696:
+ ldr x3, [x29,144]
+.L2673:
add w3, w3, 1
- b .L2694
-.L2733:
+ b .L2671
+.L2709:
mov w0, 56
umull x1, w23, w0
add x0, x19, :lo12:.LANCHOR2
ldr x2, [x0,2048]
add x2, x2, x1
str w3, [x2,4]
- ldr w2, [x29,172]
+ ldr w2, [x29,156]
cmp w22, w2
ldr x2, [x0,2048]
add x2, x2, x1
- bne .L2699
+ bne .L2676
ldr x0, [x0,2096]
str x0, [x2,8]
add x0, x21, :lo12:.LANCHOR0
ldrh w0, [x0,2032]
udiv w3, w20, w0
msub w3, w3, w0, w20
- str w3, [x29,128]
+ str w3, [x29,112]
sub w3, w0, w3
cmp w3, w28
csel w3, w3, w28, ls
- str w3, [x29,156]
+ str w3, [x29,140]
cmp w3, w0
- bne .L2700
+ bne .L2677
str x26, [x2,8]
- b .L2700
-.L2699:
+ b .L2677
+.L2676:
cmp w22, w25
- bne .L2701
+ bne .L2678
ldr x0, [x0,2104]
str x0, [x2,8]
add x0, x21, :lo12:.LANCHOR0
- ldr w4, [x29,168]
+ ldr w4, [x29,152]
ldrh w3, [x0,2032]
mul w0, w22, w3
sub w27, w4, w0
cmp w27, w3
- bne .L2700
- b .L2734
-.L2701:
+ bne .L2677
+ b .L2710
+.L2678:
add x0, x21, :lo12:.LANCHOR0
ldrh w0, [x0,2032]
mul w0, w22, w0
-.L2734:
+.L2710:
sub w0, w0, w20
ubfiz x0, x0, 9, 23
add x0, x26, x0
str x0, [x2,8]
-.L2700:
+.L2677:
add x2, x19, :lo12:.LANCHOR2
ldr x0, [x2,2048]
ldr x2, [x2,2120]
and x0, x0, 4294967292
add x0, x2, x0
str x0, [x1,16]
-.L2698:
+.L2675:
subs w24, w24, #1
add w22, w22, 1
- beq .L2702
+ beq .L2679
add x0, x21, :lo12:.LANCHOR0
ldrh w0, [x0,1952]
cmp w23, w0, lsl 3
- bne .L2693
-.L2702:
- cbz w23, .L2693
+ bne .L2670
+.L2679:
+ cbz w23, .L2670
add x0, x19, :lo12:.LANCHOR2
mov w1, w23
mov w2, 0
ldr x0, [x0,2048]
bl FlashReadPages
- str xzr, [x29,160]
- ldr x0, [x29,128]
+ str xzr, [x29,144]
+ ldr x0, [x29,112]
ubfiz x0, x0, 9, 23
- str x0, [x29,144]
- ldr w0, [x29,156]
+ str x0, [x29,128]
+ ldr w0, [x29,140]
lsl w0, w0, 9
- str w0, [x29,124]
+ str w0, [x29,108]
lsl w0, w27, 9
- str w0, [x29,120]
-.L2704:
- ldr w0, [x29,160]
+ str w0, [x29,104]
+.L2681:
+ ldr w0, [x29,144]
cmp w23, w0
- bls .L2737
- ldr x0, [x29,160]
+ bls .L2713
+ ldr x0, [x29,144]
add x2, x19, :lo12:.LANCHOR2
mov x1, 56
- ldr w4, [x29,172]
+ ldr w4, [x29,156]
mul x3, x0, x1
ldr x0, [x2,2048]
add x0, x0, x3
ldr w1, [x0,24]
cmp w1, w4
- bne .L2705
+ bne .L2682
ldr x1, [x0,8]
ldr x0, [x2,2096]
cmp x1, x0
- bne .L2706
- ldr x2, [x29,144]
+ bne .L2683
+ ldr x2, [x29,128]
mov x0, x26
- str x3, [x29,104]
+ str x3, [x29,96]
add x1, x1, x2
- ldr w2, [x29,124]
- b .L2735
-.L2705:
+ ldr w2, [x29,108]
+ b .L2711
+.L2682:
cmp w1, w25
- bne .L2706
+ bne .L2683
ldr x1, [x0,8]
ldr x0, [x2,2104]
cmp x1, x0
- bne .L2706
+ bne .L2683
add x0, x21, :lo12:.LANCHOR0
- ldr w2, [x29,120]
- str x3, [x29,104]
+ ldr w2, [x29,104]
+ str x3, [x29,96]
ldrh w0, [x0,2032]
mul w0, w25, w0
sub w0, w0, w20
ubfiz x0, x0, 9, 23
add x0, x26, x0
-.L2735:
+.L2711:
bl ftl_memcpy
- ldr x3, [x29,104]
-.L2706:
+ ldr x3, [x29,96]
+.L2683:
add x0, x19, :lo12:.LANCHOR2
ldr x1, [x0,2048]
add x5, x1, x3
ldr w4, [x1,x3]
cmn w4, #1
- bne .L2707
+ bne .L2684
ldr w2, [x0,424]
- str w4, [x29,152]
+ str w4, [x29,136]
add w2, w2, 1
str w2, [x0,424]
-.L2707:
+.L2684:
ldr w0, [x1,x3]
cmp w0, 256
- bne .L2708
+ bne .L2685
ldr w0, [x5,4]
lsr x0, x0, 10
bl P2V_block_in_plane
bl FtlGcRefreshBlock
-.L2708:
- ldr x0, [x29,160]
+.L2685:
+ ldr x0, [x29,144]
add x0, x0, 1
- str x0, [x29,160]
- b .L2704
-.L2737:
+ str x0, [x29,144]
+ b .L2681
+.L2713:
mov w23, 0
- b .L2693
-.L2736:
+ b .L2670
+.L2712:
add x19, x19, :lo12:.LANCHOR2
ldrh w0, [x19,956]
- cbz w0, .L2711
+ cbz w0, .L2688
mov w0, w24
mov w1, 1
bl rk_ftl_garbage_collect
-.L2711:
- ldr w0, [x29,152]
-.L2691:
- ldr x1, [x29,112]
- ldr x2, [x29,184]
- ldr x1, [x1,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2712
- bl __stack_chk_fail
-.L2712:
+.L2688:
+ ldr w0, [x29,136]
+.L2668:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 192
+ ldp x29, x30, [sp], 176
ret
.size FtlRead, .-FtlRead
.align 2
.global FtlWrite
.type FtlWrite, %function
FtlWrite:
- stp x29, x30, [sp, -288]!
+ stp x29, x30, [sp, -272]!
uxtb w0, w0
add x29, sp, 0
stp x23, x24, [sp,48]
- mov w23, w1
- adrp x1, __stack_chk_guard
- mov w24, w2
- cmp w0, 16
stp x25, x26, [sp,64]
- ldr x2, [x1,#:lo12:__stack_chk_guard]
- mov x25, x3
stp x19, x20, [sp,16]
stp x21, x22, [sp,32]
stp x27, x28, [sp,80]
- str x2, [x29,280]
- str x1, [x29,120]
- bne .L2739
- add w0, w23, 256
- mov w1, w24
+ cmp w0, 16
+ mov w23, w1
+ mov w24, w2
+ mov x25, x3
+ bne .L2715
+ add w0, w1, 256
+ mov w1, w2
mov x2, x3
bl FtlVendorPartWrite
- b .L2740
-.L2739:
+ b .L2716
+.L2715:
adrp x22, .LANCHOR0
- add w27, w23, w24
+ add w27, w1, w2
add x2, x22, :lo12:.LANCHOR0
mov w0, -1
ldr w1, [x2,2068]
cmp w27, w1
- bhi .L2740
+ bhi .L2716
adrp x5, .LANCHOR4
ldrh w1, [x2,2032]
add x4, x5, :lo12:.LANCHOR4
ldr w3, [x2,2088]
cmp w24, 8
csel x19, x0, x19, hi
- cbz w3, .L2742
+ cbz w3, .L2718
sub w3, w3, #1
mov w5, 56
ldr x2, [x2,2096]
add x3, x2, x3
ldr w2, [x3,24]
cmp w26, w2
- bne .L2743
+ bne .L2719
ldr w2, [x0,176]
str x4, [x29,192]
add w2, w2, 1
mov x1, x25
bl ftl_memcpy
ldr x4, [x29,192]
- cbnz w28, .L2744
+ cbnz w28, .L2720
ldr w1, [x4,444]
mov w0, w28
cmp w1, 2
- ble .L2740
-.L2744:
+ ble .L2716
+.L2720:
add x25, x25, x21
sub w24, w24, w19
add w23, w23, w19
add w26, w26, 1
mov w21, w28
-.L2743:
+.L2719:
ldr x0, [x29,152]
add x0, x0, :lo12:.LANCHOR4
ldr x19, [x0,408]
str wzr, [x0,444]
-.L2742:
+.L2718:
ldr w1, [x29,180]
mov w0, w26
bl FtlCacheMetchLpa
- cbz w0, .L2745
+ cbz w0, .L2721
bl FtlCacheWriteBack
-.L2745:
+.L2721:
ldr x0, [x29,152]
add x20, x20, :lo12:.LANCHOR2
str w26, [x29,200]
add x0, x0, :lo12:.LANCHOR4
str x19, [x0,408]
- adrp x0, .LC120
- add x0, x0, :lo12:.LC120
- str x0, [x29,104]
-.L2746:
- cbz w21, .L2805
+ adrp x0, .LC119
+ add x0, x0, :lo12:.LC119
+ str x0, [x29,112]
+.L2722:
+ cbz w21, .L2780
ldrh w0, [x19,4]
- cbnz w0, .L2747
+ cbnz w0, .L2723
cmp x19, x20
- bne .L2748
+ bne .L2724
add x0, x20, 48
ldrh w19, [x0,4]
- cbnz w19, .L2749
+ cbnz w19, .L2725
bl allocate_new_data_superblock
adrp x0, .LANCHOR1
add x0, x0, :lo12:.LANCHOR1
str w19, [x0,3008]
-.L2749:
+.L2725:
mov x0, x20
add x19, x20, 48
bl allocate_new_data_superblock
adrp x0, .LANCHOR1
add x0, x0, :lo12:.LANCHOR1
ldr w0, [x0,3008]
- cbnz w0, .L2750
-.L2751:
+ cbnz w0, .L2726
+.L2727:
mov x19, x20
- b .L2750
-.L2748:
+ b .L2726
+.L2724:
adrp x1, .LANCHOR1
add x1, x1, :lo12:.LANCHOR1
str w0, [x1,3008]
ldrh w0, [x20,4]
- cbnz w0, .L2751
+ cbnz w0, .L2727
mov x0, x19
bl allocate_new_data_superblock
-.L2750:
+.L2726:
ldrh w0, [x19,4]
- cbnz w0, .L2752
+ cbnz w0, .L2728
mov x0, x19
bl allocate_new_data_superblock
-.L2752:
+.L2728:
ldr x0, [x29,152]
add x0, x0, :lo12:.LANCHOR4
str x19, [x0,408]
-.L2747:
+.L2723:
add x2, x22, :lo12:.LANCHOR0
ldr w0, [x20,2040]
ldrh w1, [x19,4]
str w0, [x29,148]
ldr w0, [x29,204]
and w0, w0, 1
- str w0, [x29,116]
+ str w0, [x29,124]
add w0, w24, w23
str w0, [x29,144]
-.L2753:
+.L2729:
ldr w0, [x29,192]
ldr w2, [x29,148]
ldr w1, [x29,200]
cmp w0, w2
add w27, w1, w0
- bcs .L2806
+ bcs .L2781
ldrh w1, [x19,4]
- cbz w1, .L2783
+ cbz w1, .L2758
ldr w1, [x29,180]
cmp w27, w1
cset w7, eq
- cbz w0, .L2755
- ldr w1, [x29,116]
+ cbz w0, .L2731
+ ldr w1, [x29,124]
tst w7, w1
- beq .L2755
+ beq .L2731
add x1, x22, :lo12:.LANCHOR0
ldr w2, [x29,144]
ldrh w1, [x1,2032]
msub w2, w27, w1, w2
cmp w2, w1
- bne .L2783
-.L2755:
- add x1, x29, 220
+ bne .L2758
+.L2731:
+ add x1, x29, 212
mov w2, 0
mov w0, w27
- str x7, [x29,96]
+ str x7, [x29,104]
bl log2phys
mov x0, x19
bl get_new_active_ppa
ldr x4, [x29,184]
cset w0, eq
str w0, [x29,176]
- cbnz w0, .L2786
- ldr x7, [x29,96]
+ cbnz w0, .L2761
+ ldr x7, [x29,104]
ldr x5, [x29,160]
- cbz w7, .L2756
+ cbz w7, .L2732
ldr w0, [x29,144]
ldrh w2, [x4,2032]
msub w2, w27, w2, w0
str w0, [x29,184]
ldr w0, [x29,176]
str w0, [x29,160]
- b .L2759
-.L2786:
+ b .L2735
+.L2761:
ldrh w2, [x4,2032]
udiv w0, w23, w2
msub w0, w0, w2, w23
cmp w2, w24
csel w0, w2, w24, ls
str w0, [x29,184]
-.L2759:
+.L2735:
add x2, x22, :lo12:.LANCHOR0
ldr w1, [x29,184]
ldrh w0, [x2,2032]
cmp w1, w0
- bne .L2760
+ bne .L2736
ldr w0, [x29,176]
mov x1, x25
- cbnz w0, .L2761
+ cbnz w0, .L2737
ldr w0, [x29,184]
mul w1, w0, w27
sub w1, w1, w23
ubfiz x1, x1, 9, 23
add x1, x25, x1
-.L2761:
+.L2737:
ldr w2, [x29,204]
mov w0, 56
add x4, x22, :lo12:.LANCHOR0
- cbz w2, .L2762
+ cbz w2, .L2738
ldr w2, [x4,2088]
umull x0, w2, w0
ldr x2, [x4,2096]
add x0, x2, x0
- b .L2804
-.L2762:
+ b .L2779
+.L2738:
ldr w2, [x4,2088]
umull x0, w2, w0
ldr x2, [x4,2096]
add x0, x2, x0
ldr x0, [x0,8]
- b .L2802
-.L2760:
- ldr w0, [x29,220]
+ b .L2777
+.L2736:
+ ldr w0, [x29,212]
cmn w0, #1
- beq .L2764
- str w0, [x29,228]
+ beq .L2740
+ str w0, [x29,220]
mov w1, 56
ldr w0, [x2,2088]
- str w27, [x29,248]
+ str w27, [x29,240]
umull x0, w0, w1
ldr x1, [x2,2096]
mov w2, 0
add x0, x1, x0
ldr x1, [x0,8]
ldr x0, [x0,16]
- str x1, [x29,232]
+ str x1, [x29,224]
mov w1, 1
- str x0, [x29,240]
- add x0, x29, 224
+ str x0, [x29,232]
+ add x0, x29, 216
bl FlashReadPages
- ldr w0, [x29,224]
+ ldr w0, [x29,216]
cmn w0, #1
- bne .L2765
+ bne .L2741
ldr w0, [x20,424]
add w0, w0, 1
str w0, [x20,424]
- b .L2767
-.L2765:
+ b .L2743
+.L2741:
ldr w0, [x28,8]
cmp w0, w27
- beq .L2767
+ beq .L2743
ldr w0, [x20,424]
mov w2, w27
add w0, w0, 1
str w0, [x20,424]
- ldr x0, [x29,104]
+ ldr x0, [x29,112]
ldr w1, [x28,8]
bl printk
- b .L2767
-.L2764:
+ b .L2743
+.L2740:
ldr w0, [x2,2088]
mov w1, 56
umull x0, w0, w1
mov w1, 0
ldr x0, [x0,8]
bl ftl_memset
-.L2767:
+.L2743:
ldr w1, [x29,184]
mov w0, 56
lsl w2, w1, 9
ldr w1, [x29,176]
- cbz w1, .L2768
+ cbz w1, .L2744
add x1, x22, :lo12:.LANCHOR0
ldr w4, [x1,2088]
umull x0, w4, w0
ldr x1, [x4,8]
add x0, x1, x0
mov x1, x25
- b .L2803
-.L2768:
+ b .L2778
+.L2744:
add x5, x22, :lo12:.LANCHOR0
ldr w4, [x5,2088]
ldr x1, [x5,2096]
sub w1, w1, w23
ubfiz x1, x1, 9, 23
add x1, x25, x1
- b .L2803
-.L2756:
+ b .L2778
+.L2732:
ldr w0, [x29,204]
ldrh w1, [x4,2032]
ldr w2, [x4,2088]
- cbz w0, .L2769
+ cbz w0, .L2745
mul w1, w27, w1
umull x0, w2, w5
sub w1, w1, w23
ubfiz x1, x1, 9, 23
add x0, x2, x0
add x1, x25, x1
-.L2804:
+.L2779:
str x1, [x0,8]
- b .L2763
-.L2769:
+ b .L2739
+.L2745:
umull x0, w2, w5
ldr x2, [x4,2096]
mul w1, w27, w1
ubfiz x1, x1, 9, 23
ldr x0, [x0,8]
add x1, x25, x1
-.L2802:
+.L2777:
ldrh w2, [x4,2036]
-.L2803:
+.L2778:
bl ftl_memcpy
-.L2763:
+.L2739:
ldr x1, [x29,128]
mov w0, -3947
ldr x2, [x29,136]
cmn w0, #1
csel w0, w0, wzr, ne
str w0, [x20,200]
- ldr w0, [x29,220]
+ ldr w0, [x29,212]
str w0, [x28,12]
ldrh w0, [x19]
strh w0, [x28,2]
ldr x0, [x29,192]
add x0, x0, 1
str x0, [x29,192]
- b .L2753
-.L2806:
+ b .L2729
+.L2781:
str w27, [x29,200]
mov x0, x2
- b .L2754
-.L2783:
+ b .L2730
+.L2758:
str w27, [x29,200]
-.L2754:
+.L2730:
sub w21, w21, w0
ldr w0, [x29,204]
- cbnz w0, .L2773
+ cbnz w0, .L2749
add x0, x22, :lo12:.LANCHOR0
ldr w1, [x0,2088]
ldr w0, [x20,2040]
cmp w1, w0
- bcs .L2773
+ bcs .L2749
ldrh w0, [x19,4]
- cbz w0, .L2773
-.L2775:
+ cbz w0, .L2749
+.L2751:
str wzr, [x29,204]
- b .L2746
-.L2773:
+ b .L2722
+.L2749:
bl FtlCacheWriteBack
add x0, x22, :lo12:.LANCHOR0
cmp w21, 3
str wzr, [x0,2088]
- bls .L2775
- b .L2746
-.L2805:
+ bls .L2751
+ b .L2722
+.L2780:
ldr w1, [x29,180]
mov w0, w21
sub w1, w1, w26
bl rk_ftl_garbage_collect
mov w0, w21
-.L2740:
- ldr x1, [x29,120]
- ldr x2, [x29,280]
- ldr x1, [x1,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2777
- bl __stack_chk_fail
-.L2777:
+.L2716:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 288
+ ldp x29, x30, [sp], 272
ret
.size FtlWrite, .-FtlWrite
.align 2
add x29, sp, 0
str x19, [sp,16]
mov x19, x0
- cbnz w1, .L2810
+ cbnz w1, .L2785
adrp x1, .LANCHOR4
mov w7, 1
-.L2813:
+.L2788:
add x0, x1, :lo12:.LANCHOR4
ldr w0, [x0,68]
cmp w3, w0
- bcs .L2810
+ bcs .L2785
add x6, x4, :lo12:.LANCHOR0
ubfx x5, x3, 5, 11
lsl x5, x5, 2
uxth w3, w3
orr w6, w8, w6
str w6, [x0,x5]
- b .L2813
-.L2810:
+ b .L2788
+.L2785:
add x4, x4, :lo12:.LANCHOR0
mov x0, x19
ldr x1, [x4,1856]
bl ftl_memcpy
mov w2, 4
- adrp x0, .LC121
+ adrp x0, .LC120
mov x1, x19
- add x0, x0, :lo12:.LC121
+ add x0, x0, :lo12:.LC120
mov w3, w2
bl rknand_print_hex
ldr x19, [sp,16]
.global FlashReadFacBbtData
.type FlashReadFacBbtData, %function
FlashReadFacBbtData:
- stp x29, x30, [sp, -160]!
+ stp x29, x30, [sp, -144]!
adrp x4, .LANCHOR0
- add x29, sp, 0
- stp x21, x22, [sp,32]
- adrp x21, __stack_chk_guard
add x4, x4, :lo12:.LANCHOR0
+ add x29, sp, 0
stp x19, x20, [sp,16]
+ stp x21, x22, [sp,32]
stp x23, x24, [sp,48]
stp x25, x26, [sp,64]
- str x27, [sp,80]
- mov x23, x0
- ldr x0, [x21,#:lo12:__stack_chk_guard]
- mov w24, w1
- ldrh w3, [x4,180]
- mov w26, w2
- str x0, [x29,152]
- mov w27, 61664
+ mov x22, x0
+ mov w23, w1
ldrh w0, [x4,182]
+ mov w25, w2
+ ldrh w3, [x4,180]
+ mov w26, 61664
mul w3, w3, w0
ldr x0, [x4,1856]
adrp x4, .LANCHOR4
- str x0, [x29,104]
+ str x0, [x29,96]
add x0, x4, :lo12:.LANCHOR4
uxth w3, w3
- mov x22, x4
+ mov x21, x4
sub w20, w3, #1
sub w19, w3, #16
ldr x0, [x0,88]
- mul w25, w1, w3
- str x0, [x29,112]
+ mul w24, w1, w3
+ str x0, [x29,104]
uxth w20, w20
-.L2815:
+.L2790:
cmp w20, w19
- ble .L2824
- add w0, w20, w25
+ ble .L2798
+ add w0, w20, w24
mov w1, 1
lsl w0, w0, 10
mov w2, w1
- str w0, [x29,100]
- add x0, x29, 96
+ str w0, [x29,92]
+ add x0, x29, 88
bl FlashReadPages
- ldr w0, [x29,96]
+ ldr w0, [x29,88]
cmn w0, #1
- beq .L2816
- add x0, x22, :lo12:.LANCHOR4
+ beq .L2791
+ add x0, x21, :lo12:.LANCHOR4
ldr x0, [x0,88]
ldrh w0, [x0]
- cmp w0, w27
- bne .L2816
- mov w0, w23
- cbz x23, .L2817
- mov x0, x23
- mov w1, w24
- mov w2, w26
+ cmp w0, w26
+ bne .L2791
+ mov w0, w22
+ cbz x22, .L2792
+ mov x0, x22
+ mov w1, w23
+ mov w2, w25
bl FlashReadFacBbtData.part.14
- b .L2817
-.L2816:
+ b .L2792
+.L2791:
sub w20, w20, #1
uxth w20, w20
- b .L2815
-.L2824:
+ b .L2790
+.L2798:
mov w0, -1
-.L2817:
- ldr x2, [x29,152]
- ldr x1, [x21,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2819
- bl __stack_chk_fail
-.L2819:
+.L2792:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
- ldr x27, [sp,80]
- ldp x29, x30, [sp], 160
+ ldp x29, x30, [sp], 144
ret
.size FlashReadFacBbtData, .-FlashReadFacBbtData
.align 2
lsr w2, w2, 3
bl FlashReadFacBbtData
cmn w0, #1
- bne .L2826
-.L2830:
+ bne .L2800
+.L2804:
mov w1, 0
- b .L2827
-.L2826:
+ b .L2801
+.L2800:
mov w2, 0
lsr w0, w19, 4
mov w1, w2
sub w19, w19, #1
mov w5, 1
-.L2828:
+.L2802:
cmp w2, w19
- bge .L2827
+ bge .L2801
add x3, x20, :lo12:.LANCHOR4
ubfx x4, x2, 5, 11
ldr x6, [x3,80]
lsl w3, w5, w2
ldr w4, [x6,x4,lsl 2]
tst w3, w4
- beq .L2829
+ beq .L2803
add w3, w1, 1
ubfiz x1, x1, 1, 16
strh w2, [x21,x1]
uxth w1, w3
-.L2829:
+.L2803:
cmp w1, w0
- bcs .L2830
+ bcs .L2804
add w2, w2, 1
uxth w2, w2
- b .L2828
-.L2827:
+ b .L2802
+.L2801:
ubfiz x1, x1, 1, 16
mov w0, -1
ldp x19, x20, [sp,16]
stp x27, x28, [sp,80]
bl FtlBbtMemInit
bl FtlLoadFactoryBbt
-.L2836:
+.L2810:
add x21, x19, :lo12:.LANCHOR0
ldrh w0, [x21,1974]
cmp w23, w0
- bcs .L2854
+ bcs .L2828
adrp x1, .LANCHOR2
ldrh w27, [x24,12]
add x2, x1, :lo12:.LANCHOR2
str x0, [x20,8]
cmp w27, w2
str x26, [x20,16]
- beq .L2837
+ beq .L2811
ldrh w0, [x21,2022]
mov w1, 1
mov w2, w1
ldr x1, [x20,8]
lsr w2, w2, 3
bl ftl_memcpy
- b .L2838
-.L2837:
+ b .L2812
+.L2811:
mov w1, w23
mov w28, -3872
bl FlashGetBadBlockList
ldrh w21, [x21,2022]
sub w21, w21, #1
uxth w21, w21
-.L2839:
+.L2813:
add x27, x19, :lo12:.LANCHOR0
ldrh w0, [x27,2022]
madd w0, w23, w0, w21
bl FtlBbmIsBadBlock
cmp w0, 1
- bne .L2855
+ bne .L2829
sub w21, w21, #1
uxth w21, w21
- b .L2839
-.L2855:
+ b .L2813
+.L2829:
ldr x0, [x29,104]
mov w1, 0
mov w2, 16
bl FlashProgPages
ldr w0, [x25]
cmn w0, #1
- bne .L2838
+ bne .L2812
mov w0, w27
bl FtlBbmMapBadBlock
- b .L2839
-.L2838:
+ b .L2813
+.L2812:
mov w0, w27
add w23, w23, 1
add x22, x22, 8
add x24, x24, 2
bl FtlBbmMapBadBlock
- b .L2836
-.L2854:
+ b .L2810
+.L2828:
mov w20, 0
-.L2843:
+.L2817:
add x21, x19, :lo12:.LANCHOR0
ldrh w0, [x21,2040]
cmp w0, w20
- bls .L2856
+ bls .L2830
mov w0, w20
add w20, w20, 1
bl FtlBbmMapBadBlock
uxth w20, w20
- b .L2843
-.L2856:
+ b .L2817
+.L2830:
ldrh w20, [x21,2124]
mov w23, 65535
sub w20, w20, #1
uxth w20, w20
-.L2845:
+.L2819:
add x22, x21, 2112
ldrh w0, [x22,12]
sub w0, w0, #48
cmp w20, w0
- ble .L2849
+ ble .L2823
mov w0, w20
bl FtlBbmIsBadBlock
cmp w0, 1
- beq .L2846
+ beq .L2820
mov w0, w20
bl FlashTestBlk
- cbz w0, .L2847
+ cbz w0, .L2821
mov w0, w20
bl FtlBbmMapBadBlock
- b .L2846
-.L2847:
+ b .L2820
+.L2821:
ldrh w0, [x21,2112]
cmp w0, w23
- bne .L2848
+ bne .L2822
strh w20, [x21,2112]
- b .L2846
-.L2848:
+ b .L2820
+.L2822:
strh w20, [x22,4]
- b .L2849
-.L2846:
+ b .L2823
+.L2820:
sub w20, w20, #1
uxth w20, w20
- b .L2845
-.L2849:
+ b .L2819
+.L2823:
adrp x0, .LANCHOR2
add x19, x19, :lo12:.LANCHOR0
add x0, x0, :lo12:.LANCHOR2
ldrh w0, [x0,1956]
bl FtlFreeSysBlkQueueInit
bl FtlLoadBbt
- cbz w0, .L2858
+ cbz w0, .L2832
bl FtlMakeBbt
-.L2858:
+.L2832:
mov w0, 0
-.L2859:
+.L2833:
add x1, x20, :lo12:.LANCHOR0
ldrh w2, [x1,2032]
cmp w0, w2, lsl 7
- bge .L2882
+ bge .L2856
add x3, x21, :lo12:.LANCHOR2
ubfiz x2, x0, 2, 16
mvn w1, w0
uxth w0, w0
ldr x3, [x3,2104]
str w1, [x3,x2]
- b .L2859
-.L2882:
+ b .L2833
+.L2856:
ldrh w22, [x1,1960]
mov w19, 0
-.L2861:
+.L2835:
add x23, x20, :lo12:.LANCHOR0
ldrh w0, [x23,1962]
cmp w0, w22
- bls .L2883
+ bls .L2857
mov w0, w22
mov w1, 1
add w22, w22, 1
add w0, w19, w0
uxth w22, w22
uxth w19, w0
- b .L2861
-.L2883:
+ b .L2835
+.L2857:
ldrh w0, [x23,1952]
sub w1, w19, #3
cmp w1, w0, lsl 1
- bge .L2863
-.L2867:
+ bge .L2837
+.L2841:
mov w19, 0
mov w22, w19
- b .L2864
-.L2863:
+ b .L2838
+.L2837:
udiv w19, w19, w0
ldr w0, [x23,2060]
add w0, w19, w0
ldrh w0, [x23,1956]
bl FtlFreeSysBlkQueueInit
ldrh w19, [x23,1960]
-.L2865:
+.L2839:
add x0, x20, :lo12:.LANCHOR0
ldrh w0, [x0,1962]
cmp w0, w19
- bls .L2867
+ bls .L2841
mov w0, w19
mov w1, 1
add w19, w19, 1
bl FtlLowFormatEraseBlock
uxth w19, w19
- b .L2865
-.L2864:
+ b .L2839
+.L2838:
add x2, x20, :lo12:.LANCHOR0
ldrh w0, [x2,1960]
cmp w0, w22
- bls .L2884
+ bls .L2858
mov w0, w22
mov w1, 0
add w22, w22, 1
add w0, w19, w0
uxth w22, w22
uxth w19, w0
- b .L2864
-.L2884:
+ b .L2838
+.L2858:
ldrh w3, [x2,1952]
add x6, x21, :lo12:.LANCHOR2
ldr w1, [x2,1964]
mov w0, 24
mul w0, w3, w0
cmp w19, w0
- ble .L2869
+ ble .L2843
sub w1, w1, w19
udiv w1, w1, w3
str w1, [x2,2104]
lsr w1, w1, 5
add w1, w1, 24
strh w1, [x6,272]
-.L2869:
+.L2843:
add x2, x21, :lo12:.LANCHOR2
ldr w0, [x2,160]
cmp w0, 1
- bne .L2870
+ bne .L2844
ldrh w1, [x2,272]
udiv w0, w19, w3
add w0, w1, w0
add w0, w1, w0, asr 2
strh w0, [x2,272]
-.L2870:
+.L2844:
add x6, x20, :lo12:.LANCHOR0
ldrh w1, [x6,2018]
- cbz w1, .L2872
+ cbz w1, .L2846
add x0, x21, :lo12:.LANCHOR2
ldrh w2, [x0,272]
add w2, w2, w1, lsr 1
strh w2, [x0,272]
mul w2, w1, w3
cmp w2, w19
- ble .L2872
+ ble .L2846
add w1, w1, 32
str w4, [x6,2104]
add w1, w5, w1
strh w1, [x0,272]
-.L2872:
+.L2846:
add x19, x21, :lo12:.LANCHOR2
add x22, x20, :lo12:.LANCHOR0
adrp x24, .LANCHOR4
strh wzr, [x19,2]
strb wzr, [x19,6]
bl ftl_memset
-.L2874:
+.L2848:
mov x0, x19
bl make_superblock
ldrb w0, [x19,7]
- cbnz w0, .L2875
+ cbnz w0, .L2849
ldrh w1, [x19]
ldr x0, [x19,-40]
strh w23, [x0,x1,lsl 1]
ldrh w0, [x19]
add w0, w0, 1
strh w0, [x19]
- b .L2874
-.L2875:
+ b .L2848
+.L2849:
ldr w0, [x19,196]
add x20, x19, 48
str w0, [x19,12]
strh w0, [x19,48]
mov w0, 1
strb w0, [x20,8]
-.L2876:
+.L2850:
mov x0, x20
bl make_superblock
ldrb w0, [x20,7]
- cbnz w0, .L2877
+ cbnz w0, .L2851
ldrh w1, [x20]
ldr x0, [x19,-40]
strh w22, [x0,x1,lsl 1]
ldrh w0, [x20]
add w0, w0, 1
strh w0, [x20]
- b .L2876
-.L2877:
+ b .L2850
+.L2851:
ldr w0, [x19,196]
add x21, x21, :lo12:.LANCHOR4
str w0, [x20,12]
str w0, [x19,196]
bl FtlVpcTblFlush
bl FtlSysBlkInit
- cbnz w0, .L2878
+ cbnz w0, .L2852
adrp x0, .LANCHOR1+532
mov w1, 1
str w1, [x0,#:lo12:.LANCHOR1+532]
-.L2878:
+.L2852:
mov w0, 0
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
.global FtlReInitForSDUpdata
.type FtlReInitForSDUpdata, %function
FtlReInitForSDUpdata:
- stp x29, x30, [sp, -64]!
+ stp x29, x30, [sp, -48]!
add x29, sp, 0
- stp x19, x20, [sp,16]
- adrp x20, __stack_chk_guard
+ str x19, [sp,16]
adrp x19, .LANCHOR4
- ldr x0, [x20,#:lo12:__stack_chk_guard]
- str x0, [x29,56]
add x0, x19, :lo12:.LANCHOR4
ldr x0, [x0,32]
bl FlashInit
mov w1, 0
- cbnz w0, .L2886
+ cbnz w0, .L2860
bl FlashLoadFactorBbt
- cbz w0, .L2887
+ cbz w0, .L2861
bl FlashMakeFactorBbt
-.L2887:
+.L2861:
add x19, x19, :lo12:.LANCHOR4
ldr x0, [x19,80]
bl FlashReadIdbDataRaw
- cbz w0, .L2888
+ cbz w0, .L2862
mov w1, 0
mov w2, 16
- add x0, x29, 40
+ add x0, x29, 32
bl FlashReadFacBbtData
mov w0, 0
- ldr w2, [x29,40]
+ ldr w2, [x29,32]
mov w1, w0
mov w4, 1
-.L2890:
+.L2864:
lsl w3, w4, w1
add w1, w1, 1
tst w3, w2
cset w3, ne
cmp w1, 16
add w0, w0, w3
- bne .L2890
+ bne .L2864
cmp w0, 6
- bhi .L2891
+ bhi .L2865
adrp x0, .LANCHOR0+9
strb w1, [x0,#:lo12:.LANCHOR0+9]
- b .L2892
-.L2891:
+ b .L2866
+.L2865:
mov w1, 0
mov w4, 1
-.L2894:
+.L2868:
lsl w3, w4, w1
add w1, w1, 1
tst w3, w2
cset w3, ne
cmp w1, 24
add w0, w0, w3
- bne .L2894
+ bne .L2868
cmp w0, 17
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
- bls .L2916
+ bls .L2889
mov w1, 36
-.L2916:
+.L2889:
strb w1, [x0,9]
-.L2892:
+.L2866:
adrp x0, .LANCHOR0
add x0, x0, :lo12:.LANCHOR0
ldrb w1, [x0,9]
strh w1, [x0,194]
-.L2888:
- adrp x0, .LC73
- adrp x1, .LC74
- add x1, x1, :lo12:.LC74
- add x0, x0, :lo12:.LC73
+.L2862:
+ adrp x0, .LC72
+ adrp x1, .LC73
+ add x1, x1, :lo12:.LC73
+ add x0, x0, :lo12:.LC72
adrp x19, .LANCHOR0
bl printk
add x19, x19, :lo12:.LANCHOR0
ldrh w0, [x19,1956]
mov w19, 1
bl FtlFreeSysBlkQueueInit
-.L2896:
+.L2870:
bl FtlLoadBbt
- cbz w0, .L2897
-.L2918:
+ cbz w0, .L2871
+.L2891:
bl FtlLowFormat
cmp w19, 3
- bhi .L2919
+ bhi .L2892
add w19, w19, 1
- b .L2896
-.L2919:
+ b .L2870
+.L2892:
mov w1, -1
- b .L2886
-.L2897:
+ b .L2860
+.L2871:
bl FtlSysBlkInit
- cbnz w0, .L2918
+ cbnz w0, .L2891
adrp x1, .LANCHOR1+532
mov w2, 1
str w2, [x1,#:lo12:.LANCHOR1+532]
mov w1, w0
-.L2886:
- ldr x2, [x29,56]
+.L2860:
mov w0, w1
- ldr x1, [x20,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2902
- bl __stack_chk_fail
-.L2902:
- ldp x19, x20, [sp,16]
- ldp x29, x30, [sp], 64
+ ldr x19, [sp,16]
+ ldp x29, x30, [sp], 48
ret
.size FtlReInitForSDUpdata, .-FtlReInitForSDUpdata
.align 2
mov w1, 12336
movk w1, 0x5638, lsl 16
cmp w2, w1
- bne .L2920
+ bne .L2893
bl flash_enter_slc_mode
-.L2920:
+.L2893:
ldp x29, x30, [sp], 16
ret
.size flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
mov w1, 12336
movk w1, 0x5638, lsl 16
cmp w2, w1
- bne .L2922
+ bne .L2895
bl flash_exit_slc_mode
-.L2922:
+.L2895:
ldp x29, x30, [sp], 16
ret
.size flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
ldr w3, [x19,12]
mov w26, w1
ldrb w21, [x0,9]
- adrp x0, .LC122
- add x0, x0, :lo12:.LC122
+ adrp x0, .LC121
+ add x0, x0, :lo12:.LC121
mov w1, w22
mov w2, w26
mov w23, 0
sub w5, w22, w21
mul w3, w21, w28
ubfx x3, x3, 2, 2
-.L2925:
+.L2898:
cmp w23, w26
- bcs .L2931
+ bcs .L2904
ldrb w1, [x19,120]
sub w24, w6, w3
add w4, w23, w21
uxth w24, w24
add x0, x19, x4, uxth 1
ldrh w0, [x0,196]
- cbz w1, .L2926
+ cbz w1, .L2899
ldr w2, [x19,1872]
mov w1, 12336
movk w1, 0x5638, lsl 16
uxth w4, w4
cmp w2, w1
csel w0, w4, w0, eq
-.L2926:
+.L2899:
add w3, w3, w5
add x27, x7, :lo12:.LANCHOR4
ldrb w4, [x19,1944]
ldr x6, [x29,96]
ldr x5, [x29,104]
ldr x7, [x29,112]
- b .L2925
-.L2931:
- adrp x0, .LC123
+ b .L2898
+.L2904:
+ adrp x0, .LC122
mov w1, w22
mov w2, w26
mov w3, 0
- add x0, x0, :lo12:.LC123
+ add x0, x0, :lo12:.LC122
bl printk
mov w0, 0
ldp x19, x20, [sp,16]
.global IDBlockWriteData
.type IDBlockWriteData, %function
IDBlockWriteData:
- stp x29, x30, [sp, -208]!
+ stp x29, x30, [sp, -192]!
add x29, sp, 0
stp x19, x20, [sp,16]
adrp x19, .LANCHOR0
- adrp x20, __stack_chk_guard
add x19, x19, :lo12:.LANCHOR0
stp x27, x28, [sp,80]
- mov w28, w1
+ mov w27, w1
+ adrp x28, .LANCHOR4
ldr x1, [x19,744]
stp x23, x24, [sp,48]
stp x21, x22, [sp,32]
stp x25, x26, [sp,64]
- mov w25, w0
- ldr x0, [x20,#:lo12:__stack_chk_guard]
- ldrb w22, [x1,9]
- mov x23, x2
- str x0, [x29,200]
- mov w1, w25
+ mov w24, w0
ldr w0, [x19,12]
- mov w2, w28
- mov w24, 0
- mul w22, w0, w22
- adrp x0, .LC124
- add x0, x0, :lo12:.LC124
- uxth w22, w22
+ ldrb w21, [x1,9]
+ mov x22, x2
+ mov w1, w24
+ mov w2, w27
+ mov w23, 0
+ mul w21, w0, w21
+ adrp x0, .LC123
+ add x0, x0, :lo12:.LC123
+ uxth w21, w21
bl printk
mov w0, 0
bl flash_boot_enter_slc_mode
ldrh w1, [x19,188]
mov w2, 0
mov w0, 0
- udiv w1, w25, w1
+ udiv w1, w24, w1
bl FlashEraseBlock
mov w0, 0
bl flash_boot_exit_slc_mode
- udiv w27, w25, w22
+ udiv w26, w24, w21
ldr x0, [x19,744]
- adrp x5, .LANCHOR4
- ldrb w21, [x0,9]
- msub w27, w27, w22, w25
- sub w22, w25, w27
-.L2933:
- cmp w24, w28
- bcs .L2948
- add w4, w24, w27
+ ldrb w20, [x0,9]
+ msub w26, w26, w21, w24
+ sub w21, w24, w26
+.L2906:
+ cmp w23, w27
+ bcs .L2920
+ add w4, w23, w26
lsr w4, w4, 2
uxth w0, w4
and w4, w4, 65535
- cbz w0, .L2934
+ cbz w0, .L2907
add x1, x19, 196
add w2, w4, 1
ldrh w3, [x1,w2,sxtw 1]
ldrb w1, [x19,120]
- cbz w1, .L2935
+ cbz w1, .L2908
ldr w2, [x19,1872]
mov w1, 12336
movk w1, 0x5638, lsl 16
cmp w2, w1
- bne .L2935
+ bne .L2908
add w3, w0, 1
uxth w3, w3
-.L2935:
+.L2908:
sub w3, w3, #1
- str wzr, [x29,140]
+ str wzr, [x29,132]
lsl w3, w3, 2
- str w3, [x29,136]
-.L2934:
+ str w3, [x29,128]
+.L2907:
add x1, x19, 196
- ldrh w26, [x1,w4,sxtw 1]
+ ldrh w25, [x1,w4,sxtw 1]
ldrb w1, [x19,120]
- cbz w1, .L2936
+ cbz w1, .L2909
ldr w2, [x19,1872]
mov w1, 12336
movk w1, 0x5638, lsl 16
cmp w2, w1
- csel w26, w26, w0, ne
-.L2936:
- add x0, x5, :lo12:.LANCHOR4
+ csel w25, w25, w0, ne
+.L2909:
+ add x0, x28, :lo12:.LANCHOR4
ldrb w4, [x19,1944]
- madd w3, w26, w21, w22
- ubfiz x2, x24, 9, 16
- str x5, [x29,120]
+ madd w3, w25, w20, w21
+ ubfiz x2, x23, 9, 16
+ str x4, [x29,120]
ldrb w0, [x0,74]
- add x2, x23, x2
- str x4, [x29,112]
- add w24, w24, 4
- str x3, [x29,96]
- str x2, [x29,104]
+ add x2, x22, x2
+ str x3, [x29,104]
+ add w23, w23, 4
+ str x2, [x29,112]
bl FlashBchSel
+ uxth w23, w23
mov w0, 0
- uxth w24, w24
bl flash_boot_enter_slc_mode
ldr x0, [x19,744]
- ldr x3, [x29,96]
- ldr x2, [x29,104]
+ ldr x3, [x29,104]
+ ldr x2, [x29,112]
ldrb w1, [x0,9]
mov w0, 0
udiv w1, w3, w1
- add x3, x29, 136
+ add x3, x29, 128
bl FlashProgPage
mov w0, 0
bl flash_boot_exit_slc_mode
- ldr x4, [x29,112]
+ ldr x4, [x29,120]
mov w0, w4
bl FlashBchSel
- udiv w1, w22, w21
- add w2, w26, 1
+ udiv w1, w21, w20
+ add w2, w25, 1
mov w0, 0
bl FlashPageProgMsbFFData
- ldr x5, [x29,120]
- b .L2933
-.L2948:
- adrp x0, .LC125
- mov w1, w25
- mov w2, w28
- add x0, x0, :lo12:.LC125
+ b .L2906
+.L2920:
+ adrp x0, .LC124
+ mov w1, w24
+ mov w2, w27
mov w3, 0
+ add x0, x0, :lo12:.LC124
bl printk
- ldr x2, [x29,200]
mov w0, 0
- ldr x1, [x20,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L2938
- bl __stack_chk_fail
-.L2938:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
ldp x25, x26, [sp,64]
ldp x27, x28, [sp,80]
- ldp x29, x30, [sp], 208
+ ldp x29, x30, [sp], 192
ret
.size IDBlockWriteData, .-IDBlockWriteData
.align 2
str x24, [x29,120]
mov x20, x0
mov w0, -1
- cbz x20, .L2959
+ cbz x20, .L2931
add w19, w25, 511
lsr w19, w19, 9
cmp w19, 255
- bhi .L2951
+ bhi .L2923
ubfiz x0, x19, 9, 23
mov w2, 256
add x0, x21, x0
mov x1, x21
sub w2, w2, w19
bl memcpy
-.L2951:
+.L2923:
add w19, w19, 128
mov w0, 256
cmp w19, 256
mov x1, x23
csel w19, w19, w0, ls
- adrp x0, .LC126
- add x0, x0, :lo12:.LC126
+ adrp x0, .LC125
+ add x0, x0, :lo12:.LC125
mov w2, 4
mov w3, 5
bl rknand_print_hex
ldr x0, [x29,120]
ldr w1, [x21,512]
add x27, x0, :lo12:.LANCHOR0
- adrp x0, .LC127
- add x0, x0, :lo12:.LC127
+ adrp x0, .LC126
+ add x0, x0, :lo12:.LC126
ldrb w2, [x27,9]
bl printk
ldrb w0, [x27,9]
ldr w1, [x21,512]
cmp w1, w0
- bls .L2952
+ bls .L2924
str w0, [x21,512]
-.L2952:
- adrp x0, .LC128
+.L2924:
+ adrp x0, .LC127
mov w2, w25
mul w22, w22, w26
- add x0, x0, :lo12:.LC128
+ add x0, x0, :lo12:.LC127
mov w1, w19
mov x24, 0
- adrp x26, .LC129
+ adrp x26, .LC128
bl printk
- adrp x27, .LC130
- adrp x28, .LC131
+ adrp x27, .LC129
+ adrp x28, .LC130
lsl w0, w19, 7
uxth w22, w22
str w0, [x29,116]
mov w25, w24
- add x26, x26, :lo12:.LC129
- add x27, x27, :lo12:.LC130
- add x28, x28, :lo12:.LC131
-.L2957:
+ add x26, x26, :lo12:.LC128
+ add x27, x27, :lo12:.LC129
+ add x28, x28, :lo12:.LC130
+.L2929:
ldr x1, [x29,120]
mov w8, w24
ldr w0, [x23,x24,lsl 2]
add x1, x1, :lo12:.LANCHOR0
ldrh w1, [x1,194]
cmp w0, w1
- bcs .L2953
+ bcs .L2925
adrp x1, .LANCHOR4+68
ldr w1, [x1,#:lo12:.LANCHOR4+68]
cmp w0, w1
- bcc .L2953
+ bcc .L2925
mov w1, 0
mov x2, 512
mov x0, x20
bl IdBlockReadData
ldr x8, [x29,104]
mov x0, 0
-.L2954:
+.L2926:
ldr w1, [x29,116]
mov w3, w0
cmp w0, w1
- bcs .L2964
+ bcs .L2936
ldr w4, [x20,x0,lsl 2]
mov x7, x0
add x0, x0, 1
add x1, x21, x0, lsl 2
ldr w5, [x1,-4]
cmp w4, w5
- beq .L2954
+ beq .L2926
ldr w2, [x23,x24,lsl 2]
mov w1, w8
mov x0, x26
mov x2, x20
mul w0, w22, w0
bl IDBlockWriteData
- adrp x0, .LC132
- add x0, x0, :lo12:.LC132
+ adrp x0, .LC131
+ add x0, x0, :lo12:.LC131
bl printk
- b .L2953
-.L2964:
+ b .L2925
+.L2936:
add w25, w25, 1
-.L2953:
+.L2925:
add x24, x24, 1
cmp x24, 5
- bne .L2957
+ bne .L2929
mov x0, x20
bl kfree
cmp w25, wzr
csetm w0, eq
-.L2959:
+.L2931:
ldp x19, x20, [sp,16]
ldp x21, x22, [sp,32]
ldp x23, x24, [sp,48]
mov x5, x0
add x3, x3, :lo12:.LANCHOR1
mov w0, w2
-.L2966:
+.L2938:
cmp w1, w2
- bls .L2968
+ bls .L2940
ldrb w4, [x5,x2]
add x6, x3, 3016
add x2, x2, 1
eor w4, w4, w0, lsr 24
ldr w4, [x6,w4,uxtw 2]
eor w0, w4, w0, lsl 8
- b .L2966
-.L2968:
+ b .L2938
+.L2940:
ret
.size CRC_32, .-CRC_32
.align 2
.type rknand_sys_storage_ioctl, %function
rknand_sys_storage_ioctl:
sub sp, sp, #528
+ mov w0, 29187
+ movk w0, 0x4004, lsl 16
+ cmp w1, w0
stp x29, x30, [sp, -48]!
add x29, sp, 0
- stp x21, x22, [sp,32]
stp x19, x20, [sp,16]
- adrp x22, __stack_chk_guard
+ str x21, [sp,32]
mov w19, w1
- ldr x20, [x0,208]
- mov w0, 29187
- movk w0, 0x4004, lsl 16
- mov x21, x2
- ldr x1, [x22,#:lo12:__stack_chk_guard]
- cmp w19, w0
- str x1, [x29,568]
- beq .L2971
+ mov x20, x2
+ beq .L2943
mov w0, 29187
movk w0, 0x4004, lsl 16
- cmp w19, w0
- bhi .L2972
+ cmp w1, w0
+ bhi .L2944
mov w0, 25726
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2973
+ cmp w1, w0
+ beq .L2945
mov w0, 25726
movk w0, 0x4004, lsl 16
- cmp w19, w0
- bhi .L2974
+ cmp w1, w0
+ bhi .L2946
mov w0, 25601
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2975
+ cmp w1, w0
+ beq .L2947
mov w0, 25601
movk w0, 0x4004, lsl 16
- cmp w19, w0
- bhi .L2976
+ cmp w1, w0
+ bhi .L2948
mov w0, 25364
movk w0, 0x4004, lsl 16
- cmp w19, w0
- bne .L3026
+ cmp w1, w0
+ bne .L3005
bl rknand_dev_flush
- b .L3060
-.L2976:
+ b .L3037
+.L2948:
mov w0, 25602
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2978
+ cmp w1, w0
+ beq .L2950
mov w0, 25603
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2979
- b .L3026
-.L2974:
+ cmp w1, w0
+ beq .L2951
+ b .L3005
+.L2946:
mov w0, 27688
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2980
+ cmp w1, w0
+ beq .L2952
mov w0, 27688
movk w0, 0x4004, lsl 16
- cmp w19, w0
- bhi .L2981
+ cmp w1, w0
+ bhi .L2953
mov w0, 25727
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2982
- b .L3026
-.L2981:
+ cmp w1, w0
+ beq .L2954
+ b .L3005
+.L2953:
mov w0, 27698
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2980
+ cmp w1, w0
+ beq .L2952
mov w0, 27708
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2980
- b .L3026
-.L2972:
+ cmp w1, w0
+ beq .L2952
+ b .L3005
+.L2944:
mov w0, 29267
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2983
+ cmp w1, w0
+ beq .L2955
mov w0, 29267
movk w0, 0x4004, lsl 16
- cmp w19, w0
- bhi .L2984
+ cmp w1, w0
+ bhi .L2956
mov w0, 29189
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2985
+ cmp w1, w0
+ beq .L2957
mov w0, 29189
movk w0, 0x4004, lsl 16
- cmp w19, w0
- bcc .L2986
+ cmp w1, w0
+ bcc .L2958
mov w0, 29210
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2987
+ cmp w1, w0
+ beq .L2959
mov w0, 29266
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2988
- b .L3026
-.L2984:
+ cmp w1, w0
+ beq .L2960
+ b .L3005
+.L2956:
mov w0, 30225
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2989
+ cmp w1, w0
+ beq .L2961
mov w0, 30225
movk w0, 0x4004, lsl 16
- cmp w19, w0
- bhi .L2990
+ cmp w1, w0
+ bhi .L2962
mov w0, 29268
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2991
+ cmp w1, w0
+ beq .L2963
mov w0, 30224
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2992
- b .L3026
-.L2990:
+ cmp w1, w0
+ beq .L2964
+ b .L3005
+.L2962:
mov w0, 30226
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2992
+ cmp w1, w0
+ beq .L2964
mov w0, 30227
movk w0, 0x4004, lsl 16
- cmp w19, w0
- beq .L2989
- b .L3026
-.L2986:
- adrp x0, .LC133
- add x0, x0, :lo12:.LC133
+ cmp w1, w0
+ beq .L2961
+ b .L3005
+.L2958:
+ adrp x0, .LC132
+ add x0, x0, :lo12:.LC132
bl printk
- mov x0, x20
- mov x1, x21
+ adrp x0, kmalloc_caches+96
+ mov w1, 192
+ movk w1, 0x240, lsl 16
+ mov x2, 4096
+ ldr x0, [x0,#:lo12:kmalloc_caches+96]
+ bl kmem_cache_alloc_trace
+ mov x19, x0
+ cbnz x0, .L2965
+.L2970:
+ mov x0, -12
+ b .L2942
+.L2965:
+ mov x1, x20
mov x2, 512
bl rk_copy_from_user
- cbz x0, .L2993
-.L2997:
+ cbnz x0, .L3044
adrp x0, .LC134
+ ldr w1, [x19]
+ ldr w2, [x19,4]
add x0, x0, :lo12:.LC134
- b .L3063
-.L2993:
- adrp x0, .LC135
- ldr w1, [x20]
- ldr w2, [x20,4]
- add x0, x0, :lo12:.LC135
bl printk
- ldr w19, [x20,4]
- cmp w19, 8
- bhi .L3062
+ ldr w0, [x19,4]
+ str w0, [x29,52]
+ cmp w0, 8
+ bhi .L3040
bl rknand_device_unlock
- ldr w0, [x20]
- mov w1, w19
- mov x2, x20
+ ldr w1, [x29,52]
+ mov x2, x19
+ ldr w0, [x19]
bl IdBlockReadData
bl rknand_device_unlock
- mov x0, x21
- mov x1, x20
- ubfiz x2, x19, 9, 23
+ ldr w2, [x29,52]
+ mov x0, x20
+ mov x1, x19
+ ubfiz x2, x2, 9, 23
bl rk_copy_to_user
- cbz x0, .L3060
+ cbz x0, .L3046
+ adrp x0, .LC135
+ add x0, x0, :lo12:.LC135
+.L3039:
+ bl printk
+.L3040:
+ mov x0, x19
+.L3041:
+ bl kfree
+.L3042:
+ mov x0, -14
+ b .L2942
+.L2957:
adrp x0, .LC136
add x0, x0, :lo12:.LC136
- b .L3063
-.L2985:
- adrp x0, .LC137
- add x0, x0, :lo12:.LC137
bl printk
- mov x0, x20
- mov x1, x21
+ adrp x0, kmalloc_caches+96
+ mov w1, 192
+ movk w1, 0x240, lsl 16
+ mov x2, 4096
+ ldr x0, [x0,#:lo12:kmalloc_caches+96]
+ bl kmem_cache_alloc_trace
+ mov x19, x0
+ cbz x0, .L2970
+ mov x1, x20
mov x2, 4096
bl rk_copy_from_user
- cbnz x0, .L2997
- ldr w1, [x20]
- adrp x0, .LC138
- ldr w2, [x20,4]
- add x0, x0, :lo12:.LC138
+ cbnz x0, .L3044
+ ldr w1, [x19]
+ adrp x0, .LC137
+ ldr w2, [x19,4]
+ add x0, x0, :lo12:.LC137
bl printk
adrp x0, .LANCHOR4
add x21, x0, :lo12:.LANCHOR4
- mov x19, x0
+ mov x20, x0
ldr x1, [x21,448]
- cbz x1, .L2998
-.L3001:
- ldr w2, [x20,4]
- cmp w2, 4088
- bls .L2999
- b .L3062
-.L2998:
+ cbnz x1, .L2972
mov w1, 192
mov x0, 260096
movk w1, 0x240, lsl 16
mov w2, 6
bl kmalloc_order_trace
str x0, [x21,448]
- cbnz x0, .L3001
- b .L3062
-.L2999:
- ldr w0, [x20]
+ cbz x0, .L3040
+.L2972:
+ ldr w2, [x19,4]
+ cmp w2, 4088
+ bhi .L3040
+ ldr w0, [x19]
mov w1, 55296
movk w1, 0x3, lsl 16
cmp w0, w1
- bhi .L3062
- add x19, x19, :lo12:.LANCHOR4
+ bhi .L3040
+ add x20, x20, :lo12:.LANCHOR4
uxtw x2, w2
- ldr x1, [x19,448]
+ ldr x1, [x20,448]
add x0, x1, x0, uxtw
- add x1, x20, 8
+ add x1, x19, 8
bl memcpy
- b .L3060
-.L2988:
- adrp x0, .LC139
- add x0, x0, :lo12:.LC139
+.L3046:
+ mov x0, x19
+ bl kfree
+ b .L3037
+.L2960:
+ adrp x0, .LC138
+ add x0, x0, :lo12:.LC138
bl printk
- mov x0, x20
- mov x1, x21
+ adrp x0, kmalloc_caches+96
+ mov w1, 192
+ movk w1, 0x240, lsl 16
+ mov x2, 4096
+ ldr x0, [x0,#:lo12:kmalloc_caches+96]
+ bl kmem_cache_alloc_trace
+ mov x19, x0
+ cbz x0, .L2970
+ mov x1, x20
mov x2, 28
bl rk_copy_from_user
- cbnz x0, .L2997
- ldr w1, [x20]
- adrp x0, .LC140
- ldr w2, [x20,4]
- add x0, x0, :lo12:.LC140
+ cbz x0, .L2974
+.L3044:
+ adrp x0, .LC133
+ add x0, x0, :lo12:.LC133
+ b .L3039
+.L2974:
+ ldr w1, [x19]
+ adrp x0, .LC139
+ ldr w2, [x19,4]
+ add x0, x0, :lo12:.LC139
bl printk
- ldr w1, [x20]
+ ldr w1, [x19]
mov w0, 59392
movk w0, 0x3, lsl 16
cmp w1, w0
- bhi .L3062
- adrp x19, .LANCHOR4
- add x19, x19, :lo12:.LANCHOR4
- ldr x0, [x19,448]
- cbz x0, .L3062
+ bhi .L3040
+ adrp x20, .LANCHOR4
+ add x20, x20, :lo12:.LANCHOR4
+ ldr x0, [x20,448]
+ cbz x0, .L3040
bl CRC_32
- ldr w1, [x20,4]
+ ldr w1, [x19,4]
cmp w1, w0
- beq .L3002
-.L3008:
+ beq .L2977
+ mov x0, x19
+ bl kfree
mov x0, -2
- b .L2970
-.L3002:
+ b .L2942
+.L2977:
bl rknand_device_unlock
- ldr x1, [x19,448]
- add x2, x20, 8
- ldr w0, [x20]
+ ldr x1, [x20,448]
+ add x2, x19, 8
+ ldr w0, [x19]
bl write_idblock
bl rknand_device_unlock
- ldr x0, [x19,448]
+ ldr x0, [x20,448]
bl kfree
- str xzr, [x19,448]
- b .L3060
-.L2987:
- adrp x0, .LC141
- add x0, x0, :lo12:.LC141
+ str xzr, [x20,448]
+ b .L3046
+.L2959:
+ adrp x0, .LC140
+ add x0, x0, :lo12:.LC140
bl printk
- mov x0, x20
+ adrp x0, kmalloc_caches+96
+ mov w1, 192
+ movk w1, 0x240, lsl 16
+ mov x2, 4096
+ ldr x0, [x0,#:lo12:kmalloc_caches+96]
+ bl kmem_cache_alloc_trace
+ mov x21, x0
+ cbz x0, .L2970
bl ReadFlashInfo
- mov x0, x21
- mov x1, x20
+ mov x0, x20
+ mov x1, x21
mov x2, 11
- b .L3059
-.L2971:
- adrp x0, .LC142
- add x0, x0, :lo12:.LC142
+ b .L3048
+.L2943:
+ adrp x0, .LC141
+ add x0, x0, :lo12:.LC141
bl printk
bl rknand_device_unlock
bl FtlReInitForSDUpdata
mov w19, w0
bl rknand_device_unlock
- cbnz w19, .L3062
+ cbnz w19, .L3042
bl nand_blk_add_whole_disk
+ adrp x0, kmalloc_caches+96
+ mov w1, 192
+ movk w1, 0x240, lsl 16
+ mov x2, 4096
+ ldr x0, [x0,#:lo12:kmalloc_caches+96]
+ bl kmem_cache_alloc_trace
+ mov x21, x0
+ cbz x0, .L2970
bl rknand_device_unlock
mov w1, w19
mov w2, 64
- mov x0, x20
+ mov x0, x21
bl FlashReadFacBbtData
bl rknand_device_unlock
- adrp x0, .LC143
- mov x1, x20
- add x0, x0, :lo12:.LC143
+ adrp x0, .LC142
+ mov x1, x21
+ add x0, x0, :lo12:.LC142
mov w2, 4
mov w3, 8
bl rknand_print_hex
- mov x0, x21
- mov x1, x20
+ mov x0, x20
+ mov x1, x21
mov x2, 64
-.L3059:
- bl rk_copy_to_user
- b .L3053
-.L2983:
- adrp x0, .LC144
- add x0, x0, :lo12:.LC144
+ b .L3048
+.L2955:
+ adrp x0, .LC143
+ add x0, x0, :lo12:.LC143
bl printk
adrp x0, .LANCHOR4+456
- mov x1, x20
+ add x1, x29, 52
mov x2, 4
ldr x0, [x0,#:lo12:.LANCHOR4+456]
ldr w0, [x0,20]
- str w0, [x20]
- mov x0, x21
- b .L3059
-.L2991:
- adrp x0, .LC145
- add x0, x0, :lo12:.LC145
+ str w0, [x29,52]
+ mov x0, x20
+ b .L3033
+.L2963:
+ adrp x0, .LC144
+ add x0, x0, :lo12:.LC144
bl printk
+ adrp x0, kmalloc_caches+96
+ mov w1, 192
+ movk w1, 0x240, lsl 16
+ mov x2, 4096
+ ldr x0, [x0,#:lo12:kmalloc_caches+96]
+ bl kmem_cache_alloc_trace
+ mov x21, x0
+ cbz x0, .L2970
bl rknand_device_unlock
mov w1, 2
- mov x2, x20
+ mov x2, x21
mov w0, 520
bl FtlVendorPartRead
bl rknand_device_unlock
- mov x0, x21
- mov x1, x20
+ mov x0, x20
+ mov x1, x21
mov x2, 1024
- b .L3059
-.L2975:
- adrp x0, .LC146
- add x0, x0, :lo12:.LC146
+.L3048:
+ bl rk_copy_to_user
+ mov x19, x0
+ mov x0, x21
+ cbnz x19, .L3041
+ bl kfree
+ b .L2969
+.L2947:
+ adrp x0, .LC145
+ add x0, x0, :lo12:.LC145
bl printk
- add x0, x29, 48
- mov x1, x21
+ add x0, x29, 56
+ mov x1, x20
mov x2, 520
bl rk_copy_from_user
mov x19, x0
- cbnz x0, .L2997
- ldr w1, [x29,48]
+ cbz x0, .L2983
+.L2988:
+ adrp x0, .LC133
+ add x0, x0, :lo12:.LC133
+ bl printk
+ b .L3042
+.L2983:
+ ldr w1, [x29,56]
mov w0, 21060
movk w0, 0x4b4d, lsl 16
cmp w1, w0
- beq .L3004
-.L3005:
+ beq .L2984
+.L2985:
mov x19, -1
- b .L2996
-.L3004:
- ldr w0, [x29,52]
+ b .L2969
+.L2984:
+ ldr w0, [x29,60]
cmp w0, 512
- bhi .L3005
- adrp x20, .LANCHOR4
- add x0, x29, 48
- add x20, x20, :lo12:.LANCHOR4
+ bhi .L2985
+ adrp x21, .LANCHOR4
+ add x0, x29, 56
+ add x21, x21, :lo12:.LANCHOR4
mov x2, 512
- ldr x1, [x20,456]
+ ldr x1, [x21,456]
bl memcpy
- ldr w1, [x20,464]
+ ldr w1, [x21,464]
mov w0, 5161
movk w0, 0xc059, lsl 16
cmp w1, w0
- beq .L3006
- add x0, x29, 112
+ beq .L2986
+ add x0, x29, 120
mov w1, w19
mov x2, 128
- str w19, [x29,56]
- str w19, [x29,60]
+ str w19, [x29,64]
+ str w19, [x29,68]
bl memset
-.L3006:
+.L2986:
+ add x0, x29, 312
mov w1, 0
mov x2, 256
- add x0, x29, 304
- str wzr, [x29,64]
+ str wzr, [x29,72]
bl memset
- mov x0, x21
- add x1, x29, 48
+.L3034:
+ mov x0, x20
+ add x1, x29, 56
mov x2, 520
- b .L3059
-.L2978:
- adrp x0, .LC147
- add x0, x0, :lo12:.LC147
+.L3033:
+ bl rk_copy_to_user
+ cbnz x0, .L3042
+ b .L3037
+.L2950:
+ adrp x0, .LC146
+ add x0, x0, :lo12:.LC146
bl printk
- add x0, x29, 48
- mov x1, x21
+ add x0, x29, 56
+ mov x1, x20
mov x2, 520
bl rk_copy_from_user
- cbz x0, .L3007
- adrp x0, .LC148
- add x0, x0, :lo12:.LC148
-.L3063:
- bl printk
- b .L3062
-.L3007:
- ldr w1, [x29,48]
+ cbnz x0, .L2988
+ ldr w1, [x29,56]
mov w0, 21060
movk w0, 0x4b4d, lsl 16
cmp w1, w0
- bne .L3005
- ldr w0, [x29,52]
+ bne .L2985
+ ldr w0, [x29,60]
cmp w0, 512
- bhi .L3005
+ bhi .L2985
adrp x1, .LANCHOR4
- mov w0, 5161
+ mov w2, 5161
add x1, x1, :lo12:.LANCHOR4
- movk w0, 0xc059, lsl 16
- ldr w2, [x1,464]
- cmp w2, w0
- bne .L3008
- ldr w2, [x29,60]
+ movk w2, 0xc059, lsl 16
+ mov x0, -2
+ ldr w3, [x1,464]
+ cmp w3, w2
+ bne .L2942
+ ldr w2, [x29,68]
mov x0, -3
sub w3, w2, #1
cmp w3, 127
- bhi .L2970
+ bhi .L2942
ldr x19, [x1,456]
- add x1, x29, 112
+ add x1, x29, 120
add x0, x19, 64
str w2, [x19,12]
- ldr w2, [x29,60]
+ ldr w2, [x29,68]
bl memcpy
mov w0, 1
mov x1, x19
- b .L3061
-.L2982:
- adrp x0, .LC149
- add x0, x0, :lo12:.LC149
+ b .L3038
+.L2954:
+ adrp x0, .LC147
+ add x0, x0, :lo12:.LC147
bl printk
- add x0, x29, 48
- mov x1, x21
+ add x0, x29, 56
+ mov x1, x20
mov x2, 520
bl rk_copy_from_user
- cbnz x0, .L2997
- ldr w1, [x29,48]
+ cbnz x0, .L2988
+ ldr w1, [x29,56]
mov w0, 17476
movk w0, 0x4253, lsl 16
cmp w1, w0
- bne .L3005
- ldr w0, [x29,52]
+ bne .L2985
+ ldr w0, [x29,60]
cmp w0, 512
- bhi .L3005
+ bhi .L2985
adrp x19, .LANCHOR4
add x0, x19, :lo12:.LANCHOR4
ldr w1, [x0,468]
- cbnz w1, .L3009
-.L3012:
+ cbnz w1, .L2989
+.L2992:
mov x0, 0
- b .L2970
-.L3009:
+ b .L2942
+.L2989:
ldr x1, [x0,472]
mov w2, 22867
movk w2, 0x4453, lsl 16
ldr w3, [x1]
cmp w3, w2
- beq .L3010
+ beq .L2990
mov w2, 22867
movk w2, 0x4453, lsl 16
str w2, [x1]
ldr x0, [x0,472]
str wzr, [x0,8]
str wzr, [x0,12]
-.L3010:
+.L2990:
add x20, x19, :lo12:.LANCHOR4
mov w0, 0
ldr x1, [x20,472]
movk w1, 0x4b4d, lsl 16
ldr w2, [x0]
cmp w2, w1
- beq .L3011
+ beq .L2991
mov w1, 21060
movk w1, 0x4b4d, lsl 16
str w1, [x0]
str w1, [x0,4]
ldr x0, [x20,456]
str wzr, [x0,8]
-.L3011:
+.L2991:
add x19, x19, :lo12:.LANCHOR4
mov w1, 0
mov x2, 128
bl StorageSysDataStore
str wzr, [x19,468]
str wzr, [x19,464]
- b .L3060
-.L2973:
- adrp x0, .LC150
- add x0, x0, :lo12:.LC150
+ b .L3037
+.L2945:
+ adrp x0, .LC148
+ add x0, x0, :lo12:.LC148
bl printk
- add x0, x29, 48
- mov x1, x21
+ add x0, x29, 56
+ mov x1, x20
mov x2, 520
bl rk_copy_from_user
- cbnz x0, .L2997
- ldr w2, [x29,48]
+ cbnz x0, .L2988
+ ldr w2, [x29,56]
mov w1, 20037
movk w1, 0x4253, lsl 16
cmp w2, w1
- bne .L3005
- ldr w1, [x29,52]
+ bne .L2985
+ ldr w1, [x29,60]
cmp w1, 512
- bhi .L3005
+ bhi .L2985
adrp x19, .LANCHOR4
add x1, x19, :lo12:.LANCHOR4
ldr w2, [x1,468]
cmp w2, 1
- beq .L3012
+ beq .L2992
ldr x2, [x1,472]
mov w3, 22867
movk w3, 0x4453, lsl 16
ldr w4, [x2]
cmp w4, w3
- beq .L3013
+ beq .L2993
mov w3, 22867
movk w3, 0x4453, lsl 16
str w3, [x2]
ldr x1, [x1,472]
str w0, [x1,8]
str w0, [x1,12]
-.L3013:
+.L2993:
add x20, x19, :lo12:.LANCHOR4
mov w0, 1
ldr x1, [x20,472]
movk w1, 0x4b4d, lsl 16
ldr w2, [x0]
cmp w2, w1
- beq .L3014
+ beq .L2994
mov w1, 21060
movk w1, 0x4b4d, lsl 16
str w1, [x0]
str w1, [x0,4]
ldr x0, [x20,456]
str wzr, [x0,8]
-.L3014:
+.L2994:
add x19, x19, :lo12:.LANCHOR4
mov w1, 0
mov x2, 128
bl StorageSysDataStore
mov w0, 1
str w0, [x19,468]
- b .L3060
-.L2979:
- adrp x0, .LC151
- add x0, x0, :lo12:.LC151
+ b .L3037
+.L2951:
+ adrp x0, .LC149
+ add x0, x0, :lo12:.LC149
bl printk
- add x0, x29, 48
- mov x1, x21
+ add x0, x29, 56
+ mov x1, x20
mov x2, 520
bl rk_copy_from_user
- cbnz x0, .L2997
- ldr w1, [x29,48]
+ cbnz x0, .L2988
+ ldr w1, [x29,56]
mov w0, 20051
movk w0, 0x4144, lsl 16
cmp w1, w0
- bne .L3005
- ldr w2, [x29,52]
+ bne .L2985
+ ldr w2, [x29,60]
cmp w2, 512
- bhi .L3005
+ bhi .L2985
adrp x1, .LANCHOR4
- add x0, x29, 56
+ add x0, x29, 64
add x1, x1, :lo12:.LANCHOR4
uxtw x2, w2
add x1, x1, 480
- b .L3058
-.L2980:
+ b .L3035
+.L2952:
mov w0, 27698
movk w0, 0x4004, lsl 16
cmp w19, w0
- bne .L3015
- adrp x0, .LC152
- add x0, x0, :lo12:.LC152
- b .L3055
-.L3015:
+ bne .L2995
+ adrp x0, .LC150
+ add x0, x0, :lo12:.LC150
+ b .L3036
+.L2995:
mov w0, 27708
movk w0, 0x4004, lsl 16
cmp w19, w0
- bne .L3017
- adrp x0, .LC153
- add x0, x0, :lo12:.LC153
- b .L3055
-.L3017:
- adrp x0, .LC154
- add x0, x0, :lo12:.LC154
-.L3055:
+ bne .L2997
+ adrp x0, .LC151
+ add x0, x0, :lo12:.LC151
+ b .L3036
+.L2997:
+ adrp x0, .LC152
+ add x0, x0, :lo12:.LC152
+.L3036:
bl printk
- add x0, x29, 48
- mov x1, x21
+ add x0, x29, 56
+ mov x1, x20
mov x2, 520
bl rk_copy_from_user
- cbnz x0, .L2997
- ldr w1, [x29,48]
+ cbnz x0, .L2988
+ ldr w1, [x29,56]
mov w0, 17227
movk w0, 0x4c4f, lsl 16
cmp w1, w0
- bne .L3062
+ bne .L3042
mov w0, 27708
movk w0, 0x4004, lsl 16
cmp w19, w0
adrp x0, .LANCHOR4
- bne .L3018
+ bne .L2998
add x0, x0, :lo12:.LANCHOR4
+ add x1, x29, 56
+ mov x2, 16
ldr x0, [x0,456]
ldr w0, [x0,20]
- strb w0, [x29,56]
- str w0, [x29,52]
-#APP
-// 86 "./arch/arm64/include/asm/thread_info.h" 1
- mrs x0, sp_el0
-// 0 "" 2
-#NO_APP
- ldr x1, [x0,8]
- mov x0, x21
-#APP
-// 394 "./arch/arm64/include/asm/uaccess.h" 1
- adds x0, x0, 16; ccmp x0, x1, #2, cc; cset x2, ls
-// 0 "" 2
-#NO_APP
- cbz x2, .L3062
- mov x0, x21
- add x1, x29, 48
- mov x2, 16
- bl __arch_copy_to_user
- cbz x0, .L2970
- b .L3062
-.L3018:
+ str w0, [x29,60]
+ strb w0, [x29,64]
+ mov x0, x20
+ bl rk_copy_to_user
+ cbz x0, .L2942
+ b .L3042
+.L2998:
add x20, x0, :lo12:.LANCHOR4
ldr w1, [x20,992]
cmp w1, 10
- bhi .L3062
+ bhi .L3042
ldr x1, [x20,456]
- ldr w2, [x29,52]
+ ldr w2, [x29,60]
ldr w3, [x1,24]
cmp w3, w2
- beq .L3019
- cbz w3, .L3019
- adrp x0, .LC155
+ beq .L2999
+ cbz w3, .L2999
+ adrp x0, .LC153
mov w1, w2
- add x0, x0, :lo12:.LC155
+ add x0, x0, :lo12:.LC153
bl printk
ldr w0, [x20,992]
add w0, w0, 1
str w0, [x20,992]
-.L3062:
- mov x0, -14
- b .L2970
-.L3019:
+ b .L3042
+.L2999:
add x0, x0, :lo12:.LANCHOR4
str wzr, [x0,992]
mov w0, 27698
movk w0, 0x4004, lsl 16
cmp w19, w0
- bne .L3020
+ bne .L3000
str wzr, [x1,20]
str wzr, [x1,24]
- b .L3021
-.L3020:
+ b .L3001
+.L3000:
mov w0, 1
str w2, [x1,24]
str w0, [x1,20]
-.L3021:
+.L3001:
mov w0, 1
mov x19, -2
bl StorageSysDataStore
cmn w0, #1
- bne .L3060
- b .L2996
-.L2992:
- adrp x0, .LC156
- add x0, x0, :lo12:.LC156
+ bne .L3037
+ b .L2969
+.L2964:
+ adrp x0, .LC154
+ add x0, x0, :lo12:.LC154
bl printk
- add x0, x29, 48
- mov x1, x21
+ add x0, x29, 56
+ mov x1, x20
mov x2, 520
bl rk_copy_from_user
- cbnz x0, .L2997
- ldr w1, [x29,48]
+ cbnz x0, .L2988
+ ldr w1, [x29,56]
mov w0, 17750
movk w0, 0x444e, lsl 16
cmp w1, w0
- bne .L3005
- ldr w2, [x29,52]
+ bne .L2985
+ ldr w2, [x29,60]
cmp w2, 504
- bhi .L3005
+ bhi .L2985
mov w0, 30224
adrp x1, .LANCHOR4
movk w0, 0x4004, lsl 16
uxtw x2, w2
cmp w19, w0
add x1, x1, :lo12:.LANCHOR4
- add x0, x29, 56
- bne .L3022
+ add x0, x29, 64
+ bne .L3002
ldr x1, [x1,1000]
- b .L3056
-.L3022:
+ b .L3045
+.L3002:
ldr x1, [x1,1008]
-.L3056:
+.L3045:
add x1, x1, 8
-.L3058:
+.L3035:
bl memcpy
-#APP
-// 86 "./arch/arm64/include/asm/thread_info.h" 1
- mrs x0, sp_el0
-// 0 "" 2
-#NO_APP
- ldr x1, [x0,8]
- mov x0, x21
-#APP
-// 394 "./arch/arm64/include/asm/uaccess.h" 1
- adds x0, x0, 520; ccmp x0, x1, #2, cc; cset x2, ls
-// 0 "" 2
-#NO_APP
- cbz x2, .L3062
- mov x0, x21
- add x1, x29, 48
- mov x2, 520
- bl __arch_copy_to_user
-.L3053:
- cbnz x0, .L3062
- b .L3060
-.L2989:
- adrp x0, .LC157
- add x0, x0, :lo12:.LC157
+ b .L3034
+.L2961:
+ adrp x0, .LC155
+ add x0, x0, :lo12:.LC155
bl printk
- add x0, x29, 48
- mov x1, x21
+ add x0, x29, 56
+ mov x1, x20
mov x2, 520
bl rk_copy_from_user
- cbnz x0, .L2997
- ldr w1, [x29,48]
+ cbnz x0, .L2988
+ ldr w1, [x29,56]
mov w0, 17750
movk w0, 0x444e, lsl 16
cmp w1, w0
- bne .L3005
- ldr w2, [x29,52]
+ bne .L2985
+ ldr w2, [x29,60]
cmp w2, 504
- bhi .L3005
+ bhi .L2985
mov w0, 30225
add w2, w2, 8
movk w0, 0x4004, lsl 16
cmp w19, w0
adrp x19, .LANCHOR4
add x19, x19, :lo12:.LANCHOR4
- bne .L3024
+ bne .L3004
ldr x0, [x19,1000]
- add x1, x29, 48
+ add x1, x29, 56
bl memcpy
mov w0, 2
ldr x1, [x19,1000]
- b .L3061
-.L3024:
+ b .L3038
+.L3004:
ldr x0, [x19,1008]
- add x1, x29, 48
+ add x1, x29, 56
bl memcpy
ldr x1, [x19,1008]
mov w0, 3
-.L3061:
+.L3038:
bl StorageSysDataStore
uxtw x19, w0
- b .L2996
-.L3060:
+ b .L2969
+.L3037:
mov x19, 0
-.L2996:
- adrp x0, .LC158
+.L2969:
+ adrp x0, .LC156
mov x1, x19
- add x0, x0, :lo12:.LC158
+ add x0, x0, :lo12:.LC156
bl printk
mov x0, x19
- b .L2970
-.L3026:
+ b .L2942
+.L3005:
mov x0, -22
-.L2970:
- ldr x2, [x29,568]
- ldr x1, [x22,#:lo12:__stack_chk_guard]
- cmp x2, x1
- beq .L3025
- bl __stack_chk_fail
-.L3025:
+.L2942:
ldp x19, x20, [sp,16]
- ldp x21, x22, [sp,32]
+ ldr x21, [sp,32]
ldp x29, x30, [sp], 48
add sp, sp, 528
ret
ldr w0, [x21,16]
ldr w22, [x21,508]
str w0, [x19,468]
- cbz w22, .L3065
+ cbz w22, .L3051
mov x0, x21
mov w1, 508
bl JSHash
cmp w22, w0
- beq .L3065
- adrp x0, .LC159
+ beq .L3051
+ adrp x0, .LC157
str wzr, [x21,16]
- add x0, x0, :lo12:.LC159
+ add x0, x0, :lo12:.LC157
str wzr, [x19,468]
bl printk
-.L3065:
+.L3051:
add x0, x20, :lo12:.LANCHOR4
ldr w1, [x0,468]
- cbz w1, .L3066
+ cbz w1, .L3052
mov w1, 5161
movk w1, 0xc059, lsl 16
str w1, [x0,464]
-.L3066:
+.L3052:
add x20, x20, :lo12:.LANCHOR4
mov w0, 2
ldr x1, [x20,1000]
.section .rodata
.align 3
.LANCHOR3 = . + 0
- .type __func__.19127, %object
- .size __func__.19127, 11
-__func__.19127:
+ .type __func__.19115, %object
+ .size __func__.19115, 11
+__func__.19115:
.string "FtlMemInit"
.zero 5
- .type __func__.20003, %object
- .size __func__.20003, 21
-__func__.20003:
+ .type __func__.19991, %object
+ .size __func__.19991, 21
+__func__.19991:
.string "FtlVpcCheckAndModify"
.section .rodata.str1.1,"aMS",%progbits,1
.LC0:
- .string "Context allocation failed\n"
-.LC1:
.string "FlashEraseBlocks pageAddr error %x\n"
-.LC2:
+.LC1:
.string "phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
-.LC3:
+.LC2:
.string "FLASH INFO:\n"
-.LC4:
+.LC3:
.string "FLASH ID: %x\n"
-.LC5:
+.LC4:
.string "Device Capacity: %d MB\n"
-.LC6:
+.LC5:
.string "FMWAIT: %x %x %x %x\n"
-.LC7:
+.LC6:
.string "FTL INFO:\n"
-.LC8:
+.LC7:
.string "g_MaxLpn = 0x%x\n"
-.LC9:
+.LC8:
.string "g_VaildLpn = 0x%x\n"
-.LC10:
+.LC9:
.string "read_page_count = 0x%x\n"
-.LC11:
+.LC10:
.string "discard_page_count = 0x%x\n"
-.LC12:
+.LC11:
.string "write_page_count = 0x%x\n"
-.LC13:
+.LC12:
.string "cache_write_count = 0x%x\n"
-.LC14:
+.LC13:
.string "l2p_write_count = 0x%x\n"
-.LC15:
+.LC14:
.string "gc_page_count = 0x%x\n"
-.LC16:
+.LC15:
.string "totle_write = %d MB\n"
-.LC17:
+.LC16:
.string "totle_read = %d MB\n"
-.LC18:
+.LC17:
.string "GSV = 0x%x\n"
-.LC19:
+.LC18:
.string "GDV = 0x%x\n"
-.LC20:
+.LC19:
.string "bad blk num = %d %d\n"
-.LC21:
+.LC20:
.string "free_superblocks = 0x%x\n"
-.LC22:
+.LC21:
.string "mlc_EC = 0x%x\n"
-.LC23:
+.LC22:
.string "slc_EC = 0x%x\n"
-.LC24:
+.LC23:
.string "avg_EC = 0x%x\n"
-.LC25:
+.LC24:
.string "sys_EC = 0x%x\n"
-.LC26:
+.LC25:
.string "max_EC = 0x%x\n"
-.LC27:
+.LC26:
.string "min_EC = 0x%x\n"
-.LC28:
+.LC27:
.string "PLT = 0x%x\n"
-.LC29:
+.LC28:
.string "POT = 0x%x\n"
-.LC30:
+.LC29:
.string "MaxSector = 0x%x\n"
-.LC31:
+.LC30:
.string "init_sys_blks_pp = 0x%x\n"
-.LC32:
+.LC31:
.string "sys_blks_pp = 0x%x\n"
-.LC33:
+.LC32:
.string "free sysblock = 0x%x\n"
-.LC34:
+.LC33:
.string "data_blks_pp = 0x%x\n"
-.LC35:
+.LC34:
.string "data_op_blks_pp = 0x%x\n"
-.LC36:
+.LC35:
.string "max_data_blks = 0x%x\n"
-.LC37:
+.LC36:
.string "Sys.id = 0x%x\n"
-.LC38:
+.LC37:
.string "Bbt.id = 0x%x\n"
-.LC39:
+.LC38:
.string "ACT.page = 0x%x\n"
-.LC40:
+.LC39:
.string "ACT.plane = 0x%x\n"
-.LC41:
+.LC40:
.string "ACT.id = 0x%x\n"
-.LC42:
+.LC41:
.string "ACT.mode = 0x%x\n"
-.LC43:
+.LC42:
.string "ACT.a_pages = 0x%x\n"
-.LC44:
+.LC43:
.string "ACT VPC = 0x%x\n"
-.LC45:
+.LC44:
.string "BUF.page = 0x%x\n"
-.LC46:
+.LC45:
.string "BUF.plane = 0x%x\n"
-.LC47:
+.LC46:
.string "BUF.id = 0x%x\n"
-.LC48:
+.LC47:
.string "BUF.mode = 0x%x\n"
-.LC49:
+.LC48:
.string "BUF.a_pages = 0x%x\n"
-.LC50:
+.LC49:
.string "BUF VPC = 0x%x\n"
-.LC51:
+.LC50:
.string "TMP.page = 0x%x\n"
-.LC52:
+.LC51:
.string "TMP.plane = 0x%x\n"
-.LC53:
+.LC52:
.string "TMP.id = 0x%x\n"
-.LC54:
+.LC53:
.string "TMP.mode = 0x%x\n"
-.LC55:
+.LC54:
.string "TMP.a_pages = 0x%x\n"
-.LC56:
+.LC55:
.string "GC.page = 0x%x\n"
-.LC57:
+.LC56:
.string "GC.plane = 0x%x\n"
-.LC58:
+.LC57:
.string "GC.id = 0x%x\n"
-.LC59:
+.LC58:
.string "GC.mode = 0x%x\n"
-.LC60:
+.LC59:
.string "GC.a_pages = 0x%x\n"
-.LC61:
+.LC60:
.string "WR_CHK = 0x%x %x %x %x\n"
-.LC62:
+.LC61:
.string "Read Err Cnt = 0x%x\n"
-.LC63:
+.LC62:
.string "Prog Err Cnt = 0x%x\n"
-.LC64:
+.LC63:
.string "gc_free_blk_th= 0x%x\n"
-.LC65:
+.LC64:
.string "gc_merge_free_blk_th= 0x%x\n"
-.LC66:
+.LC65:
.string "gc_skip_write_count= 0x%x\n"
-.LC67:
+.LC66:
.string "gc_blk_index= 0x%x\n"
-.LC68:
+.LC67:
.string "free min EC= 0x%x\n"
-.LC69:
+.LC68:
.string "free max EC= 0x%x\n"
-.LC70:
+.LC69:
.string "GC__SB VPC = 0x%x\n"
-.LC71:
+.LC70:
.string "%d. [0x%x]=0x%x 0x%x 0x%x\n"
-.LC72:
+.LC71:
.string "free %d. [0x%x] 0x%x 0x%x\n"
-.LC73:
+.LC72:
.string "%s\n"
+.LC73:
+ .string "FTL version: 5.0.36 20170512"
.LC74:
- .string "FTL version: 5.0.36 20170316"
-.LC75:
.string "GetSwlReplaceBlock min_ec_id =%x %x\n"
-.LC76:
+.LC75:
.string "swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n"
+.LC76:
+ .string "FtlGcRefreshBlock 0x%x \n"
.LC77:
- .string "FtlGcRefreshBlock 0x%x\n"
-.LC78:
.string "FtlGcMarkBadPhyBlk %d 0x%x\n"
-.LC79:
+.LC78:
.string "%s error allocating memory. return -1\n"
-.LC80:
+.LC79:
.string "%s 0x%x:"
-.LC81:
+.LC80:
.string "%x "
-.LC82:
+.LC81:
.string ""
-.LC83:
+.LC82:
.string "%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\n"
-.LC84:
+.LC83:
.string "nandc:"
-.LC85:
+.LC84:
.string "%d flReg.d32=%x %x\n"
-.LC86:
+.LC85:
.string "sdr read ok %x ecc=%d\n"
-.LC87:
+.LC86:
.string "sync para %d\n"
-.LC88:
+.LC87:
.string "TOG mode Read error %x %x\n"
-.LC89:
+.LC88:
.string "read retry status %x %x %x\n"
-.LC90:
+.LC89:
.string "ECC:%d\n"
-.LC91:
+.LC90:
.string "No.%d FLASH ID:%x %x %x %x %x %x\n"
-.LC92:
+.LC91:
.string "FlashLoadPhyInfo fail %x!!\n"
-.LC93:
+.LC92:
.string "Read pageadd=%x ecc=%x err=%x\n"
-.LC94:
+.LC93:
.string "data:"
-.LC95:
+.LC94:
.string "spare:"
-.LC96:
+.LC95:
.string "ReadRetry pageadd=%x ecc=%x err=%x\n"
-.LC97:
+.LC96:
.string "FLFB:%d %d\n"
-.LC98:
+.LC97:
.string "prog error: = %x\n"
-.LC99:
+.LC98:
.string "prog read error: = %x\n"
-.LC100:
+.LC99:
.string "prog read s error: = %x %x %x\n"
-.LC101:
+.LC100:
.string "prog read d error: = %x %x %x\n"
-.LC102:
+.LC101:
.string "no ect"
-.LC103:
+.LC102:
.string "slc mode"
-.LC104:
+.LC103:
.string "FlashMakeFactorBbt %d\n"
-.LC105:
+.LC104:
.string "bad block:%d %d\n"
-.LC106:
+.LC105:
.string "FMFB:%d %d\n"
-.LC107:
+.LC106:
.string "E:bad block:%d\n"
-.LC108:
+.LC107:
.string "FMFB:Save %d %d\n"
-.LC109:
+.LC108:
.string "FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC110:
+.LC109:
.string "FtlBbmTblFlush error:%x\n"
-.LC111:
+.LC110:
.string "FtlGcFreeBadSuperBlk 0x%x\n"
-.LC112:
+.LC111:
.string "decrement_vpc_count %x = %d\n"
-.LC113:
+.LC112:
.string "spuer block %x vpn is 0\n "
-.LC114:
+.LC113:
.string "...%s enter...\n"
-.LC115:
+.LC114:
.string "FtlCheckVpc %x = %x %x\n"
-.LC116:
+.LC115:
.string "%d GC datablk = %x vpc %x %x\n"
-.LC117:
+.LC116:
.string "SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
-.LC118:
+.LC117:
.string "Ftlwrite decrement_vpc_count %x = %d\n"
-.LC119:
+.LC118:
.string "FtlInit %x\n"
-.LC120:
+.LC119:
.string "FtlWrite: lpa error:%x %x\n"
-.LC121:
+.LC120:
.string "BBT:"
-.LC122:
+.LC121:
.string "IdBlockReadData %x %x\n"
-.LC123:
+.LC122:
.string "IdBlockReadData %x %x ret= %x\n"
-.LC124:
+.LC123:
.string "IDBlockWriteData %x %x\n"
-.LC125:
+.LC124:
.string "IDBlockWriteData %x %x ret= %x\n"
-.LC126:
+.LC125:
.string "idblk:"
-.LC127:
+.LC126:
.string "idb reverse %x %x\n"
-.LC128:
+.LC127:
.string "write_idblock totle_sec %x %x\n"
-.LC129:
+.LC128:
.string "write and check error:%d idb=%x,offset=%x,r=%x,w=%x\n"
-.LC130:
+.LC129:
.string "write"
-.LC131:
+.LC130:
.string "read"
-.LC132:
+.LC131:
.string "write_idblock error\n"
-.LC133:
+.LC132:
.string "READ_SECTOR_IO\n"
-.LC134:
+.LC133:
.string "rk_copy_from_user error\n"
-.LC135:
+.LC134:
.string "READ_SECTOR_IO %x %x\n"
-.LC136:
+.LC135:
.string "rk_copy_to_user error\n"
-.LC137:
+.LC136:
.string "WRITE_SECTOR_IO\n"
-.LC138:
+.LC137:
.string "WRITE_SECTOR_IO %x %x\n"
-.LC139:
+.LC138:
.string "END_WRITE_SECTOR_IO\n"
-.LC140:
+.LC139:
.string "END_WRITE_SECTOR_IO %x %x\n"
-.LC141:
+.LC140:
.string "GET_FLASH_INFO_IO\n"
-.LC142:
+.LC141:
.string "GET_BAD_BLOCK_IO\n"
-.LC143:
+.LC142:
.string "bbt:"
-.LC144:
+.LC143:
.string "GET_LOCK_FLAG_IO\n"
-.LC145:
+.LC144:
.string "GET_PUBLIC_KEY_IO\n"
-.LC146:
+.LC145:
.string "RKNAND_GET_DRM_KEY\n"
-.LC147:
+.LC146:
.string "RKNAND_STORE_DRM_KEY\n"
-.LC148:
- .string "copy_from_user error\n"
-.LC149:
+.LC147:
.string "RKNAND_DIASBLE_SECURE_BOOT\n"
-.LC150:
+.LC148:
.string "RKNAND_ENASBLE_SECURE_BOOT\n"
-.LC151:
+.LC149:
.string "RKNAND_GET_SN_SECTOR\n"
-.LC152:
+.LC150:
.string "RKNAND_LOADER_UNLOCK\n"
-.LC153:
+.LC151:
.string "RKNAND_LOADER_STATUS\n"
-.LC154:
+.LC152:
.string "RKNAND_LOADER_LOCK\n"
-.LC155:
+.LC153:
.string "LockKey not match %d\n"
-.LC156:
+.LC154:
.string "RKNAND_GET_VENDOR_SECTOR\n"
-.LC157:
+.LC155:
.string "RKNAND_STORE_VENDOR_SECTOR\n"
-.LC158:
+.LC156:
.string "return ret = %lx\n"
-.LC159:
+.LC157:
.string "secureBootEn check error\n"
-.LC160:
+.LC158:
.string "rknand_sys_storage"
.data
.align 3
rknand_sys_storage_dev:
.word 255
.zero 4
- .xword .LC160
+ .xword .LC158
.xword rknand_sys_storage_fops
.zero 56
.type rknand_sys_storage_fops, %object
projects / firefly-linux-kernel-4.4.55.git / commitdiff