MIPS: BCM47XX: Make ssb init NVRAM instead of bcm47xx polling it
authorRafał Miłecki <zajec5@gmail.com>
Wed, 3 Sep 2014 20:59:45 +0000 (22:59 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 24 Nov 2014 06:44:59 +0000 (07:44 +0100)
This makes NVRAM code less bcm47xx/ssb specific allowing it to become a
standalone driver in the future. A similar patch for bcma will follow
when it's ready.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7612/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/bcm47xx/nvram.c
arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h
drivers/ssb/driver_mipscore.c

index e07976bbb7396a69d75fa51eb516e9f584cd3ce7..fecc5aeddd46a1b7866d75a0d8d58a78acf8a024 100644 (file)
@@ -98,7 +98,14 @@ found:
        return 0;
 }
 
-static int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
+/*
+ * On bcm47xx we need access to the NVRAM very early, so we can't use mtd
+ * subsystem to access flash. We can't even use platform device / driver to
+ * store memory offset.
+ * To handle this we provide following symbol. It's supposed to be called as
+ * soon as we get info about flash device, before any NVRAM entry is needed.
+ */
+int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
 {
        void __iomem *iobase;
        int err;
@@ -114,25 +121,6 @@ static int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
        return err;
 }
 
-#ifdef CONFIG_BCM47XX_SSB
-static int nvram_init_ssb(void)
-{
-       struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
-       u32 base;
-       u32 lim;
-
-       if (mcore->pflash.present) {
-               base = mcore->pflash.window;
-               lim = mcore->pflash.window_size;
-       } else {
-               pr_err("Couldn't find supported flash memory\n");
-               return -ENXIO;
-       }
-
-       return bcm47xx_nvram_init_from_mem(base, lim);
-}
-#endif
-
 #ifdef CONFIG_BCM47XX_BCMA
 static int nvram_init_bcma(void)
 {
@@ -168,7 +156,7 @@ static int nvram_init(void)
        switch (bcm47xx_bus_type) {
 #ifdef CONFIG_BCM47XX_SSB
        case BCM47XX_BUS_TYPE_SSB:
-               return nvram_init_ssb();
+               break;
 #endif
 #ifdef CONFIG_BCM47XX_BCMA
        case BCM47XX_BUS_TYPE_BCMA:
index 36a3fc1aa3ae326def39379e03db8258c24d82d3..676be22bcab3a1b3c900990ab35f80a2b8f893a2 100644 (file)
@@ -32,6 +32,7 @@ struct nvram_header {
 #define NVRAM_MAX_VALUE_LEN 255
 #define NVRAM_MAX_PARAM_LEN 64
 
+int bcm47xx_nvram_init_from_mem(u32 base, u32 lim);
 extern int bcm47xx_nvram_getenv(char *name, char *val, size_t val_len);
 
 static inline void bcm47xx_nvram_parse_macaddr(char *buf, u8 macaddr[6])
index 09077067b0c858d5e13ab74819c9985b1429c0ca..7b986f9f213fe2efead3ea2e4a0fdec900c2e9f3 100644 (file)
@@ -15,6 +15,9 @@
 #include <linux/serial_core.h>
 #include <linux/serial_reg.h>
 #include <linux/time.h>
+#ifdef CONFIG_BCM47XX
+#include <bcm47xx_nvram.h>
+#endif
 
 #include "ssb_private.h"
 
@@ -210,6 +213,7 @@ static void ssb_mips_serial_init(struct ssb_mipscore *mcore)
 static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
 {
        struct ssb_bus *bus = mcore->dev->bus;
+       struct ssb_sflash *sflash = &mcore->sflash;
        struct ssb_pflash *pflash = &mcore->pflash;
 
        /* When there is no chipcommon on the bus there is 4MB flash */
@@ -242,7 +246,15 @@ static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
        }
 
 ssb_pflash:
-       if (pflash->present) {
+       if (sflash->present) {
+#ifdef CONFIG_BCM47XX
+               bcm47xx_nvram_init_from_mem(sflash->window, sflash->size);
+#endif
+       } else if (pflash->present) {
+#ifdef CONFIG_BCM47XX
+               bcm47xx_nvram_init_from_mem(pflash->window, pflash->window_size);
+#endif
+
                ssb_pflash_data.width = pflash->buswidth;
                ssb_pflash_resource.start = pflash->window;
                ssb_pflash_resource.end = pflash->window + pflash->window_size;