add cs select for dm9000 and move io set function to board-XXXX.c file
authorlyx <lyx@rock-chips.com>
Sat, 7 Aug 2010 08:20:35 +0000 (01:20 -0700)
committerlyx <lyx@rock-chips.com>
Sat, 7 Aug 2010 08:20:35 +0000 (01:20 -0700)
arch/arm/mach-rk2818/board-midsdk.c
arch/arm/mach-rk2818/board-phonesdk.c
arch/arm/mach-rk2818/board-raho.c
arch/arm/mach-rk2818/devices.c
arch/arm/mach-rk2818/devices.h
drivers/net/Kconfig
drivers/net/dm9000.c
include/linux/dm9000.h

index 7d42cd4fb0d755accf1d214fbe41ccd4b8f0a0c3..527c226a2b8769a44473c16844497874719f0021 100644 (file)
@@ -37,6 +37,7 @@
 
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/dm9000.h>
 
 #include "devices.h"
 
@@ -442,11 +443,114 @@ struct rk2818bl_info rk2818_bl_info = {
         .pw_iomux = GPIOA23_UART2_SEL_NAME,
 };
 
-static struct platform_device *devices[] __initdata = {
-       &rk2818_device_uart1,
 #ifdef CONFIG_DM9000
-       &rk2818_device_dm9k,
+#define NET_INT_PIN RK2818_PIN_PE2
+/*dm9000 gpio set*/
+int dm9k_gpio_set(void)
+{
+       //cs
+#ifdef CONFIG_DM9000_CHIP_SELECT
+               switch (CONFIG_DM9000_CHIP_SELECT) {
+               case 1:
+                       rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
+                       break;
+               case 2:
+                       rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2);
+                       break;
+               case 3:
+                       rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3);
+                       break;
+               case 4:
+               case 5:
+                       rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45);      
+                       break;
+               case 6:
+               case 7:
+                       rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67);  
+                       break;
+               default:
+                       break;
+               }
 #endif
+
+       //int
+       rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_GPIO1_A12);       
+       if (gpio_request(NET_INT_PIN, "dm9000 interrupt")) {
+               gpio_free(NET_INT_PIN);
+               rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
+               printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
+               goto err;
+               return -1;
+       }       
+       gpio_pull_updown(NET_INT_PIN, GPIOPullDown);
+       gpio_direction_input(NET_INT_PIN);
+       return 0;
+err:
+       
+#ifdef CONFIG_DM9000_CHIP_SELECT
+               switch (CONFIG_DM9000_CHIP_SELECT) {
+               case 1:
+                       rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+                       break;
+               case 2:
+                       rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+                       break;
+               case 3:
+                       rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+                       break;
+               case 4:
+               case 5:
+                       rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME); 
+                       break;
+               case 6:
+               case 7:
+                       rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);  
+                       break;
+               default:
+                       break;
+               }
+#endif
+       return -1;
+}
+void dm9k_gpio_free(void)
+{
+       gpio_free(NET_INT_PIN);
+       rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
+#ifdef CONFIG_DM9000_CHIP_SELECT
+               switch (CONFIG_DM9000_CHIP_SELECT) {
+               case 1:
+                       rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+                       break;
+               case 2:
+                       rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+                       break;
+               case 3:
+                       rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+                       break;
+               case 4:
+               case 5:
+                       rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME); 
+                       break;
+               case 6:
+               case 7:
+                       rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);  
+                       break;
+               default:
+                       break;
+               }
+#endif
+}
+
+struct dm9000_plat_data dm9k_platdata = {
+       .flags = DM9000_PLATF_8BITONLY,
+       .pin_int = NET_INT_PIN,
+       .net_gpio_set = dm9k_gpio_set,
+       .net_gpio_free = dm9k_gpio_free,
+};
+#endif
+
+static struct platform_device *devices[] __initdata = {
+       &rk2818_device_uart1,
 #ifdef CONFIG_I2C0_RK2818
        &rk2818_device_i2c0,
 #endif
@@ -474,6 +578,10 @@ static struct platform_device *devices[] __initdata = {
 #ifdef CONFIG_MTD_NAND_RK2818
        &rk2818_nand_device,
 #endif
+#ifdef CONFIG_DM9000
+       &rk2818_device_dm9k,
+#endif
+
 #ifdef CONFIG_DWC_OTG
        &rk2818_device_dwc_otg,
 #endif
index 707cd3ce0da140f55b02435915e5662c1d062c02..01be1f09d66da19808e720498a627e4ae8b20e0d 100755 (executable)
@@ -37,6 +37,7 @@
 
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/dm9000.h>
 
 #include "devices.h"
 
@@ -448,11 +449,113 @@ struct rk2818bl_info rk2818_bl_info = {
         .pw_iomux = GPIOF34_UART3_SEL_NAME,
 };
 
-static struct platform_device *devices[] __initdata = {
-       &rk2818_device_uart1,
 #ifdef CONFIG_DM9000
-       &rk2818_device_dm9k,
+#define NET_INT_PIN RK2818_PIN_PA1
+/*dm9000 gpio set*/
+int dm9k_gpio_set(void)
+{
+       //cs
+#ifdef CONFIG_DM9000_CHIP_SELECT
+               switch (CONFIG_DM9000_CHIP_SELECT) {
+               case 1:
+                       rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
+                       break;
+               case 2:
+                       rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2);
+                       break;
+               case 3:
+                       rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3);
+                       break;
+               case 4:
+               case 5:
+                       rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45);      
+                       break;
+               case 6:
+               case 7:
+                       rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67);  
+                       break;
+               default:
+                       break;
+               }
 #endif
+
+       //int
+       rk2818_mux_api_set(GPIOA1_HOSTDATA17_SEL_NAME, IOMUXB_GPIO0_A1);
+       if (gpio_request(NET_INT_PIN, "dm9000 interrupt")) {
+               gpio_free(NET_INT_PIN);
+               rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);         
+               printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
+               goto err;
+       }       
+       gpio_pull_updown(NET_INT_PIN, GPIOPullDown);
+       gpio_direction_input(NET_INT_PIN);
+       return 0;
+
+err:           
+#ifdef CONFIG_DM9000_CHIP_SELECT
+       switch (CONFIG_DM9000_CHIP_SELECT) {
+       case 1:
+               rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+               break;
+       case 2:
+               rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+               break;
+       case 3:
+               rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+               break;
+       case 4:
+       case 5:
+               rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME); 
+               break;
+       case 6:
+       case 7:
+               rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);  
+               break;
+       default:
+               break;
+       }
+#endif
+       return -1;
+}
+void dm9k_gpio_free(void)
+{
+       gpio_free(NET_INT_PIN);
+       rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
+#ifdef CONFIG_DM9000_CHIP_SELECT
+               switch (CONFIG_DM9000_CHIP_SELECT) {
+               case 1:
+                       rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+                       break;
+               case 2:
+                       rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+                       break;
+               case 3:
+                       rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+                       break;
+               case 4:
+               case 5:
+                       rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME); 
+                       break;
+               case 6:
+               case 7:
+                       rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);  
+                       break;
+               default:
+                       break;
+               }
+#endif 
+}
+
+struct dm9000_plat_data dm9k_platdata = {      
+       .flags = DM9000_PLATF_8BITONLY,
+       .pin_int = NET_INT_PIN,
+       .net_gpio_set = dm9k_gpio_set,
+       .net_gpio_free = dm9k_gpio_free,
+};
+#endif
+
+static struct platform_device *devices[] __initdata = {
+       &rk2818_device_uart1,
 #ifdef CONFIG_I2C0_RK2818
        &rk2818_device_i2c0,
 #endif
@@ -480,6 +583,10 @@ static struct platform_device *devices[] __initdata = {
 #ifdef CONFIG_MTD_NAND_RK2818
        &rk2818_nand_device,
 #endif
+#ifdef CONFIG_DM9000
+       &rk2818_device_dm9k,
+#endif
+
 #ifdef CONFIG_DWC_OTG
        &rk2818_device_dwc_otg,
 #endif
index 8e186e8dd1ce4233aad73c8ed293d6c59dea370d..fc4b4281815aec446c999e1b3eea8bf89b8e6574 100755 (executable)
@@ -41,6 +41,7 @@
 
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/dm9000.h>
 
 #include <media/soc_camera.h>                               /* ddl@rock-chips.com : camera support */
 
@@ -615,11 +616,113 @@ struct rk2818bl_info rk2818_bl_info = {
         .pw_iomux = GPIOF34_UART3_SEL_NAME,
 };
 
-static struct platform_device *devices[] __initdata = {
-       &rk2818_device_uart1,
 #ifdef CONFIG_DM9000
-       &rk2818_device_dm9k,
+#define NET_INT_PIN RK2818_PIN_PA1
+/*dm9000 gpio set*/
+int dm9k_gpio_set(void)
+{
+       //cs
+#ifdef CONFIG_DM9000_CHIP_SELECT
+       switch (CONFIG_DM9000_CHIP_SELECT) {
+       case 1:
+               rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
+               break;
+       case 2:
+               rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2);
+               break;
+       case 3:
+               rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3);
+               break;
+       case 4:
+       case 5:
+               rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45);      
+               break;
+       case 6:
+       case 7:
+               rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67);  
+               break;
+       default:
+               break;
+       }
+#endif
+
+       //int
+       rk2818_mux_api_set(GPIOA1_HOSTDATA17_SEL_NAME, IOMUXB_GPIO0_A1);
+       if (gpio_request(NET_INT_PIN, "dm9000 interrupt")) {
+               gpio_free(NET_INT_PIN);         
+               rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
+               printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
+               goto err;
+       }       
+       gpio_pull_updown(NET_INT_PIN, GPIOPullDown);
+       gpio_direction_input(NET_INT_PIN);
+       return 0;
+err:
+       
+#ifdef CONFIG_DM9000_CHIP_SELECT
+       switch (CONFIG_DM9000_CHIP_SELECT) {
+       case 1:
+               rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+               break;
+       case 2:
+               rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+               break;
+       case 3:
+               rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+               break;
+       case 4:
+       case 5:
+               rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME); 
+               break;
+       case 6:
+       case 7:
+               rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);  
+               break;
+       default:
+               break;
+       }
+#endif
+       return -1;
+}
+void dm9k_gpio_free(void)
+{
+       gpio_free(NET_INT_PIN);
+       rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
+#ifdef CONFIG_DM9000_CHIP_SELECT
+       switch (CONFIG_DM9000_CHIP_SELECT) {
+       case 1:
+               rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+               break;
+       case 2:
+               rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+               break;
+       case 3:
+               rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+               break;
+       case 4:
+       case 5:
+               rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME); 
+               break;
+       case 6:
+       case 7:
+               rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);  
+               break;
+       default:
+               break;
+       }
+#endif
+}
+
+struct dm9000_plat_data dm9k_platdata = {      
+       .flags = DM9000_PLATF_8BITONLY,
+       .pin_int = NET_INT_PIN,
+       .net_gpio_set = dm9k_gpio_set,
+       .net_gpio_free = dm9k_gpio_free,
+};
 #endif
+
+static struct platform_device *devices[] __initdata = {
+       &rk2818_device_uart1,
 #ifdef CONFIG_I2C0_RK2818
        &rk2818_device_i2c0,
 #endif
@@ -653,6 +756,10 @@ static struct platform_device *devices[] __initdata = {
 #ifdef CONFIG_MTD_NAND_RK2818
        &rk2818_nand_device,
 #endif
+#ifdef CONFIG_DM9000
+       &rk2818_device_dm9k,
+#endif
+
 #ifdef CONFIG_DWC_OTG
        &rk2818_device_dwc_otg,
 #endif
index 60719ac16928af999ee885e9551e6bde6d3a5ca0..3e76ca5c11f10879b15963dc97044133f6631226 100755 (executable)
@@ -325,40 +325,32 @@ struct platform_device rk2818_soc_camera_pdrv = {
 //net device
 /* DM9000 */
 #ifdef CONFIG_DM9000
+#ifdef CONFIG_DM9000_CHIP_SELECT
+#define DM9000_CS CONFIG_DM9000_CHIP_SELECT
+#else
+#define DM9000_CS 1
+#endif
 static struct resource dm9k_resource[] = {
        [0] = {
-               .start = RK2818_NANDC_PHYS + 0x800 + (1*0x100 + 0x8),    //nand_cs1+nand_cmd
-               .end   = RK2818_NANDC_PHYS + 0x800 + (1*0x100 + 0x8) + 3,
+               .start = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x8),    //nand_cs1+nand_cmd
+               .end   = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x8) + 3,
                .flags = IORESOURCE_MEM,
        },
        [1] = {
-               .start = RK2818_NANDC_PHYS + 0x800 + (1*0x100 + 0x4),   //nand_cs1+nand_data
-               .end   = RK2818_NANDC_PHYS + 0x800 + (1*0x100 + 0x4) + 3,
+               .start = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x4),   //nand_cs1+nand_data
+               .end   = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x4) + 3,
                .flags = IORESOURCE_MEM,
        },
-       #ifdef CONFIG_MACH_RK2818MID
-       [2] = {
-               .start = RK2818_PIN_PE2,        //use pe2 as interrupt
-               .end   = RK2818_PIN_PE2,
-               .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-       }
-       #else   
        [2] = {
-               .start = RK2818_PIN_PA1,        //use pa1 as interrupt
-               .end   = RK2818_PIN_PA1,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
        }
-       #endif
-
 };
 
 /* for the moment we limit ourselves to 8bit IO until some
  * better IO routines can be written and tested
 */
 
-static struct dm9000_plat_data dm9k_platdata = {
-       .flags          = DM9000_PLATF_8BITONLY,
-};
+//dm9k_platdata.flags = DM9000_PLATF_8BITONLY;
 
 struct platform_device rk2818_device_dm9k = {
        .name           = "dm9000",
index 776170c0add2c5d4602617f3c6aa7753aeaa35e6..85cc7dc5833aba5f0c88ea922b9494b37fab174a 100755 (executable)
@@ -38,6 +38,7 @@ extern struct platform_device rk2818_device_sdmmc1;
 extern struct rk2818_sdmmc_platform_data default_sdmmc0_data;
 extern struct rk2818_sdmmc_platform_data default_sdmmc1_data;
 extern struct platform_device rk2818_device_dm9k;
+extern struct dm9000_plat_data dm9k_platdata;
 extern struct platform_device rk2818_device_i2s;
 extern struct platform_device rk2818_device_pmem;
 extern struct platform_device rk2818_device_pmem_dsp;
index 41a3405c6fe39de850b62605ab81e3eca9b5714d..2ccf896d55a7ccf633278dbd3d6533bda90fb53d 100644 (file)
@@ -957,6 +957,14 @@ choice
                tristate  "DM9000 with NOR Interface"
 endchoice
 endif
+
+config DM9000_CHIP_SELECT
+       int "the number of nandc chip select for DM9000"
+       depends on DM9000_USE_NAND_CONTROL
+       default 1
+       help
+         select the cs for dm9000
+
          
 config DM9000_FORCE_SIMPLE_PHY_POLL
        bool "Force simple NSR based PHY polling"
index 509493d3c41db4e1aaf5323c52bca28d535bc7b4..5247ac01581bdda705f3e146177d4915f38cb020 100755 (executable)
@@ -1515,6 +1515,9 @@ dm9000_probe(struct platform_device *pdev)
        /* fill in parameters for net-dev structure */
        ndev->base_addr = (unsigned long)db->io_addr;
 
+#if 0
+       rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
+
        #ifdef CONFIG_MACH_RK2818MID
        rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_GPIO1_A12);       
        ndev->irq = gpio_to_irq(db->irq_res->start);
@@ -1529,7 +1532,17 @@ dm9000_probe(struct platform_device *pdev)
        gpio_pull_updown(db->irq_res->start, GPIOPullDown);
        ndev->irq = gpio_to_irq(db->irq_res->start);
        #endif
-       
+#endif 
+
+       if (pdata->net_gpio_set) {
+               if (pdata->net_gpio_set()) {
+                       ret = -EINVAL;
+                       goto out;
+               }
+       }
+
+       ndev->irq = gpio_to_irq(pdata->pin_int);
+
        /* ensure at least we have a default set of IO routines */
        dm9000_set_io(db, iosize);
 
index c30879cf93bc7f522f25579d3e7fbbc59ae60e00..15ace65f982b27ae9cf89450ac4f426a83f30552 100644 (file)
@@ -29,6 +29,12 @@ struct dm9000_plat_data {
        unsigned int    flags;
        unsigned char   dev_addr[6];
 
+       unsigned int pin_int;
+       //gpio init&deinit      
+    int (*net_gpio_set)(void);
+    void (*net_gpio_free)(void);
+       
+
        /* allow replacement IO routines */
 
        void    (*inblk)(void __iomem *reg, void *data, int len);