#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
+#include <linux/dm9000.h>
#include "devices.h"
.pw_iomux = GPIOA23_UART2_SEL_NAME,
};
-static struct platform_device *devices[] __initdata = {
- &rk2818_device_uart1,
#ifdef CONFIG_DM9000
- &rk2818_device_dm9k,
+#define NET_INT_PIN RK2818_PIN_PE2
+/*dm9000 gpio set*/
+int dm9k_gpio_set(void)
+{
+ //cs
+#ifdef CONFIG_DM9000_CHIP_SELECT
+ switch (CONFIG_DM9000_CHIP_SELECT) {
+ case 1:
+ rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
+ break;
+ case 2:
+ rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2);
+ break;
+ case 3:
+ rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3);
+ break;
+ case 4:
+ case 5:
+ rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45);
+ break;
+ case 6:
+ case 7:
+ rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67);
+ break;
+ default:
+ break;
+ }
#endif
+
+ //int
+ rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_GPIO1_A12);
+ if (gpio_request(NET_INT_PIN, "dm9000 interrupt")) {
+ gpio_free(NET_INT_PIN);
+ rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
+ printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
+ goto err;
+ return -1;
+ }
+ gpio_pull_updown(NET_INT_PIN, GPIOPullDown);
+ gpio_direction_input(NET_INT_PIN);
+ return 0;
+err:
+
+#ifdef CONFIG_DM9000_CHIP_SELECT
+ switch (CONFIG_DM9000_CHIP_SELECT) {
+ case 1:
+ rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+ break;
+ case 2:
+ rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+ break;
+ case 3:
+ rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+ break;
+ case 4:
+ case 5:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
+ break;
+ case 6:
+ case 7:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
+ break;
+ default:
+ break;
+ }
+#endif
+ return -1;
+}
+void dm9k_gpio_free(void)
+{
+ gpio_free(NET_INT_PIN);
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
+#ifdef CONFIG_DM9000_CHIP_SELECT
+ switch (CONFIG_DM9000_CHIP_SELECT) {
+ case 1:
+ rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+ break;
+ case 2:
+ rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+ break;
+ case 3:
+ rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+ break;
+ case 4:
+ case 5:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
+ break;
+ case 6:
+ case 7:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
+ break;
+ default:
+ break;
+ }
+#endif
+}
+
+struct dm9000_plat_data dm9k_platdata = {
+ .flags = DM9000_PLATF_8BITONLY,
+ .pin_int = NET_INT_PIN,
+ .net_gpio_set = dm9k_gpio_set,
+ .net_gpio_free = dm9k_gpio_free,
+};
+#endif
+
+static struct platform_device *devices[] __initdata = {
+ &rk2818_device_uart1,
#ifdef CONFIG_I2C0_RK2818
&rk2818_device_i2c0,
#endif
#ifdef CONFIG_MTD_NAND_RK2818
&rk2818_nand_device,
#endif
+#ifdef CONFIG_DM9000
+ &rk2818_device_dm9k,
+#endif
+
#ifdef CONFIG_DWC_OTG
&rk2818_device_dwc_otg,
#endif
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
+#include <linux/dm9000.h>
#include "devices.h"
.pw_iomux = GPIOF34_UART3_SEL_NAME,
};
-static struct platform_device *devices[] __initdata = {
- &rk2818_device_uart1,
#ifdef CONFIG_DM9000
- &rk2818_device_dm9k,
+#define NET_INT_PIN RK2818_PIN_PA1
+/*dm9000 gpio set*/
+int dm9k_gpio_set(void)
+{
+ //cs
+#ifdef CONFIG_DM9000_CHIP_SELECT
+ switch (CONFIG_DM9000_CHIP_SELECT) {
+ case 1:
+ rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
+ break;
+ case 2:
+ rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2);
+ break;
+ case 3:
+ rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3);
+ break;
+ case 4:
+ case 5:
+ rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45);
+ break;
+ case 6:
+ case 7:
+ rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67);
+ break;
+ default:
+ break;
+ }
#endif
+
+ //int
+ rk2818_mux_api_set(GPIOA1_HOSTDATA17_SEL_NAME, IOMUXB_GPIO0_A1);
+ if (gpio_request(NET_INT_PIN, "dm9000 interrupt")) {
+ gpio_free(NET_INT_PIN);
+ rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
+ printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
+ goto err;
+ }
+ gpio_pull_updown(NET_INT_PIN, GPIOPullDown);
+ gpio_direction_input(NET_INT_PIN);
+ return 0;
+
+err:
+#ifdef CONFIG_DM9000_CHIP_SELECT
+ switch (CONFIG_DM9000_CHIP_SELECT) {
+ case 1:
+ rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+ break;
+ case 2:
+ rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+ break;
+ case 3:
+ rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+ break;
+ case 4:
+ case 5:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
+ break;
+ case 6:
+ case 7:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
+ break;
+ default:
+ break;
+ }
+#endif
+ return -1;
+}
+void dm9k_gpio_free(void)
+{
+ gpio_free(NET_INT_PIN);
+ rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
+#ifdef CONFIG_DM9000_CHIP_SELECT
+ switch (CONFIG_DM9000_CHIP_SELECT) {
+ case 1:
+ rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+ break;
+ case 2:
+ rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+ break;
+ case 3:
+ rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+ break;
+ case 4:
+ case 5:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
+ break;
+ case 6:
+ case 7:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
+ break;
+ default:
+ break;
+ }
+#endif
+}
+
+struct dm9000_plat_data dm9k_platdata = {
+ .flags = DM9000_PLATF_8BITONLY,
+ .pin_int = NET_INT_PIN,
+ .net_gpio_set = dm9k_gpio_set,
+ .net_gpio_free = dm9k_gpio_free,
+};
+#endif
+
+static struct platform_device *devices[] __initdata = {
+ &rk2818_device_uart1,
#ifdef CONFIG_I2C0_RK2818
&rk2818_device_i2c0,
#endif
#ifdef CONFIG_MTD_NAND_RK2818
&rk2818_nand_device,
#endif
+#ifdef CONFIG_DM9000
+ &rk2818_device_dm9k,
+#endif
+
#ifdef CONFIG_DWC_OTG
&rk2818_device_dwc_otg,
#endif
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
+#include <linux/dm9000.h>
#include <media/soc_camera.h> /* ddl@rock-chips.com : camera support */
.pw_iomux = GPIOF34_UART3_SEL_NAME,
};
-static struct platform_device *devices[] __initdata = {
- &rk2818_device_uart1,
#ifdef CONFIG_DM9000
- &rk2818_device_dm9k,
+#define NET_INT_PIN RK2818_PIN_PA1
+/*dm9000 gpio set*/
+int dm9k_gpio_set(void)
+{
+ //cs
+#ifdef CONFIG_DM9000_CHIP_SELECT
+ switch (CONFIG_DM9000_CHIP_SELECT) {
+ case 1:
+ rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
+ break;
+ case 2:
+ rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2);
+ break;
+ case 3:
+ rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3);
+ break;
+ case 4:
+ case 5:
+ rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45);
+ break;
+ case 6:
+ case 7:
+ rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67);
+ break;
+ default:
+ break;
+ }
+#endif
+
+ //int
+ rk2818_mux_api_set(GPIOA1_HOSTDATA17_SEL_NAME, IOMUXB_GPIO0_A1);
+ if (gpio_request(NET_INT_PIN, "dm9000 interrupt")) {
+ gpio_free(NET_INT_PIN);
+ rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
+ printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
+ goto err;
+ }
+ gpio_pull_updown(NET_INT_PIN, GPIOPullDown);
+ gpio_direction_input(NET_INT_PIN);
+ return 0;
+err:
+
+#ifdef CONFIG_DM9000_CHIP_SELECT
+ switch (CONFIG_DM9000_CHIP_SELECT) {
+ case 1:
+ rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+ break;
+ case 2:
+ rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+ break;
+ case 3:
+ rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+ break;
+ case 4:
+ case 5:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
+ break;
+ case 6:
+ case 7:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
+ break;
+ default:
+ break;
+ }
+#endif
+ return -1;
+}
+void dm9k_gpio_free(void)
+{
+ gpio_free(NET_INT_PIN);
+ rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
+#ifdef CONFIG_DM9000_CHIP_SELECT
+ switch (CONFIG_DM9000_CHIP_SELECT) {
+ case 1:
+ rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
+ break;
+ case 2:
+ rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
+ break;
+ case 3:
+ rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
+ break;
+ case 4:
+ case 5:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
+ break;
+ case 6:
+ case 7:
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
+ break;
+ default:
+ break;
+ }
+#endif
+}
+
+struct dm9000_plat_data dm9k_platdata = {
+ .flags = DM9000_PLATF_8BITONLY,
+ .pin_int = NET_INT_PIN,
+ .net_gpio_set = dm9k_gpio_set,
+ .net_gpio_free = dm9k_gpio_free,
+};
#endif
+
+static struct platform_device *devices[] __initdata = {
+ &rk2818_device_uart1,
#ifdef CONFIG_I2C0_RK2818
&rk2818_device_i2c0,
#endif
#ifdef CONFIG_MTD_NAND_RK2818
&rk2818_nand_device,
#endif
+#ifdef CONFIG_DM9000
+ &rk2818_device_dm9k,
+#endif
+
#ifdef CONFIG_DWC_OTG
&rk2818_device_dwc_otg,
#endif
//net device
/* DM9000 */
#ifdef CONFIG_DM9000
+#ifdef CONFIG_DM9000_CHIP_SELECT
+#define DM9000_CS CONFIG_DM9000_CHIP_SELECT
+#else
+#define DM9000_CS 1
+#endif
static struct resource dm9k_resource[] = {
[0] = {
- .start = RK2818_NANDC_PHYS + 0x800 + (1*0x100 + 0x8), //nand_cs1+nand_cmd
- .end = RK2818_NANDC_PHYS + 0x800 + (1*0x100 + 0x8) + 3,
+ .start = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x8), //nand_cs1+nand_cmd
+ .end = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x8) + 3,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = RK2818_NANDC_PHYS + 0x800 + (1*0x100 + 0x4), //nand_cs1+nand_data
- .end = RK2818_NANDC_PHYS + 0x800 + (1*0x100 + 0x4) + 3,
+ .start = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x4), //nand_cs1+nand_data
+ .end = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x4) + 3,
.flags = IORESOURCE_MEM,
},
- #ifdef CONFIG_MACH_RK2818MID
- [2] = {
- .start = RK2818_PIN_PE2, //use pe2 as interrupt
- .end = RK2818_PIN_PE2,
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
- }
- #else
[2] = {
- .start = RK2818_PIN_PA1, //use pa1 as interrupt
- .end = RK2818_PIN_PA1,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
}
- #endif
-
};
/* for the moment we limit ourselves to 8bit IO until some
* better IO routines can be written and tested
*/
-static struct dm9000_plat_data dm9k_platdata = {
- .flags = DM9000_PLATF_8BITONLY,
-};
+//dm9k_platdata.flags = DM9000_PLATF_8BITONLY;
struct platform_device rk2818_device_dm9k = {
.name = "dm9000",
extern struct rk2818_sdmmc_platform_data default_sdmmc0_data;
extern struct rk2818_sdmmc_platform_data default_sdmmc1_data;
extern struct platform_device rk2818_device_dm9k;
+extern struct dm9000_plat_data dm9k_platdata;
extern struct platform_device rk2818_device_i2s;
extern struct platform_device rk2818_device_pmem;
extern struct platform_device rk2818_device_pmem_dsp;
tristate "DM9000 with NOR Interface"
endchoice
endif
+
+config DM9000_CHIP_SELECT
+ int "the number of nandc chip select for DM9000"
+ depends on DM9000_USE_NAND_CONTROL
+ default 1
+ help
+ select the cs for dm9000
+
config DM9000_FORCE_SIMPLE_PHY_POLL
bool "Force simple NSR based PHY polling"
/* fill in parameters for net-dev structure */
ndev->base_addr = (unsigned long)db->io_addr;
+#if 0
+ rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
+
#ifdef CONFIG_MACH_RK2818MID
rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_GPIO1_A12);
ndev->irq = gpio_to_irq(db->irq_res->start);
gpio_pull_updown(db->irq_res->start, GPIOPullDown);
ndev->irq = gpio_to_irq(db->irq_res->start);
#endif
-
+#endif
+
+ if (pdata->net_gpio_set) {
+ if (pdata->net_gpio_set()) {
+ ret = -EINVAL;
+ goto out;
+ }
+ }
+
+ ndev->irq = gpio_to_irq(pdata->pin_int);
+
/* ensure at least we have a default set of IO routines */
dm9000_set_io(db, iosize);
unsigned int flags;
unsigned char dev_addr[6];
+ unsigned int pin_int;
+ //gpio init&deinit
+ int (*net_gpio_set)(void);
+ void (*net_gpio_free)(void);
+
+
/* allow replacement IO routines */
void (*inblk)(void __iomem *reg, void *data, int len);