mfd: prcmu: delete pin control helpers
authorLinus Walleij <linus.walleij@linaro.org>
Mon, 7 Jan 2013 08:06:16 +0000 (09:06 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 29 Jan 2013 17:47:18 +0000 (18:47 +0100)
These static inlines are duplicating the task now done by the
Nomadik pinctrl drivers, so delete them from the prcmu static
inlines, also delete the register definitions as these should
only be known by the pinctrl driver.

Cc: Loic Pallardy <loic.pallardy@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Michel Jaouen <michel.jaouen@st.com>
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
include/linux/mfd/db8500-prcmu.h
include/linux/mfd/dbx500-prcmu.h

index 6ee4247df11e923bd004926e1a39c719e2d4a3c5..a65deddede2ff83684e03d9280c7b1aa3653573b 100644 (file)
 /*
  * Registers
  */
-#define DB8500_PRCM_GPIOCR 0x138
-#define DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0    BIT(0)
-#define DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD     BIT(9)
-#define DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1    BIT(11)
-#define DB8500_PRCM_GPIOCR_SPI2_SELECT         BIT(23)
-
 #define DB8500_PRCM_LINE_VALUE 0x170
 #define DB8500_PRCM_LINE_VALUE_HSI_CAWAKE0     BIT(3)
 
index c202d6c4d87916bb82ca8aeade76b3ee1ebba3b2..ac601470962cdb3cd115deb8d938fc6e9585f649 100644 (file)
@@ -626,85 +626,6 @@ static inline void prcmu_clear(unsigned int reg, u32 bits)
        prcmu_write_masked(reg, bits, 0);
 }
 
-#if defined(CONFIG_UX500_SOC_DB8500)
-
-/**
- * prcmu_enable_spi2 - Enables pin muxing for SPI2 on OtherAlternateC1.
- */
-static inline void prcmu_enable_spi2(void)
-{
-       if (cpu_is_u8500())
-               prcmu_set(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT);
-}
-
-/**
- * prcmu_disable_spi2 - Disables pin muxing for SPI2 on OtherAlternateC1.
- */
-static inline void prcmu_disable_spi2(void)
-{
-       if (cpu_is_u8500())
-               prcmu_clear(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT);
-}
-
-/**
- * prcmu_enable_stm_mod_uart - Enables pin muxing for STMMOD
- * and UARTMOD on OtherAlternateC3.
- */
-static inline void prcmu_enable_stm_mod_uart(void)
-{
-       if (cpu_is_u8500()) {
-               prcmu_set(DB8500_PRCM_GPIOCR,
-                       (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 |
-                        DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0));
-       }
-}
-
-/**
- * prcmu_disable_stm_mod_uart - Disables pin muxing for STMMOD
- * and UARTMOD on OtherAlternateC3.
- */
-static inline void prcmu_disable_stm_mod_uart(void)
-{
-       if (cpu_is_u8500()) {
-               prcmu_clear(DB8500_PRCM_GPIOCR,
-                       (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 |
-                        DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0));
-       }
-}
-
-/**
- * prcmu_enable_stm_ape - Enables pin muxing for STM APE on OtherAlternateC1.
- */
-static inline void prcmu_enable_stm_ape(void)
-{
-       if (cpu_is_u8500()) {
-               prcmu_set(DB8500_PRCM_GPIOCR,
-                       DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD);
-       }
-}
-
-/**
- * prcmu_disable_stm_ape - Disables pin muxing for STM APE on OtherAlternateC1.
- */
-static inline void prcmu_disable_stm_ape(void)
-{
-       if (cpu_is_u8500()) {
-               prcmu_clear(DB8500_PRCM_GPIOCR,
-                       DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD);
-       }
-}
-
-#else
-
-static inline void prcmu_enable_spi2(void) {}
-static inline void prcmu_disable_spi2(void) {}
-static inline void prcmu_enable_stm_mod_uart(void) {}
-static inline void prcmu_disable_stm_mod_uart(void) {}
-static inline void prcmu_enable_stm_ape(void) {}
-static inline void prcmu_disable_stm_ape(void) {}
-
-#endif
-
 /* PRCMU QoS APE OPP class */
 #define PRCMU_QOS_APE_OPP 1
 #define PRCMU_QOS_DDR_OPP 2