Thumb2 assembly parsing and encoding for SMLALD/SMLALDX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139906 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index df907d86feee6f611bfeecdf7764b7bf063474e4..3183d7629d45d2e79a34056b06e0a7d9619a1d90 100644 (file)
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -2624,12 +2624,12 @@ def t2SMLSDX  : T2FourReg_mac<0, 0b100, 0b0001, (outs rGPR:$Rd),
             "\t$Rd, $Rn, $Rm, $Ra", []>,
           Requires<[IsThumb2, HasThumb2DSP]>;
 def t2SMLALD  : T2FourReg_mac<1, 0b100, 0b1100, (outs rGPR:$Ra,rGPR:$Rd),
-                        (ins rGPR:$Rm, rGPR:$Rn), IIC_iMAC64, "smlald",
-                        "\t$Ra, $Rd, $Rm, $Rn", []>,
+                        (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, "smlald",
+                        "\t$Ra, $Rd, $Rn, $Rm", []>,
           Requires<[IsThumb2, HasThumb2DSP]>;
 def t2SMLALDX : T2FourReg_mac<1, 0b100, 0b1101, (outs rGPR:$Ra,rGPR:$Rd),
-                        (ins rGPR:$Rm,rGPR:$Rn), IIC_iMAC64, "smlaldx",
-                        "\t$Ra, $Rd, $Rm, $Rn", []>,
+                        (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaldx",
+                        "\t$Ra, $Rd, $Rn, $Rm", []>,
           Requires<[IsThumb2, HasThumb2DSP]>;
 def t2SMLSLD  : T2FourReg_mac<1, 0b101, 0b1100, (outs rGPR:$Ra,rGPR:$Rd),
                         (ins rGPR:$Rm,rGPR:$Rn), IIC_iMAC64, "smlsld",

diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index adf585d63ed4219697e2067766b90902367f15ce..84de70ff242ac209897d5e7f9c8d229fbcb11b3b 100644 (file)
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -1822,6 +1822,22 @@ _func:
 @ CHECK: smlalttge     r8, r3, r8, r4  @ encoding: [0xc8,0xfb,0xb4,0x83]
 
 
+@------------------------------------------------------------------------------
+@ SMLALD/SMLALDX
+@------------------------------------------------------------------------------
+        smlald r2, r3, r5, r8
+        smlaldx r2, r3, r5, r8
+        ite eq
+        smlaldeq r2, r3, r5, r8
+        smlaldxne r2, r3, r5, r8
+
+@ CHECK: smlald        r2, r3, r5, r8          @ encoding: [0xc5,0xfb,0xc8,0x23]
+@ CHECK: smlaldx r2, r3, r5, r8         @ encoding: [0xc5,0xfb,0xd8,0x23]
+@ CHECK: ite   eq                      @ encoding: [0x0c,0xbf]
+@ CHECK: smlaldeq      r2, r3, r5, r8  @ encoding: [0xc5,0xfb,0xc8,0x23]
+@ CHECK: smlaldxne     r2, r3, r5, r8  @ encoding: [0xc5,0xfb,0xd8,0x23]
+
+
 @------------------------------------------------------------------------------
 @ SUB (register)
 @------------------------------------------------------------------------------