arm64: dts: rk3368: add leakage-voltage-sel property for cpu opp table

Change-Id: I5f72c3cd59216723018a021b77081f9fbd630b0e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 7fb16c5e4ba3048cfd424aa85dde3938b7aae8b7..f3f3ba0ffe822a767b02b5175a7e29fd4f6556e3 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -216,6 +216,12 @@
        cluster0_opp: opp_table0 {
                compatible = "operating-points-v2";
                opp-shared;
+               leakage-voltage-sel = <
+                       1   24   0
+                       25  254  1
+               >;
+               nvmem-cells = <&cpu_leakage>;
+               nvmem-cell-names = "cpu_leakage";
 
                opp@216000000 {
                        opp-hz = /bits/ 64 <216000000>;
@@ -253,6 +259,12 @@
        cluster1_opp: opp_table1 {
                compatible = "operating-points-v2";
                opp-shared;
+               leakage-voltage-sel = <
+                       1   24   0
+                       25  254  1
+               >;
+               nvmem-cells = <&cpu_leakage>;
+               nvmem-cell-names = "cpu_leakage";
 
                opp@216000000 {
                        opp-hz = /bits/ 64 <216000000>;