rk29: clock: fix aclk_lcdc from ddr pll
author黄涛 <huangtao@rock-chips.com>
Mon, 18 Jul 2011 11:16:33 +0000 (19:16 +0800)
committer黄涛 <huangtao@rock-chips.com>
Mon, 18 Jul 2011 11:21:42 +0000 (19:21 +0800)
arch/arm/mach-rk29/clock.c

index f15715cdaecf46fd40203977a8d07daa75a295f3..9fa3180e36c93008a61bf2c14fc8de40a9dbf68b 100755 (executable)
@@ -2545,7 +2545,8 @@ static void __init rk29_clock_common_init(unsigned long ppll_rate, unsigned long
        clk_set_rate_nolock(&codec_pll_clk, cpll_rate);
        clk_set_parent_nolock(&clk_gpu, &codec_pll_clk);
 
-       clk_set_parent_nolock(&aclk_lcdc, cpll_rate > ppll_rate ? &codec_pll_clk : &general_pll_clk);
+       /* ddr pll */
+       clk_set_parent_nolock(&aclk_lcdc, &ddr_pll_clk);
 
        /* arm pll */
        clk_set_rate_nolock(&arm_pll_clk, armclk);