ARM: dts: rk3288: fix to timer0 for broadcast timer

Change-Id: I0dd9a367c2587391b17ab9bb3a4610abdee14816
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 49aa2f06033ef6a009f2d5ad0cc5e3a67d1e9cf3..7645224fd39a83c28804dbdafc65521eeb8291f0 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -268,14 +268,6 @@
                clock-frequency = <24000000>;
        };
 
-       timer: timer@ff810000 {
-               compatible = "rockchip,rk3288-timer";
-               reg = <0x0 0xff810000 0x0 0x20>;
-               interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&xin24m>, <&cru PCLK_TIMER>;
-               clock-names = "timer", "pclk";
-       };
-
        display-subsystem {
                compatible = "rockchip,display-subsystem";
                ports = <&vopl_out>, <&vopb_out>;
@@ -733,6 +725,14 @@
                status = "disabled";
        };
 
+       timer: timer@ff6b0000 {
+               compatible = "rockchip,rk3288-timer";
+               reg = <0x0 0xff6b0000 0x0 0x20>;
+               interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&xin24m>, <&cru PCLK_TIMER>;
+               clock-names = "timer", "pclk";
+       };
+
        bus_intmem@ff700000 {
                compatible = "mmio-sram";
                reg = <0x0 0xff700000 0x0 0x18000>;