\r
#define RGA2_MAJOR 255\r
\r
-#if defined(CONFIG_ROCKCHIP_RGA2)\r
-#define RK32_RGA2_PHYS 0xFFC70000\r
-#define RK32_RGA2_SIZE 0x00001000\r
-#endif\r
#define RGA2_RESET_TIMEOUT 1000\r
\r
/* Driver information */\r
if (rga2_service.enable)\r
return;\r
\r
- clk_enable(rga2_drvdata->rga2);\r
+ //clk_enable(rga2_drvdata->rga2);\r
clk_enable(rga2_drvdata->aclk_rga2);\r
clk_enable(rga2_drvdata->hclk_rga2);\r
- clk_enable(rga2_drvdata->pd_rga2);\r
+ //clk_enable(rga2_drvdata->pd_rga2);\r
wake_lock(&rga2_drvdata->wake_lock);\r
rga2_service.enable = true;\r
}\r
rga2_dump();\r
}\r
\r
- clk_disable(rga2_drvdata->pd_rga2);\r
- clk_disable(rga2_drvdata->rga2);\r
+ //clk_disable(rga2_drvdata->pd_rga2);\r
+ //clk_disable(rga2_drvdata->rga2);\r
clk_disable(rga2_drvdata->aclk_rga2);\r
clk_disable(rga2_drvdata->hclk_rga2);\r
wake_unlock(&rga2_drvdata->wake_lock);\r
.fops = &rga2_fops,\r
};\r
\r
+static const struct of_device_id rockchip_rga_of_match[] = {\r
+ { .compatible = "rockchip,rga", .data = NULL, },\r
+ {},\r
+};\r
+\r
static int __devinit rga2_drv_probe(struct platform_device *pdev)\r
{\r
struct rga2_drvdata_t *data;\r
+ struct resource *res;\r
+ struct device_node *np = pdev->dev.of_node;\r
int ret = 0;\r
\r
INIT_LIST_HEAD(&rga2_service.waiting);\r
rga2_service.last_prc_src_format = 1; /* default is yuv first*/\r
rga2_service.enable = false;\r
\r
- data = kzalloc(sizeof(struct rga2_drvdata_t), GFP_KERNEL);\r
+ data = devm_kzalloc(&pdev->dev, sizeof(struct rga2_drvdata_t), GFP_KERNEL);\r
if(NULL == data)\r
{\r
ERR("failed to allocate driver data.\n");\r
INIT_DELAYED_WORK(&data->power_off_work, rga2_power_off_work);\r
wake_lock_init(&data->wake_lock, WAKE_LOCK_SUSPEND, "rga");\r
\r
- data->pd_rga2 = clk_get(NULL, "pd_rga");\r
- data->rga2 = clk_get(NULL, "rga");\r
- data->aclk_rga2 = clk_get(NULL, "aclk_rga");\r
- data->hclk_rga2 = clk_get(NULL, "hclk_rga");\r
+ //data->pd_rga2 = clk_get(NULL, "pd_rga");\r
+ //data->rga2 = clk_get(NULL, "rga");\r
+ data->aclk_rga = devm_clk_get(&pdev->dev, "aclk_rga");\r
+ data->hclk_rga = devm_clk_get(&pdev->dev, "hclk_rga");\r
\r
- /* map the memory */\r
- if (!request_mem_region(RK32_RGA2_PHYS, RK32_RGA2_SIZE, "rga_io"))\r
- {\r
- pr_info("failed to reserve rga HW regs\n");\r
- return -EBUSY;\r
- }\r
+ clk_prepare_enable(data->aclk_rga);\r
+ clk_prepare_enable(data->hclk_rga);\r
\r
- data->rga_base = (void*)ioremap_nocache(RK32_RGA2_PHYS, RK32_RGA2_SIZE);\r
- if (data->rga_base == NULL)\r
- {\r
+ /* map the registers */\r
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);\r
+ data->rga_base = devm_ioremap_resource(&pdev->dev, res);\r
+ if (!data->rga_base) {\r
ERR("rga ioremap failed\n");\r
ret = -ENOENT;\r
goto err_ioremap;\r
\r
/* get the IRQ */\r
data->irq = platform_get_irq(pdev, 0);\r
- if (data->irq <= 0)\r
- {\r
+ if (data->irq <= 0) {\r
ERR("failed to get rga irq resource (%d).\n", data->irq);\r
ret = data->irq;\r
goto err_irq;\r
}\r
\r
/* request the IRQ */\r
- ret = request_threaded_irq(data->irq, rga2_irq, rga2_irq_thread, 0, "rga", pdev);\r
+ ret = devm_request_threaded_irq(&pdev->dev, data->irq, rga2_irq, rga2_irq_thread, 0, "rga", pdev);\r
if (ret)\r
{\r
ERR("rga request_irq failed (%d).\n", ret);\r
iounmap(data->rga_base);\r
err_ioremap:\r
wake_lock_destroy(&data->wake_lock);\r
- kfree(data);\r
+ //kfree(data);\r
\r
return ret;\r
}\r
free_irq(data->irq, &data->miscdev);\r
iounmap((void __iomem *)(data->rga_base));\r
\r
- clk_put(data->pd_rga2);\r
- clk_put(data->rga2);\r
+ clk_disable_unprepare(data->aclk_rga);\r
+ clk_disable_unprepare(data->hclk_rga);\r
+\r
+ //clk_put(data->pd_rga2);\r
+ //clk_put(data->rga2);\r
clk_put(data->aclk_rga2);\r
clk_put(data->hclk_rga2);\r
\r