struct rockchip_efuse {
int (*get_leakage)(int ch);
int efuse_version;
+ int process_version;
};
static struct rockchip_efuse efuse;
return ret;
}
+static int __init rk3288_get_process_version(void)
+{
+ int ret = efuse_buf[6]&0x0f;
+
+ return ret;
+}
+
static int rk3288_get_leakage(int ch)
{
if ((ch < 0) || (ch > 2))
return efuse.efuse_version;
}
+int rockchip_process_version(void)
+{
+ return efuse.process_version;
+}
+
int rockchip_get_leakage(int ch)
{
if (efuse.get_leakage)
if (ret == 32) {
efuse.get_leakage = rk3288_get_leakage;
efuse.efuse_version = rk3288_get_efuse_version();
+ efuse.process_version = rk3288_get_process_version();
rockchip_set_cpu_version((efuse_buf[6] >> 4) & 3);
rk3288_set_system_serial();
} else {
#define GPU_LEAKAGE_CH 1
#define LOG_LEAKAGE_CH 2
+#define RK3288_PROCESS_V0 0
+#define RK3288_PROCESS_V1 1
+
int rockchip_efuse_version(void);
+int rockchip_process_version(void);
int rockchip_get_leakage(int ch);
#endif