ARM: dts: rk3288: add dual-channel dsi support

Change-Id: Ic28014af8e5a264f6ccf760caf7ef888392ff63d
Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 317fa83354f2ebd768a9e2134281face92fbc215..536db2d01e834ca5f2251f8b39d07dd995c72ce9 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -75,6 +75,8 @@
                spi0 = &spi0;
                spi1 = &spi1;
                spi2 = &spi2;
+               dsi0 = &dsi0;
+               dsi1 = &dsi1;
        };
 
        arm-pmu {
@@ -1211,6 +1213,11 @@
                                reg = <3>;
                                remote-endpoint = <&lvds_in_vopb>;
                        };
+
+                       vopb_out_dsi1: endpoint@4 {
+                               reg = <4>;
+                               remote-endpoint = <&dsi1_in_vopb>;
+                       };
                };
        };
 
@@ -1263,6 +1270,10 @@
                                remote-endpoint = <&lvds_in_vopl>;
                        };
 
+                       vopl_out_dsi1: endpoint@4 {
+                               reg = <4>;
+                               remote-endpoint = <&dsi1_in_vopl>;
+                       };
                };
        };
 
@@ -1291,9 +1302,13 @@
                status = "disabled";
 
                ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
                        dsi0_in: port {
                                #address-cells = <1>;
                                #size-cells = <0>;
+
                                dsi0_in_vopb: endpoint@0 {
                                        reg = <0>;
                                        remote-endpoint = <&vopb_out_dsi0>;
@@ -1306,6 +1321,38 @@
                };
        };
 
+       dsi1: dsi@ff964000 {
+               compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
+               reg = <0x0 0xff964000 0x0 0x4000>;
+               interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI1>;
+               clock-names = "ref", "pclk";
+               power-domains = <&power RK3288_PD_VIO>;
+               rockchip,grf = <&grf>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       dsi1_in: port {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               dsi1_in_vopb: endpoint@0 {
+                                       reg = <0>;
+                                       remote-endpoint = <&vopb_out_dsi1>;
+                               };
+                               dsi1_in_vopl: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&vopl_out_dsi1>;
+                               };
+                       };
+               };
+       };
+
        edp: dp@ff970000 {
                compatible = "rockchip,rk3288-dp";
                reg = <0x0 0xff970000 0x0 0x4000>;