#include <linux/rockchip/cpu.h>
#include <linux/rockchip/dvfs.h>
-#define GPUCLK_NAME "clk_gpu"
+#define GPUCLK_NAME "clk_gpu_pre"
#define GPUCLK_PD_NAME "pd_gpu"
#define GPU_MHZ 1000000
if (mali_clock != 0 || mali_clock_pd != 0)
return ret;
-
+#if 0
mali_clock_pd = clk_get(NULL,GPUCLK_PD_NAME);
if (IS_ERR(mali_clock_pd)) {
MALI_PRINT( ("MALI Error : failed to get source mali pd\n"));
goto err_gpu_clk;
}
clk_prepare_enable(mali_clock_pd);
-
+#endif
mali_clock = clk_get_dvfs_node(GPUCLK_NAME);
if (IS_ERR(mali_clock)) {
MALI_PRINT( ("MALI Error : failed to get source mali clock\n"));
mali_init_clock = mali_dvfs[0];
num_clock = i;
minuend = 1;
- MALI_PRINT(("Mali400 inside of rk3036\r\n"));
+ MALI_PRINT(("Mali400 inside of rk3126\r\n"));
mali_clk_set_rate(mali_clock, mali_init_clock);
gpu_power_state = 1;
err_gpu_clk:
MALI_PRINT(("::clk_put:: %s mali_clock\n", __FUNCTION__));
gpu_power_state = 0;
+#if 0
clk_disable_unprepare(mali_clock_pd);
+#endif
dvfs_clk_disable_unprepare(mali_clock);
mali_clock = 0;
mali_clock_pd = 0;
-
return ret;
}
if (mali_clock == 0 && mali_clock_pd == 0)
return MALI_TRUE;
dvfs_clk_disable_unprepare(mali_clock);
+#if 0
clk_disable_unprepare(mali_clock_pd);
+#endif
mali_clock = 0;
mali_clock_pd = 0;
if(gpu_power_state)
_mali_osk_errcode_t mali_platform_init(void)
{
if (cpu_is_rk3036()) {
- audis_gpu_clk = clk_get(NULL,"clk_gpu");
+ audis_gpu_clk = clk_get(NULL,"clk_gpu_pre");
- if (IS_ERR(mali_clock_pd)) {
+ if (IS_ERR(audis_gpu_clk)) {
MALI_PRINT( ("MALI Error : failed to get audis mali clk\n"));
return MALI_FALSE;
if (cpu_is_rk3036()) {
clk_prepare_enable(audis_gpu_clk);
} else {
+ #if 0
clk_prepare_enable(mali_clock_pd);
+ #endif
dvfs_clk_prepare_enable(mali_clock);
}
gpu_power_state = 1 ;
clk_disable_unprepare(audis_gpu_clk);
} else {
dvfs_clk_disable_unprepare(mali_clock);
+ #if 0
clk_disable_unprepare(mali_clock_pd);
+ #endif
}
gpu_power_state = 0;
}