[ARM] Remove yucky ifdefs to print "id(wb)BRR" suffix on CPU name
authorRussell King <rmk@dyn-67.arm.linux.org.uk>
Thu, 29 Jun 2006 14:03:09 +0000 (15:03 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 29 Jun 2006 14:03:09 +0000 (15:03 +0100)
The "id(wb)BRR" suffix reports which CPU debugging options were (or
were not) selected at kernel build time.  Rather than have every
proc-*.S file implement this, report the control register value,
from which this information can be deduced.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/setup.c
arch/arm/mm/proc-arm1020e.S
arch/arm/mm/proc-arm1022.S
arch/arm/mm/proc-arm1026.S
arch/arm/mm/proc-arm920.S
arch/arm/mm/proc-arm922.S
arch/arm/mm/proc-arm925.S
arch/arm/mm/proc-arm926.S

index 093ccba0503c9a1885bbddc3fa6f3c2e8a67e5eb..7d02f96eeb9d2493a103b1ac4f6f46625827a811 100644 (file)
@@ -315,9 +315,9 @@ static void __init setup_processor(void)
        cpu_cache = *list->cache;
 #endif
 
-       printk("CPU: %s [%08x] revision %d (ARMv%s)\n",
+       printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08x\n",
               cpu_name, processor_id, (int)processor_id & 15,
-              proc_arch[cpu_architecture()]);
+              proc_arch[cpu_architecture()], cr_alignment);
 
        sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS);
        sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
index bcd5ee022e00ae36bde2c50362fdd81114ee3107..8c7e25f4b7e7f059635357d483c34eb7fca5aad0 100644 (file)
@@ -477,25 +477,7 @@ cpu_elf_name:
 
        .type   cpu_arm1020e_name, #object
 cpu_arm1020e_name:
-       .ascii  "ARM1020E"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
-       .ascii  "B"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
-       .ascii  "RR"
-#endif
-       .ascii  "\0"
+       .asciz  "ARM1020E"
        .size   cpu_arm1020e_name, . - cpu_arm1020e_name
 
        .align
index b0ccff4fadd2559912e5edf50483369726f7fd3a..92218e6b39064eb277abee451e36236cfe293e46 100644 (file)
@@ -460,25 +460,7 @@ cpu_elf_name:
 
        .type   cpu_arm1022_name, #object
 cpu_arm1022_name:
-       .ascii  "arm1022"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
-       .ascii  "B"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
-       .ascii  "RR"
-#endif
-       .ascii  "\0"
+       .asciz  "ARM1022"
        .size   cpu_arm1022_name, . - cpu_arm1022_name
 
        .align
index abe850c9a641ef0ef6074eaaabeb8484852a2929..2796c8e0ddf341c5919acc913d6cef1e0222b007 100644 (file)
@@ -456,25 +456,7 @@ cpu_elf_name:
 
        .type   cpu_arm1026_name, #object
 cpu_arm1026_name:
-       .ascii  "ARM1026EJ-S"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
-       .ascii  "B"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
-       .ascii  "RR"
-#endif
-       .ascii  "\0"
+       .asciz  "ARM1026EJ-S"
        .size   cpu_arm1026_name, . - cpu_arm1026_name
 
        .align
index 31dc839ba07c9557ff0dae53de0827b345e870cd..02af3e2a82473e6ffc6ef1e090392d896558f4cb 100644 (file)
@@ -444,19 +444,7 @@ cpu_elf_name:
 
        .type   cpu_arm920_name, #object
 cpu_arm920_name:
-       .ascii  "ARM920T"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#endif
-       .ascii  "\0"
+       .asciz  "ARM920T"
        .size   cpu_arm920_name, . - cpu_arm920_name
 
        .align
index 9e57c34f5c098532c044aa2b1f1c02faa6aa3610..33dae4929f09b050579090ed136f114e1249a07f 100644 (file)
@@ -448,19 +448,7 @@ cpu_elf_name:
 
        .type   cpu_arm922_name, #object
 cpu_arm922_name:
-       .ascii  "ARM922T"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#endif
-       .ascii  "\0"
+       .asciz  "ARM922T"
        .size   cpu_arm922_name, . - cpu_arm922_name
 
        .align
index 8d47c9f3f931b1aaa1381d5ad15347899fddfeb7..aaa9f985b2461dfa56b323bc0daedc9716ce4441 100644 (file)
@@ -511,22 +511,7 @@ cpu_elf_name:
 
        .type   cpu_arm925_name, #object
 cpu_arm925_name:
-       .ascii  "ARM925T"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
-       .ascii  "RR"
-#endif
-#endif
-       .ascii  "\0"
+       .asciz  "ARM925T"
        .size   cpu_arm925_name, . - cpu_arm925_name
 
        .align
index cb4d8f33d2a3ff4b02146e2475ab8e22e9affbf8..ce246dd7b407c6e9458069775aaea5a6245c313f 100644 (file)
@@ -460,22 +460,7 @@ cpu_elf_name:
 
        .type   cpu_arm926_name, #object
 cpu_arm926_name:
-       .ascii  "ARM926EJ-S"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
-       .ascii  "RR"
-#endif
-#endif
-       .ascii  "\0"
+       .asciz  "ARM926EJ-S"
        .size   cpu_arm926_name, . - cpu_arm926_name
 
        .align