Clean up the tests a little, make sure we match an instruction in the right

test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124473 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/Transforms/InstCombine/select.ll b/test/Transforms/InstCombine/select.ll
index b66b22cff6ee29339a760bcb087ea81b19ee4ceb..ba9d99c97dd51e7bb87e2016b1a83c68ec22d3a1 100644 (file)
--- a/test/Transforms/InstCombine/select.ll
+++ b/test/Transforms/InstCombine/select.ll
@@ -695,6 +695,7 @@ define i64 @test50(i32 %a) nounwind {
 ; This select instruction can't be eliminated because trying to do so would
 ; change the number of vector elements. This used to assert.
 define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) {
+; CHECK: @test51
   %select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp
 ; CHECK: select <3 x i1>
   %tmp2 = bitcast <3 x i16> %select to i48
@@ -703,15 +704,13 @@ define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) {
 
 ; PR8575
 
-@g = common global i32 0, align 4
-define void @test52(i32 %n, i32 %m) nounwind {
-entry:
+define i32 @test52(i32 %n, i32 %m) nounwind {
+; CHECK: @test52
   %cmp = icmp sgt i32 %n, %m
   %. = select i1 %cmp, i32 1, i32 3
   %add = add nsw i32 %., 3
   %storemerge = select i1 %cmp, i32 %., i32 %add
 ; CHECK: select i1 %cmp, i32 1, i32 6
-  store i32 %storemerge, i32* @g, align 4
-  ret void
+  ret i32 %storemerge
 }