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intel_sst: Enable recording via DMIC
author
Lu Guanqun
<guanqun.lu@intel.com>
Tue, 3 May 2011 16:33:59 +0000
(17:33 +0100)
committer
Greg Kroah-Hartman
<gregkh@suse.de>
Tue, 10 May 2011 19:58:27 +0000
(12:58 -0700)
We may need to make some of this board specific eventually
Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/staging/intel_sst/intelmid_v2_control.c
patch
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diff --git
a/drivers/staging/intel_sst/intelmid_v2_control.c
b/drivers/staging/intel_sst/intelmid_v2_control.c
index 9f8ccea83ca9ddb713f6f7f2890be87e0cbc4cab..f168c95067dc9749a7f03b0576a44ef98ca919da 100644
(file)
--- a/
drivers/staging/intel_sst/intelmid_v2_control.c
+++ b/
drivers/staging/intel_sst/intelmid_v2_control.c
@@
-880,12
+880,12
@@
static int nc_set_selected_input_dev(u8 value)
sc_access[2].reg_addr = 0x10a;
sc_access[2].value = 0x40;
sc_access[2].mask = MASK6;
- sc_access[3].reg_addr =
0x109
;
+ sc_access[3].reg_addr =
LILSEL
;
sc_access[3].mask = MASK6;
sc_access[3].value = 0x00;
- sc_access[4].reg_addr =
0x104
;
- sc_access[4].
value = 0x3C
;
- sc_access[4].
mask = 0xff
;
+ sc_access[4].reg_addr =
ADCSAMPLERATE
;
+ sc_access[4].
mask = MASK7|MASK6|MASK5|MASK4|MASK3
;
+ sc_access[4].
value = 0x33
;
num_val = 5;
break;
default: